Preparation method of metal silicide
By forming an oxide layer on the edge of the silicon-containing substrate and performing rapid laser heat treatment, the problem of chips being easily broken during laser annealing is solved, and a more efficient and reliable preparation of metal silicides is achieved.
Patent Information
- Application Number
- CN202311736575.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-14
- Publication Date
- 2025-06-17
AI Technical Summary
The chip is prone to chipping during laser annealing, and the prior art is difficult to completely avoid or overcome this problem.
An oxide layer is formed at the edge of the silicon-containing substrate, and the metal layer reacts with silicon through rapid laser heat treatment to form metal silicide, and the oxide layer acts as a buffer layer for the laser cutting blade.
Through oxide layer buffering, the instantaneous peak of the temperature and energy of the silicon wafer when the laser is applied is reduced, the risk of silicon wafer breakage is reduced, and the efficiency and reliability of preparing metal silicides are improved.
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Figure CN120164792A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductors, and particularly relates to a method for preparing metal silicide. Background Art
[0002] In semiconductor manufacturing processes, currently, a self-aligned metal silicide process is mostly adopted after device formation to form metal silicide on the gate region and source / drain regions, thereby reducing the resistance of the device. In the self-aligned process, after depositing metal on the polysilicon gate and active regions, rapid thermal annealing treatment is required to form metal silicide.
[0003] A rapid thermal processing (RTP) equipment is a single-wafer heat treatment equipment that can rapidly raise the temperature of the wafer to the temperature required by the process and can rapidly cool down. The RTP equipment has various energy sources, a wide annealing time range, excellent thermal budget, and better surface uniformity. Especially for large-sized wafers, it has better performance. The RTP equipment can repair the damage after ion implantation, and multiple chambers can operate different process procedures simultaneously.
[0004] Laser annealing directly uses laser to rapidly increase the temperature of the wafer layer until the silicon crystal is sufficiently melted to make it highly activated. Laser annealing has a fast heating rate and sensitive control, does not require heating with a filament, and basically has no problems of temperature lag and filament life, and is widely used in the annealing of wafers. However, in the laser RTP process, using the LSA101 laser rapid heat treatment machine of Ultratech is prone to cause wafer breakage. Even with various methods optimized, the wafer breakage problem caused by the above laser annealing cannot be completely avoided or overcome. Summary of the Invention
[0005] The purpose of the present invention is to provide a method for preparing metal silicide to solve the problem that the chip is prone to wafer breakage during laser annealing.
[0006] To achieve the above purpose, the present invention provides a method for preparing metal silicide, which includes the following steps: forming a metal layer on a silicon-containing substrate with characteristic devices; forming an oxide layer on the silicon-containing substrate with the metal layer, and the oxide layer is located at the edge of the silicon-containing substrate; performing a first annealing on the silicon-containing substrate to make the metal layer react with silicon in the silicon-containing substrate to generate a first metal silicide; removing the unreacted metal layer, and then performing a second annealing on the silicon-containing substrate to form a second metal silicide on the silicon-containing substrate; wherein, the first annealing and the second annealing adopt laser rapid heat treatment; removing the oxide layer.
[0007] Wherein, the oxide layer is annular; and / or the width of the oxide layer is 0 - 3 mm; and / or the thickness of the oxide layer is 1 - 15 angstroms.
[0008] Wherein, during the laser rapid heat treatment process, there is an annealing processing path formed by scanning a laser beam on the silicon-containing substrate; the annealing processing path includes a main path and a first scanning area and a second scanning area located at both ends of the main path respectively; the oxide layer intersects with the first scanning area and the second scanning area; preferably, along the radial direction of the oxide layer, the distance between the inner edge of the oxide layer and the outer edge of the main path is 0 - 3 mm.
[0009] Optionally, the method for forming the oxide layer includes: wet-oxidizing the silicon-containing substrate with a metal layer using an aqueous ozone solution; the oxidation temperature is 0 - 30 °C; the oxidation time is 0 - 5 min.
[0010] Optionally, the oxide layer is removed using a diluted hydrofluoric acid solution.
[0011] Optionally, the metal layer covers the characteristic devices and the areas on the silicon-containing substrate where silicon is exposed; the thickness of the metal layer covering between the characteristic devices is greater than the thickness of the metal layer covering the areas on the silicon-containing substrate where silicon is exposed.
[0012] Optionally, the method further includes: forming a TiN layer in a preset area on the surface of the metal layer; the thickness of the TiN layer is 1 - 200 angstroms.
[0013] Optionally, the metal layer is a nickel-containing metal layer; the nickel-containing metal is selected from one or more of Ni, NiCo, NiPt, and NiPtCo; and / or the first metal silicide is selected from one or more of Ni2Si, Ni2CoSi, Ni2PtSi, and Ni2PtCoSi; and / or the second metal silicide is selected from one or more of NiSi, NiCoSi, NiPtSi, and NiPtCoSi.
[0014] Optionally, the content of Ni in the nickel-containing metal is 50 - 99 wt%.
[0015] Optionally, the thickness of the metal layer is 0 - 200 angstroms; and / or the thickness of the second metal silicide is 0 - 200 angstroms.
[0016] Optionally, the temperature of the first annealing is 100 - 300 °C; the time is 0 - 120 s; and / or the temperature of the second annealing is 400 - 600 °C; the time is 0 - 60 s.
[0017] Through the above technical solution, an oxide layer is formed at the edge of the silicon-containing substrate on which the metal layer is formed, and then rapid laser heat treatment is performed. The oxide layer serves as a buffer layer for the laser cutting, which can alleviate the problem of wafer fragmentation caused by the excessively high temperature of the silicon wafer instantaneously irradiated by the laser beam and the excessively high energy of the laser beam.
[0018] Other features and advantages of the present invention will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the following specific implementation, they are used to explain the present invention, but do not constitute a limitation to the present invention. In the drawings:
[0020] Figure 1 is a schematic structural diagram of annealing after an oxide layer is formed on a silicon-containing chip in the method provided by the present invention. SPECIFIC IMPLEMENTATION MODE
[0021] The following details the specific implementation mode of the present invention. It should be understood that the specific implementation mode described herein is only used to illustrate and explain the present invention and is not used to limit the present invention.
[0022] The self-aligned silicide (Salicide) technology adds relevant process steps of silicon metal compounds on the basis of the standard CMOS process technology. The self-aligned silicide process steps are performed after the source and drain ion implantation are completed. The basic process steps for forming self-aligned silicides include first depositing a layer of metal (such as Ti, Co, and NiPt) on the polysilicon gate and the active region by physical vapor deposition (PVD). Then, two rapid thermal annealing treatments (RTA) and one selective wet etching treatment are performed, and finally, metal silicides are formed on the polysilicon surface and the active region surface.
[0023] However, when using the Ultratech LSA101 (now acquired by Veeco) laser rapid heat treatment machine to perform rapid thermal annealing treatment on the silicon wafer surface, it is easy to cause the problem of wafer fragmentation, and almost all the fragmented wafers have the chip edge as the breakage point. The inventor has found through research that the possible reason for the fragmentation is that the silicon wafer accumulates stress after multiple steps before the annealing process. When the laser heat treatment cuts and temperes, the instantaneous temperature of the laser beam irradiating the chip and the energy of the laser beam are too high, resulting in chip fragmentation.
[0024] In view of the foregoing reasons, the present invention provides a method for preparing metal silicides, as Figure 1 shown, the method includes the following steps:
[0025] S1. Form a metal layer on a silicon-containing substrate with a characteristic device;
[0026] S2. Form an oxide layer on the silicon-containing substrate with the metal layer, and the oxide layer is located at the edge of the silicon-containing substrate;
[0027] S3. Perform a first annealing on the silicon-containing substrate to cause the metal layer to react with silicon in the silicon-containing substrate to generate a first metal silicide;
[0028] S4. Remove the unreacted metal layer, and then perform a second annealing on the silicon-containing substrate to form a second metal silicide on the silicon-containing substrate; wherein, the first annealing and the second annealing adopt laser rapid heat treatment;
[0029] S5. Remove the oxide layer.
[0030] Through the above technical solution, in the present invention, an oxide layer is formed at the edge of the silicon-containing substrate on which the metal layer is formed, and then laser rapid heat treatment is performed. The oxide layer serves as a buffer layer for laser knife-edge cutting, which can alleviate the problem of silicon wafer fragmentation caused by too high temperature at the irradiation point during laser knife-edge cutting annealing and too high laser energy of the laser.
[0031] In the present invention, the silicon-containing substrate contains at least Si element. For example, it can be bulk silicon, silicon-on-insulator (SOI), silicon germanium, silicon carbide, or other Si-containing semiconductor materials. As a preferred embodiment, the silicon-containing substrate is silicon or silicon-on-insulator.
[0032] In step S1, a plurality of devices are formed on the silicon-containing substrate. For MOSFET devices, that is, conventional methods such as chemical vapor deposition and MBE are used to form characteristic devices on the silicon-containing substrate, including source electrodes, drain electrodes, or STI structures, and can also be a gate insulating layer and a gate conductive layer deposited in sequence, and a plurality of gate stack structures are etched. In the front-gate process, the gate insulating layer can be silicon oxide, silicon oxynitride, or a high-k material, and the high-k material can be a nitride, a perovskite-phase oxide, or an oxide of a subgroup metal and a lanthanide metal; the gate conductive layer can be a metal, a metal alloy, a metal nitride, or polysilicon. In the back-gate process, the gate insulating layer is silicon oxide or silicon oxynitride, and the gate conductive layer can be polysilicon or amorphous silicon. Gate sidewalls are also formed on both sides of the gate insulating layer and the gate conductive layer, and the gate sidewalls can be silicon nitride, silicon oxynitride, or a high-stress metal oxide. For other types of devices, the characteristic devices formed on the silicon-containing substrate can be SRAM cell patterns and fin-shaped Si wires, etc.
[0033] Then, a metal layer is formed on the entire surface of the silicon-containing substrate by sputtering, serving as a precursor for forming metal silicide. Since even heavily doped polysilicon has a relatively high resistivity, when the size of semiconductor devices shrinks, the resistance of local polysilicon interconnects will also increase, which will lead to significant power loss and large RC delay. Therefore, polysilicide with low resistance of the wall polysilicon is widely used in semiconductor devices to reduce resistance and improve the speed of the chip. Specifically, the metal in the polysilicide can be Ti, W, Ni, Co, Pt, or an alloy of these metals, etc.
[0034] In some preferred embodiments, the method further includes: forming a TiN layer in a preset area on the surface of the metal layer. Preferably, the TiN layer is formed before forming the oxide layer. This TiN layer covers the surface of the metal layer and serves as a protective layer. Specifically, it can be formed by physical vapor deposition, and the thickness of the TiN layer is 1 - 200 angstroms.
[0035] Preferably, the metal layer is a nickel-containing metal layer, that is, the metal layer contains at least metal nickel, which can significantly reduce the annealing temperature. Further, the nickel-containing metal is selected from one or more of Ni, NiCo, NiPt, and NiPtCo. In some preferred embodiments, the content of Ni in the nickel-containing metal is 50 - 99 wt%.
[0036] The nickel-containing metal is deposited on the wafer surface by sputtering. Among them, the source electrode, drain electrode, gate conductive layer, and gate sidewall are all in contact with the aforementioned nickel-containing metal. The above-mentioned metal does not react with the oxide, and reacts with the directly contacted polysilicon and active region to generate metal silicide. Correspondingly, after the first annealing, the nickel-containing metal reacts chemically with silicon to generate the first metal silicide, and the first metal silicide is selected from one or more of Ni2Si, Ni2CoSi, Ni2PtSi, and Ni2PtCoSi. The first metal silicide undergoes a second annealing treatment to generate the second metal silicide, and the second metal silicide is selected from one or more of NiSi, NiCoSi, NiPtSi, and NiPtCoSi.
[0037] During high-temperature treatment, Ni and Si chemically react to form nickel silicide (NiSi). Since NiSi significantly reduces the annealing temperature, it can be used in 10nm technology CMOS devices. However, NiSi has thermal instability and is prone to further react with silicon to generate NiSi2, resulting in the growth of nickel silicide together with the silicon substrate, that is, NiSi pipes or NiSi erodes the silicon substrate, leading to interface leakage. A common solution is to add Pt to the Ni target and sputter NiPt onto the silicon wafer surface to form NiPtSi. Therefore, the metal layer is preferably a metal alloy containing Ni and Pt.
[0038] Specifically, the thickness of the metal layer is 0 - 200 angstroms; to react with the silicon-containing substrate and form a metal silicide layer with sufficient thickness.
[0039] After the metal layer is deposited on the silicon-containing substrate, annealing treatment is required. However, the silicon-containing substrate accumulates stress after multiple processes. When annealing with a laser knife, due to the stress accumulated on the silicon-containing substrate, the edge of the silicon wafer ruptures instantly when irradiated by the laser beam. The stress on the silicon wafer is divided into intrinsic stress and thermal stress. The intrinsic stress is caused by the film density and mainly depends on the ion bombardment during the plasma sputtering deposition process. The thermal stress is caused by the change in the wafer temperature and the different thermal expansion coefficients between the film and the substrate on the wafer surface.
[0040] In step S2, the method for forming the oxide layer includes: wet-oxidizing the silicon-containing substrate with the metal layer using an aqueous ozone solution. For example, using the wet single-wafer device of DNS's SU3200, a thin O3 oxygen layer can be grown on the surface of the silicon wafer.
[0041] Specifically, the oxidation temperature is 0 - 30 °C; the oxidation time is 0 - 5 min. In a specific embodiment, the thickness of the oxide layer is 1 - 15 angstroms, for example, it can be 1 angstrom, 2 angstroms, 3 angstroms, 4 angstroms, 5 angstroms, 6 angstroms, 7 angstroms, 8 angstroms, 9 angstroms, 10 angstroms, 11 angstroms, 12 angstroms, 13 angstroms, 14 angstroms, 15 angstroms or any value within the aforementioned range, so that the silicon-containing substrate can meet the requirements of laser annealing during the first annealing treatment and the second annealing treatment. For example, using the above-mentioned wet single-wafer device of SU3200, a thin O3 oxygen layer with a thickness of about 10 A can be grown on the edge of the silicon wafer.
[0042] As Figure 1 In the structure shown, an oxide layer 200 is formed at the edge of the silicon-containing substrate 100.
[0043] In the present invention, the oxide layer can be in other shapes that can form a closed curve to serve as a buffer layer for laser knife cutting during the rapid thermal processing. In some preferred embodiments, the oxide layer is annular, as Figure 1 shown, and this annular oxide layer 200 is formed on the surface of the silicon wafer and is located at the edge of the silicon wafer.
[0044] In the semiconductor manufacturing process, laser annealing is used to activate dopants in selected regions of a device (structure) formed in a semiconductor wafer. In a laser annealing system, the laser output by a laser light source generates a laser beam through an optical structure and irradiates a specific region of a component to be processed. During the irradiation process, the laser beam moves relative to the component to be processed, thereby forming an annealing processing path on the component to be processed. By designing a specific annealing processing path, the temperature and the received energy of the component to be processed can be within a suitable range, improving the quality of the annealing process. In the present invention, during the laser rapid thermal processing, an annealing processing path formed by scanning of the laser beam is present on the silicon-containing substrate; when the laser beam of the heat treatment device irradiates the silicon-containing substrate, a light spot is first formed at the edge of the silicon-containing substrate. As the laser beam moves, the main path of the annealing processing path formed by the light spot of the laser beam on the silicon-containing substrate is arc-shaped.
[0045] As Figure 1 In the structure shown, the laser beam irradiates on the silicon-containing substrate 100 and forms an annealing working path 300. Specifically, the annealing working path 300 includes a main path and a first scanning region and a second scanning region respectively located at both ends of the main path; wherein, either the first scanning region or the second scanning region can be the initial irradiation region of the laser beam on the silicon-containing substrate. For example, taking the initial contact region 310 as the first scanning region, an oxide layer 200 covers the initial contact region 310 when the laser beam irradiates on the silicon-containing substrate 100. The oxide layer intersects with the first scanning region and the second scanning region, and the oxide layer covers the initial contact region 310. Since an oxide layer is provided at the edge of the silicon wafer as a buffer layer for laser knife cutting, at the starting point of the heat treatment device and the silicon wafer irradiation, the influence of the high temperature and high energy during laser knife cutting on the stress at the starting point of the annealing processing path of the silicon wafer is reduced, and thus the silicon wafer can be kept intact.
[0046] Specifically, the distance between the oxide layer and the main path can be the same. Along the radial direction of the oxide layer, the distance between the inner edge of the oxide layer and the outer edge of the main path is 0 - 3 mm. Further preferably, the width of the oxide layer is 0 - 3 mm to ensure that the width of the oxide layer is sufficient to relieve the influence on the silicon-containing substrate at the starting point of the annealing processing path during laser knife cutting.
[0047] In the present invention, in the first annealing process of step S3, a chemical reaction occurs between the metal in the metal layer and the silicon in the silicon-containing substrate to generate a first silicide. Specifically, the temperature of the first annealing is 100 - 300 °C, and the annealing time is 0 - 120 s. At the annealing temperature and annealing time, the diffusion of the metal in the metal layer is limited and self-saturated, and the reaction with silicon stops after the metal layer is consumed.
[0048] In step S4, the unreacted metal layer on the feature device is removed, or the metal layer and the TiN layer are removed. The specific removal method can be to use a mixed solution of sulfuric acid and hydrogen peroxide for removal, and the cleaning time can be adjusted according to the effect and the concentration of the mixed solution. The corrosion rate can also be increased by heating the mixed solution.
[0049] Then, a second annealing is performed to convert the first metal silicide into a second metal silicide with a lower resistance. The annealing temperature in the second annealing process is higher than that in the first annealing process. Specifically, the temperature of the second annealing is 400 - 600 °C, and the annealing time is 0 - 60 s. The metal content in the second metal silicide is higher than that in the first metal silicide, and the resistance of the second metal silicide is lower than that of the first silicide. After the second annealing, the thickness of the obtained second metal silicide is greater than that of the first metal silicide. In some specific embodiments, the thickness of the second metal silicide is 0 - 200 angstroms.
[0050] In step S5, the oxide layer is removed by using a diluted hydrofluoric acid solution. Specifically, the diluted hydrofluoric acid is diluted with 49% hydrofluoric acid and deionized water, and the volume ratio of 49% hydrofluoric acid to deionized water can be 1:50 - 100, preferably 1:100. Removing the oxide layer with the above - concentration hydrofluoric acid will not affect the metal silicide.
[0051] Preferably, the metal layer covers the feature device and the area of the silicon - containing substrate where silicon is exposed, and the thickness of the metal layer covering between the feature devices can be made greater than the thickness of the metal layer covering the area of the silicon - containing substrate where silicon is exposed. The area between the feature devices is defined as the first region, and the part of the silicon - containing substrate different from the first region is the second region. Due to the defects of the sputtering process itself, in the conventional sputtering process, there are narrow gaps in the first region, so that the thickness of the metal layer sputtered on the first region is less than the thickness of the metal layer on the second region. Then, the thickness of the metal silicide layer formed by the first annealing and the second annealing of the metal layer on the first region is less than the thickness of the metal silicide on the second region. By adjusting the thickness of the metal layer on the first region to be greater than the thickness of the metal layer on the second region, the thickness of the metal silicide on the first region can be made approximately equal to the thickness of the metal silicide on the second region, thereby avoiding the too - thin thickness of the metal silicide on the first region from reducing the electrical performance and reliability of the device.
[0052] In the method for preparing the metal silicide of the present invention, by first forming a thin oxide layer on the edge of the silicon - containing substrate, the temperature and energy applied to the silicon wafer by the laser beam during laser annealing can be buffered, thereby reducing the breakage of the silicon wafer and further improving the efficiency.
[0053] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solutions of the present invention, and these simple modifications all fall within the protection scope of the present invention.
[0054] In addition, it should be noted that, in the above specific embodiments, the various specific technical features described can be combined in any appropriate manner without conflict. To avoid unnecessary repetition, the present invention will not separately describe various possible combination manners.
[0055] Furthermore, any combination can be made among the various different embodiments of the present invention, as long as it does not violate the idea of the present invention, and it should also be regarded as the content disclosed by the present invention.
Claims
1. A method for preparing metal silicide, characterized in that, The method comprises the following steps: Form a metal layer on a silicon-containing substrate having a characteristic device; Form an oxide layer on the silicon-containing substrate having the metal layer, and the oxide layer is located at the edge of the silicon-containing substrate; Perform a first annealing on the silicon-containing substrate to cause the metal layer to react with silicon in the silicon-containing substrate to form a first metal silicide; Remove the unreacted metal layer, and then perform a second annealing on the silicon-containing substrate to form a second metal silicide on the silicon-containing substrate; wherein, the first annealing and the second annealing adopt laser rapid heat treatment; Remove the oxide layer.
2. The method according to claim 1, wherein, The oxide layer is annular; and / or The width of the oxide layer is 0 - 3 mm; and / or The thickness of the oxide layer is 1 - 15 angstroms.
3. The method according to claim 1, wherein, During the laser rapid heat treatment process, there is an annealing processing path formed by laser beam scanning on the silicon-containing substrate; the annealing processing path includes a main path and a first scanning area and a second scanning area respectively located at both ends of the main path; The oxide layer intersects with the first scanning area and the second scanning area; Preferably, along the radial direction of the oxide layer, the distance between the inner edge of the oxide layer and the outer edge of the main path is 0 - 3 mm.
4. The method according to claim 1, wherein, The method for forming the oxide layer includes: wet-oxidizing the silicon-containing substrate having the metal layer with an aqueous ozone solution; the oxidation temperature is 0 - 30 °C; the oxidation time is 0 - 5 min.
5. The method according to claim 1, wherein, Use a diluted hydrofluoric acid solution to remove the oxide layer.
6. The method according to claim 1, wherein, The metal layer covers the characteristic device and the area of the silicon-containing substrate where silicon is exposed; The thickness of the metal layer covering between the characteristic devices is greater than the thickness of the metal layer covering the area of the silicon-containing substrate where silicon is exposed.
7. The method according to claim 1, wherein, The method further includes: forming a TiN layer in a preset area on the surface of the metal layer; the thickness of the TiN layer is 1 - 200 angstroms.
8. The method according to claim 1, wherein, The metal layer is a nickel-containing metal layer; The nickel-containing metal is selected from one or more of Ni, NiCo, NiPt, and NiPtCo; and / or The first metal silicide is selected from one or more of Ni2Si, Ni2CoSi, Ni2PtSi, and Ni2PtCoSi; and / or The second metal silicide is selected from one or more of NiSi, NiCoSi, NiPtSi, and NiPtCoSi.
9. The method according to claim 8, wherein, The content of Ni in the nickel-containing metal is 50 - 99 wt%.
10. The method according to claim 1, wherein, The thickness of the metal layer is 0 - 200 angstroms; and / or The thickness of the second metal silicide is 0 - 200 angstroms.
11. The method according to claim 1, wherein, The temperature of the first annealing is 100 - 300 °C; the time is 0 - 120 s; and / or The temperature of the second annealing is 400 - 600 °C; the time is 0 - 60 s.