Embedded AI edge computing system synchronization and power management method

Abstract

The invention discloses an embedded AI edge computing system synchronization and power management method, and belongs to the field of AI edge computing equipment design. According to the method, external synchronization signals such as gPTP and PTP protocols are received, so that clock synchronization of all devices in the system is ensured. On the basis, the method further comprises the steps of real-time detection of equipment clocks and calibration of synchronization errors, so that the consistency of all the equipment clocks is ensured. In addition, through a dynamic power adjustment technology based on a load condition, optimal management of system power consumption is realized. In the hardware design of the system, the CPLD chip is used for generating an accurate synchronous trigger signal to ensure the cooperative work among the modules. According to the method, the problems of clock asynchronization and power management in multi-device cooperation are effectively solved, and the calculation efficiency and energy efficiency of the system are improved.

Description

Technical Field

[0001] This application relates to the field of AI edge computing device design, and particularly to a method for synchronizing and power management of an embedded AI edge computing system. Background Art

[0002] With the rapid development of artificial intelligence and Internet of Things technologies, embedded AI edge computing systems are widely used in multiple fields such as autonomous driving, industrial robots, intelligent manufacturing, and smart cities. These systems usually include multiple sensors, cameras, lidars, and other computing modules, which need to work in coordination to achieve efficient data processing and real-time analysis. However, with the increasing computing requirements, how to manage the power consumption of these devices while ensuring real-time performance and accuracy has become a major challenge in embedded system design.

[0003] Currently, there are some typical problems in embedded AI edge computing systems, such as insufficient clock synchronization accuracy, inflexible power management, and poor coordination between modules. Specifically, clock asynchronization will cause time deviation when each device collects data, which will affect the accuracy and collaborative processing ability of the data. With the increase in the number of hardware devices, the power consumption problem becomes more prominent. How to intelligently manage the power consumption on the premise of ensuring system stability has become the key to optimizing system performance and extending the service life of the device.

[0004] The objective of the present invention is to provide a solution that can achieve precise clock synchronization and dynamic power management. By integrating hardware and software mechanisms, it solves the clock synchronization and power management problems in current embedded AI edge computing systems, thereby improving system performance, reducing energy consumption, and enhancing the stability and reliability of the system. Summary of the Invention

[0005] The embodiments of this application provide a method for synchronizing and power management of an embedded AI edge computing system. The technical solution is as follows:

[0006] There is provided a method for synchronizing and power management of an embedded AI edge computing system, characterized in that the method includes:

[0007] Receiving a synchronization signal from an external time source through a network interface, the synchronization signal including the gPTP protocol and the PTP protocol, for synchronizing the system clock with the connected devices;

[0008] Detecting the clock deviation of each device in the system and calibrating the synchronization error between devices;

[0009] Dynamically adjusting the system power consumption according to the workload of each module;

[0010] Enabling or disabling specific components in the system according to the operating state of the module.

[0011] Optionally, the synchronization signal is transmitted through the PPS signal to ensure time consistency among all system components.

[0012] Optionally, the method further includes automatically detecting the availability of an external synchronization signal and adjusting clock synchronization when the system starts up.

[0013] Optionally, calibrating the synchronization error between devices includes comparing the timestamps of each device and adjusting the clock according to a preset threshold.

[0014] Optionally, dynamically adjusting the system power consumption according to the workload of each module is achieved by real-time monitoring of the voltage and current of the system and adjusting according to changes in the module load.

[0015] Optionally, enabling or disabling specific components in the system according to the operating state of the module includes automatically turning off unnecessary hardware modules when the system load is low.

[0016] Optionally, the method further includes:

[0017] Generating a synchronization trigger signal through the CPLD to ensure that devices operate at the same time point.

[0018] Optionally, both the reception and power adjustment of the synchronization signal are performed at the operating system level of the system, and system resources are managed through corresponding API interfaces.

[0019] Optionally, the power consumption adjustment includes pre-adjusting the device power balance based on real-time load prediction and an algorithm model.

[0020] Optionally, the method further includes controlling the working time window of all devices based on the synchronization signal trigger of the CPLD.

[0021] This method ensures clock synchronization of devices within the system by receiving external synchronization signals such as the gPTP and PTP protocols. On this basis, the present invention further includes real-time detection of device clocks and calibration of synchronization errors to ensure the consistency of all device clocks. In addition, through dynamic power adjustment technology based on the load situation, optimized management of system power consumption is achieved. In the hardware design of the system, the CPLD chip is used to generate accurate synchronization trigger signals to ensure the coordinated operation of each module. This method effectively solves the problems of clock asynchronization and power management in multi-device collaboration, and improves the computing efficiency and energy efficiency of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 Shows a schematic flow diagram of a synchronization and power management method for an embedded AI edge computing system provided by an exemplary embodiment of the present application;

[0023] Figure 2 The figure shows a system block diagram of an embedded AI edge computing system provided by an exemplary embodiment of the present application. Detailed implementation manners

[0024] To make the objectives, technical solutions and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0025] As used herein, "a plurality of" means two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships may exist. For example, A and / or B may represent three cases: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0026] First of all, it should be noted that a method for synchronizing and power management of an embedded AI edge computing system in the present application, where the embedded AI edge computing system is described by taking the Figure 2 shown system structure as an example.

[0027] Embodiment 1

[0028] As Figure 1 shown, a method for synchronizing and power management of an embedded AI edge computing system, the method includes:

[0029] Step a: Receive an external time source synchronization signal through a network interface. The synchronization signal includes the gPTP protocol and the PTP protocol, and is used to synchronize the system clock with the connected devices.

[0030] In an autonomous driving system, an external GPS signal is transmitted into the system through an Ethernet interface, and the system receives and synchronizes the clocks of each sensor through the gPTP protocol. All devices (such as cameras, radars, lidars, etc.) adjust their internal clocks through the external synchronization signal to ensure that the data acquisition of all devices is performed at the same moment.

[0031] By receiving the external synchronization signal, the clocks of all devices are kept consistent, eliminating the problems caused by clock drift. This means that the data acquisition of all devices is synchronized, which helps to ensure the accuracy of the data.

[0032] In a scenario of multi-device collaboration, clock synchronization ensures that the data collected by each sensor can be accurately compared and fused with the data of other devices, thereby improving the data processing accuracy. For example, the camera and radar in an autonomous driving system can synchronously obtain environmental data, avoiding data misalignment caused by asynchronous timing.

[0033] Precise clock synchronization also improves the real-time performance of the system, ensuring that data can be processed within a predetermined time window, enabling the system to respond promptly.

[0034] Step b: Detect the clock deviations of each device in the system and calibrate the synchronization errors between devices to maintain the consistency of the system clock.

[0035] In an industrial robot system, when the system starts up, it automatically checks the clock difference between the camera and the sensor. If the clock of the camera is 0.5 milliseconds faster than the clock of the sensor, the system will dynamically adjust the camera clock through a clock calibration algorithm to maintain the consistency of the clocks of all devices in the system.

[0036] The system can detect the clock deviations between devices in real time and automatically adjust them, avoiding the problem of long-term data misalignment caused by the accumulation of clock errors. In this way, the system can always maintain an accurate synchronization state during operation and eliminate the negative impact of clock deviations.

[0037] By detecting and calibrating the clock in real time, it ensures that devices collect data at precise time points, enhancing the consistency between data. For example, during multi-sensor data fusion, the calibration of synchronization errors between different devices ensures high-precision final data processing.

[0038] Calibrating the synchronization error not only ensures data consistency but also avoids cumulative errors that may occur during long-term operation, optimizing the overall performance of the system and enhancing the stability and reliability of the system.

[0039] Step c: Dynamically adjust the system power consumption according to the workload of each module.

[0040] In a multi-sensor intelligent security system, the system monitors the voltage and current in real time according to the working status of the sensors. When the system is in a low-load state, non-critical sensors will automatically turn off to save energy; when the system enters a high-load state, the system will automatically adjust the power supply to ensure the stable operation of the devices.

[0041] Automatically turning off unnecessary devices or modules at low load can significantly reduce the ineffective power consumption. This means that the system can reduce the energy consumption of the devices while maintaining the necessary functions.

[0042] By adjusting the power consumption in real time, the system can precisely regulate the power supply according to the load conditions, avoiding over-power supply or under-power supply situations, thereby improving the energy efficiency of the system. For example, at high load, the system can provide more power support to ensure the efficient operation of the system.

[0043] Dynamic power adjustment not only optimizes energy efficiency but also effectively extends the service life of the device. By intelligently adjusting the power, it avoids the device from overworking when not needed, reducing the wear and heat generation of the hardware.

[0044] Step d: Enable or disable specific components in the system according to the operating status of the module to optimize the power usage of the system. Optionally, the motherboard is connected to external devices through a standardized interface.

[0045] In the intelligent city monitoring system, the system will automatically enable or disable some devices according to the monitoring requirements. For example, when entering the night mode, the cameras in some areas will automatically turn off to save power; while during the peak working period, all sensors and cameras will be enabled to ensure comprehensive data collection.

[0046] The system enables or disables the module according to actual needs, avoiding unnecessary device operation and power consumption waste. Through intelligent start and stop, the system can reduce power consumption without affecting performance.

[0047] The enabling and disabling of the module enables the system to flexibly adjust the working state according to the actual scenario. For example, only the core sensors are enabled in the night mode, and all devices are enabled during the day. This flexibility enables the system to adapt to different environmental requirements.

[0048] Automatically turning off when certain devices are not needed can more effectively manage resources, improve the usage efficiency of the devices, while reducing unnecessary loads and ensuring that critical tasks are completed first.

[0049] Step e: Generate a synchronous trigger signal through the CPLD.

[0050] In autonomous vehicles, the CPLD chip is used to generate precise synchronous trigger signals to ensure that all sensors (such as cameras, radars, lidars) start data collection at the same moment. The CPLD chip generates trigger signals through an external synchronous signal to ensure the time consistency between devices.

[0051] The synchronous trigger signal generated by the CPLD ensures that multiple devices collect data at the same time, avoiding data misalignment caused by asynchronous timing. Through this mechanism, the system can collect data from various sensors simultaneously and ensure synchronous processing of the data.

[0052] The synchronous trigger signal of the CPLD makes the collaborative work between devices more efficient. For example, in autonomous driving, the synchronous trigger of the camera and the radar can collect comprehensive data of the surrounding environment in real time, facilitating subsequent decision-making and path planning.

[0053] Precise synchronous triggering can avoid processing delays caused by data acquisition time delays, thereby improving the system's response speed. The system can process synchronous data from multiple sensors in real time, enhancing the system's real-time performance and accuracy.

[0054] In summary, in modern embedded AI edge computing systems, due to the coordinated operation of multiple devices, clock synchronization and power management are key issues to ensure the efficient operation and stability of the system. This application has conducted in-depth discussions on these two issues and proposed a series of innovative solutions.

[0055] First, the technical solution ensures the clock synchronization of all devices within the system by receiving external time source synchronization signals (such as gPTP and PTP protocols). Through the network interface, the system can receive synchronization signals from the outside and synchronize the system clock with the external time source. This process enables all devices within the system (such as cameras, lidar, sensors, etc.) to collect data within the same time window, eliminating data misalignment and errors caused by clock drift or clock asynchronization, and thus improving the system's real-time performance and the accuracy of data processing. This part of the technical solution directly solves the clock synchronization problem between multiple sensors and devices, enabling the system to cooperate under a high-precision time reference.

[0056] Secondly, the technical solution proposes a scheme for synchronous error detection and real-time correction. The system monitors the clock deviation between devices in real time and automatically calibrates the clock when a synchronization error is detected. This measure can be carried out when the device starts up to ensure that the system is in a unified clock state when it starts running. In addition, the system can also dynamically adjust the clocks of individual devices according to the time stamp differences of the devices to ensure that the clocks of all devices remain consistent during operation. The key to this part of the technical solution is to eliminate data inconsistencies caused by clock errors and ensure that the data collected by each sensor during the system operation is within an accurate time window.

[0057] In terms of power management, the technical solution adopts dynamic power adjustment technology, which can automatically adjust the power consumption of each module according to the system load. When the system is in a low-load state, unnecessary modules will be automatically turned off to reduce ineffective power consumption; while when the system enters a high-load state, the system will automatically increase power support to ensure the smooth execution of high-load tasks. This technical solution enables the system to adjust power consumption in real time under different load states, optimize power usage, ensure the efficient operation of the system while reducing energy waste, and extend the service life of the device.

[0058] In addition, this application also includes a design for generating synchronous trigger signals based on CPLD. The CPLD is used to generate precise synchronous trigger signals to ensure that each device starts and conducts data acquisition at the same time. This design can guarantee the timing consistency of multi-device collaborative work and avoid data misalignment caused by inconsistent timing between devices. In fields such as autonomous driving and industrial robots, multiple sensors and devices need to acquire data at the same moment to ensure the consistency and synchronization of data from each device, thereby providing a reliable data source for subsequent data processing and decision-making.

[0059] Through the combination of these several technologies, the goal of high-precision clock synchronization and high-efficiency power management during multi-device collaborative work is achieved. The system can automatically adjust power consumption according to task requirements and load conditions, avoiding unnecessary power consumption waste; at the same time, through an accurate synchronization mechanism, the system can ensure that data acquisition of all devices is carried out within the same time window, thereby improving data consistency and system stability. The synchronous signal generated by the CPLD further enhances the collaborative ability of system devices and ensures the efficiency and accuracy during the data acquisition process.

[0060] The embodiments of this application provide strong support for the embedded AI edge computing system and are widely applied in fields such as autonomous driving, industrial robots, and intelligent manufacturing. They solve a series of challenges in clock synchronization and power management and improve the overall performance, stability, and energy efficiency of the system.

[0061] The embodiments of this application also provide a computer-readable medium that stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the embedded AI edge computing method described in each of the above embodiments.

[0062] The above are only optional embodiments of this application and are not intended to limit this application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this application shall be included within the protection scope of this application.

Claims

1. A method for synchronization and power management of an embedded AI edge computing system, characterized in that: The method comprises: Receive a synchronization signal from an external time source through a network interface, wherein the synchronization signal includes a gPTP protocol and a PTP protocol, and is used to synchronize a system clock with a connected device; Detect the clock deviation of each device in the system and calibrate the synchronization error between devices; Dynamically adjust system power consumption based on the workload of each module; Enable or disable specific components in the system based on the operational status of the module.

2. The method according to claim 1, characterized in that The synchronization signal is transmitted via the PPS signal, ensuring time consistency between all system components.

3. The method according to claim 1, characterized in that The method further includes, when the system is started, automatically detecting the availability of an external synchronization signal and adjusting clock synchronization.

4. The method according to claim 1, characterized in that The calibrating synchronization errors between devices includes comparing the time stamps of each device and adjusting the clock according to a preset threshold.

5. The method according to claim 1, characterized in that The system power consumption is dynamically adjusted according to the workload of each module by monitoring the voltage and current of the system in real time and adjusting according to the changes in the module load.

6. The method according to claim 1, characterized in that The enabling or disabling of specific components in the system according to the operating status of the modules includes automatically shutting down unnecessary hardware modules when the system load is low.

7. The method according to claim 1, characterized in that The method further comprises: The CPLD generates a synchronous trigger signal to ensure that the devices operate at the same time point.

8. The method according to claim 1, characterized in that The reception of the synchronization signal and the power adjustment are both performed at the system operating system level, and the system resources are managed through the corresponding API interface.

9. The method according to claim 1, characterized in that: The power consumption adjustment includes pre-adjusting the power consumption balance of the equipment based on real-time load prediction and algorithm model.

10. The method according to claim 1, characterized in that The method further comprises controlling the working time windows of all devices based on the synchronization signal triggering of the CPLD.

Images