LED driving system and driving method based on two-way transmission
By designing a LED driver system based on bidirectional transmission in LED display technology, and adopting the deep coupling design of redundant data transmission and SPWM algorithm module, the display problems when multiple lamp beads are damaged and the refresh rate of high dynamic scenes are solved, achieving efficient fault tolerance and smooth display effects.
Patent Information
- Application Number
- CN202510411340.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2025-06-17
AI Technical Summary
The existing LED display technology is difficult to maintain the overall display effect when multiple lamp beads are damaged, and bidirectional data transmission leads to high bandwidth usage and reduced refresh rate, making it difficult to meet the fluency needs of high dynamic scenes.
A LED driving system based on bidirectional transmission is designed, and a communication interface module is used to realize redundant data transmission of the main/stop channel. The SPWM algorithm module generates SPWM signals through a deep coupling design, and the constant current driving module ensures a constant current output.
The fault tolerance capability in LED lamp bead cascade scenarios is improved, the problems of low-gray display defects and limited refresh rate are solved, the fluency requirements of high-dynamic scenarios are achieved, and the reliability and stability of the system are improved.
Smart Images

Figure CN120166601A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of LED display, and particularly to an LED driving system and a driving method based on bidirectional transmission. Background Art
[0002] Existing breakpoint resumption technologies usually achieve unidirectional transmission by adding an additional signal line. Although it can ensure the overall display effect when a single LED bead is damaged, if multiple LED beads are damaged, subsequent LED beads will still lose control.
[0003] To solve this problem, bidirectional data transmission technology is usually adopted, which allows the overall display effect to be unaffected under the condition of multiple damaged LED beads. However, bidirectional data transmission requires frequent switching between the primary / backup channels and periodic feedback of status signals, which occupies 20%-30% of the bandwidth resources, resulting in a reduced effective refresh rate and making it difficult to meet the smoothness requirements of high-dynamic scenarios (such as live sports events). At the same time, the data caching and switching processes occupy additional clock cycles, causing the PWM pulse width to be compressed at low gray levels, and the single conduction time to be lower than the response threshold of the LED driving chip, which easily leads to problems such as low-gray mottling and color blocks. Summary of the Invention
[0004] To solve the above problems existing in the prior art, the present invention aims to design an LED driving system and a driving method based on bidirectional transmission, which can not only improve the fault tolerance ability in the cascaded scenario of LED beads but also solve the problems of low-gray display defects and limited refresh rate.
[0005] To achieve the above object, the technical solution of the present invention is as follows: An LED driving system based on bidirectional transmission includes a controller, n driving chips, and n LED light-emitting units; the n driving chips are connected in series in sequence, the controller is connected to the first driving chip, and each driving chip is connected to an LED light-emitting unit;
[0006] The driving chip includes a communication interface module, an SPWM algorithm module, and a constant current driving module, where SPWM is the abbreviation of scattered pulse width modulation;
[0007] The communication interface module provides four bidirectional data ports and a power interface to realize redundant data transmission between the primary / backup channels. When an abnormal transmission in the primary channel is detected, it automatically switches to the backup channel; the four bidirectional data ports are respectively a DI port, a BI port, a DO port, and a BO port; the DI port, the BI port, the DO port, and the BO port are respectively connected to the output ports of an external controller or a superior chip;
[0008] The SPWM algorithm module receives grayscale data through the communication interface module, processes the grayscale data, and generates an SPWM signal to control the brightness and color of the LED. It includes a data reception SPI module, a status control module, and an SPWM generation module. The data reception SPI module receives the data from the communication interface module and outputs the data to the SPWM generation module via the status control module.
[0009] The constant current drive module receives the data output by the SPWM generation module and drives the LED light-emitting unit according to the data output by the SPWM generation module to ensure a constant current output.
[0010] Further, the constant current drive module includes an R-channel constant current drive circuit, a G-channel constant current drive circuit, a B-channel constant current drive circuit, and a drive control unit.
[0011] Further, the data reception SPI module includes a forward main shift register, a reverse main shift register, a forward spare shift register, a reverse spare shift register, a judgment register, a counter, and a data storage unit.
[0012] The number of bits of the forward main shift register and the reverse main shift register is determined according to the number of bits N of the display grayscale data. When powered on, the DI port and the BO port are defaulted as the data transmission channels.
[0013] The number of bits of the forward spare shift register and the reverse spare shift register is determined according to the number of bits N of the display grayscale data. When powered on, the BI port and the DO port are defaulted as the data transmission channels.
[0014] The judgment register is used to prevent the influence between the forward transmission data and the reverse transmission data. It includes a judgment register 1 and a judgment register 2. The judgment register 1 is used to prevent the influence on the forward transmission data during reverse data transmission, and the judgment register 2 is used to prevent the influence on the reverse transmission data during forward data transmission.
[0015] Further, the status control unit includes a control signal for status parameters, a status register, and a status counter.
[0016] The number of bits of the status parameters is determined according to the number of bits N of the display grayscale data. Bits 3-0 of the status parameters are used to judge whether it is forward or reverse. Assume that 0011 is forward and 0110 is reverse.
[0017] The status register validly stores the status value. When the status is needed, a corresponding instruction is generated through the control signal of the status parameters to obtain the function of reading and writing the status register.
[0018] The number of bits of the status counter is determined according to the number of bits N of the display grayscale data. When the instruction to read the status register is obtained, the counting starts.
[0019] Further, the SPWM generation module includes a memory, a comparator, and a PWM counter;
[0020] The memory is an internal ROM for storing a decentralized conduction time look-up table of L-bit low-order gray data, and is read in the form of a look-up table;
[0021] The comparator compares the gray value of each channel with the count value of the PWM counter to generate a PWM with a certain duty cycle, and controls the conduction time of the LED lamp beads to change the brightness;
[0022] The number of bits of the PWM counter is determined according to the high-order number of bits H of the gray data.
[0023] Further, for the number of bits N of the gray data, it is divided into H-bit high-order data and L-bit low-order data, that is, N = H + L. The high bits are used as the main display data, and the low bits are used as the basic unit of decentralized average distribution. A display cycle T is divided into 2^L equal parts, and each equal part is 2^H counting units.
[0024] An LED driving method based on two-way transmission, which is driven by an LED driving system based on two-way transmission, includes the following steps:
[0025] Step 1: The controller sends a status signal, and judges the 3-0 bits of register 1. If the recognition is 0011, the gray data sent after the status signal is forward transmission data; if the recognition is 0110, the gray data sent after the status signal is reverse transmission data; the same applies to judging register 2. Registers 1 and 2 respectively detect the forward and reverse status signals to ensure two-way data isolation. If each driving chip works normally, go to Step 2; if a certain driving chip transmits an error, go to Step 4.
[0026] Step 2: Assume that it is forward transmission at this time. After the controller's forward sending end sends the status signal, it sends the gray data. The data enters the input channel of the first driving chip, and is transmitted to the second driving chip through the forward output port, and at the same time returns an ACK confirmation signal to the controller.
[0027] Step 3: The second driving chip repeats the operation of the first driving chip, and then transmits it to the third driving chip, and at the same time returns an ACK confirmation signal to the controller step by step; subsequent driving chips repeat the above operation until the data reaches the terminal driving chip.
[0028] At this time, reverse transmission is also in progress. After the controller's reverse transmitter sends the status signal, it sends grayscale data. The data enters the terminal driver chip, and the subsequent operations are the same as those in forward transmission. The values of the grayscale data in reverse transmission and forward transmission are the same, but the order is reversed. Go to step 6.
[0029] Step 4: If the previous-level driver chip does not receive the ACK signal from the current driver chip for three consecutive clock cycles, it means that the current driver chip has an error. Since data is transmitted simultaneously through the DI, BI, DO, and BO ports, it is set that the priority of using data is the highest for the forward main channel, followed by the forward backup channel, then the reverse main channel, and finally the reverse backup channel. If there is an error in the forward transmission main channel, the current driver chip enables the data of the forward backup shift register. If there are errors in both the forward transmission main channel and the backup channel, the current driver chip uses the reverse transmission main channel. If there are errors in both the forward transmission main channel and the backup channel, as well as the reverse transmission main channel, the current driver chip switches to the reverse backup data processing path and enables the data of the reverse backup shift register.
[0030] Step 5: The current driver chip sends a NAK signal to the controller, and the NAK signal carries an error type code. The error type code includes timeout, forward check failure, and reverse check failure.
[0031] Step 6: When the data transmission is completed, the chip selects the data with a higher priority as the valid data according to the preset channel priority. Each driver chip generates an SPWM signal based on the received grayscale data, and the SPWM signal is output through the constant current drive module to drive the corresponding LED lighting unit.
[0032] Further, the working method of the driver chip includes the following steps:
[0033] A1: The communication interface module receives N-bit grayscale data, and then transfers the data to the data receiving SPI unit in the SPWM algorithm module for data continuity detection.
[0034] A2: The data receiving SPI unit monitors the transmission status of the main channel in real time. If the main channel is normal, go to step A3. If it is detected that the main channel is interrupted, switch to the backup channel. Go to step A7.
[0035] A3: Perform data segmentation on the data in the main shift register, and divide the N-bit grayscale data into high H-bit high-order data and low L-bit low-order data, that is, N = H + L. The main shift register is mirrored and backed up to the backup shift register in real time.
[0036] A4: Input the H-bit high-order data into the comparator and compare it with the current value of the PWM counter in real time. If the value of the PWM counter is less than the value of the H-bit high-order data, output a high level; otherwise, output a low level to form a reference duty cycle waveform.
[0037] A5: Input the L-bit low-order data into the built-in ROM lookup table to obtain the distributed conduction allocation mode. According to the L-bit low-order data, divide a display period T into 2^L sub-periods on average, and whether the last counting unit in each sub-period conducts is dynamically allocated according to the lookup table.
[0038] A6: Combine the reference duty cycle waveform with the dispersion mode to generate an SPWM signal, and go to step A11.
[0039] A7: The pre-stored data of the spare shift register is enabled to replace the interrupted main channel data for data segmentation, and the N-bit grayscale data is segmented into high H-bit high-order data and low L-bit low-order data, that is, N = H + L.
[0040] A8: The H-bit high-order data is input to the comparator and compared with the current value of the PWM counter in real time. If the counter value is less than the H-bit value, output a high level; otherwise, output a low level to form a reference duty cycle waveform.
[0041] A9: The L-bit data is input to the built-in ROM lookup table, and the ROM lookup table address is dynamically offset according to the number of missing pulses to recalculate the dispersion mode.
[0042] A10: The reference duty cycle remains unchanged, and is combined with the new dispersion mode to generate a compensated SPWM signal. The status information of the spare shift register is transmitted back to the main shift register to ensure the synchronization of the system.
[0043] A11: The generated SPWM signal is output through the constant current drive module to drive the corresponding LED lighting unit.
[0044] Compared with the prior art, the present invention has the following beneficial effects:
[0045] 1. The present invention adopts a design in which two-way data transmission is deeply coupled with the SPWM algorithm, which can not only improve the fault tolerance ability in the LED lamp bead cascading scenario, but also effectively solve problems such as low gray display defects and limited refresh rate. Specifically, through the two-way data transmission technology of the present invention, when a data transmission interruption is detected, the system can switch to the spare channel data within a short time, and compensate for the missing pulses through the dispersed waveform of SPWM, thus avoiding problems such as low gray scale dots and color blocks caused by too long extinction time. At the same time, by optimizing the two-way channel switching logic, the present invention reduces the bandwidth occupancy of the status feedback signal, thereby increasing the effective refresh rate to meet the smoothness requirements of high dynamic scenarios.
[0046] 2. The present invention ensures a smooth transition of display brightness when breaking points are switched through real-time synchronization of the SPWM waveform and the standby register data, thereby avoiding visual discontinuities. Specifically, when a data transmission interruption is detected, the SPWM algorithm module immediately starts the data in the standby register and synchronously adjusts the SPWM waveform to ensure that the switching is completed in a short period of time, and the brightness change is controlled within a range that is difficult for the human eye to detect. This mechanism not only improves the reliability and stability of the system, but also significantly improves the user's visual experience. Compared with traditional solutions, the present invention does not have obvious brightness jumps or waveform breaks during the switching process. BRIEF DESCRIPTION OF THE DRAWINGS
[0047] Figure 1 It is a schematic diagram of connecting multiple driver chips of the present invention.
[0048] Figure 2 This is a schematic diagram of the driver chip module of the present invention.
[0049] Figure 3 It is a schematic diagram of the SPWM algorithm flow of the present invention.
[0050] Figure 4 It is a schematic diagram of the interruption compensation timing of the present invention. DETAILED DESCRIPTION
[0051] In order to make the technical solution and advantages of the present invention more clear, the technical solution of the present invention is clearly and completely described below in conjunction with the accompanying drawings.
[0052] like Figure 1 As shown, the LED driving system of the present invention is composed of a controller, n cascaded driving chips and their corresponding n LED light-emitting units. Each driving chip integrates a communication interface module, an SPWM algorithm module and a constant current driving module.
[0053] like Figure 2 As shown, the SPWM algorithm module belongs to the digital circuit part, the SPWM algorithm module includes a data receiving SPI unit, a state control unit, and an SPWM generating unit. The SPWM algorithm module is connected to the constant current drive module, and the constant current drive module belongs to the analog circuit part. The SPWM algorithm module is combined with the constant current drive module to form a drive chip (the bandgap reference module, power-on reset module, etc. in the chip are not introduced one by one here).
[0054] Figure 3 right Figure 2 The algorithm flow of the SPWM algorithm module is illustrated in detail.
[0055] Step 1: The communication interface module receives N-bit grayscale data sent by an external controller and then transfers the data to the data receiving SPI unit in the SPWM algorithm module for data continuity detection.
[0056] Step 2: The data continuity detection can monitor the transmission status of the main channel in real time. If the main channel is normal, the data enters the main data processing path and proceeds to Step 3; if a main channel interruption is detected, the system switches to the backup channel, enables the pre-stored data in the backup shift register, and proceeds to Step 7.
[0057] Step 3: The data in the main shift register is split. The N-bit grayscale data is split into high-order data H bits and low-order data L bits, i.e., N = H + L. The main shift register is mirrored and backed up to the backup shift register in real time.
[0058] Step 4: The H-bit data is input to a comparator and compared in real time with the current value of the PWM counter. If the counter value is less than the H-bit value, a high level is output; otherwise, a low level is output, forming a reference duty cycle waveform.
[0059] Step 5: The L-bit data is input to the built-in ROM lookup table to obtain a decentralized conduction distribution pattern. According to the L-bit value, one display period T is evenly divided into 2^L sub-periods, and whether the last counting unit in each sub-period conducts is dynamically allocated according to the lookup table.
[0060] Step 6: Combine the reference duty cycle waveform with the decentralized pattern to generate an SPWM signal and proceed to Step 11.
[0061] Step 7: The pre-stored data in the backup shift register is enabled to replace the data of the interrupted main channel for data splitting. The N-bit grayscale data is split into high-order data H bits and low-order data L bits, i.e., N = H + L.
[0062] Step 8: The H-bit data is input to a comparator and compared in real time with the current value of the PWM counter. If the counter value is less than the H-bit value, a high level is output; otherwise, a low level is output, forming a reference duty cycle waveform.
[0063] Step 9: The L-bit data is input to the built-in ROM lookup table, and the ROM lookup table address is dynamically offset according to the number of missing pulses to recalculate the decentralized pattern.
[0064] Step 10: The reference duty cycle remains unchanged and is combined with the new decentralized pattern to generate a compensated SPWM signal. The status information of the backup shift register is passed back to the main shift register to ensure system synchronization.
[0065] Step 11: The generated SPWM signal is output through a constant current drive module to drive the corresponding LED lighting unit.
[0066] The principle of the SPWM (Scrambled-PWM) brightness control technology is to disperse the conduction time of an image into several shorter conduction times based on improving the function of traditional Pulse Width Modulation (PWM), so as to increase the overall visual update frequency. The built-in SPWM technology disperses the process of changing from bright to dark in each counting cycle T into multiple average counts, and each dispersed equal part can maintain the original duty cycle before dispersion. Taking four-bit data as an example, when the video data is 1100 (b), it means that in one data cycle, still according to the binary bit weight mechanism, the time length for which the LED needs to be lit is 12T, and the time for extinguishing is 3T. The gray level is displayed by the time duty cycle; in the brightness control principle of SPWM, the lighting time is evenly dispersed into 3 equal parts, each part is 5T, lit for 4T and extinguished for 1T (12:3), and the total lighting time is still 12T, and the lighting time remains unchanged.
[0067] According to the analysis of the characteristics of the SPWM (Scrambled-PWM) brightness control technology, it can be determined that the SPWM technology effectively improves the visual refresh rate by dispersing the "0" and "1" of the data, that is, dispersing the concentrated manifestation of bright and dark. Although the actual refresh rate of the data remains unchanged, due to the dispersion of the concentrated manifestation of bright and dark, the refresh rate perceived by the human eye is improved. According to the reaction mechanism of the human eye to the picture, when the coding sequence is long, even if the refresh rate is low, high-gray-level data can be displayed. This is because the human eye is less sensitive to high-frequency flicker and more sensitive to low-frequency flicker.
[0068] According to the CIE 1931 color space model, the sensitivity of the human eye to brightness changes follows the following formula:
[0069] ΔL / L = 0.01 (Weber's law) (1)
[0070] L is the lower-order bit number of the degree data, ΔL is the brightness change amount. When the brightness change exceeds 1%, the human eye can perceive the flicker. The dispersion adjustment needs to ensure that the compensated brightness fluctuation ΔL / L < 1%. Therefore, by increasing the flicker frequency, the SPWM technology can display high-gray-level data at a lower refresh rate, while avoiding the black dot pixels caused by the long-time extinguishing of the LED at low brightness. The SPWM technology makes the picture richer and more vivid by dispersing the bright and dark times. This dispersion method not only improves the visual refresh rate but also reduces the flicker, thus improving the overall video quality.
[0071] In actual operation, a single driving chip cannot control the entire LED display screen. Multiple driving chips need to be connected for data transmission to control the LED display screen. The system uses a bidirectional data channel, and the forward data and reverse data enter the chip through the DI / BO ports respectively. After being processed by the SPWM algorithm module, the data generates an SPWM signal, and the SPWM signal is output through the constant current driving module to drive the LED light-emitting unit. Then, the processed data is transmitted to the next chip through the DO / BI port to form a complete cascaded data link. Combining Figure 2 with the communication interface module and the SPWM algorithm module in Figure 4 , when the driving chips are cascaded for data transmission (as shown in
[0072] ), the specific situation is as follows.
[0073] Step 1: The controller sends a status signal to determine the 3-0 bits of register 1. If it is recognized as 0011, the grayscale data sent after the status signal is forward transmission data; if it is recognized as 0110, the grayscale data sent after the status signal is reverse transmission data; the same applies to judging register 2. Registers 1 and 2 respectively detect the forward and reverse status signals to ensure bidirectional data isolation. If all driving chips are working properly, go to Step 2; if a driving chip has a transmission error, go to Step 4.
[0074] Step 2: Assume that this is a forward transmission at this time. After the controller's forward sending end sends the status signal, it sends the grayscale data. The data enters the input channel of the first driving chip and is transmitted to the second driving chip through the forward output port, and at the same time returns an ACK confirmation signal to the controller.
[0075] Step 4: If the upper-level driver chip does not receive the ACK signal from the current chip for three consecutive clock cycles, it indicates that the current chip has an error. Since data is transmitted simultaneously through the DI, BI, DO, and BO ports, the priority of using data is set as follows: the positive main channel has the highest priority, followed by the positive backup channel, then the negative main channel, and finally the negative backup channel. If an error occurs in the positive transmission main channel, the chip enables the data of the positive backup shift register. If errors occur in both the positive transmission main channel and the backup channel, the chip uses the negative transmission main channel. If errors occur in the positive transmission main channel, the positive backup channel, and the negative transmission main channel, the chip switches to the negative backup data processing path and enables the data of the negative backup shift register.
[0076] Step 5: The current driver chip sends a NAK signal to the controller, and the NAK signal carries an error type code (such as timeout, positive check failure, negative check failure, etc.).
[0077] Step 6: After the data transmission is completed, the chip selects the data with a higher priority as the valid data according to the preset channel priority. Each driver chip generates an SPWM signal based on the received grayscale data, and the SPWM signal is output through the constant current drive module to drive the corresponding LED lighting unit.
[0078] The present invention is not limited to this embodiment, and any equivalent concept or change within the technical scope disclosed in the present invention shall be included in the protection scope of the present invention.
Claims
1. An LED driving system based on bidirectional transmission, characterized in that: It includes a controller, n driver chips and n LED light-emitting units; the n driver chips are connected in series in sequence, the controller is connected to the first driver chip, and each driver chip is connected to an LED light-emitting unit; The driving chip includes a communication interface module, an SPWM algorithm module and a constant current driving module, wherein SPWM is the abbreviation of scattered pulse width modulation; The communication interface module provides four bidirectional data ports and a power interface to realize redundant data transmission of the main / backup channels. When an abnormality in the transmission of the main channel is detected, it automatically switches to the backup channel; the four bidirectional data ports are respectively a DI port, a BI port, a DO port and a BO port; the DI port, the BI port, the DO port and the BO port are respectively connected to the output port of the external controller or the upper chip; The SPWM algorithm module receives grayscale data through the communication interface module, processes the grayscale data and generates an SPWM signal to control the brightness and color of the LED, and includes a data receiving SPI module, a state control module, and an SPWM generation module; the data receiving SPI module receives data from the communication interface module, and outputs the data to the SPWM generation module through the state control module; The constant current driving module receives the output data of the SPWM generating module, and drives the LED light emitting unit according to the output data of the SPWM generating module to ensure a constant current output.
2. The LED driving system based on bidirectional transmission according to claim 1, characterized in that: The constant current driving module includes an R channel constant current driving circuit, a G channel constant current driving circuit, a B channel constant current driving circuit and a driving control unit.
3. The LED driving system based on bidirectional transmission according to claim 1, characterized in that: The data receiving SPI module includes a forward main shift register, a reverse main shift register, a forward spare shift register and a reverse spare shift register, a judgment register, a counter, and a data storage unit; The number of bits of the forward main shift register and the reverse main shift register is determined according to the number of bits N of the displayed grayscale data, and the DI port and the BO port are used as data transmission channels by default when powered on; The number of bits of the forward standby shift register and the reverse standby shift register is determined according to the number of bits N of the displayed grayscale data, and the BI port and the DO port are used as data transmission channels by default when powered on; The judgment register is used to prevent the influence between the forward transmission data and the reverse transmission data, and includes a judgment register 1 and a judgment register 2. The judgment register 1 is used to prevent the influence of the reverse data transmission on the forward transmission data, and the judgment register 2 is used to prevent the influence of the forward data transmission on the reverse transmission data.
4. The LED driving system based on bidirectional transmission according to claim 1, characterized in that: The state control unit includes a control signal of a state parameter, a state register, and a state counter; The number of bits of the state parameter is determined according to the number of bits N of the displayed grayscale data. Bits 3-0 of the state parameter are used to determine whether it is forward or reverse. Assume that 0011 is forward and 0110 is reverse. The state register effectively stores the state value, and when the state is needed, a corresponding instruction is generated through the control signal of the state parameter to obtain the function of reading and writing the state register; The number of bits of the state counter is determined according to the number of bits N of the displayed grayscale data, and the counting starts when an instruction to read the state register is obtained.
5. The LED driving system based on bidirectional transmission according to claim 1, characterized in that: The SPWM generation module includes a memory, a comparator, and a PWM counter; The memory adopts built-in ROM storage to store the distributed on-time lookup table of L-bit low-level grayscale data, and reads it in the form of a lookup table; The comparator compares the grayscale value of each channel with the count value of the PWM counter, generates a PWM with a certain duty cycle, and controls the on-time of the LED lamp bead to change the brightness; The number of bits of the PWM counter is determined according to the number of high-order bits H of the grayscale data.
6. The LED driving system based on bidirectional transmission according to claim 1, characterized in that: The number of bits N of the grayscale data is divided into H bits of high-order data and L bits of low-order data, that is, N=H+L, with the high bits being the main display data and the low bits being the basic unit for dispersed and even distribution, dividing a display period T into 2^L equal parts, each of which is 2^H counting units.
7. A LED driving method based on bidirectional transmission, characterized in that: The LED driving system based on bidirectional transmission according to any one of claims 1 to 6 is used for driving, comprising the following steps: Step 1: The controller sends a status signal, and determines whether register 1 identifies bits 3-0. If the identification is 0011, the grayscale data sent after the status signal is forward transmission data; if the identification is 0110, the grayscale data sent after the status signal is reverse transmission data; the same is true for register 2; registers 1 and 2 are respectively detected to detect forward and reverse status signals to ensure bidirectional data isolation; if each driver chip works normally, go to step 2; if a driver chip transmission error occurs, go to step 4; Step 2: Assuming that this is forward transmission, after the controller sends the status signal to the forward transmitter, it sends the grayscale data. The data enters the input channel of the first driver chip, and transmits the data to the second driver chip through the forward output port. At the same time, an ACK confirmation signal is returned to the controller. Step 3: The second driver chip repeats the operation of the first driver chip, and then transmits it to the third driver chip, while returning the ACK confirmation signal to the controller step by step; the subsequent driver chips repeat the above operation until the data reaches the final driver chip; At this time, the reverse transmission is also in progress. After the reverse sending end of the controller sends the status signal, it sends the grayscale data, and the data enters the terminal drive chip. The subsequent operations are the same as the forward transmission. The values of the grayscale data in the reverse transmission and the forward transmission are the same, but the order is reversed. Go to step 6. Step 4: If the previous driver chip does not receive the ACK signal of the current driver chip for three consecutive clock cycles, it means that the current driver chip has an error; since the DI, BI, DO, and BO ports transmit data at the same time, the priority of using data is set to be the forward main channel with the highest priority, followed by the forward backup channel, then the reverse main channel, and finally the reverse backup channel; if the forward transmission main channel has an error, the current driver chip enables the data of the forward backup shift register; if both the forward transmission main channel and the backup channel have an error, the current driver chip uses the reverse transmission main channel; if both the forward transmission main channel and the backup channel and the reverse transmission main channel have an error, the current driver chip switches to the reverse backup data processing path and enables the data of the reverse backup shift register; Step 5: The current driver chip sends a NAK signal to the controller, and the NAK signal carries an error type code; the error type code includes timeout, forward check failure, and reverse check failure; Step 6: When the data transmission is completed, the chip selects the data with higher priority as the valid data according to the preset channel priority; each driver chip generates an SPWM signal according to the received grayscale data, and the SPWM signal is output through the constant current drive module to drive the corresponding LED light-emitting unit.
8. The LED driving method based on bidirectional transmission according to claim 7, characterized in that: The working method of the driving chip comprises the following steps: A1: The communication interface module receives N-bit grayscale data, and then transmits the data to the data receiving SPI unit in the SPWM algorithm module to perform data continuity detection; A2: The data receiving SPI unit monitors the transmission status of the main channel in real time; if the main channel is normal, go to step A3; if the main channel is interrupted, switch to the backup channel; go to step A7; A3: Data in the main shift register is segmented, and the N-bit grayscale data is segmented into H-bit high-order data and L-bit low-order data, that is, N=H+L; the main shift register is backed up to the backup shift register in real time; A4: Input the H-bit high-order data to the comparator and compare it with the current value of the PWM counter in real time. If the PWM counter value is less than the value of the H-bit high-order data, it outputs a high level; otherwise, it outputs a low level to form a reference duty cycle waveform. A5: Input the L-bit low-order data into the built-in ROM lookup table to obtain the distributed conduction distribution mode; according to the L-bit low-order data, divide a display period T into 2^L sub-periods, and whether the last counting unit in each sub-period is turned on is dynamically allocated according to the lookup table; A6: Combine the reference duty cycle waveform with the dispersion mode to generate an SPWM signal, and go to step A11; A7: The pre-stored data of the standby shift register is enabled to replace the interrupted main channel data for data segmentation, and the N-bit grayscale data is segmented into high-order data of high-H bits and low-order data of low-L bits, that is, N=H+L; A8: H-bit high-order data is input to the comparator and compared with the current value of the PWM counter in real time. If the counter value is less than the H-bit value, a high level is output; otherwise, a low level is output to form a reference duty cycle waveform. A9: L-bit data is input to the built-in ROM lookup table. The ROM lookup table address is dynamically offset according to the number of missing pulses, and the dispersion pattern is recalculated; A10: The reference duty cycle remains unchanged and is combined with the new distributed mode to generate the compensated SPWM signal; the status information of the standby shift register is transmitted back to the main shift register to ensure the synchronization of the system; A11: The generated SPWM signal is output through the constant current drive module to drive the corresponding LED light-emitting unit.