Definition value extraction method, device and equipment of on-chip calibration piece and test system
By calculating the adjustment parameters in the chip S parameter measurement system, the problem of inaccurate definition values in the chip calibration part in the SOLT calibration method is solved, and the calibration accuracy is improved.
Patent Information
- Application Number
- CN202510229333.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2025-06-20
AI Technical Summary
The definition value of the on-chip calibration parts obtained by the existing SOLT calibration method is not accurate enough, resulting in a low calibration accuracy of the on-chip S parameter testing system.
By obtaining the initial definition value of each target frequency point based on the calibration on-chip S parameter measurement system, the adjustment parameters are calculated based on the target frequency point adjacent relationship and frequency value, and finally the definition value of the on-chip calibration part is calculated.
The accuracy of the extraction of the definition value of the on-chip calibration part is improved, and the calibration accuracy of the on-chip S parameter testing system is enhanced.
Smart Images
Figure CN120177978A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor microwave characteristic measurement, and particularly relates to a method, device, equipment and test system for extracting defined values of on-chip calibration components. Background Art
[0002] The "on-chip S-parameter test system" is widely used in the microelectronics industry. Before use, it needs to be vector-calibrated with an on-chip calibration component, and the accuracy of the calibration depends on the accuracy of the definition of the on-chip calibration component. The calibration methods mainly include SOLT (Short - Open - Load - Thru), LRRM (Line - Reflection - Reflection - Load), LRM (Line - Reflection - Load), TRL (Thru - Reflection - Line), multi-line TRL (Thru - Reflection - Line 1 - Line 2...), etc. These methods require the use of different types of on-chip calibration components.
[0003] The definition methods of different types of on-chip calibration components are different. When defining the accuracy of the calibration components used in the calibration methods of TRL and multi-line TRL, it mainly depends on the line impedance of the transmission line. While the definition of the calibration components used in the calibration methods of SOLT, LRRM, and LRM depends on the open - circuit capacitance, short - circuit inductance, load DC resistance and inductance, thru - delay and loss. Among them, the SOLT on-chip calibration component has a higher test efficiency, so it is widely used.
[0004] However, the defined values of the SOLT on-chip calibration components are not accurate enough. Therefore, the calibration accuracy of the on-chip S-parameter test system during use is relatively low. Summary of the Invention
[0005] Embodiments of the present invention provide a method, device, equipment and test system for extracting calibration parameters of on-chip calibration components, so as to solve the problem that the calibration accuracy of the on-chip S-parameter test system during use is relatively low due to the inaccurate defined values of the calibration components obtained by the existing SOLT calibration method.
[0006] In a first aspect, embodiments of the present invention provide a method for extracting defined values of on-chip calibration components, including:
[0007] Based on the calibrated on-chip S-parameter measurement system, obtain the initial defined values of each target frequency point of the target on-chip calibration component within the target frequency band;
[0008] For each initial defined value, calculate the adjustment parameter of the initial defined value based on the target frequency point adjacent relationship of the corresponding target frequency point of the initial defined value and the frequency values of all target frequency points;
[0009] Based on all the initial defined values of the target on-chip calibration component and the adjustment parameter corresponding to each initial defined value, calculate the defined value of the target on-chip calibration component.
[0010] In a second aspect, an embodiment of the present invention provides a device for extracting the defined value of an on-chip calibration component, including:
[0011] A measurement module, configured to obtain an initial defined value of each target frequency point of a target on-chip calibration component within a target frequency band based on a calibrated on-chip S-parameter measurement system;
[0012] A calculation module, configured to calculate an adjustment parameter of each initial defined value based on the target frequency point adjacent relationship of the target frequency point corresponding to the initial defined value and the frequency values of all target frequency points;
[0013] The calculation module is further configured to calculate the defined value of the target on-chip calibration component based on all the initial defined values of the target on-chip calibration component and the adjustment parameter corresponding to each initial defined value.
[0014] In a third aspect, an embodiment of the present invention provides an electronic device, including a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the method in the first aspect or any possible implementation manner of the first aspect above is implemented.
[0015] In a fourth aspect, an embodiment of the present invention provides a test system, and the test system is calibrated using the target on-chip calibration component described in any one of claims 1 to 7.
[0016] In the embodiments of the present invention, through a calibrated on-chip S measurement system, an initial defined value of each frequency point of a target on-chip calibration component within a target frequency band is obtained; for each initial defined value, an adjustment parameter of the initial defined value is calculated based on the target frequency point adjacent relationship of the target frequency point corresponding to the initial defined value and the frequency values of all target frequency points, and the defined value of the target on-chip calibration component is obtained according to all the initial defined values and the corresponding adjustment parameters. By first determining the initial defined value and then calculating the defined value of the target on-chip calibration component according to all the initial defined values and the frequency values of each frequency point, the influence of frequency response can be fully considered, and the accuracy of extracting the defined value of the target on-chip calibration component can be improved. Description of the Drawings
[0017] Figure 1 is a flowchart of the implementation of the method for extracting the defined value of an on-chip calibration component provided by an embodiment of the present invention;
[0018] Figure 2 is an equivalent circuit diagram of an open-circuit calibration component for the method for extracting the defined value of an on-chip calibration component provided by an embodiment of the present invention;
[0019] Figure 3 is an equivalent circuit diagram of a short-circuit calibration component for the method for extracting the defined value of an on-chip calibration component provided by an embodiment of the present invention;
[0020] Figure 4 It is an equivalent circuit diagram of a load calibration component in the method for extracting the defined value of an in - chip calibration component provided by an embodiment of the present invention;
[0021] Figure 5 It is a schematic structural diagram of a device for extracting the defined value of an in - chip calibration component provided by an embodiment of the present invention;
[0022] Figure 6 It is a schematic diagram of an electronic device provided by an embodiment of the present invention. Specific embodiments
[0023] Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0024] See Figure 1 , which shows a flowchart for implementing the method for extracting the defined value of an in - chip calibration component provided by an embodiment of the present invention, and is described in detail as follows:
[0025] Step S110: Based on the calibrated in - chip S - parameter measurement system, obtain the initial defined value of each target frequency point of the target in - chip calibration component within the target frequency band.
[0026] In some embodiments, the target frequency band can be 10 MHz - 67 GHz, 67 GHz - 110 GHz, 110 GHz - 170 GHz, 170 GHz - 260 GHz, 260 GHz - 325 GHz. It should be noted that when the target frequency band is 10 MHz - 67 GHz, since the capacitance and inductance values fluctuate greatly in the range of 10 MHz - 2 GHz, the target frequency points are selected in the range of 2 GHz - 67 GHz.
[0027] Among them, each target frequency band contains multiple target frequency points, and the frequency values of each target frequency point are different, and the number of target frequency points is preset.
[0028] In a possible implementation manner, the method further includes: obtaining the system characteristics of the in - chip S - parameter measurement system, and determining the target frequency band based on the system characteristics.
[0029] In some embodiments, according to the system characteristics of the in - chip S - parameter measurement system, the measurement frequency band corresponding to the in - chip S - parameter measurement system can be determined, and this measurement frequency band is the target frequency band.
[0030] In a possible implementation manner, the target in - chip calibration component includes an open - circuit calibration component, a short - circuit calibration component, and a load calibration component.
[0031] In a possible implementation, the specific processing steps of step S110 are as follows: Based on the on-wafer S-parameter measurement system, measure the reflection coefficient of the target on-wafer calibration component at each target frequency point; obtain the equivalent circuit of the target on-wafer calibration component and the characteristic impedance of the target on-wafer calibration component; based on the equivalent circuit of the target on-wafer calibration component, the characteristic impedance of the target on-wafer calibration component, and the reflection coefficient of the target on-wafer calibration component at each target frequency point, calculate the initial defined value of the target on-wafer calibration component at each target frequency point.
[0032] In some embodiments, the equivalent circuit of the target on-wafer calibration component refers to the equivalent circuit diagram when measuring the target on-wafer calibration component using the on-wafer S-parameter measurement system. The equivalent circuit diagram of the open-circuit calibration component is as Figure 2 shown, and the equivalent circuit diagram of the short-circuit calibration component is as Figure 3 shown, and the equivalent circuit diagram of the load calibration component is as Figure 4 shown.
[0033] See Figure 2 , is Figure 2 the reflection coefficient of the reference plane 1 in open , Z0 is the characteristic impedance, and the value of the characteristic impedance is 50 Ω. The open-circuit capacitance C Figure 2 is the initial defined value of the open-circuit calibration component. According to the equivalent circuit diagram, the characteristic impedance, and the reflection coefficient of the target on-wafer calibration component shown in
[0034]
[0035] See Figure 3 , is Figure 3 the reflection coefficient of the reference plane 2 in short , Z0 is the characteristic impedance, and the value of the characteristic impedance is 50 Ω. The short-circuit inductance L Figure 3 is the initial defined value of the short-circuit calibration component. According to the equivalent circuit diagram, the characteristic impedance, and the reflection coefficient of the target on-wafer calibration component shown in
[0036]
[0037] See Figure 4 , is Figure 4 the reflection coefficient of the reference plane 3 in load , Z0 is the characteristic impedance, and the value of the characteristic impedance is 50 Ω. The load inductance L Figure 4Based on the equivalent circuit diagram, characteristic impedance, and reflection coefficient of the target on-chip calibration component shown, the initial defined values can be calculated. The calculation process is as follows:
[0038]
[0039] In some embodiments, the number of initial defined values of the target on-chip calibration component is related to the number of target frequency points. When there are n target frequency points, there should also be n initial defined values of the target on-chip calibration component.
[0040] It should be noted that the defined value extraction method provided in this application can be applied not only in the SOLT calibration method, but also in the SOLR calibration method, or other calibration methods that require open calibration components, short calibration components, and load calibration components.
[0041] Step S120: For each initial defined value, based on the target frequency point adjacent relationship of the corresponding target frequency point of this initial defined value and the frequency values of all target frequency points, calculate the adjustment parameter of this initial defined value.
[0042] In some embodiments, each initial defined value of the target on-chip calibration component corresponds to a target frequency point, and each target frequency point corresponds to a frequency value.
[0043] In a possible implementation manner, the method further includes: arranging all target frequency points within the target frequency band in ascending order of the corresponding frequency values of the target frequency points to obtain the arrangement order of all target frequency points.
[0044] The following uses an example to illustrate the arrangement order of target frequency points: If there are three target frequency points within the target frequency band, the frequency of frequency point 1 is 3.5 GHz, the frequency value of frequency point 2 is 4.1 GHz, and the frequency value of frequency point 3 is 2.7 GHz, then the arrangement order is frequency point 3, frequency point 1, frequency point 2.
[0045] In a possible implementation manner, the specific processing steps of step S120 are: calculating the first adjustment parameter of all initial defined values based on the arrangement order of all target frequency points and the frequency values of all target frequency points; determining the target frequency point adjacent relationship of the corresponding target frequency point of this initial defined value based on the arrangement order of all target frequency points; determining the adjacent target frequency points of the corresponding target frequency point of this initial defined value based on the target frequency point adjacent relationship of the corresponding target frequency point of this initial defined value; calculating the second adjustment parameter of this initial defined value based on the frequency value of the corresponding target frequency point of this initial defined value and the frequency values of the adjacent target frequency points of the corresponding target frequency point of this initial defined value; obtaining the adjustment parameter of this initial defined value based on the first adjustment parameter and the second adjustment parameter of this initial defined value.
[0046] In some embodiments, the calculation formula for the first adjustment parameter is:
[0047]
[0048] Among them, T1 is the first adjustment parameter, f1 is the frequency value corresponding to the target frequency point with the order of 1, f2 is the frequency value corresponding to the target frequency point with the order of 2, f3 is the frequency value corresponding to the target frequency point with the order of 3, f n-1 is the frequency value corresponding to the target frequency point with the order of n - 1, f n is the frequency value corresponding to the target frequency point with the order of n.
[0049] In some embodiments, the adjacent relationship of the target frequency points refers to the sequential relationship between the target frequency points and the remaining frequency points after all the target frequency points are sorted. The adjacent target frequency points of a target frequency point refer to one or two target frequency points that are sequentially adjacent to the target frequency point. For example, if there are three target frequency points in the target frequency band, and the arrangement order is frequency point 3, frequency point 1, and frequency point 2, then the adjacent frequency point of frequency point 3 is frequency point 1, the adjacent frequency points of frequency point 1 are frequency point 3 and frequency point 2, and the adjacent frequency point of frequency point 2 is frequency point 1.
[0050] In some embodiments, if a target frequency point has two adjacent target frequency points, the calculation formula for the second adjustment parameter is:
[0051]
[0052] Among them, T 2(n) is the second adjustment parameter of the target frequency point with the order of n, f1 is the frequency value corresponding to the target frequency point with the order of 1, f n-1 is the frequency value corresponding to the target frequency point with the order of n - 1, f n is the frequency value corresponding to the target frequency point with the order of n, f n+1 is the frequency value corresponding to the target frequency point with the order of n + 1.
[0053] If a target frequency point has an adjacent target frequency point whose frequency value is greater than the frequency value of the target frequency point, the second adjustment parameter of the target frequency point is:
[0054]
[0055] Among them, T 2(n) is the second adjustment parameter of the target frequency point with the order of n, f1 is the frequency value corresponding to the target frequency point with the order of 1, f n is the frequency value corresponding to the target frequency point with the order of n, f n+1 is the frequency value corresponding to the target frequency point with the order of n + 1.
[0056] If a target frequency point has an adjacent target frequency point whose frequency value is smaller than the frequency value of the target frequency point, the second adjustment parameter of the target frequency point is:
[0057]
[0058] Among them, T 2(n) is the second adjustment parameter of the target frequency point with order n, f1 is the frequency value corresponding to the target frequency point with order 1, and f n-1 is the frequency value corresponding to the target frequency point with order n - 1, and f n is the frequency value corresponding to the target frequency point with order n.
[0059] In some embodiments, the calculation formula of the adjustment parameter is:
[0060]
[0061] Among them, T n is the adjustment parameter of the target frequency point with order n.
[0062] For example, if there are two adjacent target frequency points for the target frequency point with order n, then its adjustment parameter is:
[0063]
[0064] It should be noted that when different on-chip calibration parts of the target use the same frequency point during measurement, the adjustment parameters of different on-chip calibration parts of the target at the same frequency point are also the same.
[0065] Calculate the first adjustment parameter of all target frequency points through the arrangement order and frequency value of all target frequency points, and through the adjacent relationship of the target frequency points of the target frequency points, the adjacent target frequency points of the target frequency points can be determined, and the second adjustment parameter corresponding to the target frequency point can be calculated according to the frequency value, and further the adjustment parameter of the target frequency point can be obtained. The method obtained can fully consider the influence of the frequency response on each target frequency point and improve the accuracy of the adjustment parameter.
[0066] Step S130, calculate the defined value of the on-chip calibration part of the target based on all initial defined values of the on-chip calibration part of the target and the corresponding adjustment parameter of each initial defined value.
[0067] In some embodiments, the defined value refers to the standard value of the on-chip calibration part of the target.
[0068] In a possible implementation manner, the specific processing steps of step S130 are: multiply each initial defined value of the on-chip calibration part of the target by the corresponding adjustment parameter to obtain multiple intermediate defined values of the on-chip calibration part of the target; add all the intermediate defined values of the on-chip calibration part of the target to obtain the defined value of the on-chip calibration part of the target.
[0069] In some embodiments, the intermediate defined value is obtained by multiplying the initial defined value by the corresponding adjustment parameter. For example, when the target calibration component is an open-circuit calibration component, the intermediate defined value of the target frequency point with order n is:
[0070] C′ open,n =T n C open,n
[0071] Wherein, C open,n is the initial defined value (open-circuit capacitance) of the open-circuit calibration component at the target frequency point with order n, and T n is the adjustment parameter of the target frequency point with order n.
[0072] When the target calibration component is a short-circuit standard component, the intermediate defined value of the target frequency point with order n is:
[0073] L′ short,n =T n L short,n
[0074] Wherein, L short,n is the initial defined value (short-circuit inductance) of the short-circuit calibration component at the target frequency point with order n, and T n is the adjustment parameter of the target frequency point with order n.
[0075] When the target calibration component is a load calibration component, the intermediate defined value of the target frequency point with order n is:
[0076] L′ load,n =T n L load,n
[0077] Wherein, L load,n is the initial defined value (load inductance) of the load calibration component at the target frequency point with order n, and T n is the adjustment parameter of the target frequency point with order n.
[0078] It should be noted that the final defined value of the target calibration component is also the standard value of the target calibration component.
[0079] In some embodiments, when the target on-chip calibration component is an open-circuit calibration component, the final defined value (standard open-circuit capacitance) of the target calibration component is:
[0080]
[0081]
[0082] In some embodiments, when the target on-chip calibration component is a short-circuit calibration component, the final defined value (standard short-circuit inductance) of the target calibration component is:
[0083]
[0084] In some embodiments, when the on-chip calibration component is a load calibration component, the final defined value (standard load inductance) of the target calibration component is:
[0085]
[0086]
[0087] Through the calibrated on-chip S parameter measurement system, the initial defined value of the target on-chip calibration component at each frequency point within the target frequency band is obtained; and according to the adjacent relationship of the target frequency points corresponding to each initial defined value and the frequency values of all target frequency points, the adjustment parameter of each initial defined value is calculated, and further the defined value of the target on-chip calibration component is obtained through all the initial defined values and the corresponding adjustment parameters. By matching appropriate adjustment parameters for different frequency points, the influence of the frequency response can be fully considered, and the accuracy of extracting the defined value of the target on-chip calibration component can be improved.
[0088] It should be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
[0089] The following is an embodiment of the device of the present invention. For the details not described in detail, reference can be made to the corresponding method embodiment above.
[0090] Figure 5 The structural schematic diagram of the device for extracting the defined value of the on-chip calibration component provided by the embodiment of the present invention is shown. For the convenience of description, only the parts related to the embodiment of the present invention are shown and are described in detail as follows:
[0091] As Figure 5 shown, the device 5 for extracting the defined value of the on-chip calibration component includes:
[0092] A measurement module 51, configured to obtain the initial defined value of the target on-chip calibration component at each target frequency point within the target frequency band based on the calibrated on-chip S parameter measurement system;
[0093] A calculation module 52, configured to calculate the adjustment parameter of each initial defined value based on the adjacent relationship of the target frequency points corresponding to the initial defined value and the frequency values of all target frequency points for each initial defined value;
[0094] The calculation module 52 is further configured to calculate the defined value of the target on-chip calibration component based on all the initial defined values of the target on-chip calibration component and the adjustment parameters corresponding to each initial defined value.
[0095] In a possible implementation, the measurement module 51 is specifically configured to: obtain the system characteristics of the on-chip S-parameter measurement system, and determine the target frequency band based on the system characteristics.
[0096] In a possible implementation, the target on-chip calibration components include an open-circuit calibration component, a short-circuit calibration component, and a load calibration component.
[0097] In a possible implementation, the measurement module 51 is further configured to: measure the reflection coefficient of the target on-chip calibration component at each target frequency point based on the on-chip S-parameter measurement system; obtain the equivalent circuit of the target on-chip calibration component and the characteristic impedance of the target on-chip calibration component; calculate the initial defined value of the target on-chip calibration component at each target frequency point based on the equivalent circuit of the target on-chip calibration component, the characteristic impedance of the target on-chip calibration component, and the reflection coefficient of the target on-chip calibration component at each target frequency point.
[0098] In a possible implementation, the calculation module 52 is specifically configured to: arrange all the target frequency points within the target frequency band in ascending order of the corresponding frequency values of the target frequency points to obtain the arrangement order of all the target frequency points.
[0099] In a possible implementation, the calculation module 52 is further configured to: calculate the first adjustment parameter of all the initial defined values based on the arrangement order of all the target frequency points and the frequency values of all the target frequency points; determine the target frequency point adjacent relationship of the target frequency point corresponding to the initial defined value based on the arrangement order of all the target frequency points; determine the adjacent target frequency points of the target frequency point corresponding to the initial defined value based on the target frequency point adjacent relationship of the target frequency point corresponding to the initial defined value; calculate the second adjustment parameter of the initial defined value based on the frequency value of the target frequency point corresponding to the initial defined value and the frequency value of the adjacent target frequency point of the target frequency point corresponding to the initial defined value; obtain the adjustment parameter of the initial defined value based on the first adjustment parameter and the second adjustment parameter of the initial defined value.
[0100] In a possible implementation, the calculation module 52 is further configured to: multiply each initial defined value of the target on-chip calibration component by the corresponding adjustment parameter to obtain multiple intermediate defined values of the target on-chip calibration component; add all the intermediate defined values of the target on-chip calibration component to obtain the defined value of the target on-chip calibration component.
[0101] Figure 6 is a schematic diagram of an electronic device provided by an embodiment of the present invention. As Figure 6 shown, the electronic device 6 of this embodiment includes: a processor 60 and a memory 61. The memory 61 stores a computer program 62. When the processor 60 executes the computer program 62, the steps in the above-mentioned method embodiments are implemented. Alternatively, when the processor 60 executes the computer program 62, the functions of each module / unit in the above-mentioned device embodiments are implemented.
[0102] Exemplarily, the computer program 62 can be divided into one or more modules / units, which are stored in the memory 61 and executed by the processor 60 to implement the present invention. The one or more modules / units can be a series of computer program instruction segments capable of performing specific functions, and these instruction segments are used to describe the execution process of the computer program 62 in the electronic device 6.
[0103] The electronic device 6 may include, but is not limited to, a processor 60 and a memory 61. Those skilled in the art can understand that Figure 6 merely being examples of the electronic device 6, they do not constitute a limitation on the electronic device 6. It may include more or fewer components than shown in the figure, or combine certain components, or have different components. For example, the electronic device 6 may further include input / output devices, network access devices, buses, etc.
[0104] The processor 60 may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.
[0105] The memory 61 may be an internal storage unit of the electronic device 6, such as the hard disk or memory of the electronic device 6. The memory 61 may also be an external storage device of the electronic device 6, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device 6. Further, the memory 61 may also include both the internal storage unit and the external storage device of the electronic device 6. The memory 61 is used to store the computer program 62 and other programs and data required by the electronic device 6. The memory 61 may also be used to temporarily store data that has been output or is to be output.
[0106] For the convenience and brevity of description, only the above division of each functional module / unit is used as an example for illustration. In practical applications, the above functions can be allocated to different functional modules / units according to needs. The above modules / units can be implemented in the form of hardware, or in the form of software, or in the form of a combination of hardware and software.
[0107] The embodiment of the present invention further provides a test system, and the test system is calibrated by using the target in-chip calibration component described in any one of claims 1 to 7.
[0108] In the above embodiments, the descriptions of the respective embodiments have their own emphases. For parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments. Without special instructions and logical conflicts, the terms and / or descriptions between different embodiments are consistent and can be mutually referred to. The technical features in different embodiments can be combined to form new embodiments according to their internal logical relationships.
[0109] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. A method for extracting definition values of an on-wafer calibration component, characterized in that: include: Based on the calibrated on-wafer S-parameter measurement system, the initial definition value of each target frequency point of the target on-wafer calibration component within the target frequency band is obtained; For each initial defined value, based on the target frequency point neighbor relationship of the target frequency point corresponding to the initial defined value and the frequency values of all target frequency points, an adjustment parameter of the initial defined value is calculated; Based on all the initial defined values of the target on-wafer calibration part and the adjustment parameters corresponding to each initial defined value, the defined value of the target on-wafer calibration part is calculated.
2. The method for extracting definition values of an on-wafer calibration piece according to claim 1, characterized in that: The step of calculating, for each initial defined value, the adjustment parameter of the initial defined value based on the target frequency point neighboring relationship of the target frequency point corresponding to the initial defined value and the frequency values of all target frequency points comprises: Calculating first adjustment parameters of all initially defined values based on the arrangement order of all target frequency points and the frequency values of all target frequency points; Determine the target frequency point adjacent relationship of the target frequency point corresponding to the initial definition value based on the arrangement order of all target frequency points; Determine the adjacent target frequency points of the target frequency point corresponding to the initial defined value based on the target frequency point adjacent relationship of the initial defined value; Calculating a second adjustment parameter of the initial defined value based on the frequency value of the target frequency point corresponding to the initial defined value and the frequency values of adjacent target frequency points corresponding to the target frequency point of the initial defined value; Based on the first adjustment parameter and the second adjustment parameter of the initial defined value, the adjustment parameter of the initial defined value is obtained.
3. The method for extracting definition values of an on-wafer calibration component according to claim 2, characterized in that: The method further comprises: All target frequency points in the target frequency band are arranged in ascending order according to the frequency values corresponding to the target frequency points, to obtain the arrangement order of all target frequency points.
4. The method for extracting definition values of an on-wafer calibration piece according to claim 1, characterized in that: The method of obtaining an initial definition value of each target frequency point of a target on-wafer calibration component within a target frequency band based on the calibrated on-wafer S-parameter measurement system includes: Based on the on-wafer S-parameter measurement system, measuring the reflection coefficient of the target on-wafer calibration component at each target frequency point; Acquire an equivalent circuit of the target on-wafer calibration component and a characteristic impedance of the target on-wafer calibration component; Based on the equivalent circuit of the target on-wafer calibration part, the characteristic impedance of the target on-wafer calibration part, and the reflection coefficient of the target on-wafer calibration part at each target frequency point, an initial defined value of the target on-wafer calibration part at each target frequency point is calculated.
5. The method for extracting definition values of an on-wafer calibration piece according to claim 1, characterized in that: The calculating the definition value of the target on-wafer calibration piece based on all the initial definition values of the target on-wafer calibration piece and the adjustment parameter corresponding to each initial definition value includes: multiplying each initial definition value of the target on-film calibration piece by a corresponding adjustment parameter to obtain a plurality of intermediate definition values of the target on-film calibration piece; All intermediate definition values of the target on-wafer calibration piece are added together to obtain the definition value of the target on-wafer calibration piece.
6. The method for extracting definition values of an on-wafer calibration piece according to claim 1, characterized in that: The method further comprises: A system characteristic of the on-wafer S-parameter measurement system is acquired, and the target frequency band is determined based on the system characteristic.
7. The method for extracting definition values of an on-wafer calibration piece according to claim 1, characterized in that: The target on-wafer calibration parts include an open-circuit calibration part, a short-circuit calibration part and a load calibration part.
8. A device for extracting definition values of an on-wafer calibration component, characterized in that: include: A measurement module, for obtaining an initial definition value of each target frequency point of a target on-wafer calibration component within a target frequency band based on a calibrated on-wafer S-parameter measurement system; A calculation module, for calculating, for each initial defined value, an adjustment parameter of the initial defined value based on a target frequency point neighboring relationship of a target frequency point corresponding to the initial defined value and frequency values of all target frequency points; The calculation module is further configured to calculate a definition value of the target on-wafer calibration component based on all initial definition values of the target on-wafer calibration component and an adjustment parameter corresponding to each initial definition value.
9. An electronic device, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program, and the processor implements the method according to any one of claims 1 to 7 when executing the computer program.
10. A testing system, characterized in that: The test system is calibrated using the target on-wafer calibration piece according to any one of claims 1 to 7.