Chip sorting quality monitoring and early warning device and method

Abstract

The invention discloses a quality monitoring and early warning device for chip sorting, which relates to the technical field of quality monitoring, and comprises a test sample extraction module, the test sample extraction module is used for presetting a sampling time sequence interval and performing test sample extraction on a same-batch chip set by taking the sampling time sequence interval as a constraint; obtaining a plurality of chip test samples; according to the chip sorting quality monitoring and early warning device and method, through the quality monitoring process and the evaluation model, the quality deviation degree of each chip test sample can be quantified, so that the accuracy of quality deviation analysis is improved, and the accuracy of chip sorting detection is improved. Therefore, the quality problem can be positioned more accurately, the problems of insufficient quality monitoring accuracy, evaluation standardization and real-time early warning capability in the prior art are effectively solved, and higher quality guarantee and management efficiency are provided for the chip production process.

Description

Technical Field

[0001] The present invention relates to the technical field of quality monitoring, and particularly to a device and method for chip sorting quality monitoring and early warning. Background Art

[0002] As the core component of modern electronic devices, the quality of chips directly affects the performance and reliability of the devices. In large-scale chip production, it is crucial to ensure that each chip meets the design specifications and quality standards.

[0003] However, traditional quality monitoring methods are usually full monitoring or random sampling monitoring. Among them, full monitoring requires a large amount of time and human resources, with high costs; while random sampling may not effectively cover the entire production batch, resulting in insufficient and inaccurate quality monitoring. Moreover, there is a lack of effective quality analysis and evaluation mechanisms in traditional methods, making the analysis of quality problems rely on subjective judgment and experience, lacking objectivity. Therefore, a device and method for chip sorting quality monitoring and early warning are proposed. Summary of the Invention

[0004] The purpose of the present invention is to solve the problems in the prior art, and a device and method for chip sorting quality monitoring and early warning are proposed.

[0005] A device for chip sorting quality monitoring and early warning includes a test sample extraction module, which is used to preset the sampling time sequence interval and extract test samples from the same batch of chip sets according to the sampling time sequence interval as a constraint, obtaining a plurality of chip test samples; A chip sorting detection module, which is used to interactively obtain a standard sorting detection process and perform chip sorting detection on the plurality of chip test samples based on the standard sorting detection process, obtaining multiple sorting detection results; A quality deviation acquisition module, which is used to analyze the multiple sorting detection results by using the product quality benchmark to obtain a plurality of chip quality deviation sets, wherein the product quality benchmark is extracted from the chip design data of the conceptual chips in the same batch of chip sets; An evaluation model construction module, which is used to construct a quality deviation evaluation model according to the product quality benchmark; A monitoring result acquisition module, which is used to synchronize the plurality of chip quality deviation sets to the quality deviation evaluation model to obtain a batch quality monitoring result; An early warning signal generation module, which is used to preset a batch quality deviation threshold. If the batch quality monitoring result falls within the batch quality deviation threshold, a chip production early warning signal is generated.

[0006] Preferably, the test sample extraction module performs the following operation steps: Based on the production run, divide the chips in the same batch to obtain M groups of production-run chips, where the M groups of production-run chips have M production time identifiers, and M is a positive integer; Traverse the M production time identifiers with the sampling time interval as a constraint to obtain multiple groups of production-run chips; Perform random sampling of chips within each group of the multiple groups of production-run chips to obtain the multiple chip test samples.

[0007] Preferably, the chip sorting and detection module performs the following operation steps: Based on the appearance inspection node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first appearance detection result, where the first appearance detection result includes a first defect type and a first defect size parameter, and the first chip test sample is any one of the multiple chip test samples; Based on the electrical test node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first electrical detection result, where the first electrical detection result includes multiple first electrical parameters; Based on the function test node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first function detection result, where the first function detection result includes multiple first function information; Based on the performance test node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first performance detection result, where the first function detection result includes multiple first performance information; The first appearance detection result, the first electrical detection result, the first function detection result, and the first performance detection result constitute a first component sorting and detection result; And so on, based on the standard sorting and detection process, perform chip sorting and detection on the multiple chip test samples to obtain the multiple component sorting and detection results.

[0008] Preferably, the product quality benchmark includes multiple appearance defect benchmarks, multiple electrical index benchmarks, multiple chip function benchmarks, and multiple chip performance benchmarks.

[0009] Preferably, the evaluation model construction module performs the following operation steps: Configure a weight information library for the product quality benchmark, where the weight information library includes an appearance defect weight sub-library, an electrical index weight sub-library, a chip function weight sub-library, and a chip performance weight sub-library; Pre-construct a standard quality deviation function, and construct a quality deviation calculation layer based on the standard quality deviation function. The standard quality deviation function is as follows: ; Wherein, S is the single - dimensional quality deviation coefficient, is the deviation amount of the th single - dimensional detection result deviating from the single - dimensional quality benchmark, is the time interval between the th single - dimensional detection result and the th single - dimensional detection result, and N is the number of samples of the multiple chip test samples; Cascade the weight information library and the quality deviation calculation layer to obtain the quality deviation evaluation model.

[0010] Preferably, the monitoring result acquisition module performs the following operation steps: Extract a plurality of appearance indicators from the multiple appearance defect benchmarks, and extract multiple groups of appearance quality deviations from the multiple chip quality deviation sets with the multiple appearance indicators as constraints. Among them, each group of appearance quality deviations has multiple production time identifications for multiple measured appearance quality deviations; Activate the appearance defect weight sub - library in the weight information library based on the multiple appearance defect benchmarks; Synchronize the multiple groups of appearance quality deviations to the standard quality deviation function to calculate multiple appearance quality deviation coefficients, and then use the appearance defect weight sub - library to perform weighted calculation on the multiple appearance quality deviation coefficients to obtain the batch appearance monitoring result; By analogy, calculate the batch electrical monitoring result, batch function monitoring result, and batch performance monitoring result. The batch appearance monitoring result, batch electrical monitoring result, batch function monitoring result, and batch performance monitoring result constitute the batch quality monitoring result.

[0011] Preferably, the batch quality deviation threshold includes an appearance quality deviation threshold, an electrical quality deviation threshold, a function quality deviation threshold, and a performance quality deviation threshold.

[0012] Preferably, the warning signal generation module performs the following operation steps: If the batch appearance monitoring result, batch electrical monitoring result, batch function monitoring result, and batch performance monitoring result are mapped into the appearance quality deviation threshold, electrical quality deviation threshold, function quality deviation threshold, and performance quality deviation threshold, then generate the chip production warning signal; Preset the weight assignment rule; If the batch appearance monitoring result, batch electrical monitoring result, batch function monitoring result, and batch performance monitoring result do not map and fall within the appearance quality deviation threshold, electrical quality deviation threshold, function quality deviation threshold, and performance quality deviation threshold, then weight the batch quality monitoring result according to the weight assignment rule to obtain a comprehensive quality monitoring result; Preset a comprehensive quality deviation threshold. If the comprehensive quality monitoring result meets the comprehensive quality deviation threshold, generate the chip production warning signal.

[0013] The present invention also discloses a method for chip sorting quality monitoring and early warning, which is implemented by the described device for chip sorting quality monitoring and early warning, and includes the following steps: S1. Preset a sampling time sequence interval, and extract test samples from the same batch of chip sets with the sampling time sequence interval as a constraint to obtain a plurality of chip test samples; S2. Interactively obtain a standard sorting detection process, and perform chip sorting detection on the plurality of chip test samples based on the standard sorting detection process to obtain multi-component sorting detection results; S3. Analyze the multi-component sorting detection results by using a product quality benchmark to obtain a plurality of chip quality deviation sets, wherein the product quality benchmark is extracted from the chip design data of the concept chips in the same batch of chip sets; S4. Construct a quality deviation evaluation model according to the product quality benchmark; S5. Synchronize the plurality of chip quality deviation sets to the quality deviation evaluation model to obtain a batch quality monitoring result; S6. Preset a batch quality deviation threshold. If the batch quality monitoring result falls within the batch quality deviation threshold, generate a chip production warning signal.

[0014] Compared with the existing technology, the advantages of the present invention are as follows: The device and method for chip sorting quality monitoring and early warning in the present invention can quantify the quality deviation degree of each chip test sample through a quality monitoring process and an evaluation model, which improves the accuracy of quality deviation analysis, enables more accurate positioning of quality problems, effectively solves the problems of insufficient quality monitoring accuracy, evaluation standardization, and real-time early warning ability in the existing technology, and provides higher quality guarantee and management efficiency for the chip production process. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic structural diagram of a device for chip sorting quality monitoring and early warning in the present invention.

[0016] Figure 2 It is a schematic flow diagram of a method for chip sorting quality monitoring and early warning in the present invention.

[0017] In the figure: 10 is a test sample extraction module, 20 is a chip sorting and detection module, 30 is a quality deviation acquisition module, 40 is an evaluation model construction module, 50 is a monitoring result acquisition module, and 60 is an early warning signal generation module. Detailed implementation manners

[0018] To make the technical means, creative features, achieved purposes, and functions of the present invention easy to understand, the present invention will be further described below in conjunction with specific implementation manners.

[0019] Referring to Figure 1 As shown, a chip sorting quality monitoring and early warning device includes: A test sample extraction module 10, which is used to preset a sampling time sequence interval and extract test samples from a same-batch chip set with the sampling time sequence interval as a constraint to obtain a plurality of chip test samples; A chip sorting and detection module 20, which is used to interactively obtain a standard sorting and detection process and perform chip sorting and detection on the plurality of chip test samples based on the standard sorting and detection process to obtain multi-component sorting and detection results; A quality deviation acquisition module 30, which is used to analyze the multi-component sorting and detection results by using a product quality benchmark to obtain a plurality of chip quality deviation sets, wherein the product quality benchmark is extracted from chip design data of a concept chip in the same-batch chip set; An evaluation model construction module 40, which is used to construct a quality deviation evaluation model according to the product quality benchmark; A monitoring result acquisition module 50, which is used to synchronize the plurality of chip quality deviation sets to the quality deviation evaluation model to obtain batch quality monitoring results; An early warning signal generation module 60, which is used to preset a batch quality deviation threshold, and if the batch quality monitoring results fall within the batch quality deviation threshold, generate a chip production early warning signal.

[0020] In this embodiment, the test sample extraction module 10 performs the following operation steps: Divide the same-batch chip set based on production operation to obtain M groups of production operation chips, where the M groups of production operation chips have M production time identifiers, and M is a positive integer; Traverse the M production time identifiers with the sampling time sequence interval as a constraint to obtain multiple groups of production operation chips; Perform random sampling of chips within each group of the multiple groups of production operation chips to obtain the plurality of chip test samples.

[0021] In this embodiment, the chip sorting and detection module 20 performs the following operation steps: Based on the appearance inspection node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first appearance detection result, where the first appearance detection result includes a first defect type and a first defect size parameter, and the first chip test sample is any one of the multiple chip test samples; Based on the electrical test node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first electrical detection result, where the first electrical detection result includes multiple first electrical parameters; Based on the function test node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first function detection result, where the first function detection result includes multiple first function information; Based on the performance test node in the standard sorting and detection process, perform chip sorting and detection on the first chip test sample to obtain a first performance detection result, where the first function detection result includes multiple first performance information; The first appearance detection result, the first electrical detection result, the first function detection result, and the first performance detection result constitute a first component sorting and detection result; And so on, based on the standard sorting and detection process, perform chip sorting and detection on the multiple chip test samples to obtain the multi-component sorting and detection results.

[0022] In this embodiment, the product quality benchmark includes multiple appearance defect benchmarks, multiple electrical index benchmarks, multiple chip function benchmarks, and multiple chip performance benchmarks.

[0023] In this embodiment, the evaluation model construction module 40 performs the following operation steps: Configure a weight information library for the product quality benchmark, where the weight information library includes an appearance defect weight sub-library, an electrical index weight sub-library, a chip function weight sub-library, and a chip performance weight sub-library; Pre-construct a standard quality deviation function, and based on the standard quality deviation function, construct a quality deviation calculation layer. This quality deviation calculation layer accepts various quality detection data from multiple chip test samples as inputs. For each sample, by calculating the deviation amount of its deviation from the single-dimensional quality benchmark in each quality index, and then performing weighted accumulation according to the time interval, a single-dimensional quality deviation coefficient is obtained. The standard quality deviation function is as follows: ; where S is the single-dimensional quality deviation coefficient, is the deviation amount of the th single-dimensional detection result deviating from the single-dimensional quality benchmark, is the The time interval between the results of the first single - dimensional detection and the results of the second single - dimensional detection, is the number of samples of the multiple chip test samples;

[0024] In this embodiment, the monitoring result acquisition module 50 performs the following operation steps: Extract a plurality of appearance indicators from the plurality of appearance defect benchmarks, and extract multiple groups of appearance quality deviations from the plurality of chip quality deviation sets with the plurality of appearance indicators as constraints. Among them, multiple measured appearance quality deviations in each group of appearance quality deviations have multiple production time identifiers; Activate the appearance defect weight sub - library in the weight information library based on the plurality of appearance defect benchmarks; After synchronizing the multiple groups of appearance quality deviations to the standard quality deviation function to calculate multiple appearance quality deviation coefficients, use the appearance defect weight sub - library to perform weighted calculation on the multiple appearance quality deviation coefficients to obtain the batch appearance monitoring result; By analogy, calculate the batch electrical monitoring result, batch function monitoring result and batch performance monitoring result. The batch appearance monitoring result, batch electrical monitoring result, batch function monitoring result and batch performance monitoring result constitute the batch quality monitoring result.

[0025] In this embodiment, the batch quality deviation thresholds include appearance quality deviation threshold, electrical quality deviation threshold, function quality deviation threshold and performance quality deviation threshold. The appearance quality deviation threshold is used to evaluate the deviation degree of the appearance quality of chips in a batch, and is used to judge whether the appearance defects exceed the acceptable range; the electrical quality deviation threshold is used to measure the deviation of the electrical performance of chips in a batch, and is used to determine whether the electrical parameters meet the expected requirements; the function quality deviation threshold is used to evaluate the deviation of the functional characteristics of chips in a batch, and is used to judge whether the function information meets the design requirements; the performance quality deviation threshold is used to measure the deviation degree of the performance of chips in a batch, and is used to determine whether the performance information reaches the expected level.

[0026] In this embodiment, the warning signal generation module 60 performs the following operation steps: If the batch appearance monitoring result, batch electrical monitoring result, batch function monitoring result, and batch performance monitoring result are mapped into the appearance quality deviation threshold, electrical quality deviation threshold, function quality deviation threshold, and performance quality deviation threshold, then generate the chip production warning signal; Preset a weight assignment rule, which is used to determine the weight of each quality index in the comprehensive quality assessment according to the importance of each quality index. These weights can be adjusted and configured according to specific requirements and actual situations, including aspects such as the influence degree of each monitoring index on the quality of the final product and the direct reflection degree of each index on the product performance or function; If the batch appearance monitoring result, batch electrical monitoring result, batch function monitoring result, and batch performance monitoring result are not mapped into the appearance quality deviation threshold, electrical quality deviation threshold, function quality deviation threshold, and performance quality deviation threshold, then weight the batch quality monitoring results according to the weight assignment rule to obtain the comprehensive quality monitoring result; Preset a comprehensive quality deviation threshold. If the comprehensive quality monitoring result meets the comprehensive quality deviation threshold, then generate the chip production warning signal.

[0027] Refer to Figure 2 As shown, a method for chip sorting quality monitoring and warning includes the following steps: S1. Preset the sampling time sequence interval, and extract test samples from the same batch of chip sets with the sampling time sequence interval as the constraint to obtain multiple chip test samples; S2. Interactively obtain the standard sorting detection process, and perform chip sorting detection on the multiple chip test samples based on the standard sorting detection process to obtain multiple sorting detection results; S3. Analyze the multiple sorting detection results using the product quality benchmark to obtain multiple chip quality deviation sets, where the product quality benchmark is extracted from the chip design data of the concept chips in the same batch of chip sets; S4. Construct a quality deviation evaluation model according to the product quality benchmark; S5. Synchronize the multiple chip quality deviation sets to the quality deviation evaluation model to obtain the batch quality monitoring result; S6. Preset the batch quality deviation threshold. If the batch quality monitoring result falls into the batch quality deviation threshold, then generate the chip production warning signal.

[0028] In step S1, the sampling time interval refers to the time interval for extracting chip samples from the production line within a specific period, which can be set according to the production volume and operating speed of the production line, as well as the required monitoring accuracy and frequency. Chips of the same batch refer to a group of chips with the same design, specifications, and production conditions. However, this batch of chips may be obtained through multiple production runs. A production run refers to a complete production cycle, including the entire process from raw material preparation to the shipment of finished chips.

[0029] The chip set of the same batch is divided into different groups according to the production runs, and each group of chips is marked with a production time identifier. All production time identifiers are traversed, and samples are extracted subject to the preset sampling time interval. For example, if a batch of chips is produced in 5 different time periods, then this chip set can be divided into 5 groups, and each group of chips has a different production time identifier; if a complete production cycle is 1 hour and the sampling time interval is 2 hours, then for the 5 production time identifiers produced in 5 consecutive production cycles, the 1st, 3rd, and 5th groups are selected. After traversal, multiple groups of production run chips are obtained; in each group of production run chips, random sampling is performed according to the preset sampling quantity to ensure that the samples are representative. After sampling, the multiple chip test samples are obtained; through the above steps, representative sample extraction is achieved based on the batch characteristics of chip production, reducing the test volume of chip sorting and testing while not affecting the accuracy of sorting and testing.

[0030] In step S2, the standard sorting and detection process refers to the standardized operation steps for chip detection, including an appearance inspection node, an electrical test node, a function test node, and a performance test node.

[0031] The appearance inspection node is used to inspect the appearance quality of the chips. A sample randomly selected from multiple chip test samples is used as the first chip test sample, and an appearance inspection device such as a microscope is used to inspect the appearance of the first chip test sample to check whether there are defects on the chip surface, such as scratches, cracks, contamination, foreign objects, etc., to obtain the first defect type. At the same time, the size parameters of the defects are measured, including length, width, depth, etc., to obtain the first defect size parameters. The first defect type and the first defect size parameters are integrated to obtain the first appearance detection result.

[0032] The electrical test node is used to test the electrical characteristics of the chips. An electrical test device is used to measure the electrical characteristics of the first chip test sample, and the measurement includes multiple electrical parameters such as voltage, current, resistance, and capacitance to obtain the first voltage, the first current, the first resistance, and the first capacitance, forming the first electrical detection result.

[0033] The functional test node is used to test the functional characteristics of the chip. A functional test device is used to test the functions of the first chip test sample. The tests include multiple aspects such as logic functions, communication functions, and processing capabilities. The test results of each functional test item are obtained to form the first functional test result.

[0034] The performance test node is used to test the performance characteristics of the chip. A performance test device is used to test the performance characteristics of the first chip test sample. The tests include multiple aspects such as speed, power consumption, and stability. The test results of each performance test item are obtained to form the first performance test result.

[0035] Integrate the above test results to form the first component sorting test result, which reflects the quality and performance of the first chip test sample in multiple aspects. Repeat the above test steps for the remaining multiple chip test samples in turn, that is, perform tests on the appearance, electrical properties, functions, and performance of all samples, and obtain multiple component sorting test results for subsequent quality deviation analysis.

[0036] In step S3, the product quality benchmarks are the standards used to evaluate the quality of the chip. These standards are extracted from the conceptual chip design documents of the chip set in the same batch. The chip design documents of the conceptual chip include files such as the design specifications, technical parameters, and function requirements of the chip. Each quality benchmark is extracted from this design document, including multiple appearance defect benchmarks, multiple electrical index benchmarks, multiple chip function benchmarks, and multiple chip performance benchmarks, etc.

[0037] Among them, the appearance defect benchmarks specify the acceptable and unacceptable defect types and size ranges in the chip appearance. For example, surface damage, poor packaging, printing errors, etc. all belong to the category of appearance defects; the electrical index benchmarks specify the standard requirements for the electrical characteristics of the chip, including the standard values of parameters such as voltage, current, resistance, and capacitance; the chip function benchmarks specify the various functional characteristics that the chip should possess, including requirements in aspects such as logic functions, communication functions, and processing capabilities. For example, a processor chip must be able to run correctly at the clock frequency; the chip performance benchmarks specify the performance requirements when the chip is running, including standards in aspects such as speed, power consumption, and stability. For example, the operating speed and power consumption of a high-performance processor should be within a specific range and perform stably under various environmental conditions. These product quality benchmarks are determined through the analysis of the chip design documents, ensuring that the quality of each chip meets the expected standards during the manufacturing process and in the final product.

[0038] For each group of sorting and detection results, calculate the deviation from the product quality benchmark. For example, in the appearance detection results, the difference between the appearance defect size and the appearance defect benchmark, and in the electrical detection results, the difference between the voltage parameter and the electrical index benchmark, etc. Obtain the deviation of the sample in each detection category relative to the product quality benchmark to form a quality deviation set. Among them, if a chip is of qualified quality, then its chip quality deviation set is an empty set.

[0039] In step S4, the goal of the quality deviation evaluation model is to use the product quality benchmark to analyze the deviations of the detection results in multiple dimensions, so as to evaluate the chip quality. Configure a weight information library for the product quality benchmark to perform weighted evaluation on different parts of the product quality benchmark to more accurately reflect the importance and influence degree of each aspect, including the appearance defect weight sub-library, the electrical index weight sub-library, the chip function weight sub-library, and the chip performance weight sub-library.

[0040] The appearance defect weight sub-library contains weight information related to the appearance defects of the chip. These weights can be set according to factors such as the type, size, and location of the defects. For example, higher weights are given to larger-sized defects because they have a greater impact on the overall appearance of the chip; the electrical index weight sub-library contains the importance evaluation of various electrical parameters of the chip, including voltage, current, resistance, capacitance, etc. The weights are set according to the contribution degree of these parameters to the chip function and performance. For example, for power consumption-sensitive applications, a higher weight is given to the current parameter; the chip function weight sub-library includes the importance evaluation of each function of the chip, covering logical functions, communication functions, data processing capabilities, etc. The weights are set according to the main functions and application scenarios of the chip design to ensure the functional integrity and stability of the chip under specific uses; the chip performance weight sub-library includes the importance evaluation of the performance of the chip during operation, including aspects such as speed, response time, and stability. The weights are set according to the application requirements and performance requirements of the chip. For example, in a high-performance computing environment, a higher weight is given to speed.

[0041] In step S5, classify the deviation data of each test sample by detection category, including appearance, electricity, function, and performance. Input the classified quality deviation set into the constructed quality deviation evaluation model. The model calculates the comprehensive quality deviation of each chip sample using the predefined standard quality deviation function and the weight information library based on the input data, and comprehensively evaluates the chips of the entire batch. The evaluation results constitute the batch quality monitoring results.

[0042] Extract multiple specific appearance metrics from multiple appearance defect benchmarks. These metrics cover various appearance-related quantitative parameters such as defect types and sizes. Use the extracted multiple appearance metrics as constraint conditions to screen multiple chip quality deviation sets, and extract the quality deviation data that meets the preset appearance metric constraints to obtain multiple sets of appearance quality deviation data. Each set of data includes multiple measured appearance quality deviations under different production time identifiers.

[0043] Activate the appearance defect weight sub-library in the weight information library based on multiple appearance defect benchmarks. This appearance defect weight sub-library contains weight settings for different types and severities of appearance defects, and these weights are set based on the importance of the defect type and the degree of impact on the appearance of the final product.

[0044] Synchronize the extracted multiple sets of appearance quality deviation data, that is, the measured appearance quality deviations of each group obtained under different production time identifiers, to the standard quality deviation function, and calculate the quality deviation coefficients of each group of appearance quality deviations. These coefficients represent the degree of deviation of each group of appearance quality deviations from the appearance defect benchmark. Use the weights in the appearance defect weight sub-library to perform weighted calculations on the obtained multiple appearance quality deviation coefficients. This weighting integrates the impact degrees of different types and severities of appearance defects on the overall appearance quality. According to the obtained weighted appearance quality deviation coefficients, obtain the batch appearance monitoring results, which reflect the comprehensive evaluation of the appearance quality of the entire batch of chips.

[0045] Similar to the process of obtaining the batch appearance monitoring results, sequentially obtain the batch electrical monitoring results, batch function monitoring results, and batch performance monitoring results. Integrate the obtained batch appearance monitoring results, batch electrical monitoring results, batch function monitoring results, and batch performance monitoring results to form a complete batch quality monitoring result. This result synthesizes the quality evaluations in various aspects and provides a comprehensive analysis of the quality status of the entire batch of chips.

[0046] In step S6, the batch quality deviation threshold is the standard for evaluating whether the batch quality monitoring result is within the acceptable range. It can be set according to historical data, industry standards, and design specifications. Compare the batch quality monitoring result with the preset batch quality deviation threshold to determine whether the result falls within the preset threshold range. If the batch quality monitoring result falls within the preset batch quality deviation threshold range, it means that the batch quality is not within the acceptable range, and a chip production warning signal is generated to prompt that there may be quality problems in the chip production process and further inspection and corrective measures are required.

[0047] If the appearance monitoring result of a batch indicates that the appearance quality deviation of the chips in the batch falls within the appearance quality deviation threshold, a first warning signal regarding appearance quality is generated; if the electrical monitoring result indicates that the electrical performance deviation of the chips in the batch falls within the electrical quality deviation threshold, a second warning signal regarding electrical quality is generated; if the function monitoring result indicates that the functional characteristic deviation of the chips in the batch falls within the function quality deviation threshold, a third warning signal regarding function quality is generated; if the performance monitoring result indicates that the performance deviation of the chips in the batch falls within the performance quality deviation threshold, a fourth warning signal regarding performance quality is generated. The above first, second, third, and fourth warning signals constitute the chip production warning signal, that is, when any warning signal is triggered, the chip production warning signal is generated to promptly detect and handle quality problems.

[0048] If the appearance monitoring result of the batch, the electrical monitoring result of the batch, the function monitoring result of the batch, and the performance monitoring result of the batch do not fall within the corresponding quality deviation thresholds, then according to the preset weight assignment rules, each quality monitoring result is weighted and calculated, and the weighted quality monitoring results are combined to form a comprehensive quality monitoring result. This comprehensive quality monitoring result serves as a comprehensive indicator of the quality of the entire batch and is used to evaluate the overall quality level of the product.

[0049] The comprehensive quality deviation threshold is used to determine whether the comprehensive quality assessment of the entire batch of products meets the expected level, and this threshold can be set according to the specific requirements and actual situation of the product. The comprehensive quality monitoring result is compared with the comprehensive quality deviation threshold. If the comprehensive quality monitoring result falls within the comprehensive quality deviation threshold, a chip production warning signal is automatically generated to indicate that there may be quality problems during the chip production process and further inspection and corrective measures are required.

[0050] Preset the sampling time interval, and extract test samples from the same batch of chip sets with the sampling time interval as the constraint to obtain multiple chip test samples. This ensures that samples are regularly extracted during the chip production process, enabling quality monitoring to cover the entire batch of chip sets, thereby improving the comprehensiveness of monitoring and reducing quality risks caused by local or random problems; interactively obtain the standard sorting and detection process, and perform chip sorting and detection on multiple chip test samples based on the standard sorting and detection process to obtain multi-component sorting and detection results. Through the standardized sorting and detection process, it is ensured that consistent quality inspections are carried out on each chip test sample, which improves the consistency and comparability of detection; extract the product quality benchmark from the design materials of the concept chips in the same batch of chip sets to evaluate the quality deviation of the actual chip test samples. This can ensure that the evaluation process is standardized and objective, reducing the influence of subjective factors on the evaluation results; construct a quality deviation evaluation model based on the product quality benchmark, which can quantify the degree of quality deviation of each chip test sample, improving the accuracy of quality deviation analysis and enabling more precise positioning of quality problems; synchronize multiple chip quality deviation sets to the quality deviation evaluation model to obtain the batch quality monitoring results, realizing a comprehensive evaluation of the quality status of the entire batch. This can effectively manage the quality risks of large-scale chip production and reduce the possibility of unqualified products flowing into the market; preset the batch quality deviation threshold to determine whether the batch quality monitoring results are qualified. If the batch quality monitoring results fall within the batch quality deviation threshold, a chip production warning signal is generated, which helps to take timely measures to avoid further production losses and quality problems.

[0051] In summary, the chip sorting quality monitoring and warning device and method effectively solve the problems of insufficient accuracy of quality monitoring, standardization of evaluation, and real-time warning ability in the prior art through the quality monitoring process and evaluation model, providing higher quality assurance and management efficiency for the chip production process.

[0052] As is known by technical common sense, the present invention can be implemented by other embodiments without departing from its spirit or essential features. Therefore, the above-disclosed embodiments are illustrative in all aspects and not exclusive. All changes within the scope of the present invention or equivalent to the present invention are encompassed by the present invention.

Claims

1. A chip sorting quality monitoring and early warning device, characterized in that: include: A test sample extraction module (10), the test sample extraction module (10) being used to preset a sampling time interval, and extract test samples from a chip set of the same batch using the sampling time interval as a constraint, to obtain a plurality of chip test samples; A chip sorting and testing module (20), the chip sorting and testing module (20) being used to interactively obtain a standard sorting and testing process, and to perform chip sorting and testing on the plurality of chip test samples based on the standard sorting and testing process, to obtain a plurality of groups of sorting and testing results; A quality deviation acquisition module (30), the quality deviation acquisition module (30) being used to analyze the multiple groups of sorting test results using a product quality benchmark to obtain a plurality of chip quality deviation sets, wherein the product quality benchmark is extracted from chip design data of concept chips of a chip set of the same batch; An evaluation model construction module (40), the evaluation model construction module (40) being used to construct a quality deviation evaluation model according to the product quality benchmark; A monitoring result acquisition module (50), the monitoring result acquisition module (50) being used to synchronize the plurality of chip quality deviation sets to the quality deviation evaluation model to obtain batch quality monitoring results; An early warning signal generating module (60), the early warning signal generating module (60) is used to preset a batch quality deviation threshold, and if the batch quality monitoring result falls within the batch quality deviation threshold, a chip production early warning signal is generated.

2. The chip sorting quality monitoring and early warning device according to claim 1 is characterized in that: The test sample extraction module (10) performs the following operation steps: Divide the chip set of the same batch based on the production operation to obtain M groups of production operation chips, wherein the M groups of production operation chips have M production time identifiers, and M is a positive integer; Traversing the M production time identifiers with the sampling time interval as a constraint to obtain multiple groups of production running chips; The plurality of groups of production running chips are randomly sampled within the groups to obtain the plurality of chip test samples.

3. The chip sorting quality monitoring and early warning device according to claim 1 is characterized in that: The chip sorting and detection module (20) performs the following operation steps: Perform chip sorting inspection on a first chip test sample based on the appearance inspection node in the standard sorting inspection process to obtain a first appearance inspection result, wherein the first appearance inspection result includes a first defect type and a first defect size parameter, and the first chip test sample is any one of the multiple chip test samples; Performing chip sorting and testing on the first chip test sample based on the electrical test node in the standard sorting and testing process to obtain a first electrical testing result, wherein the first electrical testing result includes a plurality of first electrical parameters; Perform chip sorting and testing on the first chip test sample based on the functional test node in the standard sorting and testing process to obtain a first functional test result, wherein the first functional test result includes a plurality of first functional information; Perform chip sorting and testing on the first chip test sample based on the performance test node in the standard sorting and testing process to obtain a first performance test result, wherein the first function test result includes a plurality of first performance information; The first appearance test result, the first electrical test result, the first function test result and the first performance test result constitute a first group of sorting test results; By analogy, the chip sorting test is performed on the multiple chip test samples based on the standard sorting test process to obtain the multiple groups of sorting test results.

4. The chip sorting quality monitoring and early warning device according to claim 1 is characterized in that: The product quality benchmarks include multiple appearance defect benchmarks, multiple electrical indicator benchmarks, multiple chip function benchmarks and multiple chip performance benchmarks.

5. The chip sorting quality monitoring and early warning device according to claim 4 is characterized in that: The evaluation model building module (40) performs the following operation steps: A weight information library is configured for the product quality benchmark, wherein the weight information library includes an appearance defect weight sub-library, an electrical index weight sub-library, a chip function weight sub-library, and a chip performance weight sub-library; A standard mass deviation function is pre-constructed, and a mass deviation calculation layer is constructed based on the standard mass deviation function, wherein the standard mass deviation function is as follows: ; Where S is the single-dimensional mass deviation coefficient, For the The deviation of the single-dimensional test result from the single-dimensional quality benchmark, For the The single-dimensional test results are similar to those of the The time interval of the single-dimension detection results, a sample quantity of the sample to be tested for the plurality of chips; The weight information library and the quality deviation calculation layer are cascaded to obtain the quality deviation evaluation model.

6. The chip sorting quality monitoring and early warning device according to claim 5 is characterized in that: The monitoring result acquisition module (50) performs the following operation steps: Extracting multiple appearance indicators from the multiple appearance defect benchmarks, and extracting multiple groups of appearance quality deviations from the multiple chip quality deviation sets with the multiple appearance indicators as constraints, wherein multiple measured appearance quality deviations in each group of appearance quality deviations have multiple production time identifiers; activating the appearance defect weight sub-library in the weight information library based on the multiple appearance defect benchmarks; After synchronizing the multiple groups of appearance quality deviations to the standard quality deviation function to calculate and obtain multiple appearance quality deviation coefficients, the appearance defect weight sub-library is used to perform weighted calculation on the multiple appearance quality deviation coefficients to obtain a batch appearance monitoring result; By analogy, the batch electrical monitoring results, batch functional monitoring results and batch performance monitoring results are calculated and obtained, and the batch appearance monitoring results, batch electrical monitoring results, batch functional monitoring results and batch performance monitoring results constitute the batch quality monitoring results.

7. The chip sorting quality monitoring and early warning device according to claim 6 is characterized in that: The batch quality deviation thresholds include appearance quality deviation thresholds, electrical quality deviation thresholds, functional quality deviation thresholds and performance quality deviation thresholds.

8. The chip sorting quality monitoring and early warning device according to claim 7 is characterized in that: The warning signal generating module (60) performs the following operation steps: If the batch appearance monitoring result, batch electrical monitoring result, batch functional monitoring result and batch performance monitoring result mapping fall within the appearance quality deviation threshold, electrical quality deviation threshold, functional quality deviation threshold and performance quality deviation threshold, then the chip production early warning signal is generated; Preset weight assignment rules; If the batch appearance monitoring results, batch electrical monitoring results, batch functional monitoring results and batch performance monitoring results are not mapped to fall within the appearance quality deviation threshold, electrical quality deviation threshold, functional quality deviation threshold and performance quality deviation threshold, weighting the batch quality monitoring results according to the weight assignment rule to obtain a comprehensive quality monitoring result; A comprehensive quality deviation threshold is preset, and if the comprehensive quality monitoring result meets the comprehensive quality deviation threshold, the chip production early warning signal is generated.

9. A chip sorting quality monitoring and early warning method, implemented by a chip sorting quality monitoring and early warning device according to any one of claims 1 to 8, characterized in that: The following steps are involved: S1, preset a sampling time interval, and extract test samples from a chip set of the same batch with the sampling time interval as a constraint to obtain multiple chip test samples; S2, interactively obtaining a standard sorting and testing process, and performing chip sorting and testing on the plurality of chip test samples based on the standard sorting and testing process to obtain multiple groups of sorting and testing results; S3, using a product quality benchmark to analyze the multiple groups of sorting test results to obtain multiple chip quality deviation sets, wherein the product quality benchmark is extracted from the chip design data of the concept chips of the same batch of chips; S4. Constructing a quality deviation evaluation model according to the product quality benchmark; S5, synchronizing the multiple chip quality deviation sets to the quality deviation evaluation model to obtain batch quality monitoring results; S6. Preset a batch quality deviation threshold. If the batch quality monitoring result falls within the batch quality deviation threshold, a chip production warning signal is generated.

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