Power supply monitoring circuit and power supply monitoring method for VPX system

Abstract

The invention discloses a power supply monitoring circuit and a power supply monitoring method for a VPX system, and the circuit comprises a comparison unit which is used for generating a reference voltage and a threshold voltage based on a power supply voltage, and generating an output voltage at a control node based on the threshold voltage and the reference voltage; the switch unit controls the connection between the VPX system and the power supply voltage based on the reference voltage in the normal working state of the power supply voltage, and controls the disconnection between the VPX system and the power supply voltage based on the output voltage in the over-voltage and under-voltage state of the power supply voltage; the alarm unit is used for generating an alarm signal based on the output voltage and generating a power-off control signal when the number of times of generating the alarm signal by the alarm unit reaches a set value, and the switch unit controls the switching-off between the VPX system and the power supply voltage based on the power-off control signal. Power supply voltage overvoltage and undervoltage protection is carried out on the VPX system through the comparison unit, the output voltage is passively received through the alarm unit, and the detection precision of the power supply voltage overvoltage and undervoltage state is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to a power supply monitoring circuit and a power supply monitoring method for a VPX system. Background Art

[0002] Devices operating under a VPX (computer bus) system usually use an IPMC (Intelligent Platform Management Controller) to obtain the health status of the device, such as voltage, temperature, etc. For the detection of the input power supply VIN' of the VPX system, it basically relies on the ADC sampling method of the IPMC. By connecting a certain pin of the IPMC to the input power supply VIN', the level status of the detected pin is actively read every other period of time.

[0003] In this way of actively reading the level status of the input power supply every other period of time, to improve the detection accuracy, it is necessary to shorten the time for actively reading the voltage. This method not only wastes a large amount of IPMC software resources, but also may not be able to sense the short-term overvoltage and undervoltage of the input power supply.

[0004] As Figure 1 shown, when overvoltage occurs between the ADC sampling time points T1' and T2', and undervoltage occurs between the ADC sampling time points T2' and T3', these two abnormal states will not be detected. And the input voltage fluctuation may, in the light case, cause the device under the VPX system to restart, wasting a certain amount of time in the process of troubleshooting the restart problem, and in the heavy case, cause damage to the internal chips of the device. To detect these two abnormal states by the ADC sampling method, it is necessary to shorten the detection interval time and increase the detection frequency, but this will occupy a large amount of IPMC software resources.

[0005] Therefore, in view of the above technical problems, it is necessary to provide a power supply monitoring circuit and a power supply monitoring method for a VPX system. Summary of the Invention

[0006] The purpose of the present invention is to provide a power supply monitoring circuit and a power supply monitoring method for a VPX system, which can improve the detection accuracy of the abnormal state of the VPX system power supply.

[0007] To achieve the above purpose, the technical solution provided by a specific embodiment of the present invention is as follows:

[0008] A power supply monitoring circuit for a VPX system, comprising:

[0009] A comparison unit, connected between the power supply voltage and the ground voltage, for generating a reference voltage and a threshold voltage based on the power supply voltage, and generating an output voltage at a control node based on the threshold voltage and the reference voltage;

[0010] A switching unit, connected between the VPX system and the power supply voltage, is connected to the reference voltage and the control node. When the power supply voltage is in the normal operating state, the switching unit controls the conduction between the VPX system and the power supply voltage based on the reference voltage. When the power supply voltage is in the over-voltage or under-voltage state, the switching unit controls the disconnection between the VPX system and the power supply voltage based on the output voltage;

[0011] An alarm unit, connected between the control node and the ground potential, is used to generate an alarm signal based on the output voltage, and when the number of times the alarm unit generates an alarm signal reaches a set value, a power-down control signal is generated. The switching unit controls its own disconnection based on the power-down control signal to disconnect the VPX system from the power supply voltage.

[0012] In one or more embodiments of the present invention, the switching unit includes a first switching transistor, a second switching transistor, a third switching transistor, and a first resistor;

[0013] The first end of the first resistor is connected to the reference voltage, and the second end is connected to the control node;

[0014] The control end of the first switching transistor is connected to the control node, the first end is connected to the ground potential, and the second end is connected to the control ends of the second switching transistor, the third switching transistor, and the power supply voltage;

[0015] The first end of the second switching transistor is connected to the power supply voltage, the second end is connected to the second end of the third switching transistor, and the first end of the third switching transistor is connected to the VPX system.

[0016] In one or more embodiments of the present invention, the alarm unit includes a controller, and the controller is configured with an input pin, a control pin, and an output pin;

[0017] The input pin is connected to the control end of the first switching transistor and the control node, and is used to receive the reference voltage and the output voltage, wherein the output voltage is less than the reference voltage;

[0018] The output pin is used to output an alarm signal;

[0019] The control pin is connected to the control end of the first switching transistor and the control node, and the control pin is used to output a high-impedance state signal, or when the number of times the alarm unit generates an alarm signal reaches a set value, the control pin is used to output a power-down control signal.

[0020] In one or more embodiments of the present invention, the alarm unit further includes a light-emitting diode, and the anode of the light-emitting diode is directly or indirectly connected to the output pin, and the cathode is connected to the ground potential.

[0021] In one or more embodiments of the present invention, the comparison unit includes an LDO unit, an overvoltage protection unit, and an undervoltage protection unit. The threshold voltage includes a first threshold voltage and a second threshold voltage, and the output voltage includes a first output voltage and a second output voltage;

[0022] The LDO unit is connected between the power supply voltage and the ground potential and is used to generate a reference voltage;

[0023] The overvoltage protection unit includes a first voltage dividing unit, a first comparator, and a first diode. The first voltage dividing unit is connected between the power supply voltage and the ground potential and is used to divide the power supply voltage to generate a first threshold voltage. The non-inverting input terminal of the first comparator is connected to the reference voltage, the inverting input terminal receives the first threshold voltage, and the output terminal is connected to the cathode of the first diode. The anode of the first diode is connected to the control node and generates a first output voltage;

[0024] The undervoltage protection unit includes a second voltage dividing unit, a second comparator, and a second diode. The second voltage dividing unit is connected between the power supply voltage and the ground potential and is used to divide the power supply voltage to generate a second threshold voltage. The non-inverting input terminal of the second comparator receives the second threshold voltage, the inverting input terminal is connected to the reference voltage, and the output terminal is connected to the cathode of the second diode. The anode of the second diode is connected to the control node and generates a second output voltage.

[0025] In one or more embodiments of the present invention, the comparison unit further includes a transient protection unit. The transient protection unit includes a third diode, and the anode of the third diode is connected to the ground potential and the cathode is connected to the power supply voltage.

[0026] The technical solution provided by another specific embodiment of the present invention is as follows:

[0027] A power supply monitoring method for a VPX system, characterized in that the method includes:

[0028] Generating a reference voltage and a threshold voltage based on the power supply voltage by a comparison unit, and generating an output voltage at a control node based on the threshold voltage and the reference voltage;

[0029] When the power supply is in a normal working state, controlling the conduction between the VPX system and the power supply voltage based on the reference voltage by a switching unit. When the power supply is in an over- or under-voltage state, controlling the disconnection between the VPX system and the power supply voltage based on the output voltage by the switching unit;

[0030] Generating an alarm signal based on the output voltage by an alarm unit, and generating a power-down control signal when the number of times the alarm unit generates the alarm signal reaches a set value. Controlling its own disconnection based on the power-down control signal by the switching unit to disconnect the VPX system from the power supply voltage.

[0031] In one or more embodiments of the present invention, the threshold voltage includes a first threshold voltage and a second threshold voltage, the output voltage includes a first output voltage and a second output voltage, and the method further includes:

[0032] Generating a first threshold voltage through a first voltage dividing unit, comparing the first threshold voltage with a reference voltage through a first comparator, and when the first threshold voltage is less than the reference voltage, the switching unit controls itself to turn on to conduct between the VPX system and the power supply voltage;

[0033] When the first threshold voltage is greater than the reference voltage, generating a first output voltage through a comparison unit, and the switching unit controls itself to turn off to disconnect between the VPX system and the power supply voltage;

[0034] Generating a second threshold voltage through a second voltage dividing unit, comparing the second threshold voltage with the reference voltage through a second comparator, and when the second threshold voltage is greater than the reference voltage, the switching unit controls itself to turn on to conduct between the VPX system and the power supply voltage;

[0035] When the second threshold voltage is less than the reference voltage, generating a second output voltage through a comparison unit, and the switching unit controls itself to turn off to disconnect between the VPX system and the power supply voltage.

[0036] In one or more embodiments of the present invention, the method further includes:

[0037] When the first threshold voltage is less than the reference voltage, or when the second threshold voltage is greater than the reference voltage, the voltage on the control node is the reference voltage;

[0038] When the first threshold voltage is greater than the reference voltage, the voltage on the control node changes from the reference voltage to the first output voltage, and an alarm signal is generated through an alarm unit, wherein the first output voltage is less than the reference voltage;

[0039] When the second threshold voltage is less than the reference voltage, the voltage on the control node changes from the reference voltage to the second output voltage, and an alarm signal is generated through an alarm unit, wherein the second output voltage is less than the reference voltage.

[0040] In one or more embodiments of the present invention, the method further includes:

[0041] Outputting a high-impedance state signal through a control pin of the controller; or,

[0042] When the number of times the alarm unit generates an alarm signal reaches a set value, outputting a power-down control signal, and outputting the power-down control signal through a control pin of the controller to disconnect between the VPX system and the power supply voltage.

[0043] Compared with the prior art, the power supply monitoring circuit and method for a VPX system according to the present invention generate an output voltage and a reference voltage through a comparison unit. The switching unit controls the connection and disconnection between the VPX system and the power supply voltage based on the output voltage and the reference voltage, and performs over-voltage and under-voltage protection on the power supply voltage of the VPX system when the power supply voltage fluctuates. The alarm unit passively receives the output voltage, avoiding missed collection of the over-voltage and under-voltage states of the power supply voltage and improving the detection accuracy.

[0044] By configuring the controller pins, there is no need to actively poll the power supply voltage, saving the controller software resources. At the same time, the configured controller pins are connected to the reference voltage to avoid damage to the controller when the power supply voltage overshoots.

[0045] In the present invention, the output voltage can not only be used to control the power supply of the VPX system, but also cause a change in the level of the input pin of the controller. When one or more level changes are detected, the abnormal state of the VPX system is prompted in the form of lighting a diode. And when the number of level changes accumulates to a certain value, the controller directly shuts off the power supply of the VPX system by actively pulling down the control pin. Description of the Drawings

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0047] Figure 1 It is a timing diagram of the input power supply fluctuation of the VPX system in the prior art;

[0048] Figure 2 It is a schematic diagram of the power supply monitoring circuit for a VPX system in an embodiment of the present invention;

[0049] Figure 3 It is a circuit diagram of the power supply monitoring circuit for a VPX system in an embodiment of the present invention;

[0050] Figure 4 It is a timing diagram of the power supply monitoring circuit for a VPX system in an embodiment of the present invention;

[0051] Figure 5 It is a flowchart of the power supply monitoring method for a VPX system in an embodiment of the present invention. Detailed Embodiments

[0052] To enable those skilled in the art to better understand the technical solutions in the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0053] Unless otherwise clearly stated, in the whole specification and claims, the term "comprising" or its variations such as "including" or "having" etc. will be understood to include the stated elements or components, without excluding other elements or other components.

[0054] "Coupled" or "connected" or "linked" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conduction medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include a connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as a connection through circuits or components such as switches and follower circuits. Additionally, in the present invention, words such as "first", "second", etc. are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity, or order between these technical features.

[0055] In the detailed description of the specification, reference is made to the accompanying drawings that form a part of it, where the same reference numerals always represent the same components, and which are shown by way of exemplary embodiments that can be implemented. It should be understood that other embodiments can be utilized without departing from the scope of the present application, and structural or logical changes can be made. Therefore, the following detailed description should not be construed as limiting.

[0056] The various operations in the specification can be described as a plurality of discrete actions or operations in the order that is most helpful for understanding the claimed subject matter. However, the described order should not be construed as implying that these operations must be order-related. Specifically, these operations can be performed in an order different from the presented order. The described operations can be performed in an order different from the described embodiments. Various additional operations can be performed in additional embodiments and / or the described operations can be omitted.

[0057] For the purposes of the present application, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of the present application, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).

[0058] Various components and devices may be referred to or shown in the singular in this document (e.g., "MOS transistor", "transistor", "switch", etc.), but this is merely for convenience of discussion, and any element referred to in the singular may include multiple such elements according to the teachings herein.

[0059] The specification describes the use of the phrases "in this embodiment" or "in other embodiments" or "in some embodiments", which may each refer to one or more of the same or different embodiments. In addition, the terms "comprising", "including", "having", etc. used with respect to the embodiments of this application are synonymous.

[0060] Embodiment 1:

[0061] As Figure 2 shown, this embodiment proposes a power supply monitoring circuit for a VPX system, where the power supply monitoring circuit includes a comparison unit 10, a switching unit 20, and an alarm unit 30.

[0062] The comparison unit 10 is connected between the power supply voltage V IN and the ground voltage, and is used to generate a reference voltage Vref and a threshold voltage based on the power supply voltage V IN and generate an output voltage Vout at the control node P1 based on the threshold voltage and the reference voltage Vref;

[0063] The switching unit 20 is connected between the VPX system and the power supply voltage V IN The switching unit 20 is connected to the comparison unit 10 through the control node P1, and the switching unit 20 is connected to the reference voltage Vref. The switching unit 20 is used to control the on / off between the VPX system and the power supply voltage V IN based on the reference voltage Vref and the output voltage. Specifically, when the power supply voltage V IN is in the normal working state, the switching unit 20 controls the conduction between the VPX system and the power supply voltage V IN based on the reference voltage Vref. When the power supply voltage V IN is in the over-voltage or under-voltage state (i.e., the power supply voltage V IN is over-voltage or the power supply voltage V IN is under-voltage), the switching unit 20 controls the cut-off between the VPX system and the power supply voltage V IN based on the output voltage;

[0064] The alarm unit 30 is connected between the control node P1 and the ground potential, and is used to generate an alarm signal S2 based on the output voltage Vout, and generate a power-down control signal S1 when the number of times the alarm unit 30 generates the alarm signal S1 reaches a set value. The switching unit 20 controls its own cut-off based on the power-down control signal S1 to cut off the connection between the VPX system and the power supply voltage V IN It can be understood that the power supply voltage VIN As the input power supply of the VPX system, the switching unit 20 is connected between the input power supply port SYS_VCC of the VPX system and the power supply voltage V IN When the connection between the VPX system and the power supply voltage V IN is interrupted, the VPX system loses power. When the connection between the VPX system and the power supply voltage V IN is established, the VPX system is powered on.

[0065] As Figure 3 shown, the comparison unit 10 in this embodiment includes an LDO unit 11, an overvoltage protection unit 12, and an undervoltage protection unit 13. Among them, the threshold voltage includes a first threshold voltage Vovp and a second threshold voltage Vuvp, and the output voltage Vout includes a first output voltage Vout1 and a second output voltage Vout2.

[0066] The LDO unit 11 is connected between the power supply voltage V IN and the ground potential, and is used to generate a reference voltage Vref. In this embodiment, the LDO unit 11 includes an LDO (Low Dropout Regulator) chip M1 and its peripheral circuit. The peripheral circuit includes a voltage-dividing resistor r1 and a voltage-dividing resistor r2. The first end of the voltage-dividing resistor r1 is connected to the output pin VO of the LDO chip M1, the second end is connected to the first end of the voltage-dividing resistor r2 and the ADJ pin of the LDO chip M1, and the second end of the voltage-dividing resistor r2 is connected to the ground potential. By adjusting the resistance values of the voltage-dividing resistor r1 and the voltage-dividing resistor r2, the required reference voltage Vref can be set. The power supply pin VIN of the LDO chip M1 is connected to the power supply voltage V IN It can be understood that when the working conditions of the LDO are met, that is, V IN -Vref > the minimum startup voltage of the LDO, V IN < the maximum working voltage of the LDO, it can be considered that the reference voltage Vref remains unchanged.

[0067] Optionally, the reference voltage Vref is about 3.3V.

[0068] As Figure 3 shown, the overvoltage protection unit 12 in this embodiment includes a first voltage-dividing unit, a first comparator Comp1, and a first diode D1. Among them, the first voltage-dividing unit is connected between the power supply voltage V IN and the ground potential, and is used to divide the power supply voltage V IN to generate a first threshold voltage Vovp. The non-inverting input terminal of the first comparator Comp1 is connected to the reference voltage Vref, the inverting input terminal receives the first threshold voltage Vovp, the output terminal is connected to the cathode of the first diode D1, and the anode of the first diode D1 is connected to the control node P1 and generates a first output voltage Vout1.

[0069] Optionally, the first voltage dividing unit includes a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 is connected to the power supply voltage V IN and the second end is connected to the first end of the fourth resistor R4 to generate a first threshold voltage Vovp. The second end of the fourth resistor R4 is connected to the ground potential.

[0070] By adjusting the resistance values of the third resistor R3 and the fourth resistor R4, the required overvoltage protection threshold can be set. Specifically, the first threshold voltage Vovp = V IN *R3 / (R3 + R4). It can be judged from the connection relationship of the overvoltage protection unit 12 that when the first threshold voltage Vovp is less than the reference voltage Vref, it can be judged that the power supply voltage is in the normal working state. When the first threshold voltage Vovp is greater than the reference voltage Vref, it can be judged that the power supply voltage is in the overvoltage state. The overvoltage protection threshold in this embodiment is

[0071] Optionally, the overvoltage protection unit 12 further includes a fifth resistor R5. The first end of the fifth resistor R5 is connected to the power supply voltage V IN and the second end is connected to the output end of the first comparator Comp1 and the cathode of the first diode D1. When the voltage at the non-inverting input end of the first comparator Comp1 is greater than the voltage at the inverting input end, the level at the output end of the first comparator Comp1 is pulled up to the power supply voltage V IN as a high-level output.

[0072] The undervoltage protection unit 13 includes a second voltage dividing unit, a second comparator Comp2 and a second diode D2. The second voltage dividing unit is connected between the power supply voltage V IN and the ground potential and is used to divide the power supply voltage V IN to generate a second threshold voltage Vuvp. The non-inverting input end of the second comparator Comp2 receives the second threshold voltage Vuvp, the inverting input end is connected to the reference voltage Vref, the output end is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the control node P1 to generate a second output voltage Vout2.

[0073] Optionally, the second voltage dividing unit includes an eighth resistor R8 and a ninth resistor R9. The first end of the eighth resistor R8 is connected to the power supply voltage V IN and the second end is connected to the first end of the ninth resistor R9 to generate a second threshold voltage Vuvp. The second end of the ninth resistor R9 is connected to the ground potential.

[0074] By adjusting the resistance values of the eighth resistor R8 and the ninth resistor R9, the required undervoltage protection threshold can be set. Specifically, the second threshold voltage Vuvp = V IN*R8 / (R8+R9). It is determined by the connection relationship of the undervoltage protection unit 13 that when the second threshold voltage Vuvp is greater than the reference voltage Vref, it can be determined that the power supply voltage is in the normal working state; when the second threshold voltage Vuvp is less than the reference voltage Vref, it can be determined that the power supply voltage is in the undervoltage state. The undervoltage protection threshold in this embodiment is

[0075] Optionally, the overvoltage protection unit 12 further includes a tenth resistor R10. The first end of the tenth resistor R10 is connected to the power supply voltage V IN and the second end is connected to the output end of the second comparator Comp2 and the cathode of the second diode D2. When the voltage at the non-inverting input terminal of the second comparator Comp2 is greater than the voltage at the inverting input terminal, the level at the output end of the second comparator Comp2 is pulled up to the power supply voltage V IN as a high-level output.

[0076] As Figure 3 shown, the comparison unit 10 in this embodiment further includes a transient protection unit. The transient protection unit includes a third diode D3. The anode of the third diode D3 is connected to the ground potential, and the cathode is connected to the power supply voltage V IN . Preferably, the third diode D3 is a TVS tube (Transient Voltage Suppressor), and its maximum clamping voltage Vc is less than the maximum operating voltage of the LDO chip M1, the first comparator Comp1, and the second comparator Comp2. When the power supply voltage V IN has a transient overshoot, it can ensure that the power supply voltage V IN is still within the operating voltage range of the LDO chip M1, the first comparator Comp1, and the second comparator Comp2.

[0077] As Figure 3 shown, the switching unit 20 in this embodiment includes a first switching transistor Q1, a second switching transistor Q2, a third switching transistor Q3, and a first resistor R1.

[0078] The first end of the first resistor R1 is connected to the reference voltage Vref, and the second end is connected to the control node P1;

[0079] The control terminal of the first switching transistor Q1 is connected to the control node P1, the first end is connected to the ground potential, and the second end is connected to the control terminals of the second switching transistor Q2, the third switching transistor Q3, and the power supply voltage V IN ;

[0080] The first end of the second switching transistor Q2 is connected to the power supply voltage V INThe second end is connected to the second end of the third switching transistor Q3, and the first end of the third switching transistor Q3 is connected to the power input terminal SYS_VCC of the VPX system. Optionally, the first switching transistor Q1 is an N-channel MOS transistor, the second switching transistor Q2 is a P-channel MOS transistor, and the third switching transistor Q3 is a P-channel MOS transistor. The first ends of the first switching transistor Q1, the second switching transistor Q2, and the third switching transistor Q3 are source electrodes, the second ends are drain electrodes, and the control ends are gate electrodes.

[0081] Optionally, the switching unit 20 further includes a seventh resistor R7 and an eleventh resistor R11. The first end of the seventh resistor R7 is connected to the power supply voltage V IN and the first end of the second switching transistor Q2, and the second end is connected to the first end of the eleventh resistor R11, the control end of the second switching transistor Q2, and the control end of the third switching transistor Q3. The second end of the eleventh resistor R11 is connected to the second end of the first switching transistor Q1. The resistance values of the seventh resistor R7 and the eleventh resistor R11 are equal. The seventh resistor R7 and the eleventh resistor R11 are used for voltage division to prevent the gate-source voltage Vgs of the second switching transistor Q2 from being too high and avoid the second switching transistor Q2 from being broken down by high voltage.

[0082] In this embodiment, the alarm unit 30 includes a controller and a light-emitting diode D4. The controller is configured with an input pin INT_N, a control pin CTRL, and an output pin ALARM.

[0083] The input pin INT_N is connected to the control end of the first switching transistor Q1 and the control node P1, and is used to receive the level change of the control node P1, where the level change range of the control node P1 is less than or equal to the reference voltage Vref. Specifically, when the power supply voltage V IN is within the normal range, the level of the control node P1 = the output voltage Vout = the reference voltage Vref. When the power supply voltage V IN has overvoltage or undervoltage, the level of the control node P1 = the output voltage Vout < the reference voltage Vref.

[0084] The output pin ALARM is used to output an alarm signal S2.

[0085] The control pin CTRL is connected to the control end of the first switching transistor Q1 and the control node P1. The control pin CTRL is used to output a high-impedance state signal, or when the number of times the alarm unit 30 generates the alarm signal S2 reaches the set value, the control pin CTRL is used to output a power-down control signal S1. The power-down control signal S1 is used to pull down the level of the control node P1 to the ground potential, thereby turning off the switching unit 20 to control the disconnection between the VPX system and the power supply voltage V IN to be disconnected.

[0086] The alarm unit 30 further includes a light-emitting diode D4. The anode of the light-emitting diode D4 is directly or indirectly connected to the output pin ALARM, and the cathode is connected to the ground potential. Optionally, a twelfth resistor R12 is provided between the anode of the light-emitting diode D4 and the output pin ALARM. It can be understood that the power supply voltage V IN In the normal operating state, the level on the output pin ALARM is low level, the light-emitting diode D4 is reversely cut off, and the power supply voltage V IN In the over-voltage and under-voltage state, the alarm signal S2 is high level. When the output pin ALARM outputs the alarm signal S2, the light-emitting diode D4 conducts forward and emits light.

[0087] As Figure 3 and Figure 4 shown, when the reference voltage Vref in an embodiment is 3.3V, for the first comparator Comp1: when the voltage at the inverting input terminal (i.e., the first threshold voltage Vovp) is less than the voltage at the non-inverting input terminal (i.e., the reference voltage Vref) (after 0 to T1, T2 to T3, and T4 moments), the output terminal voltage of the first comparator Comp1 is the power supply voltage V IN . For the first diode D1: Since V IN > the voltage V P1 at the control node P1 = Vref, the first diode D1 is in the reversely cut-off state. At this time, the gate-source voltage Vgs of the first switching transistor Q1 = the reference voltage Vref > the conduction threshold voltage Vth, and the first switching transistor Q1 is turned on. At this time, the voltage at the second terminal of the eleventh resistor R11 is pulled down to the ground potential (i.e., 0V), and the second switching transistor Q2 is turned on (V IN *R7 / (R7 + R10) < Vth Q2 ), the third switching transistor Q3 is turned on, so the power supply voltage V IN is conducted between the power input terminal SYS_VCC of the VPX system, and the VPX system is powered on. At this time, the level of the input pin INT_N is the reference voltage Vref.

[0088] For the first comparator Comp1: when the voltage at the inverting input terminal (i.e., the first threshold voltage Vovp) is less than the non-inverting input terminal (i.e., the reference voltage Vref) (T1 to T2), the output terminal voltage of the first comparator Comp1 is 0V. Therefore, the first diode D1 is in the forward conduction state, and the over-voltage protection unit 12 generates a first output voltage Vout1. The first output voltage Vout1 is the forward conduction voltage drop Vf1 of the first diode D1, that is, the voltage V P1is the forward conduction voltage drop Vf1 of the first diode D1. In one embodiment, the forward conduction voltage drop Vf1 is set to be less than the conduction threshold voltage Vth of the first switching transistor Q1. Therefore, at this time, the first switching transistor Q1 is turned off, and the second switching transistor Q2 and the third switching transistor Q3 are also turned off. The power supply voltage V IN is turned off between the power input terminal SYS_VCC of the VPX system, and the VPX system is powered down.

[0089] It can be understood that since the control node P1 is connected to the input pin INT_N of the controller, the level of the input pin INT_N of the controller changes from the reference voltage Vref to the forward conduction voltage drop Vf1, which satisfies the interrupt trigger condition of the controller. After the controller detects the interrupt, an alarm signal S2 is generated through the output pin ALARM. The alarm signal S2 is a high level to turn on the light-emitting diode D3.

[0090] For the second comparator Comp2: When the voltage at the non-inverting input terminal (i.e., the second threshold voltage Vuvp) is greater than the voltage at the inverting input terminal (i.e., the reference voltage Vref) (i.e., after 0 to T1, T2 to T3, and T4), the output voltage of the first comparator Comp1 is the power supply voltage V IN . For the second diode D2: Since V IN > the voltage V P1 = Vref at the control node P1, the second diode D2 is in the reverse cut-off state. At this time, the gate-source voltage Vgs of the first switching transistor Q1 = the reference voltage Vref > the conduction threshold voltage Vth, and the first switching transistor Q1 is turned on. At this time, the voltage at the second terminal of the eleventh resistor R11 is pulled down to the ground potential (i.e., 0V), and the second switching transistor Q2 is turned on (V IN *R7 / (R7 + R10) < Vth Q2 ), and the third switching transistor Q3 is turned on. Therefore, the power supply voltage V IN is conducted between the power input terminal SYS_VCC of the VPX system, and the VPX system is powered on. At this time, the level of the input pin INT_N is the reference voltage Vref.

[0091] For the second comparator Comp2: When the voltage at the non-inverting input terminal (i.e., the second threshold voltage Vuvp) is less than the voltage at the inverting input terminal (i.e., the reference voltage Vref) (T3 to T4), the output voltage of the first comparator Comp1 is 0V. Therefore, the second diode D2 is in the forward conduction state, and the under-voltage protection unit 13 generates a second output voltage Vout2. The second output voltage Vout2 is the forward conduction voltage drop Vf2 of the second diode D2, that is, the voltage V P1is the forward conduction voltage drop Vf2 of the second diode D2. In one embodiment, it is set that the forward conduction voltage drop Vf2 is less than the conduction threshold voltage Vth of the first switching transistor Q1. Therefore, at this time, the first switching transistor Q1 is turned off, and the second switching transistor Q2 and the third switching transistor Q3 are also turned off. The power supply voltage V IN is turned off between the power supply input terminal SYS_VCC of the VPX system, and the VPX system is powered down. It can be understood that at this time, the level of the input pin INT_N of the controller jumps from the reference voltage Vref to the forward conduction voltage drop Vf2, satisfying the interrupt trigger condition of the controller. After the controller detects the interrupt, an alarm signal S2 is generated through the output pin ALARM, and the alarm signal S2 is a high level to turn on the light-emitting diode D3.

[0092] Optionally, the first diode D1 and the second diode D2 have the same model so that the forward conduction voltage drop Vf1 is equal to the forward conduction voltage drop Vf2, that is, the first output voltage Vout1 is equal to the second output voltage Vout2. When Vuvp < Vref < Vovp, the first switching transistor Q1, the second switching transistor Q2, and the third switching transistor Q3 can be normally turned on. When Vovp < V REF or Vuvp > Vref, the level on the control node P1 jumps to Vf1 or Vf2 and turns off the first switching transistor Q1, the second switching transistor Q2, and the third switching transistor Q3. The input pin INT_N of the controller detects the interrupt and turns on the light-emitting diode D3. To sum up, as Figure 4 shown, it can be understood that the power supply voltage V IN The threshold range during normal operation includes:

[0093]

[0094] That is when, the power supply voltage V IN has overvoltage, when, the power supply voltage V IN has undervoltage.

[0095] The controller in this embodiment is an IPMC (Intelligent Platform Management Controller). The IPMC judges the VPX system and the power supply voltage V through the level change (jumping from the reference voltage Vref to Vf1 or Vf2) of the input pin INT_N INAn interruption occurs, and the system abnormality is prompted by lighting the light-emitting diode D4. When the number of interruptions accumulates to the set value, a power-down control signal S1 is output through the control pin CTRL. It can be understood that the power-down control signal S1 will pull down the voltage on the control node P1 to the ground potential, thereby turning off the first switching transistor Q1. The IPMC in this embodiment is powered by the 3.3V_AUX constant power supply of the VPX system.

[0096] The IPMC in this embodiment does not need to poll the power supply voltage V IN to obtain the power supply voltage V IN status, but passively receives the interruption report caused by the over-voltage and under-voltage of the power supply voltage V IN , avoiding missing the acquisition of the over-voltage and under-voltage status of the power supply voltage and improving the detection accuracy.

[0097] It can be understood that for the level change range 0 to Vref of the input pin INT_N, the reference voltage Vref improves the detection accuracy to a fixed value. Therefore, even if the power supply voltage V IN overshoots to a very large voltage value, it will not cause damage to the IPMC. However, in the prior art, by configuring a pin of the IPMC to be connected to the power supply voltage V IN and polling, even if the pin of the IPMC is connected to the power supply voltage V IN after voltage division, there is still a possibility that the IPMC is affected by over-voltage impact.

[0098] Embodiment 2:

[0099] As Figure 4 shown, this embodiment provides a power supply monitoring method for a VPX system, which is applied to the power supply monitoring circuit for a VPX system as Figure 2 and Figure 3 shown. The power supply monitoring circuit includes a comparison unit 10, a switching unit 20, and an alarm unit 30. The power supply monitoring method includes:

[0100] The comparison unit 10 generates a reference voltage Vref and a threshold voltage based on the power supply voltage V IN , and generates an output voltage Vout at the control node P1 based on the threshold voltage and the reference voltage Vref;

[0101] In the normal operating state of the power supply voltage, the switching unit 20 controls the conduction between the VPX system and the power supply voltage V IN based on the reference voltage Vref. In the over-voltage and under-voltage state of the power supply voltage, the switching unit 20 controls the disconnection between the VPX system and the power supply voltage V IN based on the output voltage Vout;

[0102] An alarm signal S2 is generated by the alarm unit 30 based on the output voltage Vout, and when the number of times the alarm unit 30 generates the alarm signal S2 reaches a set value, a power-down control signal S1 is generated. Based on the power-down control signal S1, the switching unit 20 controls its own turn-off to disconnect the VPX system from the power supply voltage V IN from being connected.

[0103] Furthermore, the threshold voltage includes a first threshold voltage Vovp and a second threshold voltage Vuvp, and the output voltage Vout includes a first output voltage Vout1 and a second output voltage Vout2. The power supply monitoring method of this embodiment further includes:

[0104] The first threshold voltage Vovp is generated by the first voltage dividing unit, and the first comparator Comp1 compares the first threshold voltage Vovp with the reference voltage Vref. When the first threshold voltage Vovp is less than the reference voltage Vref, the first diode D1 is reversely cut off, and the switching unit 20 controls its own turn-on to connect the VPX system to the power supply voltage V IN to be connected. Specifically, the voltage on the control node P1 is the reference voltage Vref to turn on the first switching transistor Q1, the second switching transistor Q2, and the third switching transistor Q3, and the VPX system is connected to the power supply voltage V IN to be connected.

[0105] When the first threshold voltage Vovp is greater than the reference voltage Vref, the first diode D1 conducts forwardly and generates the first output voltage Vout1, and the switching unit 20 controls its own turn-off to disconnect the VPX system from the power supply voltage V IN from being connected. Specifically, the voltage on the control node P1 is the first output voltage Vout1 to turn off the first switching transistor Q1, the second switching transistor Q2, and the third switching transistor Q3, and the connection between the VPX system and the power supply voltage V IN is interrupted;

[0106] The second threshold voltage Vuvp is generated by the second voltage dividing unit, and the second comparator Comp2 compares the second threshold voltage Vuvp with the reference voltage Vref. When the second threshold voltage Vuvp is greater than the reference voltage Vref, the second diode D2 is reversely cut off, and the switching unit 20 controls its own turn-on to connect the VPX system to the power supply voltage V IN to be connected. Specifically, the voltage on the control node P1 is the reference voltage Vref to turn on the first switching transistor Q1, the second switching transistor Q2, and the third switching transistor Q3, and the VPX system is connected to the power supply voltage V IN to be connected;

[0107] When the second threshold voltage Vuvp is less than the reference voltage Vref, the second diode D2 conducts forwardly and generates a second output voltage Vout2. The switching unit 20 controls itself to turn off so as to turn off the connection between the VPX system and the power supply voltage V IN therebetween. Specifically, it controls the voltage on the node P1 to be the second output voltage Vout2 so as to turn off the first switching transistor Q1, the second switching transistor Q2 and the third switching transistor Q3, and interrupts the connection between the VPX system and the power supply voltage V IN therebetween.

[0108] Furthermore, the power supply monitoring method of this embodiment further includes:

[0109] When the first threshold voltage Vovp is less than the reference voltage Vref, or when the second threshold voltage Vuvp is greater than the reference voltage Vref, it controls the voltage on the node P1 to be the reference voltage Vref, that is, the level of the input pin is the reference voltage Vref;

[0110] When the first threshold voltage Vovp is greater than the reference voltage Vref, it controls the voltage on the node P1 to change from the reference voltage Vref to the first output voltage Vout1, that is, the level of the input pin INT_N changes from the reference voltage Vref to the first output voltage Vout1, and outputs an alarm signal S2 through the output pin ALARM of the controller in the alarm unit 30, wherein the first output voltage Vout1 is less than the reference voltage Vref;

[0111] When the second threshold voltage Vuvp is less than the reference voltage Vref, it controls the voltage on the node P1 to change from the reference voltage Vref to the second output voltage Vout2, that is, the level of the input pin INT_N changes from the reference voltage Vref to the second output voltage Vout2, and outputs an alarm signal S2 through the output pin ALARM of the controller in the alarm unit 30, wherein the second output voltage Vout2 is less than the reference voltage Vref.

[0112] Furthermore, the power supply monitoring method of this embodiment further includes:

[0113] Output a high-impedance state signal through the control pin CTRL of the controller; or,

[0114] When the number of times the alarm unit 30 generates the alarm signal S2 reaches the set value, it outputs a power-down control signal S1, and outputs the power-down control signal S1 through the control pin CTRL of the controller so as to turn off the connection between the VPX system and the power supply voltage V IN therebetween. The power-down control signal S1 is used to pull down the level of the control node P1 to the ground potential, and further turn off the switching unit 20 to control the disconnection between the VPX system and the power supply voltage V IN therebetween.

[0115] It can be understood that the power supply voltage V IN Under normal operating conditions, the level on the output pin ALARM is low, and the light-emitting diode D4 is reverse cut off. The power supply voltage V IN In the over-voltage and under-voltage state, the alarm signal S2 is high level.

[0116] The controller in this embodiment is an IPMC (Intelligent Platform Management Controller). The IPMC determines the interruption between the VPX system and the power supply voltage V by the level change of the input pin INT_N (jumping from the reference voltage Vref to Vf1 or Vf2). IN And prompts the VPX system to be abnormal by lighting the light-emitting diode D4. After the number of interruptions accumulates to the set value, the power-down control signal S1 is output through the control pin CTRL. It can be understood that the power-down control signal S1 will pull down the voltage on the control node P1 to the ground potential, thereby turning off the first switching transistor Q1. The IPMC in this embodiment does not need to poll the power supply voltage to obtain the power supply voltage V IN status, but passively receives the interruption report caused by the over-voltage and under-voltage of the power supply voltage, avoiding missing the collection of the over-voltage and under-voltage status of the power supply voltage V IN and improving the detection accuracy.

[0117] It can be understood that for the level change range 0~Vref of the input pin INT_N, the reference voltage Vref improves the detection accuracy to a fixed value. Therefore, even if the power supply voltage overshoots to a very large voltage value, it will not cause damage to the IPMC. However, in the prior art, by configuring a pin of the IPMC to be connected to the power supply voltage V IN and polling, even if the pin of the IPMC is connected to the power supply voltage V after voltage division IN there is still a possibility that the IPMC is affected by over-voltage impact.

[0118] It can be seen from the above technical solutions that the present invention has the following beneficial effects:

[0119] The present invention generates an output voltage and a reference voltage Vref through the comparison unit 10. The switching unit 20 controls the on-off between the VPX system and the power supply voltage V based on the output voltage and the reference voltage Vref. IN When the power supply voltage V IN fluctuates, over-voltage and under-voltage protection of the power supply voltage V for the VPX system is performed. By the alarm unit 30 passively receiving the output voltage, missing the collection of the over-voltage and under-voltage status of the power supply voltage V IN is avoided, and the detection accuracy is improved; IN

[0120] The present invention configures the controller pins, eliminating the need for active polling of the power supply voltage V IN to save the controller software resources. Meanwhile, the input pins of the controller are configured to be connected to the reference voltage Vref to avoid damage to the controller when the power supply voltage V IN experiences overshoots.

[0121] In the present invention, the output voltage Vout can not only be used to control the power supply of the VPX system, but also the level changes of the IPMC pins caused thereby will be recorded and saved by the IPMC. When one or more interruptions are detected, the abnormal state of the system will be prompted in the form of lighting up an LED. When the number of interruptions accumulates to a certain value, the IPMC will directly turn off the power supply of the VPX system by actively pulling down the control pin CTRL.

[0122] Those skilled in the art should understand that various modifications and variations can be made to the above - disclosed embodiments without departing from the essence of the invention. Therefore, the protection scope of this specification should be defined by the appended claims.

[0123] It should be noted that not all steps and units in the above - mentioned processes and system structure diagrams are necessary. Some steps or units can be ignored according to actual needs. The execution order of each step is not fixed and can be determined according to requirements. The circuit structures described in the above - mentioned embodiments can be physical structures or logical structures. That is, some units may be implemented by the same physical entity, or some units may be implemented separately by multiple physical entities, or some components in multiple independent devices may jointly implement them.

[0124] In the above - mentioned embodiments, the hardware units or modules can be implemented mechanically or electrically. For example, a hardware unit, module, or processor can include permanent dedicated circuits or logics (such as dedicated processors, FPGAs, or ASICs) to complete corresponding operations. The hardware unit or processor can also include programmable logics or circuits (such as general - purpose processors or other programmable processors), which can be temporarily set by software to complete corresponding operations. The specific implementation method (mechanical method, or dedicated permanent circuits, or temporarily set circuits) can be determined based on cost and time considerations.

[0125] The specific embodiments described above in conjunction with the accompanying drawings describe exemplary embodiments, but do not represent all embodiments that can be implemented or fall within the scope of protection of the claims. The term "exemplary" used throughout this specification means "serving as an example, instance, or illustration" and does not mean "preferred" or "advantageous" over other embodiments. For the purpose of providing an understanding of the described technology, the specific embodiments include specific details. However, these technologies can be implemented without these specific details. In some instances, well-known structures and circuits are shown in block diagram form to avoid obscuring the concepts of the described embodiments.

[0126] The foregoing description of the content of this application is provided to enable any ordinary person skilled in the art to implement or use the content of this application. Various modifications to the content of this application will be obvious to those of ordinary skill in the art, and the general principles corresponding to the present application can also be applied to other variations without departing from the scope of protection of the content of this application. Therefore, the content of this application is not limited to the examples and designs described herein, but is consistent with the broadest scope that conforms to the principles and novel features disclosed herein.

Claims

1. A power supply monitoring circuit for a VPX system, characterized in that: include: A comparison unit connected between a power supply voltage and a ground voltage, for generating a reference voltage and a threshold voltage based on the power supply voltage, and generating an output voltage at a control node based on the threshold voltage and the reference voltage; A switch unit is connected between the VPX system and the power supply voltage, and is connected to the reference voltage and the control node. When the power supply voltage is in a normal working state, the switch unit controls the connection between the VPX system and the power supply voltage based on the reference voltage. When the power supply voltage is in an over-voltage or under-voltage state, the switch unit controls the disconnection between the VPX system and the power supply voltage based on the output voltage. The alarm unit is connected between the control node and the ground potential, and is used to generate an alarm signal based on the output voltage, and generate a power-off control signal when the number of times the alarm unit generates the alarm signal reaches a set value. The switch unit controls its own shutdown based on the power-off control signal to shut down the VPX system from the power supply voltage.

2. The power supply monitoring circuit for a VPX system according to claim 1, characterized in that: The switch unit includes a first switch tube, a second switch tube, a third switch tube and a first resistor; A first end of the first resistor is connected to a reference voltage, and a second end thereof is connected to a control node; The control end of the first switch tube is connected to the control node, the first end is connected to the ground potential, and the second end is connected to the control end of the second switch tube, the control end of the third switch tube and the power supply voltage; A first end of the second switch tube is connected to a power supply voltage, and a second end of the second switch tube is connected to a second end of a third switch tube. A first end of the third switch tube is connected to a VPX system.

3. The power supply monitoring circuit for a VPX system according to claim 2, characterized in that: The alarm unit includes a controller, and the controller is configured with an input pin, a control pin and an output pin; The input pin is connected to the control end and the control node of the first switch tube, and is used to receive a reference voltage and an output voltage, wherein the output voltage is less than the reference voltage; The output pin is used to output an alarm signal; The control pin is connected to the control end and the control node of the first switch tube, and is used to output a high-impedance state signal, or when the alarm unit generates an alarm signal a number of times reaching a set value, the control pin is used to output a power-off control signal.

4. The power supply monitoring circuit for a VPX system according to claim 3, characterized in that: The alarm unit further comprises a light emitting diode, wherein the anode of the light emitting diode is directly or indirectly connected to the output pin, and the cathode of the light emitting diode is connected to the ground potential.

5. The power supply monitoring circuit for a VPX system according to claim 1, characterized in that: The comparison unit includes an LDO unit, an overvoltage protection unit and an undervoltage protection unit, the threshold voltage includes a first threshold voltage and a second threshold voltage, and the output voltage includes a first output voltage and a second output voltage; The LDO unit is connected between the power supply voltage and the ground potential, and is used to generate a reference voltage; The overvoltage protection unit includes a first voltage dividing unit, a first comparator and a first diode, wherein the first voltage dividing unit is connected between a power supply voltage and a ground potential, and is used to divide the power supply voltage to generate a first threshold voltage, the first comparator has a non-inverting input terminal connected to a reference voltage, an inverting input terminal receiving the first threshold voltage, an output terminal connected to a cathode of the first diode, and an anode of the first diode connected to a control node and generating a first output voltage; The undervoltage protection unit includes a second voltage divider unit, a second comparator and a second diode. The second voltage divider unit is connected between the power supply voltage and the ground potential, and is used to divide the power supply voltage to generate a second threshold voltage. The non-inverting input terminal of the second comparator receives the second threshold voltage, the inverting input terminal is connected to the reference voltage, the output terminal is connected to the cathode of the second diode, and the anode of the second diode is connected to the control node and generates a second output voltage.

6. The power supply monitoring circuit for a VPX system according to claim 5, characterized in that: The comparison unit further includes a transient protection unit. The transient protection unit includes a third diode. An anode of the third diode is connected to the ground potential, and a cathode of the third diode is connected to the power supply voltage.

7. A power supply monitoring method for a VPX system, characterized in that: The method comprises: generating a reference voltage and a threshold voltage based on a power supply voltage through a comparison unit, and generating an output voltage at a control node based on the threshold voltage and the reference voltage; When the power supply is in a normal working state, the switch unit controls the connection between the VPX system and the power supply voltage based on the reference voltage, and when the power supply is in an over-voltage or under-voltage state, the switch unit controls the disconnection between the VPX system and the power supply voltage based on the output voltage; The alarm unit generates an alarm signal based on the output voltage, and generates a power-off control signal when the alarm unit generates an alarm signal a number of times reaching a set value. The switch unit controls its own shutdown based on the power-off control signal to shut down the VPX system from the power supply voltage.

8. The power supply monitoring method for a VPX system according to claim 7, characterized in that: The threshold voltage includes a first threshold voltage and a second threshold voltage, the output voltage includes a first output voltage and a second output voltage, and the method further includes: A first threshold voltage is generated by a first voltage divider unit, and the first threshold voltage is compared with a reference voltage by a first comparator. When the first threshold voltage is less than the reference voltage, the switch unit controls itself to turn on so as to conduct between the VPX system and the power supply voltage; When the first threshold voltage is greater than the reference voltage, a first output voltage is generated by the comparison unit, and the switch unit controls itself to be turned off so as to disconnect the VPX system from the power supply voltage; A second threshold voltage is generated by a second voltage divider unit, and the second threshold voltage is compared with a reference voltage by a second comparator. When the second threshold voltage is greater than the reference voltage, the switch unit controls itself to turn on so as to conduct between the VPX system and the power supply voltage; When the second threshold voltage is less than the reference voltage, the comparison unit generates a second output voltage, and the switch unit controls itself to be turned off so as to disconnect the VPX system from the power supply voltage.

9. The power supply monitoring method for a VPX system according to claim 8, characterized in that: The method further comprises: When the first threshold voltage is less than the reference voltage, or when the second threshold voltage is greater than the reference voltage, the voltage on the control node is the reference voltage; When the first threshold voltage is greater than the reference voltage, the voltage on the control node changes from the reference voltage to the first output voltage, and an alarm signal is generated through the alarm unit, wherein the first output voltage is less than the reference voltage; When the second threshold voltage is less than the reference voltage, the voltage on the control node changes from the reference voltage to a second output voltage, and an alarm signal is generated by the alarm unit, wherein the second output voltage is less than the reference voltage.

10. The power supply monitoring method for a VPX system according to claim 9, characterized in that: The method further comprises: Output a high impedance state signal through the controller's control pin; or, When the alarm unit generates an alarm signal for a number of times reaching a set value, a power-off control signal is output, and the power-off control signal is output through a control pin of the controller to disconnect the VPX system from the power supply voltage.

Images