Method and system for realizing Power Loss control function based on Feiteng CPU

Abstract

The invention relates to a method and system for realizing a Power Loss control function based on a Feiteng CPU, and the method comprises the steps: adding a code in a BIOS to realize the communication between the BIOS and an MCU, and transmitting Power Loss strategies, such as Power Off, Power On and Last State parameters, set in the BIOS by a user, and an instruction sent to the MCU by the BIOS under the condition of normal shutdown to the MCU through an I2C bus; an MCU firmware program is developed, so that the MCU can communicate with a BIOS, can store related instructions sent by the BIOS, can judge the access and removal of an AC power supply, and can control whether a computer is automatically powered on or started up according to a Power Loss strategy set by a user after the AC power supply is accessed; the power Loss control function of the Feiteng computer is achieved through mutual cooperation of the MCU and the BIOS, and the industrial problem that a current computer applying a Feiteng CPU does not support the power Loss control function is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of Feiteng CPU applications, and more specifically, to a method and system for implementing a PowerLoss control function based on a Feiteng CPU. Background Art

[0002] With the steady progress of the chip "domestication" strategy, in recent years, outstanding domestic CPU (Central Processing Unit) manufacturers represented by Phytium have emerged. Due to its high performance, low power consumption, safety and reliability, the Feiteng CPU is widely used in multiple fields such as industrial control motherboards, edge computing devices, financial systems, and wind turbine control systems, and has become an important part of China's domestic computer infrastructure.

[0003] Although China's domestic chips have achieved rapid development in recent years, due to the late start of China's chip industry and the influence of a series of factors including lithography machines, the chip industry has been monopolized by Western chip giants represented by Intel for the past few decades. Compared with foreign traditional chip giants such as Intel, domestic chip manufacturers including Feiteng still have a certain gap up to now.

[0004] Taking a desktop computer as an example, during the power-on process of an Intel X86 architecture CPU computer, the PWRBTN# sends a low pulse signal to the Super IO (Super Input Output) chip. After receiving this low pulse, the Super IO sends a signal to the CPU, and the CPU returns SLP_Sx (including SLP_S3#, SLP_S4#, SLP_S5#, etc.) signals to the Super IO. After receiving the feedback signal from the CPU, the Super IO sends out the PSON# signal. After receiving the PSON#, the CPU sends out voltages such as 12V, 5V, and 3.3V to complete the power-on.

[0005] Since the Feiteng CPU adopts the ARM architecture, its boot timing needs to be controlled by other chips such as the MCU (MicroController Unit, also known as the single-chip microcomputer). The Feiteng CPU itself cannot actively send signals such as SLP_Sx of the Intel x86 architecture CPU. As a result, the Power Loss control function commonly used in the traditional computer industry (the control strategy of whether the computer automatically boots up when AC power is supplied again after cutting off the AC power is set by the user in the BIOS) cannot be implemented on computers with Feiteng CPUs: After PWRBTN# sends a pulse signal to the Super IO, the SuperIO sends a pulse signal to the Feiteng CPU, but the Feiteng CPU cannot return the SLP_Sx signal to the Super IO. Therefore, the PSON# signal of the Super IO cannot be sent out, and the voltages such as 12V, 5V, and 3.3V of the Feiteng CPU need to be controlled and sent out by an external chip. However, in the computer industry, there is an urgent need for Power Loss solutions in many fields, and there is currently no solution for computers using Feiteng CPUs (such as Feiteng D2000, Feiteng E2000Q, etc.).

[0006] In the industry's Power Loss control solution, its implementation method is to provide a human-computer interaction function menu in the BIOS. The user makes specific settings according to different industries and application scenarios, and the values set by the user will be written back to the chip for storage. The next time the AC power is connected, the computer will decide whether to automatically boot up according to the values set by the user stored in the chip. The human-computer interaction interface provided for the user generally includes the following three items:

[0007] 1. Power Off. The next time AC power is supplied, the computer remains in the shutdown state, and the user needs to trigger a wake-up source such as the PWRBTN# key to boot up;

[0008] 2. Power On. As long as AC power is supplied the next time, it will automatically boot up immediately without the user having to trigger a wake-up source such as the PWRBTN# key to boot up;

[0009] 3. Last State. Whether it automatically boots up the next time AC power is supplied depends on the previous shutdown state. If the previous shutdown was a normal shutdown (shutdown through the system command or single-touch the PWRBTN# key to shut down), it will remain in the shutdown state until the user triggers the PWRBTN# key to boot up; if the previous shutdown was an illegal shutdown (directly cut off the AC power to shut down or hold down the PWRBTN# key for 4 seconds to force a shutdown), then it will automatically boot up without the user having to trigger the PWRBTN# key.

[0010] Based on the above situation, there is an urgent need for a method and system similar to the Power Loss control function in traditional x86 architecture computers to solve the industry problem that computers using Feiteng CPUs do not support the Power Loss control function. Summary of the Invention

[0011] The technical problem to be solved by the present invention is, in view of the above-mentioned defects of the prior art, to provide a method for implementing the Power Loss control function based on the Feiteng CPU, and also to provide a system for implementing the Power Loss control function based on the Feiteng CPU.

[0012] The technical solution adopted by the present invention to solve its technical problems is:

[0013] Construct a method for implementing the Power Loss control function based on the Feiteng CPU, wherein the method includes the steps of:

[0014] Take the MCU chip as an I2C slave device and mount it on the I2C bus. The Feiteng CPU and BIOS can perform read and write access to the MCU chip through the standard I2C bus protocol;

[0015] Define an interaction protocol instruction agreed with the BIOS in the MCU chip. The content of the interaction protocol instruction includes the valid value of the PowerLoss register and the valid value of the last shutdown status register;

[0016] During the startup phase, the BIOS sends the Power Loss policy set by the user to the MCU chip. The Power Loss policy contains a valid value of the Power Loss register. During the shutdown phase, the BIOS sends the last shutdown status instruction to the MCU chip. The last shutdown status instruction contains a valid value of the last shutdown status register;

[0017] When the MCU chip receives the valid value of the Power Loss register and the valid value of the last shutdown status register transmitted by the I2C bus, the MCU chip stores them in specific memory areas and Flash areas of the MCU according to the data definition respectively;

[0018] Connect the RSMRST# signal of the Feiteng computer to a pin of the MCU chip. The MCU chip configures this pin as an input pin and can trigger an interrupt. Write a corresponding interrupt service program in the MCU chip: when the RSMRST# signal is low, it means that the AC alternating current is disconnected at this time. When the RSMRST# signal is high, it means that the AC alternating current is connected at this time;

[0019] When the RSMRST# signal changes from low to high, the above-mentioned interrupt service routine is triggered. In the interrupt service routine, the Power Loss policy set by the user is judged, and it is judged whether the last shutdown is a normal shutdown according to the last shutdown status instruction.

[0020] For the method for implementing the Power Loss control function based on the Feiteng CPU according to the present invention, wherein the valid values of the PowerLoss register include:

[0021] 01: corresponding to Power Off set by the user in the BIOS;

[0022] 02: corresponding to Power On set by the user in the BIOS;

[0023] 03: corresponding to Last State set by the user in the BIOS;

[0024] Other values except the above three valid values are invalid values.

[0025] For the method for implementing the Power Loss control function based on the Feiteng CPU according to the present invention, wherein the valid values of the last shutdown status register include:

[0026] A5: When the Feiteng computer is normally powered on, the instruction sent by the BIOS to the MCU is used to clear the 5A instruction sent by the BIOS to the MCU during the last normal shutdown;

[0027] 5A: When the Feiteng computer is normally shut down, the instruction sent by the BIOS to the MCU indicates that the Feiteng computer has performed a normal shutdown;

[0028] Values other than A5 and 5A are invalid values.

[0029] For the method for implementing the Power Loss control function based on the Feiteng CPU according to the present invention, wherein the judgment of the Power Loss policy set by the user in the interrupt service routine adopts:

[0030] A. If the Power Loss policy is Power On, without judging the last shutdown behavior, the MCU chip executes the startup timing process to achieve automatic startup;

[0031] B. If the Power Loss policy is Power Off, without judging the last shutdown behavior, the MCU chip does not execute the automatic startup timing process and waits for the trigger of the startup event source;

[0032] C. If the Power Loss strategy is Last State, determine whether the last shutdown was normal, that is, determine whether there is an instruction of 5A stored in the MCU memory. If so, the MCU chip does not execute the startup timing process; if not, the MCU chip executes the startup timing process to achieve automatic startup.

[0033] In the method for implementing the Power Loss control function based on the Feiteng CPU of the present invention, the SPI Flash chip and the Feiteng CPU are connected through the SPI bus, and the BIOS program is stored in the SPI Flash chip;

[0034] When the user selects different Power Loss strategies in the BIOS menu, the BIOS sends the agreed Power Loss protocol command to the MCU chip through the I2C bus;

[0035] During the startup process of the Feiteng computer, the BIOS sends the A5 instruction to the MCU chip to clear the normal shutdown instruction 5A sent by the BIOS to the MCU chip during the last normal shutdown.

[0036] The method for implementing the Power Loss control function based on the Feiteng CPU of the present invention further includes:

[0037] Step 01: After the Feiteng computer is powered on, the BIOS executes Step 02;

[0038] Step 02: The BIOS sends A5 to the MCU chip, and then the BIOS executes Step 03;

[0039] Step 03: The BIOS determines whether the Power Loss strategy set by the user in the BIOS menu is Power Off. If so, the BIOS sends 01 to the MCU chip and the BIOS executes Step 06; if not, the BIOS executes Step 04;

[0040] Step 04: The BIOS determines whether the Power Loss strategy set by the user in the BIOS menu is Power On. If so, the BIOS sends 02 to the MCU chip and the BIOS executes Step 06; otherwise, the BIOS executes Step 05;

[0041] Step 05: The Power Loss strategy set by the user is Last State, the BIOS sends 03 to the MCU chip, and the BIOS executes Step 06;

[0042] Step 06: End.

[0043] The method for implementing the Power Loss control function based on the Feiteng CPU according to the present invention, wherein the method further includes:

[0044] Step 11: The Feiteng computer shuts down, and the BIOS executes Step 12;

[0045] Step 12: If the Feiteng computer shuts down normally, the BIOS sends 5A to the MCU chip, and then the BIOS executes Step 13; otherwise, directly execute Step 13. In the case of illegal shutdown, the BIOS has no chance to run the code;

[0046] Step 13: End.

[0047] The method for implementing the Power Loss control function based on the Feiteng CPU according to the present invention, wherein the method further includes:

[0048] Step 21: When AC alternating current is connected, the RSMRST# signal of the Feiteng computer will change from low to high, triggering the interrupt service program of RSMRST# in the MCU;

[0049] Step 22: The interrupt service program first determines whether the Power Loss policy set by the user is Power Off. If so, the MCU chip executes Step 23; otherwise, the MCU chip executes Step 24;

[0050] Step 23: The Feiteng computer remains in the shutdown state, and the MCU chip does not execute the automatic power-on timing process, waiting for the next power-on source to trigger a power-on event;

[0051] Step 24: The interrupt service program determines whether the Power Loss policy set by the user is Power On. If so, the MCU chip executes Step 25; otherwise, the MCU chip executes Step 26;

[0052] Step 25: The MCU chip executes the automatic power-on timing process, and the Feiteng computer powers on automatically;

[0053] Step 26: The Power Loss policy set by the user is Last State, execute Step 27;

[0054] Step 27: The MCU chip determines whether the Feiteng computer was shut down normally last time. If so, execute Step 23; otherwise, execute Step 25.

[0055] The method for implementing the Power Loss control function based on the Feiteng CPU according to the present invention, wherein the values stored in the specific memory area of the MCU chip are the same as the values stored in the Flash area;

[0056] The values stored in specific memory regions of the MCU chip are used for quick access; the values stored in the Flash region are used for backup storage to prevent the loss of user - set data after AC power failure.

[0057] A system for implementing the Power Loss control function based on the Feiteng CPU is used to implement the method for implementing the Power Loss control function based on the Feiteng CPU as described above. Among them, the system includes a Feiteng CPU, an MCU chip, and an SPI Flash chip; the SPI Flash chip stores a BIOS program.

[0058] The Feiteng CPU communicates with the MCU chip through the I2C bus, and the Feiteng CPU is connected to the SPI Flash chip through the SPI bus.

[0059] The beneficial effects of the present invention are as follows: By applying the methods and ways of this application, through the firmware development of the MCU chip, the cooperation between the MCU and the BIOS realizes the Power Loss control function of the Feiteng computer, solving the industry problem that the computers applying the Feiteng CPU currently do not support the Power Loss control function. Brief Description of the Drawings

[0060] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will further explain the present invention in conjunction with the drawings and embodiments. The drawings in the following description are only partial embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings:

[0061] Figure 1 It is a simplified diagram of the communication process between the BIOS and the MCU during the startup process of the method for implementing the Power Loss control function based on the Feiteng CPU in the preferred embodiment of the present invention;

[0062] Figure 2 It is a simplified diagram of the communication process between the BIOS and the MCU during the shutdown process of the method for implementing the Power Loss control function based on the Feiteng CPU in the preferred embodiment of the present invention;

[0063] Figure 3 It is a simplified diagram of the process of the MCU executing the Power Loss strategy set by the user in the method for implementing the Power Loss control function based on the Feiteng CPU in the preferred embodiment of the present invention;

[0064] Figure 4 It is a block diagram of the system principle for implementing the Power Loss control function based on the Feiteng CPU in the preferred embodiment of the present invention. Detailed Embodiments

[0065] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention. Apparently, the described embodiments are partial embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0066] A method for implementing the Power Loss control function based on the Feiteng CPU in a preferred embodiment of the present invention, as Figure 1 shown, also referring to Figure 2 and Figure 3 , includes:

[0067] Add code in the BIOS to implement the communication between the BIOS and the MCU. The Power Loss policies set by the user in the BIOS, such as Power Off, Power On, and Last State parameters, as well as the instructions sent by the BIOS to the MCU in the case of normal shutdown, can be transmitted to the MCU through the I2C bus (Inter-Integrated Circuit).

[0068] Develop the MCU firmware program so that the MCU can communicate with the BIOS, can store the relevant instructions sent by the BIOS, can judge the access and removal of the AC power supply, and can control whether the computer automatically powers on after the AC power supply is connected according to the Power Loss policy set by the user.

[0069] Applying the methods and means of the present application, through the firmware development of the MCU chip, the mutual cooperation between the MCU and the BIOS realizes the Power Loss control function of the Feiteng computer, solving the industry problem that the computer applying the Feiteng CPU currently does not support the Power Loss control function.

[0070] The MCU chip is burned with the firmware program independently developed by the company, and this firmware program enables:

[0071] (1) The MCU can communicate with the Feiteng CPU and the BIOS program stored in the SPI (Serial Peripheral Interface) Flash. The implementation method is that the MCU acts as an I2C slave device, mounted on the I2C bus, and the CPU and the BIOS can perform read and write access to the MCU through the standard I2C bus protocol.

[0072] (2) Define the interaction protocol instructions agreed with the BIOS in the MCU.

[0073] Valid value of Power Loss register:

[0074] 01: Corresponding to Power Off set by the user in the BIOS

[0075] 02: Corresponding to Power On set by the user in the BIOS

[0076] 03: Corresponding to Last State set by the user in the BIOS

[0077] Values other than the above three are invalid values.

[0078] Valid value of the last shutdown state register:

[0079] A5: The instruction sent by the BIOS to the MCU after the Feiteng computer boots up normally. It is used to clear the 5A instruction sent by the BIOS to the MCU during the last normal shutdown;

[0080] 5A: The instruction sent by the BIOS to the MCU when the Feiteng computer shuts down normally, indicating that the Feiteng computer has performed a normal shutdown;

[0081] Definitions other than A5 and 5A are invalid values;

[0082] (3) For the relevant instructions sent by the BIOS to the MCU in (2) above, the MCU saves them to the memory. The implementation method is that when the MCU receives the data transmitted on the I2C bus, the MCU stores them separately in specific memory areas and Flash areas of the MCU according to the definition of the firmware program. The values stored in the memory area are the same as those in the Flash. The difference in their uses is that the values in the memory area are convenient for quick access, and the values in the Flash area are for backup storage to prevent the loss of user-set data after the AC power is cut off;

[0083] (4) It is possible to judge the connection and removal of the AC power supply. The implementation method is that the RSMRST# signal of the Feiteng computer is connected to a pin of the MCU. The pin is configured as an input in the MCU firmware, which can trigger an interrupt. A corresponding interrupt service program (this interrupt service program is the firmware program independently developed by our company) is written in the MCU. When the RSMRST# signal is low, it means that the AC power is disconnected at this time. When the RSMRST# signal is high, it means that the AC power is connected at this time;

[0084] (5) It is possible to control whether the computer automatically powers on after the AC power is connected according to the Power Loss policy set by the user. The implementation method is that when the RSMRST# signal changes from low to high, it triggers the interrupt service program in (4) above. In the interrupt service program, first judge the Power Loss policy set by the user, and selectively judge whether the last shutdown was a normal shutdown:

[0085] A. If the Power Loss policy is Power On, without judging the previous shutdown behavior, the MCU executes the power-on timing process to achieve automatic power-on;

[0086] B. If the Power Loss policy is Power Off, without judging the previous shutdown behavior, the MCU does not execute the automatic power-on timing process and waits for the trigger of the power-on event source;

[0087] C. If the Power Loss policy is Last State, judge whether the previous shutdown was normal (that is, judge whether there is a 5A instruction stored in the MCU memory). If so, the MCU does not execute the power-on timing process; if not, the MCU executes the power-on timing process to achieve automatic power-on.

[0088] The SPI Flash chip is connected to the Feiteng CPU through the SPI bus, and the BIOS program is stored in the SPI Flash chip. Extra code is added to the BIOS program to achieve:

[0089] The user selects different Power Loss strategies in the BIOS menu, and the BIOS sends the agreed Power Loss protocol command to the MCU through the I2C bus;

[0090] During the startup process of the Feiteng computer, the BIOS sends an A5 instruction to the MCU to clear the normal shutdown instruction 5A sent by the BIOS to the MCU during the previous normal shutdown.

[0091] For the Feiteng single-chip architecture chipset platform, the south bridge chip is integrated in the CPU; for the multi-chip architecture chipset platform, the CPU and the south bridge are two separate chips. Whether it is a single chip or a multi-chip, the solution of the present invention is applicable.

[0092] The simplified communication process diagram between the BIOS and the MCU during the startup process is as Figure 1 shown:

[0093] Figure 1 In, after the Feiteng computer is powered on, the BIOS executes step 2;

[0094] The BIOS sends A5 to the MCU, and then the BIOS executes step 3;

[0095] The BIOS judges whether the Power Loss policy set by the user in the BIOS menu is Power Off. If so, the BIOS sends 01 to the MCU and the BIOS executes step 6; if not, the BIOS executes step 4;

[0096] The BIOS determines whether the Power Loss policy set by the user in the BIOS menu is Power On. If it is, the BIOS sends 02 to the MCU and the BIOS executes Step 6; otherwise, the BIOS executes Step 5;

[0097] The Power Loss policy set by the user is Last State, and the BIOS sends 03 to the MCU. The BIOS executes Step 6;

[0098] End.

[0099] The simplified communication process diagram between the BIOS and the MCU during the shutdown process is as Figure 2 shown:

[0100] Figure 3 In, the Feiteng computer shuts down and the BIOS executes Step 2;

[0101] If the Feiteng computer shuts down normally (by pressing PWRBTN# once or through a software command), the BIOS sends 5A to the MCU, and the BIOS then executes Step 3; otherwise, it directly executes Step 3. In the case of an illegal shutdown, the BIOS has no chance to run the code;

[0102] End.

[0103] The simplified process diagram of the MCU executing the Power Loss policy set by the user is as Figure 3 shown. Through the solution of the present invention, the Power Loss control function similar to that under the x86 architecture is fully realized, and the industry problem that the Feiteng computer does not support the Power Loss control function is solved:

[0104] Figure 3 In, when AC power is connected, the RSMRST# signal of the Feiteng computer will change from low to high, triggering the interrupt service program of RSMRST# in the MCU;

[0105] The interrupt service program first determines whether the Power Loss policy set by the user is Power Off. If it is, the MCU executes Step 3; otherwise, the MCU executes Step 4;

[0106] The Feiteng computer remains in the shutdown state, and the MCU does not execute the automatic power-on timing process, waiting for the next power-on source to trigger a power-on event;

[0107] The interrupt service program determines whether the Power Loss policy set by the user is Power On. If it is, the MCU executes Step 5; otherwise, the MCU executes Step 6;

[0108] The MCU executes the automatic power-on timing process, and the Feiteng computer powers on automatically;

[0109] The Power Loss policy set by the user is Last State, and step 7 is executed;

[0110] The MCU determines whether the Feiteng computer was shut down normally last time. If so, step 3 is executed; otherwise, step 5 is executed.

[0111] Innovation points:

[0112] During the startup process, the BIOS sends the Power Loss policy instruction set by the user and the instruction to clear the last normal shutdown flag to the MCU through the I2C bus;

[0113] During the normal shutdown process, the BIOS sends the Feiteng computer normal shutdown flag instruction to the MCU;

[0114] After receiving the data sent by the BIOS, the MCU analyzes the instruction type and correctly fills it into the Power Loss register and the last shutdown status register defined in the MCU respectively;

[0115] Hardware-wise, the RSMRST# signal of the Feiteng computer is connected to a pin of the MCU that can trigger an interrupt, and an interrupt service program for RSMRST# is developed in the MCU firmware;

[0116] The change in the level state of the RSMRST# signal can trigger the configured interrupt. When the interrupt is triggered, it immediately enters the corresponding interrupt service program. In this interrupt service program, the Power Loss policy set by the user and the last shutdown status are judged, and the Feiteng computer can be controlled to power on automatically or remain in the shutdown state.

[0117] A system for implementing the Power Loss control function based on the Feiteng CPU is used to implement the method for implementing the Power Loss control function based on the Feiteng CPU as described above, as Figure 4 shown, the system includes a Feiteng CPU, an MCU chip, and an SPI Flash chip; the SPI Flash chip stores the BIOS program;

[0118] The Feiteng CPU communicates with the MCU chip through the I2C bus, and the Feiteng CPU is connected to the SPI Flash chip through the SPI bus.

[0119] It should be understood that those of ordinary skill in the art can make improvements or transformations according to the above description, and all such improvements and transformations should fall within the protection scope of the appended claims of the present invention.

Claims

1. A method for realizing Power Loss control function based on Feiteng CPU, characterized in that: The method comprises the steps of: The MCU chip is mounted on the I2C bus as an I2C slave device. The Feiteng CPU and BIOS can read and write to the MCU chip through the standard I2C bus protocol. Define the interactive protocol instructions agreed with the BIOS in the MCU chip. The contents of the interactive protocol instructions include the effective value of the PowerLoss register and the effective value of the last shutdown status register; During the boot phase, the BIOS sends the Power Loss policy set by the user to the MCU chip. The Power Loss policy contains a valid value of a Power Loss register. During the shutdown phase, the BIOS sends the last shutdown status instruction to the MCU chip, and the last shutdown status instruction contains a valid value of the last shutdown status register; When the MCU chip receives the effective value of the Power Loss register and the effective value of the last shutdown status register transmitted by the I2C bus, the MCU chip stores them in the MCU-specific memory area and Flash area respectively according to the data definition; Connect the RSMRST# signal of the Feiteng computer to a pin of the MCU chip. The MCU chip configures the pin as an input pin and can trigger an interrupt. The corresponding interrupt service program is written in the MCU chip: when the RSMRST# signal is low, it means that the AC power is disconnected at this time, and when the RSMRST# signal is high, it means that the AC power is connected at this time; When the RSMRST# signal changes from low to high, the above interrupt service routine is triggered. In the interrupt service routine, the Power Loss strategy set by the user is determined, and whether the last shutdown is a normal shutdown is determined according to the last shutdown status instruction.

2. The method for realizing Power Loss control function based on Feiteng CPU according to claim 1, characterized in that: The Power Loss register valid values ​​include: 01: corresponds to Power Off set by the user in BIOS; 02: corresponds to the Power On set by the user in BIOS; 03: corresponds to the Last State set by the user in BIOS; All values ​​other than the above three valid values ​​are invalid.

3. The method for realizing Power Loss control function based on Feiteng CPU according to claim 2 is characterized in that: The last shutdown status register valid values ​​include: A5: When the Feiteng computer is powered on normally, the command sent by BIOS to MCU is used to clear the 5A command sent by BIOS to MCU when the computer was shut down normally last time; 5A: When the Feiteng computer is shut down normally, the command sent by BIOS to MCU indicates that the Feiteng computer has executed a normal shutdown; Values ​​other than A5 and 5A are invalid.

4. The method for realizing Power Loss control function based on Feiteng CPU according to claim 3 is characterized in that: The Power Loss strategy set by the user is determined in the interrupt service program: A. If the Power Loss strategy is Power On, the MCU chip executes the power-on sequence process to automatically power on without judging the last shutdown behavior; B. If the Power Loss strategy is Power Off, there is no need to determine the last shutdown behavior. The MCU chip does not execute the automatic power-on sequence process and waits for the power-on event source to trigger; C. If the Power Loss strategy is Last State, determine whether the last shutdown was normal, that is, determine whether there is a 5A instruction stored in the MCU memory. If so, the MCU chip does not execute the power-on timing process; if not, the MCU chip executes the power-on timing process to achieve automatic power-on.

5. The method for realizing Power Loss control function based on Feiteng CPU according to claim 4 is characterized in that: The SPI Flash chip and the Feiteng CPU are connected via the SPI bus, and the BIOS program is stored in the SPI Flash chip; When the user selects a different Power Loss strategy in the BIOS menu, the BIOS sends the agreed Power Loss protocol command to the MCU chip through the I2C bus; When the Feiteng computer is booting up, the BIOS sends the A5 instruction to the MCU chip, clearing the normal shutdown instruction 5A that the BIOS sent to the MCU chip during the last normal shutdown.

6. The method for realizing Power Loss control function based on Feiteng CPU according to claim 5 is characterized in that: The method further comprises: Step 01: When the Feiteng computer is turned on, the BIOS executes step 02; Step 02: BIOS sends A5 to the MCU chip, and then BIOS executes step 03; Step 03: BIOS determines whether the Power Loss policy set by the user in the BIOS menu is Power Off. If yes, BIOS sends 01 to the MCU chip and executes step 06; if no, BIOS executes step 04; Step 04: BIOS determines whether the Power Loss policy set by the user in the BIOS menu is Power On. If so, BIOS sends 02 to the MCU chip and BIOS executes step 06; otherwise, BIOS executes step 05; Step 05: The Power Loss policy set by the user is Last State, the BIOS sends 03 to the MCU chip, and the BIOS executes step 06; Step 06: End.

7. The method for realizing Power Loss control function based on Feiteng CPU according to claim 5 is characterized in that: The method further comprises: Step 11: Shut down the Feiteng computer and execute step 12 in BIOS; Step 12: If the Feiteng computer is shut down normally, the BIOS sends 5A to the MCU chip, and the BIOS then executes step 13; otherwise, it directly executes step 13. In the case of illegal shutdown, the BIOS has no chance to run the code; Step 13: End.

8. The method for realizing Power Loss control function based on Feiteng CPU according to claim 5 is characterized in that: The method further comprises: Step 21: When AC power is connected, the RSMRST# signal of the Feiteng computer will change from low to high, triggering the RSMRST# interrupt service routine in the MCU; Step 22: The interrupt service program first determines whether the Power Loss policy set by the user is Power Off. If so, the MCU chip executes step 23; otherwise, the MCU chip executes step 24; Step 23: The Feiteng computer remains in the shutdown state, and the MCU chip does not execute the automatic power-on sequence process, waiting for the next power-on source to trigger the power-on event; Step 24: The interrupt service program determines whether the Power Loss policy set by the user is Power On. If so, the MCU chip executes step 25; otherwise, the MCU chip executes step 26; Step 25: The MCU chip executes the automatic power-on sequence process, and the Feiteng computer automatically powers on; Step 26: If the Power Loss strategy is set to Last State by the user, go to Step 27; Step 27: The MCU chip determines whether the Feiteng computer was shut down normally last time. If so, execute step 23; otherwise, execute step 25.

9. The method for realizing Power Loss control function based on Feiteng CPU according to claim 1, characterized in that: The value stored in the memory interval specific to the MCU chip is the same as the value stored in the Flash interval; The values ​​stored in the specific memory interval of the MCU chip are used for fast access; the values ​​stored in the Flash interval are used for backup storage to prevent the loss of user-set data after AC power failure.

10. A system for implementing a power loss control function based on a Feiteng CPU, used to implement a method for implementing a power loss control function based on a Feiteng CPU as described in any one of claims 1 to 9, characterized in that: The system includes a Feiteng CPU, an MCU chip and an SPI Flash chip; the SPI Flash chip stores a BIOS program; The Feiteng CPU communicates with the MCU chip via an I2C bus, and the Feiteng CPU is connected with the SPI Flash chip via an SPI bus.

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