Multipath charging priority control circuit, charging control method and equipment

Abstract

The embodiment of the invention relates to the field of communication, and provides a multi-path charging priority control circuit, a charging control method and equipment, and the circuit comprises a plurality of overvoltage protection chips which are respectively applied to a plurality of charging paths, and the plurality of charging paths construct a charging loop with a charging priority; the first switching circuit is used for connecting or disconnecting a target charging path in the charging loop with the charging loop, and when the second switching circuit is connected, the target charging path is switched to a power supply path; and the access detection pin is used for feeding back control signals aiming at the first switching circuit and the second switching circuit generated by detecting whether the external equipment is accessed or not. Based on software control and a hardware circuit, priority control of multiple charging modes is realized, and charging requirements in different scenes are met.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of communication technologies, and in particular, to a multi-path charging priority control circuit, a multi-path charging priority control method, and a corresponding electronic device. Background Art

[0002] In current product designs, Poka - Yoke is a commonly used method to prevent incorrect operations or ensure a specific operation sequence, that is, multi-path charging priority control is usually implemented using Poka - Yoke. However, with the diversification of product requirements, especially the increasing ID (Industrial Design) requirements, since Poka - Yoke is usually fixed, it is difficult to adapt to different user needs or scenario changes and cannot meet the requirements of multi-path charging priority control. Summary of the Invention

[0003] Embodiments of the present application provide a multi-path charging priority control circuit, a charging control method, and a device, which can implement priority control of multiple charging methods and meet the charging requirements in different scenarios.

[0004] In one aspect, embodiments of the present application provide a multi-path charging priority control circuit, and the circuit includes:

[0005] Multiple overvoltage protection chips, which are respectively applied to multiple charging paths, and the multiple charging paths form a charging loop with charging priorities;

[0006] Multiple switch circuits, including a first switch circuit and a second switch circuit, where the first switch circuit is used to conduct or disconnect the connection between a target charging path in the charging loop and the charging loop, and when the second switch circuit is conducting, the target charging path is switched to a power supply path;

[0007] An access detection pin, which is used to feedback a control signal for the first switch circuit and the second switch circuit generated based on detecting whether an external device is accessed; wherein, when the external device is accessed, the second switch circuit is closed, the first switch circuit is opened, and the charging voltage is output via other charging paths in the charging loop except the target charging path, and the power supply voltage is output via the power supply path; and / or, when the external device is not accessed, the first switch circuit is closed, the second switch circuit is opened, and the charging voltage is output via the charging loop.

[0008] In some embodiments of the present application, the overvoltage protection chip includes a voltage output pin, an enable pin, a status indication pin, and a mode switching indication pin;

[0009] When the enable pin of the overvoltage protection chip is at a low level, the overvoltage protection chip outputs a charging voltage in the forward direction via the charging circuit, and the status indication pin of the overvoltage protection chip is at a high level;

[0010] And / or, when the enable pin of the overvoltage protection chip is at a high level, the overvoltage protection chip stops outputting the charging voltage;

[0011] And / or, when the enable pin of the overvoltage protection chip is at a low level and the mode switching indication pin of the overvoltage protection chip is at a low level, the overvoltage protection chip outputs a power supply voltage in the reverse direction via the power supply path.

[0012] In some embodiments of the present application, the multiple charging paths include a first charging path, a second charging path, and a third charging path; the charging priority of the first charging path is higher than that of the second charging path, and the charging priority of the second charging path is higher than that of the third charging path.

[0013] In some embodiments of the present application, the charging circuit includes:

[0014] The first enable pin of the first overvoltage protection chip in the first charging path is grounded, and the first status indication pin of the first overvoltage protection chip is connected to the second enable pin of the second overvoltage protection chip in the second charging path;

[0015] The first status indication pin and the second status indication pin of the second overvoltage protection chip are connected to the third enable pin of the third overvoltage protection chip in the third charging path through an OR gate circuit;

[0016] Wherein, the first status indication pin transmits a level signal to the OR gate circuit through the conduction of the first switch circuit.

[0017] In some embodiments of the present application, when the external device is not connected, if there is a charging signal input to the third charging path and there is no charging signal input to the second charging path and the first charging path, the third enable pin is at a low level, and the third overvoltage protection chip outputs a charging voltage via the third charging path;

[0018] And / or, if there is a charging signal input to the second charging path and there is no charging signal input to the first charging path, the second enable pin is at a low level, the second status indication pin is at a high level, the third enable pin is at a high level, and the second overvoltage protection chip outputs a charging voltage via the second charging path;

[0019] And / or, if there is a charging signal input to the first charging path, the first enable pin is at a low level, the first status indicating pin is at a high level, the second enable pin is at a high level, the level signal output via the OR gate circuit is at a high level, the third enable pin is at a high level, and the first overvoltage protection chip outputs a charging voltage via the first charging path.

[0020] In some embodiments of the present application, when the external device is connected, the third enable pin is connected to the ground via the conduction of the second switching circuit, the mode switching indicating pin of the third overvoltage protection chip outputs a low level from the access detection pin of the platform, the third enable pin and the mode switching indicating pin are at a low level, the third charging path is switched to a power supply path, and the third overvoltage protection chip outputs a power supply voltage to the external device according to the power supply path.

[0021] In some embodiments of the present application, when the external device is connected, the mode switching indicating pin and the third enable pin are connected to the access detection pin via an anti-reverse circuit; the anti-reverse circuit is used to cut off the control level of the access detection pin from being transmitted to the third enable pin.

[0022] In some embodiments of the present application, when the external device is connected, if there is a charging signal input to the second charging path and there is no charging signal input to the first charging path, the second enable pin is at a low level, the second status indicating pin is at a high level, the third enable pin is at a high level, and the second overvoltage protection chip outputs a charging voltage via the second charging path;

[0023] And / or, if there is a charging signal input to the first charging path, the first enable pin is at a low level, the first status indicating pin is at a high level, the second enable pin is at a high level, and the first overvoltage protection chip outputs a charging voltage via the first charging path.

[0024] On the other hand, an embodiment of the present application provides a multi-path charging priority control method, which is applied to the multi-path charging priority control circuit, and the method includes:

[0025] When it is detected that an external device is connected to the multi-path charging priority control circuit, a first control signal is generated, the second switching circuit in the multi-path charging priority control circuit is controlled to close according to the first control signal, the first switching circuit is disconnected, and a charging voltage is output according to other charging paths in the charging circuit except the target charging path, and / or a power supply voltage is output according to the power supply path;

[0026] And / or, when it is detected that the external device is not connected to the multi-channel charging priority control circuit, a second control signal is generated, and the first switch circuit is controlled to close and the second switch circuit is controlled to open according to the second control signal, and a charging voltage is output according to the charging circuit.

[0027] In another aspect, an embodiment of the present application further provides an electronic device, including a processor and the multi-channel charging priority control circuit, and the processor is used to control the multi-channel charging priority control circuit to implement the multi-channel charging priority control method.

[0028] The multi-channel charging priority control circuit, charging control method and device provided by the embodiments of the present application use an overvoltage protection chip and a switching tube to build a multi-channel charging priority control circuit, and combine the control signals fed back by the access detection pins, that is, based on software control and hardware circuits, to realize the priority control of multiple charging methods, and can ensure the charging priority control whether an external device is connected or not, meeting the charging requirements in different scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a schematic structural diagram of a multi-channel charging priority control circuit provided by an embodiment of the present application;

[0030] Figure 2 is a circuit schematic diagram of the multi-channel charging priority control circuit provided by an embodiment of the present application;

[0031] Figure 3 is a step flow chart of a multi-channel charging priority control method provided by an embodiment of the present application;

[0032] Figure 4 is a schematic flow chart of controlling the multi-channel charging priority provided by an embodiment of the present application;

[0033] Figure 5 is a structural block diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0034] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present application.

[0035] In today's situation of diverse product designs, simply relying on structural anti-fooling is difficult to meet the requirements of multi-channel charging priority control.

[0036] The embodiment of the present application uses an overvoltage protection chip and a switch tube to build a multi-channel charging priority control circuit, and combines the control signal fed back by the access detection pin, that is, based on the use of software control and hardware circuits, to achieve priority control of multiple charging methods, and can ensure the control of charging priority regardless of whether an external device is connected or not, thereby meeting the charging requirements in different scenarios.

[0037] Reference Figure 1 , shows a structural block diagram of a multi-channel charging priority control circuit provided by an embodiment of the present application, the multi-channel charging priority control circuit 101 may include multiple over-voltage protection chips (Over-Voltage Protection, referred to as OVP), such as OVP1, OVP2, OVP3, etc., the multiple over-voltage protection chips can be respectively applied to multiple charging paths, such as charging path 1, charging path 2, charging path 3, etc., the multiple charging paths can respectively have corresponding insertion signal detection terminals, such as signal terminal 1, signal terminal 2, signal terminal 3, etc., the multiple charging paths can construct a charging circuit with charging priority, in the constructed charging circuit, its charging priority can be expressed as charging path 1>charging path 2>charging path 3; the construction of the charging circuit is with the help of multiple switch circuits, such as switch circuit 1, switch circuit 2, etc., wherein the switch circuit 1 can be used to turn on or off the target charging path in the charging circuit and the charging The target charging path can be switched to a power supply path when the switch circuit 2 is turned on. The target charging path can be any one of a plurality of charging paths. In the embodiment of the present application, the target charging path can have the ability to power an external device, such as an OTG (On-The-Go, an extended USB standard implementation) device. Assuming that the target charging path is charging path 3, optionally, when the switch circuit 1 is closed, the circuit connection between charging path 3 and charging path 1 and charging path 2 can be turned on; when the switch circuit 1 is turned off, the circuit connection between charging path 3 and charging path 1 and charging path 2 can be turned off, and when the switch circuit 2 is closed, the charging path 3 can be switched to a power supply path for powering an external OTG device.

[0038] In some embodiments of the present application, the multi-channel charging priority control circuit 101 may further include an access detection pin, which may be a software-controlled port, namely a GPIO port (General-Purpose Input / Output) for implementing software control.

[0039] Optionally, the access detection pin can be used for access detection of the OTG device, and can mainly feedback the control signal generated by the Central Processing Unit (CPU) based on detecting whether an external device is accessed. The generated control signal is a control signal for the first switch circuit and the second switch circuit.

[0040] As an example, specifically, when an external device is accessed, the generated control signal can be used to indicate to control switch circuit 2 to close and switch circuit 1 to open, thereby switching charging path 3 to a power supply path, and outputting a power supply voltage via the power supply path to achieve reverse power supply for the OTG device. It should be noted that the power supply path is not affected by the charging priority and does not affect the charging priority either. That is, at this time, the charging voltage can still be output via other charging paths in the charging loop except the target charging path, that is, charging path 1 and charging path 2, and the selection of charging path 1 is prioritized over the selection of charging path 2.

[0041] As another example, specifically, when no external device is accessed, the generated control signal can be used to indicate to control switch circuit 1 to close and switch circuit 2 to open. At this time, the charging voltage can be output via a charging loop with charging priority. The charging loop is constructed based on multiple charging paths, that is, the device can be charged according to the charging priority of charging path 1 > charging path 2 > charging path 3.

[0042] Optionally, the overvoltage protection chip used in the charging control circuit, that is, the OVP chip, can include a voltage output pin, an enable pin, a status indication pin, and a mode switching indication pin. Among them, the voltage output pin, that is, the OUT pin, can mainly be used to output voltage; the enable pin, that is, the ENN pin, can mainly be used to enable / disable the chip function of the OVP chip. When the OVP chip is started, the OVP chip can output voltage in the forward or reverse direction, and a low level indicates enabling the chip function; the status indication pin, that is, the RXN pin, can mainly be used to indicate the working state of the OVP chip, and a high level indicates that the OVP chip is in a normal working state; the mode switching indication pin, that is, the FLAGN pin, can mainly be used to indicate a mode selection signal, and a low level indicates switching to the reverse power supply mode.

[0043] In one case, when the enable pin of the overvoltage protection chip, i.e., the ENN pin, is at a low level, the overvoltage protection chip can output a charging voltage forward via the charging circuit. At this time, the status indication pin of the overvoltage protection chip, i.e., the RXN pin, is at a high level; in another case, when the enable pin of the overvoltage protection chip, i.e., the ENN pin, is at a high level, the overvoltage protection chip stops outputting the charging voltage; in still another case, when the enable pin of the overvoltage protection chip is at a low level and the mode switching indication pin of the overvoltage protection chip is at a low level, that is, when the ENN pin and the FLAGN pin are both at a low level, the mode of the target charging path can be switched from the charging mode to the reverse power supply mode. At this time, the overvoltage protection chip can output a power supply voltage reversely via the power supply path to realize reverse power supply for the external device.

[0044] It should be noted that the OVP chip with the FLAGN pin used in the embodiments of the present application has the reverse power supply ability and does not require an additional circuit to supply power to the OTG device.

[0045] In the embodiments of the present application, taking a three-way charging priority control circuit, that is, three charging methods existing simultaneously as an example, multiple charging paths can include a first charging path, a second charging path, and a third charging path. The first charging path refers to the charging path of the first charging method, the second charging path refers to the charging path of the second charging method, and the third charging path refers to the charging path of the third charging method. Assuming that the charging priority is in the order of the first charging method > the second charging method > the third charging method, the charging priority of the first charging path is higher than that of the second charging path, and the charging priority of the second charging path is higher than that of the third charging path.

[0046] In some embodiments of the present application, the construction process of the charging circuit can be manifested as the first enable pin of the first overvoltage protection chip in the first charging path being grounded, and the first status indication pin of the first overvoltage protection chip being connected to the second enable pin of the second overvoltage protection chip in the second charging path; the first status indication pin and the second status indication pin of the second overvoltage protection chip are connected to the third enable pin of the third overvoltage protection chip in the third charging path through an OR gate circuit. Among them, the first status indication pin can transmit a level signal to the OR gate circuit through the conduction of the first switch circuit to realize the construction of the charging circuit based on multiple charging paths.

[0047] Optionally, the third enable pin of the third overvoltage protection chip can be connected to the ground through the conduction of the second switch circuit.

[0048] The access detection pin can control the opening and closing of two switch circuits simultaneously to control the second switch circuit to close and the first switch circuit to open, so that the charging voltage is output via the first charging path or the second charging path, and the power supply voltage is output via the power supply path after the third charging path is switched; or, control the first switch circuit to close and the second switch circuit to open, so that the charging voltage is output via the first charging path, the second charging path and the third charging path.

[0049] Exemplarily, multiple charging methods of a device may include three charging methods: POGO (base), DC (5V), and TYPE-C (5V). Among them, when the POGO base is connected, in addition to the basic charging function, more extended functions can be realized, such as extended hardware control, mechanical linkage function, etc.; in addition to the basic charging function, TYPE-C can also include functions such as power supply for external devices (based on OTG, On-The-Go, an extended USB standard implementation), communication function with the host computer, etc. Among the above three charging methods, the charging priority can be expressed as POGO > DC > TYPE-C.

[0050] Optionally, the signal terminal 1 can be the POGO_IN terminal for detecting the insertion of the POGO insertion signal. The first charging path can refer to the voltage transmission path for charging the device in the POGO mode; the signal terminal 2 can be the DC_IN terminal for detecting the insertion of the DC insertion signal. The second charging path can refer to the voltage transmission path for charging the device in the DC mode; the signal terminal 3 can be the TYPE-C_IN terminal for detecting the insertion of the TYPE-C insertion signal. The third charging path can refer to the voltage transmission path for charging the device in the TYPE-C mode; the access detection pin can be used for OTG insertion detection and feedback the control signal generated by the CPU based on the insertion detection result, thereby realizing the simultaneous control of the first switch circuit and the second switch circuit.

[0051] Exemplarily, as Figure 1 shown, three charging paths respectively use separate overvoltage protection chips, namely the first overvoltage protection chip OVP1, the second overvoltage protection chip OVP2, and the third overvoltage protection chip OVP3. The first switch circuit for conducting or disconnecting the loop connection between the third charging path and the first charging path and the second charging path is the switch circuit 1, and the second switch circuit for switching the third charging path to the power supply path when conducting is the switch circuit 2.

[0052] Optionally, when OTG is not inserted and a three-way power supply is inserted, the CPU will feedback a control level through the externally connected insertion detection pin, disconnect the switch circuit 2, cut off its circuit, close the switch circuit 1, and connect its circuit; when the OTG device is inserted, the CPU will feedback a control level through the externally connected insertion detection pin, close the switch circuit 2, connect its circuit, and at the same time disconnect the switch circuit 1, cut off its circuit.

[0053] As an example, when no external device is connected, the switch circuit 2 is disconnected and the switch circuit 1 is closed. If there is a charging signal input on the third charging path and no charging signal inputs on the second and first charging paths, that is, an insertion signal is detected at the TYPE-C_IN terminal and no insertion signals are detected at the DC_IN terminal and the POGO_IN terminal, it indicates that there is no user charging demand using the DC method or the POGO method and no reverse power supply demand for the OTG device in the current working scenario. At this time, the third enable pin ENN3 is at a low level, and the third overvoltage protection chip OVP3 can output a charging voltage via OUT3 of the third charging path, that is, charge the device using the TYPE-C method.

[0054] As another example, when no external device is connected, the switch circuit 2 is disconnected and the switch circuit 1 is closed. If there is a charging signal input on the second charging path and no charging signal input on the first charging path, that is, an insertion signal is detected at the DC_IN terminal and no insertion signal is detected at the POGO_IN terminal, it indicates that there is a user charging demand using the DC method in the current working scenario. At this time, the second enable pin ENN2 is at a low level, the second status indication pin RXN2 is at a high level, and the third enable pin ENN3 is at a high level. At this time, even if an insertion signal is detected at the TYPE-C_IN terminal, since the third enable pin ENN3 at a high level will prevent the output of OVP3, that is, there is no voltage output at OUT3, the second overvoltage protection chip OVP2 outputs a charging voltage via OUT2 of the second charging path to charge the device using the DC method.

[0055] As another example, when no external device is connected, switch circuit 2 is disconnected and switch circuit 1 is closed. If there is a charging signal input on the first charging path, that is, an insertion signal is detected at the POGO_IN terminal, it indicates that there is a user charging demand using the POGO method in the current working scenario. Since the charging priority of the POGO method is the highest among the three charging methods, in the case of three-way power supply, the output of the second overvoltage protection chip OVP2 and the third overvoltage protection chip OVP3 can be restricted by the first status guiding pin RXN1 of the first overvoltage protection chip OVP1. Specifically, since the first enable pin ENN1 of the first overvoltage protection chip OVP1 is grounded and the first enable pin ENN1 is at a low level, OUT1 will output a voltage at this time, and the first status guiding pin RXN1 will output a high level to pull up the second enable pin ENN2 of the second overvoltage protection chip OVP2 and the third enable pin ENN3 of the third overvoltage protection chip OVP3, making the second enable pin ENN2 and the third enable pin ENNE3 at a high level, preventing the voltage output of the second overvoltage protection chip OVP2 and the third overvoltage protection chip OVP3. The first overvoltage protection chip OVP1 outputs a charging voltage via OUT1 of the first charging path and charges the device using the POGO method, thereby ensuring the highest charging priority of the POGO method.

[0056] Among them, the level of the third enable pin ENN3 can be controlled via an OR gate circuit. Specifically, when no OTG is inserted, switch circuit 1 is closed. At this time, an OR gate circuit can be formed with the first status guiding pin RXN1 and the second status guiding pin RXN2 as inputs and the third enable pin ENN3 as the output. The characteristics of the OR gate circuit can be manifested as when there is one input at a high level, its output is at a high level, and only when all inputs are at a low level, the output of this OR gate circuit is at a low level. That is, in the OR gate circuit formed above, as long as there is one input at a high level in RXN1 or RXN2, the level signal of the OR gate signal output to the third enable pin ENN3 is at a high level.

[0057] Optionally, when switch circuit 2 is disconnected at this time, the level of the second enable pin ENN2 can be made not affected by the third enable pin ENN3.

[0058] As another example, when an external device is connected, i.e., OTG is inserted, it indicates that there is a user demand to supply power to the OTG device in the current working scenario. At this time, switch circuit 1 is disconnected, and switch circuit 2 is closed to connect its circuit, pulling down the level signal of the third enable pin ENN3 and the level signal of the mode switching guide pin FLANG3. Specifically, the third enable pin ENN3 is connected to the ground through the second switch circuit, i.e., switch circuit 2. The mode switching guide pin FLANG3 of the third overvoltage protection chip OVP3 outputs a low level from the access detection pin GPIO of the platform, causing the third enable pin ENN3 and the mode switching guide pin FLANG3 to be at a low level. At this time, the third charging path and the power supply path cannot coexist, and the third charging path is switched to the power supply path. The third overvoltage protection chip OVP3 outputs a supply voltage to the external device according to the power supply path, realizing the reverse power supply of OVP3 to the OTG device. For example, it shows a reverse output of 5V to supply power to the OTG device.

[0059] Optionally, when an external device is connected, the mode switching guide FLANG3 and the third enable pin ENN3 can also be connected to the access detection pin through an anti-reverse circuit. This anti-reverse circuit can be used to cut off the control level of the access detection pin transmitted to the third enable pin ENN3 to prevent the third enable pin ENN3 from being affected by the control level during OTG insertion. Also, when an external device is connected, switch circuit 1 is disconnected to prevent the level of the third enable pin ENN3 from affecting the state of the ENN2 pin of OVP2.

[0060] It should be noted that the process of supplying power to the OTG device is not affected by the charging priority and will not affect the charging priority either. That is, regardless of whether an external device is connected, its charging control follows the charging priority control logic of POGO mode > DC charging mode.

[0061] As an example, when an external device is connected, switch circuit 1 is disconnected at this time. Without discussing the case of using the TYPE-C charging method, if there is a charging signal input on the second charging path and no charging signal input on the first charging path at this time, that is, an insertion signal is detected at the DC_IN terminal and no insertion signal is detected at the POGO_IN terminal, it indicates that there is a user charging demand using the DC method in the current working scenario. At this time, the second enable pin ENN2 is at a low level, the second status guide pin RXN2 is at a high level, and the third enable pin ENN3 is at a high level. At this time, even if an insertion signal is detected at the TYPE-C_IN terminal, since the third enable pin ENN3 at a high level will prevent the output of OVP3, that is, there is no voltage output at OUT3, the second overvoltage protection chip OVP2 outputs a charging voltage through OUT2 of the second charging path to charge the device using the DC method, thus ensuring that the charging priority is not affected when OTG is connected.

[0062] As another example, when an external device is connected, the switch circuit 1 is disconnected at this time. Without discussing the case of using the TYPE-C charging method, if there is a charging signal input on the first charging path at this time, that is, an insertion signal is detected at the POGO_IN terminal. Since the POGO method has the highest charging priority among these three charging methods, regardless of whether an insertion signal is detected at the DC_IN terminal at this time, the first enable pin ENN1 is at a low level, and the first status indication pin RXN1 is at a high level, pulling up the second enable pin ENN2 to a high level. There is no voltage output at OUT2. The first overvoltage protection chip OVP1 outputs a charging voltage via OUT1 of the first charging path, and charges the device using the POGO method, thereby ensuring that the charging priority is not affected in the case of OTG connection.

[0063] To facilitate those skilled in the art to further understand the multi-path charging priority control circuit provided by the embodiments of the present application, the following description is made in conjunction with the circuit schematic diagram:

[0064] Refer to Figure 2 , which shows the circuit schematic diagram of the multi-path charging priority control circuit provided by the embodiments of the present application.

[0065] In the provided circuit schematic diagram, taking the control level output by the TYPE-C_OTG_OUT pin (i.e., the access detection pin) as a low level when OTG is inserted and the control level output by the TYPE-C_OTG_OUT pin (i.e., the access detection pin) as a high level when OTG is not inserted as an example; Q3813 and Q3812 form switch circuit 1, and Q3814 and Q3815 form switch circuit 2; D3814 and D3815 form an OR gate circuit; D3816 forms an anti-reverse circuit.

[0066] It should be noted that the TYPE-C_OTG_OUT pin is the control level output by the platform (i.e., the CPU) to detect whether an OTG device is inserted into the TYPE-C port, such as a high level or a low level; other POGO_OVP_OUT and USB_VBUS_IN are voltage lines when a certain charging device is inserted, which are controlled by the hardware circuit and do not belong to the GPIO ports controlled by software.

[0067] Combined with Figure 2 , in one case, when OTG is inserted, the TYPE-C_OTG_OUT pin (i.e., the access detection pin) outputs a low level, which will pull down the G pole of Q3815 at this time. Q3815 is turned off and Q3814 is turned on, connecting switch circuit 2. The ENN3 pin of U3805 (i.e., OVP3) is pulled down, and the FLAGN3 pin is also in a low level state at this time. Then U3805 (i.e., OVP3) will reverse output 5V to supply power to the OTG device.

[0068] In another case, when the OTG device is inserted, Q3813 is turned off, Q3812 is turned off, and switch circuit 1 is disconnected. At this time, if DC-IN is inserted, the ENN2 pin of U3804 (i.e., OVP2) is pulled low, and DC-IN starts to supply power; if POGO is inserted again, the ENN1 pin of U3806 (i.e., OVP1) is pulled low, and at the same time, the RXN1 pin outputs a high level, pulling up the level signal of the ENN2 pin of U3804 (i.e., OVP2), and the power supply mode automatically switches from the DC-IN power supply mode to the POGO power supply mode; at this time, since Q3812 is in the off state, it will not affect the OTG function.

[0069] Optionally, when OTG is not inserted, the TYPE-C_OTG_OUT pin (i.e., the access detection pin) outputs a high level. At this time, Q3815 is turned on, the G pole of Q3814 is pulled low, and Q3814 is turned off, and switch circuit 2 is disconnected; when OTG is not inserted, the TYPE-C_OTG_OUT pin (i.e., the access detection pin) outputs a high level, Q3813 is turned on, pulling down the G pole of Q3812. If there is a voltage at the S pole of Q3812, a voltage difference is formed between the G pole and the S pole of Q3812, turning on Q3812 and connecting the circuit, that is, closing switch circuit 1.

[0070] In the case where OTG is not inserted, when TYPE-C is inserted, the ENN3 of U3805 (i.e., OVP3) is pulled low, and TYPE-C starts to supply power. At this time, if DC-IN is inserted again, the ENN2 of U3804 (i.e., OVP2) is pulled low, RXN2 is pulled high, and at the same time, the ENN3 of U3805 (i.e., OVP3) is pulled high, and the power supply mode automatically switches from the TYPE-C power supply mode to the DC-IN power supply mode; if POGO is inserted again, the ENN1 of U3806 (i.e., OVP1) is pulled low, RXN1 outputs a high level, pulling up the ENN2 of U3804 (i.e., OVP2), Q3812 is turned on, pulling down the ENN3 of U3805 (i.e., OVP3), and at this time, the power supply mode automatically switches from the DC-IN mode to the POGO mode.

[0071] In the embodiment of the present application, by using an overvoltage protection chip and a switching transistor to build a multi-channel charging priority control circuit and combining the control signals fed back by the access detection pin, that is, based on software control and hardware circuits, the priority control of multiple charging methods is realized, and the charging priority control can be ensured whether an external device is connected or not, meeting the charging requirements in different scenarios. Moreover, only one software GPIO port is required, and the purpose of saving platform resource configuration can be achieved while ensuring the multi-channel charging priority.

[0072] Refer to Figure 3, showing a step flowchart of a multi-channel charging priority control method provided by an embodiment of the present application, which is applied to the multi-channel charging priority control circuit provided by the embodiment of the present application, and may specifically include the following steps:

[0073] Step 301, when it is detected that an external device is connected to the multi-channel charging priority control circuit, generate a first control signal, control the second switch circuit in the multi-channel charging priority control circuit to close according to the first control signal, and the first switch circuit to open, and output a charging voltage according to other charging paths in the charging loop except the target charging path, and / or output a power supply voltage according to the power supply path;

[0074] Step 302, when it is detected that no external device is connected to the multi-channel charging priority control circuit, generate a second control signal, control the first switch circuit to close according to the second control signal, and the second switch circuit to open, and output a charging voltage according to the charging loop.

[0075] In the embodiment of the present application, taking a three-channel charging priority control circuit, that is, three charging methods exist simultaneously as an example, multiple charging paths may include a first charging path, a second charging path, and a third charging path. The first charging path refers to the charging path of the first charging method, the second charging path refers to the charging path of the second charging method, and the third charging path refers to the charging path of the third charging method. Assuming that the charging priority is in the order of the first charging method > the second charging method > the third charging method, the charging priority of the first charging path is higher than that of the second charging path, and the charging priority of the second charging path is higher than that of the third charging path.

[0076] An access detection pin can control the opening and closing of two switch circuits at the same time to control the second switch circuit to close and the first switch circuit to open, so that the charging voltage is output via the first charging path or the second charging path, and the power supply voltage is output via the switched power supply path of the third charging path; or, control the first switch circuit to close and the second switch circuit to open, so that the charging voltage is output via the first charging path, the second charging path, and the third charging path.

[0077] Exemplarily, the multiple charging methods of a certain device may include three charging methods: POGO (base), DC (5V), and TYPE-C (5V). Among them, when the POGO base is connected, in addition to the basic charging function, more extended functions can be realized, such as extended hardware control, mechanical linkage function, etc.; in addition to the basic charging function, TYPE-C can also include functions such as power supply for external devices (based on OTG, On-The-Go, an extended USB standard implementation), communication function with the host computer, etc. Among the above three charging methods, the charging priority can be expressed as POGO > DC > TYPE-C.

[0078] Optionally, the access detection pin can be used for OTG insertion detection and feedback a control signal generated by the CPU based on the insertion detection result, thereby realizing the simultaneous control of the first switch circuit and the second switch circuit.

[0079] Specifically, when OTG is not inserted and three-way power supply is inserted, the CPU will feedback a control level through the external insertion detection pin, disconnect the switch circuit 2, cut off its circuit, close the switch circuit 1, and connect its circuit; when the OTG device is inserted, the CPU will feedback a control level through the external insertion detection pin, close the switch circuit 2, connect its circuit, and at the same time disconnect the switch circuit 1 and cut off its circuit.

[0080] In the embodiments of the present application, the three charging methods of POGO, DC, and TYPE-C can achieve the charging priority through the circuit controlled by OVP and the switching tube and the software control of the GPIO port. When the three are present at the same time, the charging priority order from high to low is POGO, DC, TYPE-C. The TYPE-C port can also insert an OTG device to achieve reverse power supply of the voltage. When an OTG is inserted, that is, when the TYPE-C port functions as an OTG, the charging priorities of POGO and DC remain POGO > DC, and the power supply function of the TYPE-C end to the OTG device cannot be affected.

[0081] It should be noted that the above steps 401 to 402 are parallel solutions and do not limit their execution order.

[0082] In the embodiments of the present application, the control of the charging priority input can be realized, the charging requirements of customers in different scenarios can be met, the charging priority can be flexibly adjusted according to the change of the working scenario, and at the same time, the charging order can be reasonably arranged to maximize the working efficiency of the machine.

[0083] Specifically, referring to Figure 4 , it shows a schematic flow chart of controlling the charging priority of multiple paths provided by the embodiments of the present application. This schematic diagram is specifically a charging switching flow chart when TYPE-C, DC, and POGO are inserted and removed in turn in combination with the multiple-path charging priority control circuit provided by the embodiments of the present application.

[0084] Specifically, during the charging process, first, it can be determined whether an OTG device is inserted into the TYPE-C port. If an OTG device is inserted, at this time, based on the above-mentioned charging control logic for the multi-channel charging priority control circuit, priority can be given to ensuring that the TYPE-C outputs 5V externally to power the OTG device. If no OTG device is inserted, the charging method can be selected according to the charging priority of POGO, DC, and TYPE-C from high to low. For example, when the POGO and TYPE-C charging plugs are inserted during DC-IN charging, the charging will automatically switch from DC charging to POGO charging. After the POGO, DC, and TYPE-C are simultaneously inserted into the device, assuming the POGO charging plug is pulled out, the charging method will automatically switch from the POGO charging method to the DC charging method. Among them, since there are more diverse functions on the POGO base, the charging efficiency of the POGO method and the DC method is higher than that of the TYPE-C method. Setting this priority can optimize the charging efficiency and functions of the device.

[0085] In the embodiments of the present application, by using an overvoltage protection chip and a switching tube to build a multi-channel charging priority control circuit, and combining the control signals fed back by the access detection pin, that is, based on software control and hardware circuits, the priority control of multiple charging methods is realized, and the charging priority control can be ensured whether an external device is connected or not, meeting the charging requirements in different scenarios.

[0086] It should be noted that for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of the present application are not limited by the described action sequence, because according to the embodiments of the present application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present application.

[0087] In some embodiments of the present application, the multi-channel charging priority control circuit provided by the embodiments of the present application can be applied to a machine with multiple charging methods. The machine is not limited, and the voltage is not limited. The machine can be any electronic device with multiple charging methods. As Figure 5 shown, the electronic device 501 generally includes a processor 511 and the multi-channel charging priority control circuit 101 provided by the embodiments of the present application. When the multi-channel charging priority control circuit 101 is executed by the processor 511, it can be used to control and implement each process of the multi-channel charging priority control method embodiment provided by the embodiments of the present application, and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0088] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0089] Those skilled in the art should understand that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the embodiments of the present application can take the form of all-hardware embodiments, all-software embodiments, or embodiments combining software and hardware aspects. Moreover, the embodiments of the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0090] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing terminal devices generate a device for realizing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0091] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device realizes the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0092] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, such that a series of operation steps are executed on the computer or other programmable terminal device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable terminal device provide steps for realizing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0093] Although the preferred embodiments of the embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications that fall within the scope of the embodiments of the present application.

[0094] Finally, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or terminal device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or terminal device comprising the said element.

[0095] The technical solutions provided by the embodiments of the present application have been introduced in detail above. Specific examples are used in the embodiments of the present application to elaborate on the principles and implementation manners of the embodiments of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the embodiments of the present application; at the same time, for those of ordinary skill in the art, according to the idea of the embodiments of the present application, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation on the embodiments of the present application.

Claims

1. A multi-channel charging priority control circuit, characterized in that: The circuit comprises: A plurality of overvoltage protection chips are respectively applied to a plurality of charging paths, and the plurality of charging paths are constructed to obtain a charging circuit with charging priority; A plurality of switch circuits, including a first switch circuit and a second switch circuit, wherein the first switch circuit is used to switch on or off the connection between a target charging path in the charging circuit and the charging circuit, and the second switch circuit switches the target charging path to a power supply path when the second switch circuit is switched on; An access detection pin is used to feedback control signals for the first switch circuit and the second switch circuit generated based on detecting whether an external device is connected; wherein, when an external device is connected, the second switch circuit is closed, the first switch circuit is disconnected, the charging voltage is output via other charging paths in the charging circuit except the target charging path, and the power supply voltage is output via the power supply path; and / or, when the external device is not connected, the first switch circuit is closed, the second switch circuit is disconnected, and the charging voltage is output via the charging circuit.

2. The circuit according to claim 1, characterized in that The overvoltage protection chip includes a voltage output pin, an enable pin, a state indicator pin and a mode switching indicator pin; When the enable pin of the overvoltage protection chip is at a low level, the overvoltage protection chip outputs a charging voltage in a positive direction via the charging circuit, and the state indicator pin of the overvoltage protection chip is at a high level; and / or, when the enable pin of the overvoltage protection chip is at a high level, the overvoltage protection chip cuts off the output charging voltage; And / or, when the enable pin of the overvoltage protection chip is at a low level and the mode switching finger pin of the overvoltage protection chip is at a low level, the overvoltage protection chip reversely outputs the supply voltage via the power supply path.

3. The circuit according to claim 2, characterized in that The multiple charging paths include a first charging path, a second charging path and a third charging path; the charging priority of the first charging path is higher than the charging priority of the second charging path, and the charging priority of the second charging path is higher than the charging priority of the third charging path.

4. The circuit according to claim 3, characterized in that The charging circuit comprises: A first enable pin of a first overvoltage protection chip in the first charging path is grounded, and a first state indicator pin of the first overvoltage protection chip is connected to a second enable pin of a second overvoltage protection chip in the second charging path; The first state finger pin and the second state finger pin of the second overvoltage protection chip are connected to the third enable pin of the third overvoltage protection chip in the third charging path through an OR gate circuit; The first state refers to the pin transmitting a level signal to the OR gate circuit via the conduction of the first switch circuit.

5. The circuit according to claim 4, characterized in that When the external device is not connected, if there is a charging signal input of the third charging path, there is no charging signal input of the second charging path and the first charging path, the third enable pin is at a low level, and the third overvoltage protection chip outputs a charging voltage via the third charging path; And / or, if there is a charging signal input of the second charging path, there is no charging signal input of the first charging path, the second enable pin is at a low level, the second state finger pin is at a high level, the third enable pin is at a high level, and the second overvoltage protection chip outputs a charging voltage via the second charging path; And / or, if there is a charging signal input of the first charging path, the first enable pin is at a low level, the first state indicator pin is at a high level, the second enable pin is at a high level, the level signal output by the OR gate circuit is a high level, the third enable pin is at a high level, and the first overvoltage protection chip outputs a charging voltage via the first charging path.

6. The circuit according to claim 4, characterized in that When the external device is connected, the third enable pin is connected to the ground via the conduction of the second switch circuit, the mode switching finger pin of the third overvoltage protection chip outputs a low level by the access detection pin of the platform, the third enable pin and the mode switching finger pin are at a low level, the third charging path is switched to the power supply path, and the third overvoltage protection chip outputs a power supply voltage to the external device according to the power supply path.

7. The circuit according to claim 6, characterized in that: When the external device is connected, the mode switching finger pin and the third enable pin are connected to the access detection pin via an anti-reverse circuit; the anti-reverse circuit is used to cut off the control level of the access detection pin from being transmitted to the third enable pin.

8. The circuit according to claim 6, characterized in that When the external device is connected, if there is a charging signal input of the second charging path, there is no charging signal input of the first charging path, the second enable pin is at a low level, the second state indicator pin is at a high level, the third enable pin is at a high level, and the second overvoltage protection chip outputs a charging voltage via the second charging path; And / or, if there is a charging signal input of the first charging path, the first enable pin is at a low level, the first state indicator pin is at a high level, the second enable pin is at a high level, and the first overvoltage protection chip outputs a charging voltage via the first charging path.

9. A multi-channel charging priority control method, characterized in that: Applied to the multi-channel charging priority control circuit according to any one of claims 1 to 8, the method comprising: When it is detected that the multi-channel charging priority control circuit is connected to an external device, a first control signal is generated, and the second switch circuit in the multi-channel charging priority control circuit is controlled to be closed according to the first control signal, and the first switch circuit is opened, and a charging voltage is output according to other charging paths in the charging circuit except the target charging path, and / or a power supply voltage is output according to the power supply path; When it is detected that the multi-channel charging priority control circuit is not connected to the external device, a second control signal is generated, and the first switch circuit is controlled to be closed and the second switch circuit is opened according to the second control signal, and the charging voltage is output according to the charging circuit.

10. An electronic device, characterized in that: It comprises a processor and a multi-channel charging priority control circuit as claimed in any one of claims 1 to 8, wherein the processor is used to control the multi-channel charging priority control circuit to implement the multi-channel charging priority control method as claimed in claim 9.

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