Battery charging circuit and system

By designing a battery charging circuit for comparing modules, selecting modules and parallel transistors in the lithium battery charging system, the problem of low charging current accuracy is solved, and a more efficient and safe charging process is achieved.

CN120185165AActive Publication Date: 2025-06-20SUZHOU XYSEMI ELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202510660928.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-22
Publication Date
2025-06-20
Estimated Expiration
2045-05-22

AI Technical Summary

Technical Problem

In the environment of high charger voltage and surge voltage, the charging current has poor accuracy, resulting in low charging efficiency and easy damage to the chip, posing a safety hazard.

Method used

A battery charging circuit is designed, including a comparison module, a selection module, a matching module, an input transistor and an output transistor. By adjusting the target voltage transmitted by the selection module, the mirror current of the input transistor in different charging modes is adjusted to make it work in the saturation region, thereby improving the accuracy of the charging current. At the same time, the output transistor is split into multiple parallel transistors, and the on state is controlled by the selection module, and the current mirror ratio is adjusted to meet the charging current requirements.

Benefits of technology

By improving the accuracy of the charging current and reducing the matching deviation between the mirror current and the charging current, the stability and safety of the charging system are enhanced and the risk of chip damage is avoided.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The embodiment of the invention discloses a battery charging circuit and system, the battery charging circuit comprises at least one comparison module, a first selection module, at least one second selection module, a matching module, an input transistor and an output transistor, and the output transistor comprises a first transistor and at least one second transistor; the first end of the first selection module, the control electrode of the input transistor and the control electrode of the first transistor are connected to a first node, and the second electrode of the input transistor, the first end of the matching module and the second end of the first selection module are connected to a second node. The first selection module is used for transmitting different voltages to the second node according to the control signal output by the comparison module so as to adjust the mirror current of the input transistor in different charging modes; the second transistor is connected in parallel with the first transistor. The second selection module is used for controlling the second transistor to be conducted according to the control signal output by the comparison module. The scheme can improve the precision of the charging current.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of battery charging, and in particular, to a battery charging circuit and system. Background Art

[0002] With the continuous development of electronic technology, mobile devices have been widely popularized. Mobile devices usually use lithium batteries as power supplies. Due to the increasing capacity of current lithium batteries and the emergence of fast charging technology, higher charger voltages are usually adopted. The requirement for charging time is getting shorter and shorter. At the same time, due to the increasingly wide application range of current lithium batteries and the increasingly harsh charging conditions, surge voltages will appear during the plugging and unplugging stages of charging. Sometimes, the surge voltage is too high and will burn out the chip, which is likely to cause safety accidents.

[0003] In order to be compatible with existing high charger voltages and surge voltages, high-voltage-resistant components need to be selected for the charging system, and high-voltage-resistant components are used as charging current mirrors. However, the accuracy of the charging current in the prior art is poor, resulting in the actual charging current not meeting the requirements. Summary of the Invention

[0004] The embodiments of the present invention provide a battery charging circuit and system to improve the accuracy of the charging current.

[0005] According to one aspect of the present invention, a battery charging circuit is provided, including: at least one comparison module, a first selection module, at least one second selection module, a matching module, an input transistor, and an output transistor, wherein the output transistor includes a first transistor and at least one second transistor;

[0006] The comparison module is configured to transmit corresponding control signals to the control end of the first selection module and the control end of the second selection module according to the charging mode of the battery, and the charging mode at least includes a trickle charging mode and a constant current charging mode;

[0007] The first end of the first selection module, the control electrode of the input transistor, and the control electrode of the first transistor are connected to a first node. The first electrode of the input transistor is connected to a charging voltage. The second electrode of the input transistor, the first end of the matching module, and the second end of the first selection module are connected to a second node. The second end of the matching module is grounded. The first selection module is configured to transmit different voltages to the second node according to the control signal output by the comparison module to adjust the mirror current of the input transistor in different charging modes;

[0008] The first pole of the first transistor is connected to the charging voltage, the second pole of the first transistor is connected to the first pole of the battery, the second transistor is connected in parallel with the first transistor, and each second transistor is correspondingly connected to a second selection module, and the second selection module is configured to control whether the second transistor is turned on according to the control signal output by the comparison module.

[0009] Optionally, the aspect ratio of the first transistor is K times the aspect ratio of the input transistor, and the sum of the aspect ratio of the first transistor and the aspect ratio of the at least one second transistor is N times the aspect ratio of the input transistor, where N > K, and both N and K are positive numbers.

[0010] Optionally, K and the voltage Vtrick transmitted to the second node in the trickle charging mode satisfy: ; where V0 is the voltage corresponding to the target charging current in the trickle charging mode.

[0011] Optionally, the second transistor is configured to: turn off in the trickle charging mode; turn on in the constant current charging mode.

[0012] Optionally, the number of the comparison modules is one, the number of the second selection modules is one, and the number of the second transistors is one;

[0013] The first end of the comparison module is connected to a first reference voltage, the second end of the comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third end of the comparison module is respectively connected to the control ends of the first selection module and the second selection module, the first end of the second selection module is connected to the first node, the second end of the second selection module is connected to the charging voltage or the battery voltage, the third end of the second selection module is connected to the control pole of the second transistor, the first pole of the second transistor is connected to the first pole of the first transistor, and the second pole of the second transistor is connected to the first pole of the battery;

[0014] Among them, the comparison module includes a first comparator, the second selection module includes a first selector, the first selection module includes a third selector and an operational amplifier. The first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, and the output terminal of the first comparator is connected to the control terminal of the third selector and the control terminal of the first selector. The first input terminal of the first selector is connected to the first node, the second input terminal of the first selector is connected to the charging voltage or the battery voltage, and the output terminal of the first selector is connected to the control pole of the second transistor. The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

[0015] The number of the comparison modules is one, the number of the second selection modules is one, and the number of the second transistors is one;

[0016] The first end of the comparison module is connected to the first reference voltage, the second end of the comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third end of the comparison module is respectively connected to the control terminal of the first selection module and the control terminal of the second selection module. The first end of the second selection module is connected to the second pole of the second transistor, the second end of the second selection module is connected to the first pole of the battery, the first pole of the second transistor is connected to the first pole of the first transistor, and the control pole of the second transistor is connected to the first node;

[0017] Among them, the comparison module includes a first comparator, the second selection module includes a first inverter and a first auxiliary transistor, the first selection module includes a third selector and an operational amplifier. The first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, and the output terminal of the first comparator is connected to the control terminal of the third selector and the input terminal of the first inverter. The output terminal of the first inverter is connected to the control pole of the first auxiliary transistor. The first pole of the first auxiliary transistor is connected to the second pole of the second transistor, the second pole of the first auxiliary transistor is connected to the first pole of the battery. The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

[0018] Optionally, the number of the comparison modules is two, the number of the second selection modules is two, and the number of the second transistors is two;

[0019] The first end of the first comparison module is connected to a first reference voltage, the second end of the first comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third end of the first comparison module is respectively connected to the first control end of the first selection module and the control end of the first second selection module, the first end of the first second selection module is connected to the first node, the second end of the first second selection module is connected to the charging voltage or the battery voltage, the third end of the first second selection module is connected to the control pole of the first second transistor, the first pole of the first second transistor is connected to the first pole of the first transistor, and the second pole of the first second transistor is connected to the first pole of the battery;

[0020] The first end of the second comparison module is connected to a second reference voltage, the second end of the second comparison module is connected to the first pole of the battery, the third end of the second comparison module is respectively connected to the second control end of the first selection module and the control end of the second second selection module, the first end of the second second selection module is connected to the first node, the second end of the second second selection module is connected to the charging voltage or the battery voltage, the third end of the second second selection module is connected to the control pole of the second second transistor, the first pole of the second second transistor is connected to the first pole of the first transistor, and the second pole of the second second transistor is connected to the first pole of the battery; the first reference voltage is greater than the second reference voltage;

[0021] Wherein, the first comparison module includes a first comparator, the second comparison module includes a second comparator, the first second selection module includes a first selector, the second second selection module includes a second selector, the first selection module includes a third selector and an operational amplifier, the first input end of the first comparator is connected to the first reference voltage, the second input end of the first comparator is connected to the first pole of the battery, the output end of the first comparator is connected to the first control end of the third selector and the control end of the first selector, the first input end of the first selector is connected to the first node, the second input end of the first selector is connected to the charging voltage or the battery voltage, and the output end of the first selector is connected to the control pole of the first second transistor;

[0022] The first input terminal of the second comparator is connected to the second reference voltage, the second input terminal of the second comparator is connected to the first pole of the battery, and the output terminal of the second comparator is connected to the second control terminal of the third selector and the control terminal of the second selector. The first input terminal of the second selector is connected to the first node, the second input terminal of the second selector is connected to the charging voltage or the battery voltage, and the output terminal of the second selector is connected to the control pole of the second transistor of the second one;

[0023] The first input terminal of the third selector is connected to the first voltage, the second input terminal of the third selector is connected to the first target voltage, the third input terminal of the third selector is connected to the second target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

[0024] Optionally, the at least one comparison module includes a first comparison module and a second comparison module, the number of the second selection modules is two, and the number of the second transistors is two;

[0025] The first end of the first comparison module is connected to the first reference voltage, the second end of the first comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third end of the first comparison module is respectively connected to the first control terminal of the first selection module and the control terminal of the first second selection module. The first end of the first second selection module is connected to the second pole of the first second transistor, the second end of the first second selection module is connected to the first pole of the battery, the first pole of the first second transistor is connected to the first pole of the first transistor, and the control pole of the first second transistor is connected to the first node;

[0026] The first end of the second comparison module is connected to the second reference voltage, the second end of the second comparison module is connected to the first pole of the battery, the third end of the second comparison module is respectively connected to the second control terminal of the first selection module and the control terminal of the second second selection module. The first end of the second second selection module is connected to the second pole of the second second transistor, the second end of the second second selection module is connected to the first pole of the battery, the first pole of the second second transistor is connected to the first pole of the first transistor, and the control pole of the second second transistor is connected to the first node; the first reference voltage is greater than the second reference voltage;

[0027] Among them, the first comparison module includes a first comparator, the second comparison module includes a second comparator, the first second selection module includes a first inverter and a first auxiliary transistor, the second second selection module includes a second inverter and a second auxiliary transistor, the first selection module includes a third selector and an operational amplifier. The first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, the output terminal of the first comparator is connected to the first control terminal of the third selector and the input terminal of the first inverter, the output terminal of the first inverter is connected to the control pole of the first auxiliary transistor, the first pole of the first auxiliary transistor is connected to the second pole of the first second transistor, and the second pole of the first auxiliary transistor is connected to the first pole of the battery;

[0028] The first input terminal of the second comparator is connected to the second reference voltage, the second input terminal of the second comparator is connected to the first pole of the battery, the output terminal of the second comparator is connected to the second control terminal of the third selector and the input terminal of the second inverter, the output terminal of the second inverter is connected to the control pole of the second auxiliary transistor, the first pole of the second auxiliary transistor is connected to the second pole of the second second transistor, and the second pole of the second auxiliary transistor is connected to the first pole of the battery;

[0029] The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the third input terminal of the third selector is connected to a second target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

[0030] Optionally, the matching module includes a preset resistor. The first end of the preset resistor is connected to the second node, and the second end of the preset resistor is grounded; the resistance value of the preset resistor is adjustable.

[0031] According to another aspect of the present invention, a battery charging system is provided, including the battery charging circuit provided by any embodiment of the present invention.

[0032] The technical solution provided by the embodiment of the present invention adjusts the target voltage transmitted by the first selection module to the second node, so as to adjust the mirror current flowing through the input transistor in different charging modes, thereby adjusting the working range of the input transistor to the saturation region, reducing the matching deviation between the mirror current and the charging current, and improving the accuracy of the charging current. At the same time, the original output transistor is split into a first transistor and at least one second transistor, and the second selection module controls whether the corresponding second transistor is turned on, so that the size of the output transistor can be adjusted, that is, the mirror ratio of the current can be changed, and then the charging current is limited to a current value that meets the requirements.

[0033] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0035] Figure 1 It is a schematic structural diagram of a battery charging circuit provided by an embodiment of the present invention;

[0036] Figure 2 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0037] Figure 3 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0038] Figure 4 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0039] Figure 5 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0040] Figure 6 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0041] Figure 7 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0042] Figure 8 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention;

[0043] Figure 9 This is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Detailed implementation manners

[0044] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0045] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0046] Figure 1 This is a schematic structural diagram of a battery charging circuit provided by an embodiment of the present invention. Refer to Figure 1, the battery charging circuit provided in this embodiment includes: at least one comparison module 10, a first selection module 20, at least one second selection module 30, a matching module 40, an input transistor Q1, and an output transistor Q2. Among them, the output transistor Q2 includes a first transistor Q2-1 and at least one second transistor Q2-2; the comparison module 10 is configured to transmit corresponding control signals to the control terminals of the first selection module 20 and the second selection module 30 according to the charging mode of the battery U. The charging mode includes a trickle charging mode and a constant current charging mode; the first terminal of the first selection module 20, the control electrode of the input transistor Q1, and the control electrode of the first transistor Q2-1 are connected to the first node N1. The first pole of the input transistor Q1 is connected to the charging voltage VCC (i.e., the voltage of the charger). The second pole of the input transistor Q1, the first terminal of the matching module 40, and the second terminal of the first selection module 20 are connected to the second node N2. The second terminal of the matching module 40 is grounded. The first selection module 20 is configured to transmit different voltages to the second node N2 according to the control signal output by the comparison module 10 to adjust the mirror current of the input transistor Q1 in different charging modes; the first pole of the first transistor Q2-1 is connected to the charging voltage VCC, the second pole of the first transistor Q2-1 is connected to the first pole of the battery U, the second transistor Q2-2 is connected in parallel with the first transistor Q2-1, and each second transistor Q2-2 is correspondingly connected to a second selection module 30. The second selection module 30 is configured to control whether the second transistor Q2-2 is turned on according to the control signal output by the comparison module 10.

[0047] Among them, the charging mode of the battery includes a trickle charging mode, a constant current charging mode, and a constant voltage charging mode (the constant voltage charging mode is not considered in this embodiment). Specifically, different charging modes can be used to charge the battery U by judging the magnitude of the battery voltage. For example, when the battery voltage is less than the reference voltage VREF, it is a trickle charge. The first selection module 20 selects and outputs the first target voltage Vtrick1 according to the control signal output by the comparison module 10 and transmits the first target voltage Vtrick to the second node N2. At this time, the mirror current of the input transistor Q1 is I1, and the charging current output by the output transistor Q2 is , where N is the ratio between the aspect ratio of the output transistor Q2 and the input transistor Q1. When the battery voltage is greater than the reference voltage VREF, it is a constant current charge. The first selection module 20 selects and outputs the first voltage V1 according to the control signal output by the comparison module 10 and transmits the first voltage V1 to the second node N2. At this time, the mirror current of the input transistor Q1 is I2, and the charging current output by the output transistor Q2 is . Taking N = 1000, V1 = 1V, and Vtrick = 0.1V as an example, when the impedance Rp of the matching module 40 is 50KΩ, 10KΩ, and 1KΩ respectively, the mirror current and the charging current are as follows:

[0048] Table 1

[0049]

[0050] Table 2

[0051]

[0052] Among them, Table 1 is the charging current, and Table 2 is the mirror current. According to Table 1 and Table 2, the range of the mirror current is between 2 μA and 1000 μA, and the difference is 500 times. To ensure that the chip can support a maximum charging current of 1 A, the size of the output transistor Q2 cannot be made too small, otherwise the on-resistance of the output transistor Q2 will increase, resulting in problems with the chip's charging ability; at the same time, considering cost factors, the output transistor Q2 cannot be made too large. In the prior art, in order to be compatible with cost and performance, the input transistor Q1 is generally designed in the linear region in the trickle charging mode, and the input transistor Q1 operating in the linear region will increase the matching deviation of the current, thereby reducing the accuracy of the charging current.

[0053] In this embodiment, in the trickle charging mode, by adjusting the voltage transmitted to the second node N2, such as increasing the first target voltage Vtrick1 to increase the mirror current flowing through the input transistor Q1, so that the input transistor Q1 operates in the saturation region. At the same time, the output transistor Q2 is split into a first transistor Q2-1 and at least one second transistor Q2-2, and the second selection module 30 controls whether the corresponding second transistor Q2-2 is turned on, so as to be able to adjust the size of the output transistor Q2, that is, to be able to change the mirror ratio of the current, so that the charging current in the trickle charging mode remains unchanged when the mirror current increases. Of course, in other embodiments, the charging current in the trickle charging mode can also be changed.

[0054] The technical solution provided by the embodiment of the present invention adjusts the target voltage transmitted by the first selection module 20 to the second node N2 to adjust the mirror current flowing through the input transistor Q1 in different charging modes, so as to adjust the working range of the input transistor Q1 to the saturation region, so as to reduce the matching deviation between the mirror current and the charging current, thereby improving the accuracy of the charging current. At the same time, the original output transistor Q2 is split into a first transistor Q2-1 and at least one second transistor Q2-2, and the second selection module 30 controls whether the corresponding second transistor Q2-2 is turned on, so as to be able to adjust the size of the output transistor Q2, that is, to be able to change the mirror ratio of the current, and further limit the charging current to a current value that meets the requirements.

[0055] Optionally, in other embodiments, by adjusting the mirror current flowing through the input transistor Q1, the operating region of the input transistor Q1 can also be adjusted to other operating regions, not limited to the saturation region, as long as it can better match the charging current.

[0056] Optionally, in this embodiment, the aspect ratio of the first transistor Q2-1 is K times that of the input transistor Q1, and the sum of the aspect ratio of the first transistor Q2-1 and the aspect ratio of at least one second transistor Q2-2 is N times that of the input transistor Q1, where N > K, and both N and K are positive numbers. Exemplarily, if the current mirror ratio is 1:1000, then N = 1000, and K is a positive number less than 1000.

[0057] In this embodiment, the second transistor Q2-2 is configured to: turn off in the trickle charging mode; turn on in the constant current charging mode. That is to say, in the trickle charging mode, the aspect ratio of the output transistor Q2 will be adjusted; in the constant current charging mode, the aspect ratio of the output transistor Q2 will not be adjusted and remains the original aspect ratio unchanged.

[0058] Since neither the mirror current nor the charging current is adjusted in the constant current charging mode, in order to be compatible with the designs in the prior art, that is, to obtain the same charging current when using the same matching module 40, it is only necessary to ensure that the charging current in the trickle charging mode remains unchanged. Therefore, K and the voltage Vtrick transmitted to the second node N2 in the trickle charging mode satisfy: ; where Vtrick includes the first target voltage Vtrick1, and V0 is the voltage corresponding to the target charging current in the trickle charging mode. For example, V0 = 0.1V, and Vtrick can be adjusted according to actual requirements. Still taking N = 1000, V1 = 1V, Vtrick = 1V (the voltage transmitted to the second node N2 in the trickle charging mode in the prior art is 0.1V, that is, V0) as an example, where K can be calculated according to the above formula. When the impedance Rp of the matching module 40 is 50KΩ, 10KΩ, and 1KΩ respectively, the mirror current and the charging current are as follows:

[0059] Table III

[0060]

[0061] Table IV

[0062]

[0063] Among them, Table 3 shows the charging current and Table 4 shows the mirror current. According to Table 3 and Table 4, the range of the mirror current is between 20 μA and 1000 μA, and the difference is 50 times. Compared with the solution in the prior art, in the trickle charging mode of the technical solution provided in this embodiment, the minimum mirror current increases by 10 times. Therefore, it can effectively improve the working range of the input transistor Q1. For example, the input transistor Q1 can work in the saturation region.

[0064] In an alternative implementation provided in this embodiment, the number of the comparison modules 10 is one, the number of the second selection modules 30 is one, and the number of the second transistors Q2-2 is one. Figure 2 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Refer to Figure 2 , on the basis of the above embodiment, optionally, the first end of the comparison module 10 is connected to the first reference voltage VREF1, the second end of the comparison module 10 is connected to the first pole of the battery U, the second pole of the battery U is grounded, the third end of the comparison module 10 is respectively connected to the control ends of the first selection module 20 and the second selection module 30, the third end and the fourth end of the first selection module 20 are respectively connected to the first voltage V1 and the first target voltage Vtrick1, the first end of the second selection module 30 is connected to the first node N1, the second end of the second selection module 30 is connected to the charging voltage VCC or the battery voltage U+ (i.e., connected to the first pole of the battery U), the third end of the second selection module 30 is connected to the control pole of the second transistor Q2-2, the first pole of the second transistor Q2-2 is connected to the first pole of the first transistor Q2-1, and the second pole of the second transistor Q2-2 is connected to the first pole of the battery U. Among them, the first pole of the battery U can be the positive pole and the second pole can be the negative pole.

[0065] Figure 3 It is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Specifically, Figure 2 the shown battery charging circuit is refined into a schematic structural diagram of devices. Refer to Figure 2 and Figure 3, the comparison module 10 includes a first comparator OC1, the second selection module 30 includes a first selector SE1, the first selection module 20 includes a third selector SE3 and an operational amplifier OA. The first input terminal of the first comparator OC1 is connected to a first reference voltage VREF1, the second input terminal of the first comparator OC1 is connected to the first pole of the battery U, and the output terminal of the first comparator OC1 is connected to the control terminal of the third selector SE3 and the control terminal of the first selector SE1. The first input terminal of the first selector SE1 is connected to the first node N1, the second input terminal of the first selector SE1 is connected to the charging voltage VCC or the battery voltage U+, and the output terminal of the first selector SE1 is connected to the control pole of the second transistor Q2-2. The first input terminal of the third selector SE3 is connected to a first voltage V1, the second input terminal of the third selector SE3 is connected to a first target voltage Vtrick1, the output terminal of the third selector SE3 is connected to the first input terminal of the operational amplifier OA, the second input terminal of the operational amplifier OA is connected to the second node N2, and the output terminal of the operational amplifier OA is connected to the first node N1.

[0066] The matching module 40 includes a preset resistor R. The first end of the preset resistor R is connected to the second node N2, and the second end of the preset resistor R is grounded. The resistance value of the preset resistor R is adjustable.

[0067] Specifically, when the battery voltage U+ is less than the first reference voltage VREF1 (the first reference voltage VREF1 can be 2.9V), in the trickle charging mode, the first comparator OC1 outputs a low-level control signal, and the first selector SE1 responds to the low-level control signal to control the second transistor Q2-2 to turn off. The third selector SE3 responds to the low-level control signal to transmit the first target voltage Vtrick1 to the first input terminal of the operational amplifier OA. According to the virtual short principle of the operational amplifier, the voltage at the second input terminal of the operational amplifier OA is equal to the voltage at its first input terminal. At this time, the voltage at the second node N2 is the first target voltage Vtrick1. The mirror current flowing through the input transistor Q1 is Vtrick1 / Rp, where Rp is the resistance value of the preset resistor R. Here, the first target voltage Vtrick1 is greater than 0.1V in the prior art to increase the mirror current, so as to control the input transistor Q1 to operate in the saturation region in the trickle charging mode. After being mirrored by the current mirror, the charging current flowing through the first transistor Q2-1 is , by adjusting the value of K, the charging current can be kept consistent with the charging current in the prior art to improve the compatibility of the charging circuit. In this embodiment, since the accuracy of the mirror current is relatively high, the matched charging current also has relatively high accuracy.

[0068] When the battery voltage U+ is greater than or equal to the first reference voltage VREF1, it is in the constant current charging mode. The first comparator OC1 outputs a high-level control signal, and the first selector SE1 responds to the high-level control signal to control the second transistor Q2-2 to conduct. The third selector SE3 responds to the high-level control signal to transmit the first voltage V1 to the first input terminal of the operational amplifier OA. According to the virtual short principle of the operational amplifier, the voltage at the second input terminal of the operational amplifier OA is equal to the voltage at its first input terminal. At this time, the voltage at the second node N2 is the first voltage V1. The mirror current flowing through the input transistor Q1 is V1 / Rp. Here, the first voltage V1 is the same as the voltage in the prior art to ensure that the mirror current remains unchanged in the constant current charging mode. At this time, the mirror current itself is relatively large, so that the input transistor Q1 can be controlled to operate in the saturation region in the constant current charging mode. After being mirrored by the current mirror, the charging current flowing through the first transistor Q2-1 is , ensuring that the charging current remains unchanged in the constant current charging mode.

[0069] The technical solution provided in this embodiment, in the trickle charging mode, controls the second transistor Q2-2 to turn off through the second selection module 30 to reduce the size of the output transistor, thereby reducing the mirror ratio of the current, and increasing the voltage at the second node N2 to increase the mirror current flowing through the input transistor Q1, so that the input transistor Q1 operates in the saturation region, which is beneficial to improving the matching degree between the mirror current and the charging current and improving the accuracy of the charging current. In the constant current charging mode, the original design remains unchanged.

[0070] Figure 4 FIG. is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Different from the Figure 2 shown battery charging circuit structure, in the Figure 4 shown structure, the second selection module 30 is connected in series between the second transistor Q2-2 and the first pole of the battery U. By controlling the on / off of the second selection module 30, the on / off of the path where the second transistor Q2-2 is located can be controlled, so as to select whether to connect the second transistor Q2-2 to the output transistor Q2. Referring to Figure 4 , on the basis of the above embodiments, optionally, the first end of the comparison module 10 is connected to the first reference voltage VREF1, the second end of the comparison module 10 is connected to the first pole of the battery U, the second pole of the battery U is grounded, the third end of the comparison module 10 is respectively connected to the control ends of the first selection module 20 and the second selection module 30, the first end of the second selection module 30 is connected to the second pole of the second transistor Q2-2, the second end of the second selection module 30 is connected to the first pole of the battery U, the first pole of the second transistor Q2-2 is connected to the first pole of the first transistor Q2-1, and the control pole of the second transistor Q2-2 is connected to the first node N1.

[0071] Figure 5 A schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention, specifically Figure 4 The shown battery charging circuit is refined into a schematic structural diagram of devices, refer to Figure 5 and Figure 4 . The comparison module 10 includes a first comparator OC1, the second selection module 30 includes a first inverter INV1 and a first auxiliary transistor Q3, the first selection module 20 includes a third selector SE3 and an operational amplifier OA. The first input terminal of the first comparator OC1 is connected to a first reference voltage VREF1, the second input terminal of the first comparator OC1 is connected to the first pole of the battery U, the output terminal of the first comparator OC1 is connected to the control terminal of the third selector SE3 and the input terminal of the first inverter INV1, the output terminal of the first inverter INV1 is connected to the control electrode of the first auxiliary transistor Q3, the first pole of the first auxiliary transistor Q3 is connected to the second pole of the second transistor Q2-2, the second pole of the first auxiliary transistor Q3 is connected to the first pole of the battery U, the first input terminal of the third selector SE3 is connected to a first voltage V1, the second input terminal of the third selector SE3 is connected to a first target voltage Vtrick1, the output terminal of the third selector SE3 is connected to the first input terminal of the operational amplifier OA, the second input terminal of the operational amplifier OA is connected to the second node N2, and the output terminal of the operational amplifier OA is connected to the first node N1.

[0072] Specifically, when the battery voltage U+ is less than the first reference voltage VREF1, in the trickle charging mode, the first comparator OC1 outputs a low-level control signal, the first inverter INV1 outputs a high-level control signal, and the first auxiliary transistor Q3 turns off in response to the high-level control signal, thereby cutting off the path where the second transistor Q2-2 is located. The third selector SE3 responds to the low-level control signal to transmit the first target voltage Vtrick1 to the first input terminal of the operational amplifier OA, and the voltage of the second node N2 is the first target voltage Vtrick1. The subsequent working process is the same as that of the above embodiment and will not be repeated.

[0073] When the battery voltage U+ is greater than or equal to the first reference voltage VREF1, in the constant current charging mode, the first comparator OC1 outputs a high-level control signal, the first inverter INV1 outputs a low-level control signal, and the first auxiliary transistor Q3 turns on in response to the low-level control signal. The third selector SE3 responds to the high-level control signal to transmit the first voltage V1 to the first input terminal of the operational amplifier OA. According to the virtual short principle of the operational amplifier, the voltage of the second input terminal of the operational amplifier OA is equal to the voltage of its first input terminal. At this time, the voltage of the second node N2 is the first voltage V1. The input transistor Q1, the first transistor Q2-1, and the second transistor Q2-2 are all turned on. The subsequent working process is the same as that of the above embodiment and will not be repeated.

[0074] In another alternative implementation provided in this embodiment, the number of comparison modules 10 is two, the number of second selection modules 30 is two, and the number of second transistors Q-2 is two. Figure 6 FIG. is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Refer to Figure 6 , the first end of the first comparison module 101 is connected to the first reference voltage VREF1, the second end of the first comparison module 101 is connected to the first pole of the battery U, the second pole of the battery U is grounded, and the third end of the first comparison module 101 is respectively connected to the first control end of the first selection module 20 and the control end of the first second selection module 301. The first end of the first second selection module 301 is connected to the first node N1, the second end of the first second selection module 301 is connected to the charging voltage VCC or the battery voltage U+, the third end of the first second selection module 301 is connected to the control pole of the first second transistor Q2-2-1, the first pole of the first second transistor Q2-2-1 is connected to the first pole of the first transistor Q2-1, and the second pole of the first second transistor Q2-2-1 is connected to the first pole of the battery U.

[0075] , the first end of the second comparison module 102 is connected to the second reference voltage VREF2, the second end of the second comparison module 102 is connected to the first pole of the battery U, the third end of the second comparison module 102 is respectively connected to the second control end of the first selection module 20 and the control end of the second second selection module 302. The first end of the second second selection module 302 is connected to the first node N1, the second end of the second second selection module 302 is connected to the charging voltage VCC or the battery voltage U+, the third end of the second second selection module 303 is connected to the control pole of the second second transistor Q2-2-2, the first pole of the second second transistor Q2-2-2 is connected to the first pole of the first transistor Q2-1, and the second pole of the second second transistor Q2-2-2 is connected to the first pole of the battery U.

[0076] Wherein, the first reference voltage VREF1 is greater than the second reference voltage VREF2. For example, the first reference voltage VREF1 is 2.9V, and the second reference voltage VREF2 is 2.4V. By setting multiple reference voltages, the charging current can be made more delicate.

[0077] Figure 7 FIG. is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention, specifically Figure 6 The battery charging circuit shown is refined into a schematic structural diagram of devices. Refer to Figure 6 and Figure 7, the first comparison module 101 includes a first comparator OC1, the second comparison module 102 includes a second comparator OC2, the first second selection module 301 includes a first selector SE1, the second second selection module 302 includes a second selector SE2, the first selection module 20 includes a third selector SE3 and an operational amplifier OA. The first input terminal of the first comparator OC1 is connected to the first reference voltage VREF1, the second input terminal of the first comparator OC1 is connected to the first pole of the battery U, and the output terminal of the first comparator OC1 is connected to the first control terminal of the third selector SE3 and the control terminal of the first selector SE1. The first input terminal of the first selector SE1 is connected to the first node N1, the second input terminal of the first selector SE1 is connected to the charging voltage VCC or the battery voltage U+, and the output terminal of the first selector SE1 is connected to the control pole of the first second transistor Q2-2-1.

[0078] The first input terminal of the second comparator OC2 is connected to the second reference voltage VREF2, the second input terminal of the second comparator OC2 is connected to the first pole of the battery U, and the output terminal of the second comparator OC2 is connected to the second control terminal of the third selector SE3 and the control terminal of the second selector SE2. The first input terminal of the second selector SE2 is connected to the first node N1, the second input terminal of the second selector SE2 is connected to the charging voltage VCC or the battery voltage U+, and the output terminal of the second selector SE2 is connected to the control pole of the second second transistor Q2-2-2; the first input terminal of the third selector SE3 is connected to the first voltage V1, the second input terminal of the third selector SE3 is connected to the first target voltage Vtrick1, the third input terminal of the third selector SE3 is connected to the second target voltage Vtrick2, the output terminal of the third selector SE3 is connected to the first input terminal of the operational amplifier OA, the second input terminal of the operational amplifier OA is connected to the second node N2, and the output terminal of the operational amplifier OA is connected to the first node N1.

[0079] Specifically, when the battery voltage U+ is less than the first reference voltage VREF1 and greater than the second reference voltage VREF2, the first comparator OC1 outputs a low-level control signal, the second comparator OC2 outputs a high-level control signal, the third selector SE3 selects the first target voltage Vtrick1 to output, and the mirror current flowing through the input transistor Q1 is Vtrick1 / Rp. The first selector SE1 controls the first second transistor Q2-2-1 to turn off, the second selector SE2 controls the second second transistor Q2-2-2 to turn on, and the size of the output transistor Q2 is the sum of the sizes of the first transistor Q2-1 and the second second transistor Q2-2-2. After being mirrored by the current mirror, the charging current output by the output transistor Q2 is , where K2 is the ratio of the aspect ratio of the second second transistor Q2-2-2 to the aspect ratio of the input transistor Q1.

[0080] When the battery voltage U+ is less than the second reference voltage, the first comparator OC1 outputs a low-level control signal, the second comparator OC2 outputs a low-level control signal, the third selector SE3 selects the second target voltage Vtrick2 for output, and the mirror current flowing through the input transistor Q1 is Vtrick2 / Rp. The first selector SE1 controls the first second transistor Q2-2-1 to turn off, the second selector SE2 controls the second second transistor Q2-2-2 to turn off, and the size of the output transistor Q2 is the same as that of the first transistor Q2-1. After being mirrored by the current mirror, the charging current output by the output transistor Q2 is .

[0081] When the battery voltage U+ is greater than or equal to the first reference voltage VREF1, the first comparator OC1 outputs a high-level control signal, the second comparator OC2 outputs a high-level control signal, the third selector SE3 selects the first voltage V1 for output, and the mirror current flowing through the input transistor Q1 is V1 / Rp. The first selector SE1 controls the first second transistor Q2-2-1 to conduct, the second selector SE2 controls the second second transistor Q2-2-2 to conduct, and after being mirrored by the current mirror, the charging current output by the output transistor Q2 is , where K1 is the ratio of the aspect ratio of the first second transistor Q2-2-1 to the aspect ratio of the input transistor Q1, K2 is the ratio of the aspect ratio of the second second transistor Q2-2-2 to the aspect ratio of the input transistor Q1, and K + K1 + K2 = N.

[0082] Among them, the first target voltage Vtrick1 is different from the second target voltage Vtrick2, and specifically can be calculated according to . Different mirror currents can be adjusted according to different battery voltages U+ to meet different charging requirements.

[0083] Optionally, the aspect ratios of the first second transistor Q2-2-1 and the second second transistor Q2-2-2 can be the same or different, and can be set according to the actual situation.

[0084] Optionally, in other embodiments, different configurations can also be made to the first selector SE1 and the second selector SE2, so that when the battery voltage U+ is less than the first reference voltage VREF1 and greater than the second reference voltage VREF2, the first second transistor Q2-2-1 is turned off and the second second transistor Q2-2-2 is turned on; when the battery voltage U+ is less than the second reference voltage VREF2, the first second transistor Q2-2-1 is turned on and the second second transistor Q2-2-2 is turned off.

[0085] Figure 8The following is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Different from Figure 6 the structure shown, the connection relationship of the second selection module 30 is different. Refer to Figure 8 . In this embodiment, the third terminal of the first comparison module 101 is respectively connected to the first control terminal of the first selection module 20 and the control terminal of the first second selection module 301. The first terminal of the first second selection module 301 is connected to the second pole of the first second transistor Q2-2-1. The second terminal of the first second selection module 301 is connected to the first pole of the battery U. The first pole of the first second transistor Q2-2-1 is connected to the first pole of the first transistor Q2-1. The control pole of the first second transistor Q2-2-1 is connected to the first node N1. The third terminal of the second comparison module 102 is respectively connected to the second control terminal of the first selection module 20 and the control terminal of the second second selection module 302. The first terminal of the second second selection module 302 is connected to the second pole of the second second transistor Q2-2-2. The second terminal of the second second selection module 302 is connected to the first pole of the battery U. The first pole of the second second transistor Q2-2-2 is connected to the first pole of the first transistor Q2-1. The control pole of the second second transistor Q2-2-2 is connected to the first node N1.

[0086] Figure 9 The following is a schematic structural diagram of another battery charging circuit provided by an embodiment of the present invention. Specifically, Figure 8 the battery charging circuit shown is refined into a schematic diagram of the device structure. Refer to Figure 8 and Figure 9 . The first second selection module 301 includes a first inverter INV1 and a first auxiliary transistor Q3-1. The second second selection module 302 includes a second inverter INV2 and a second auxiliary transistor Q3-2. The output terminal of the first comparator OC1 is connected to the first control terminal of the third selector SE3 and the input terminal of the first inverter INV1. The output terminal of the first inverter INV1 is connected to the control pole of the first auxiliary transistor Q3-1. The first pole of the first auxiliary transistor Q3-1 is connected to the second pole of the first second transistor Q2-2-1. The second pole of the first auxiliary transistor Q3-1 is connected to the first pole of the battery U. The output terminal of the second comparator OC2 is connected to the second control terminal of the third selector SE3 and the input terminal of the second inverter INV2. The output terminal of the second inverter INV2 is connected to the control pole of the second auxiliary transistor Q3-2. The first pole of the second auxiliary transistor Q3-2 is connected to the second pole of the second second transistor Q2-2-2. The second pole of the second auxiliary transistor Q3-2 is connected to the first pole of the battery U. The structures of other modules are the same as those in the above embodiments.

[0087] Specifically, when the battery voltage U+ is less than the first reference voltage VREF1 and greater than the second reference voltage VREF2, the first comparator OC1 outputs a low-level control signal, the second comparator OC2 outputs a high-level control signal, the third selector SE3 selects the first target voltage Vtrick1 for output, and the mirror current flowing through the input transistor Q1 is Vtrick1 / Rp. The first inverter INV1 outputs a high-level control signal, the first auxiliary transistor Q3-1 is turned off, the path of the first second transistor Q2-2-1 is cut off, the second inverter INV2 outputs a low-level control signal, the second auxiliary transistor Q3-2 is turned on, and the path of the second second transistor Q2-2-2 is turned on. After being mirrored by the current mirror, the charging current output by the output transistor Q2 is .

[0088] When the battery voltage U+ is less than the second reference voltage, the first comparator OC1 outputs a low-level control signal, the second comparator OC2 outputs a low-level control signal, the third selector SE3 selects the second target voltage Vtrick2 for output, and the mirror current flowing through the input transistor Q1 is Vtrick2 / Rp. The first inverter INV1 outputs a high-level control signal, the first auxiliary transistor Q3-1 is turned off, the path of the first second transistor Q2-2-1 is cut off, the second inverter INV2 outputs a high-level control signal, the second auxiliary transistor Q3-2 is turned off, and the path of the second second transistor Q2-2-2 is cut off. After being mirrored by the current mirror, the charging current output by the output transistor Q2 is .

[0089] When the battery voltage U+ is greater than or equal to the first reference voltage VREF1, the first comparator OC1 outputs a high-level control signal, the second comparator OC2 outputs a high-level control signal, the third selector SE3 selects the first voltage V1 for output, and the mirror current flowing through the input transistor Q1 is V1 / Rp. The first inverter INV1 outputs a low-level control signal, the first auxiliary transistor Q3-1 is turned on, the path of the first second transistor Q2-2-1 is turned on, the second inverter INV2 outputs a low-level control signal, the second auxiliary transistor Q3-2 is turned on, and the path of the second second transistor Q2-2-2 is turned on. After being mirrored by the current mirror, the charging current output by the output transistor Q2 is .

[0090] It should be noted that in the above embodiments, P-type transistors are taken as examples for each transistor. In other embodiments, each transistor can also be an N-type transistor, or some are P-type transistors and the other part is N-type transistors, and only the corresponding control signals need to be adjusted accordingly.

[0091] Optionally, an embodiment of the present invention further provides a battery charging system, which includes the battery charging circuit provided by any embodiment of the present invention. Therefore, the battery charging system also has the beneficial effects described in any of the above embodiments.

[0092] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added or deleted. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, which is not limited herein.

[0093] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub - combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A battery charging circuit, characterized in that, Comprising: At least one comparison module, a first selection module, at least one second selection module, a matching module, an input transistor, and an output transistor, wherein the output transistor includes a first transistor and at least one second transistor; The comparison module is configured to transmit corresponding control signals to the control terminal of the first selection module and the control terminal of the second selection module according to the charging mode of the battery, and the charging mode at least includes a trickle charging mode and a constant current charging mode; A first terminal of the first selection module, a control electrode of the input transistor, and a control electrode of the first transistor are connected to a first node, a first pole of the input transistor is connected to a charging voltage, a second pole of the input transistor, a first terminal of the matching module, and a second terminal of the first selection module are connected to a second node, a second terminal of the matching module is grounded, and the first selection module is configured to transmit different voltages to the second node according to the control signal output by the comparison module to adjust the mirror current of the input transistor in different charging modes; A first pole of the first transistor is connected to the charging voltage, a second pole of the first transistor is connected to a first pole of the battery, the second transistor is connected in parallel with the first transistor, each second transistor is correspondingly connected to a second selection module, and the second selection module is configured to control whether the second transistor is turned on according to the control signal output by the comparison module.

2. The battery charging circuit according to claim 1, characterized in that, The aspect ratio of the first transistor is K times that of the input transistor, and the sum of the aspect ratio of the first transistor and the aspect ratios of the at least one second transistor is N times that of the input transistor, N > K, and both N and K are positive numbers.

3. The battery charging circuit according to claim 2, characterized in that, K satisfies the following relationship with the voltage Vtrick transmitted to the second node in the trickle charging mode: ; where V0 is the voltage corresponding to the target charging current in the trickle charging mode.

4. The battery charging circuit according to claim 1, characterized in that, The second transistor is configured to: in the trickle charging mode, the second transistor is turned off; in the constant current charging mode, the second transistor is turned on.

5. The battery charging circuit according to claim 1, characterized in that, The number of the comparison modules is one, the number of the second selection modules is one, and the number of the second transistors is one; A first terminal of the comparison module is connected to a first reference voltage, a second terminal of the comparison module is connected to a first pole of the battery, a second pole of the battery is grounded, a third terminal of the comparison module is respectively connected to the control terminal of the first selection module and the control terminal of the second selection module, a first terminal of the second selection module is connected to the first node, a second terminal of the second selection module is connected to the charging voltage or the battery voltage, a third terminal of the second selection module is connected to a control electrode of the second transistor, a first pole of the second transistor is connected to a first pole of the first transistor, and a second pole of the second transistor is connected to a first pole of the battery; Among them, the comparison module includes a first comparator, the second selection module includes a first selector, the first selection module includes a third selector and an operational amplifier. The first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, and the output terminal of the first comparator is connected to the control terminal of the third selector and the control terminal of the first selector. The first input terminal of the first selector is connected to the first node, the second input terminal of the first selector is connected to the charging voltage or the battery voltage, and the output terminal of the first selector is connected to the control pole of the second transistor. The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

6. The battery charging circuit according to claim 1, characterized in that, The number of the comparison modules is one, the number of the second selection modules is one, and the number of the second transistors is one; The first end of the comparison module is connected to the first reference voltage, the second end of the comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third end of the comparison module is respectively connected to the control terminal of the first selection module and the control terminal of the second selection module. The first end of the second selection module is connected to the second pole of the second transistor, the second end of the second selection module is connected to the first pole of the battery, the first pole of the second transistor is connected to the first pole of the first transistor, and the control pole of the second transistor is connected to the first node; Among them, the comparison module includes a first comparator, the second selection module includes a first inverter and a first auxiliary transistor, the first selection module includes a third selector and an operational amplifier. The first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, and the output terminal of the first comparator is connected to the control terminal of the third selector and the input terminal of the first inverter. The output terminal of the first inverter is connected to the control pole of the first auxiliary transistor. The first pole of the first auxiliary transistor is connected to the second pole of the second transistor, the second pole of the first auxiliary transistor is connected to the first pole of the battery. The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

7. The battery charging circuit according to claim 1, characterized in that, The number of the comparison modules is two, the number of the second selection modules is two, and the number of the second transistors is two; The first end of the first comparison module is connected to a first reference voltage, the second end of the first comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third end of the first comparison module is respectively connected to the first control end of the first selection module and the control end of the first second selection module, the first end of the first second selection module is connected to the first node, the second end of the first second selection module is connected to the charging voltage or the battery voltage, the third end of the first second selection module is connected to the control pole of the first second transistor, the first pole of the first second transistor is connected to the first pole of the first transistor, and the second pole of the first second transistor is connected to the first pole of the battery; The first end of the second comparison module is connected to a second reference voltage, the second end of the second comparison module is connected to the first pole of the battery, the third end of the second comparison module is respectively connected to the second control end of the first selection module and the control end of the second second selection module, the first end of the second second selection module is connected to the first node, the second end of the second second selection module is connected to the charging voltage or the battery voltage, the third end of the second second selection module is connected to the control pole of the second second transistor, the first pole of the second second transistor is connected to the first pole of the first transistor, and the second pole of the second second transistor is connected to the first pole of the battery; The first reference voltage is greater than the second reference voltage; Wherein, the first comparison module includes a first comparator, the second comparison module includes a second comparator, the first second selection module includes a first selector, the second second selection module includes a second selector, the first selection module includes a third selector and an operational amplifier, the first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, the output terminal of the first comparator is connected to the first control end of the third selector and the control end of the first selector, the first input terminal of the first selector is connected to the first node, the second input terminal of the first selector is connected to the charging voltage or the battery voltage, and the output terminal of the first selector is connected to the control pole of the first second transistor; The first input terminal of the second comparator is connected to the second reference voltage, the second input terminal of the second comparator is connected to the first pole of the battery, the output terminal of the second comparator is connected to the second control end of the third selector and the control end of the second selector, the first input terminal of the second selector is connected to the first node, the second input terminal of the second selector is connected to the charging voltage or the battery voltage, and the output terminal of the second selector is connected to the control pole of the second second transistor; The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the third input terminal of the third selector is connected to a second target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

8. The battery charging circuit according to claim 1, characterized in that, The at least one comparison module includes a first comparison module and a second comparison module, the number of the second selection modules is two, and the number of the second transistors is two; The first terminal of the first comparison module is connected to a first reference voltage, the second terminal of the first comparison module is connected to the first pole of the battery, the second pole of the battery is grounded, the third terminal of the first comparison module is respectively connected to the first control terminal of the first selection module and the control terminal of the first second selection module, the first terminal of the first second selection module is connected to the second pole of the first second transistor, the second terminal of the first second selection module is connected to the first pole of the battery, the first pole of the first second transistor is connected to the first pole of the first transistor, and the control pole of the first second transistor is connected to the first node; The first terminal of the second comparison module is connected to a second reference voltage, the second terminal of the second comparison module is connected to the first pole of the battery, the third terminal of the second comparison module is respectively connected to the second control terminal of the first selection module and the control terminal of the second second selection module, the first terminal of the second second selection module is connected to the second pole of the second second transistor, the second terminal of the second second selection module is connected to the first pole of the battery, the first pole of the second second transistor is connected to the first pole of the first transistor, and the control pole of the second second transistor is connected to the first node; the first reference voltage is greater than the second reference voltage; Wherein, the first comparison module includes a first comparator, the second comparison module includes a second comparator, the first second selection module includes a first inverter and a first auxiliary transistor, the second second selection module includes a second inverter and a second auxiliary transistor, the first selection module includes a third selector and an operational amplifier, the first input terminal of the first comparator is connected to the first reference voltage, the second input terminal of the first comparator is connected to the first pole of the battery, the output terminal of the first comparator is connected to the first control terminal of the third selector and the input terminal of the first inverter, the output terminal of the first inverter is connected to the control pole of the first auxiliary transistor, the first pole of the first auxiliary transistor is connected to the second pole of the first second transistor, and the second pole of the first auxiliary transistor is connected to the first pole of the battery; The first input terminal of the second comparator is connected to the second reference voltage, the second input terminal of the second comparator is connected to the first pole of the battery, the output terminal of the second comparator is connected to the second control terminal of the third selector and the input terminal of the second inverter, the output terminal of the second inverter is connected to the control pole of the second auxiliary transistor, the first pole of the second auxiliary transistor is connected to the second pole of the second one of the second transistors, and the second pole of the second auxiliary transistor is connected to the first pole of the battery; The first input terminal of the third selector is connected to a first voltage, the second input terminal of the third selector is connected to a first target voltage, the third input terminal of the third selector is connected to a second target voltage, the output terminal of the third selector is connected to the first input terminal of the operational amplifier, the second input terminal of the operational amplifier is connected to the second node, and the output terminal of the operational amplifier is connected to the first node.

9. The battery charging circuit according to any one of claims 1-8, characterized in that, The matching module includes a preset resistor, the first end of the preset resistor is connected to the second node, and the second end of the preset resistor is grounded; The resistance value of the preset resistor is adjustable.

10. A battery charging system, characterized in that, It includes the battery charging circuit according to any one of claims 1-9.

Citation Information

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