Power factor correction circuit switching method for reducing leakage current

Abstract

A power factor correction circuit switching method for reducing a leakage current may include connecting a power factor correction circuit and an AC power source to cause a controller to perform an initial charging operation on an output capacitor so as to first increase an output capacitor voltage, the controller is enabled to secondarily increase the output capacitor voltage in response to whether the first increased output capacitor voltage reaches a first preset reference voltage or not, and to respond to whether the second increased output capacitor voltage reaches a second preset reference voltage or not. The controller is caused to switch a first pole and a second pole disposed in the power factor correction circuit at different duty cycles.

Description

Technical Field

[0001] The present invention relates to a switching technology for a power factor correction circuit. Background Art

[0002] An in-vehicle charger generally includes a power factor correction (PFC) section and an isolated DC / DC section. The transformer in the isolated DC / DC section causes power loss during battery charging, which is a limiting factor for reducing the charging time. In addition, the transformer and electrolytic capacitors occupy a relatively large volume within the in-vehicle charger, which also becomes a drawback in terms of reducing the volume.

[0003] There is a need to develop and install a transformerless, non-isolated in-vehicle charger to increase its commercialization. Generally, these non-isolated in-vehicle chargers can provide the benefits of improved efficiency and reduced volume, but may have a relatively large common-mode leakage current compared to isolated in-vehicle chargers.

[0004] In addition, in a non-isolated in-vehicle charger, since the transformer is removed, there is no electrical isolation between the "PFC and DC / DC primary side" and the "DC / DC secondary side and high-voltage battery". Therefore, the Y-capacitor of the "DC / DC output side and battery" is projected onto the "PFC and DC / DC primary side". That is, the voltage of the Y-capacitor of the "DC / DC output side and HV battery" fluctuates under the influence of the PFC section, thereby causing a common-mode leakage current on the AC input side of the in-vehicle charger.

[0005] On the other hand, an electric vehicle supply equipment (EVSE) or a residual current device (RCD) continuously detects the common-mode leakage current generated by the in-vehicle charger.

[0006] In this case, when a common-mode leakage current higher than a predetermined level is detected, the EVSE or RCD interrupts the power supply to stop the battery charging of an electric vehicle (EV). According to NFPA 70 National Electrical Code (NEC) 208.8, a ground fault circuit interrupter (GFCI) is applied in places such as restrooms and garages. In this case, according to UL943 standard Class A, the leakage current is limited to approximately 5 mA.

[0007] Therefore, reducing the common-mode leakage current is essential for the development and / or application of a non-isolated in-vehicle charger.

[0008] In addition, the bridgeless PFC circuit and its control have been mainly applied to isolated on-vehicle chargers, but may not be suitable for non-isolated onboard chargers (OBCs). Generally, in a bridgeless PFC circuit, the center of the low-speed switching pole is connected to the AC input neutral terminal.

[0009] In addition, the two switches constituting the low-speed switching pole are alternately turned on and off every half cycle of the AC input. Therefore, the voltage of the PFC output and the DC / DC output Y capacitor appears in the form of a square wave that rapidly fluctuates every half cycle of the AC input. This phenomenon also occurs in interleaved bridgeless PFCs. Therefore, due to the rapid change of the Y capacitor voltage every half cycle of the input, a large peak leakage current may be generated.

[0010] In addition, since the voltage of the DC / DC output Y capacitor does not have a constant value, the battery management system (BMS) determines insulation breakdown and stops the charging operation of the EV. Therefore, a non-isolated onboard charger that uses other controls in addition to the bridgeless PFC is required.

[0011] In addition, although the Y capacitor voltage of the inverter PFC does not change sharply, there are low-frequency fluctuations in the AC input frequency. That is, the inverter PFC does not have the peak-shaped leakage current of the bridgeless PFC, but has a low-frequency leakage current.

[0012] The low-frequency leakage current increases as the size of the output Y capacitor increases. When considering a non-isolated PFC, the Y capacitor on the high-voltage battery side is projected, generating a large leakage current. Therefore, a non-isolated onboard charger that configures a new inverter control instead of a typical inverter PFC is required. Summary of the Invention

[0013] The present invention relates to power factor correction circuit switching technology, and more particularly to a power factor correction circuit switching method for reducing common-mode leakage current in a non-isolated onboard charger.

[0014] Embodiments of the present invention can provide a power factor correction (PFC) circuit switching method that can apply inverter control while maintaining the structure of the bridgeless PFC circuit.

[0015] Embodiments of the present invention can provide a power factor correction (PFC) circuit switching method that can improve the common-mode leakage current and leakage interruption problems of a non-isolated onboard charger by applying the inverter PFC circuit control method.

[0016] Embodiments of the present invention can provide a power factor correction (PFC) circuit switching method that can apply inverter control while maintaining a bridgeless PFC circuit structure.

[0017] In an embodiment of the present invention, the PFC circuit switching method may include: connecting the PFC circuit to an alternating current to enable a controller to perform an initial charging operation on an output capacitor, thereby increasing the output capacitor voltage for the first time; enabling the controller to increase the output capacitor voltage a second time according to whether the output capacitor voltage increased for the first time reaches a first preset reference voltage; enabling the controller to switch a first pole and a second pole configured in the PFC circuit with different duty cycles according to whether the output capacitor voltage increased a second time reaches a second preset reference voltage.

[0018] Increasing the output capacitor voltage for the first time may include: increasing the output capacitor voltage by turning on the anti-parallel diodes of the first switch element to the fourth switch element configured on the first pole and the second pole.

[0019] Increasing the output capacitor voltage a second time may include: enabling the controller to confirm whether the output capacitor voltage increased for the first time reaches the first preset reference voltage; as a result of the confirmation, if the output capacitor voltage increased for the first time reaches the first preset reference voltage, enabling the controller to alternately operate all the first switch element to the fourth switch element configured on the first pole and the second pole with a variable duty cycle.

[0020] Switching the first pole and the second pole with different duty cycles may include: enabling the controller to confirm whether the output capacitor voltage increased a second time reaches the second preset reference voltage; as a result of the confirmation, if the output capacitor voltage increased a second time reaches the second preset reference voltage, enabling the controller to alternately operate the first switch element and the second switch element configured on the first pole connected to the AC input live wire terminal with a variable duty cycle.

[0021] Switching the first pole and the second pole with different duty cycles may include: enabling the controller to alternately operate the third switch element and the fourth switch element configured on the second pole connected to the AC input neutral terminal with a fixed preset duty cycle.

[0022] The control command of the first pole may be a 0° to 360° sine wave, and the control command of the second pole may be a constant voltage.

[0023] The pole voltage of the first pole may be a 0° to 360° sine wave, and the pole voltage of the second pole may be a constant voltage.

[0024] The pole voltage of the first pole may be the voltage between a first node on the first pole and a third node on the output terminal of the PFC circuit.

[0025] The pole voltage of the second pole can be the voltage between the second node on the second pole and the third node on the output terminal of the PFC circuit.

[0026] The output capacitor voltage generated for the first time or the output capacitor voltage first generated by the output terminal of the PFC circuit can be the sum of the voltage of the upper Y capacitor arranged at the upper part of the output terminal of the second pole and the voltage of the lower Y capacitor arranged at the lower part of the output terminal of the second pole.

[0027] The leakage current can be a low-frequency common-mode leakage current on the AC input side and can be calculated using a Kirchhoff voltage law (KVL) loop that includes the lower Y capacitor, an inductor connected to the second node formed on the second pole, the second node, the third node representing the center of the output terminal of the PFC circuit, and the lower Y capacitor.

[0028] The PFC circuit can be a bridgeless PFC circuit.

[0029] According to an embodiment of the present invention, the AC input low-frequency component, which is the main frequency component of the common-mode leakage current generated in the inverter power factor correction circuit, can be reduced, thereby reducing the amplitude of the total common-mode leakage current.

[0030] In addition, the embodiments of the present invention can prevent the leakage interruption of the ground fault circuit interrupter (GFCI) and the electric vehicle supply equipment (EVSE), and enable the normal charging operation of the on-board charger (OBC). Furthermore, the embodiments of the present invention can prevent user electric shock accidents that may occur during the charging of an electric vehicle (EV).

[0031] The embodiments of the present invention can achieve the voltage balance of the Y capacitor and improve the problem of misdiagnosis of battery insulation breakdown in the battery management system (BMS).

[0032] The embodiments of the present invention can significantly contribute to the design and development of non-insulated on-board chargers, reduce the volume, improve the efficiency, and enhance the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a block diagram showing the configuration of a power factor correction (PFC) circuit switching device according to an embodiment of the present invention;

[0034] Figure 2 is a circuit diagram showing a PFC circuit having Figure 1 the shown filter according to an embodiment of the present invention;

[0035] Figure 3 is a circuit diagram showing a PFC circuit not having Figure 1 the shown filter according to an embodiment of the present invention;

[0036] Figure 4 is a schematic diagram showing a Kirchhoff voltage law (KVL) loop for calculating the Y-capacitor voltage in accordance with an embodiment of the present invention; Figure 3 in;

[0037] Figure 5A and Figure 5B is a waveform diagram of the pole reference voltage and the individual pole voltage in accordance with an embodiment of the present invention;

[0038] Figure 6 is a waveform diagram of the output voltage of the Y-capacitor in accordance with an embodiment of the present invention;

[0039] Figure 7A is a flowchart showing a process of controlling a PFC circuit in accordance with an embodiment of the present invention;

[0040] Figure 7B is a schematic diagram showing an operating range in accordance with an embodiment of the present invention;

[0041] Figure 8 is a graph showing a leakage current simulation embodiment of a PFC circuit in accordance with an embodiment of the present invention;

[0042] Figure 9 and Figure 10 is a graph showing experimental results in accordance with an embodiment of the present invention. DETAILED DESCRIPTION

[0043] The foregoing features and advantages will be described in further detail with reference to the accompanying drawings of exemplary embodiments, so that the technical idea of the present invention can be easily practiced by those of ordinary skill in the art to which the present invention pertains. When determining that a detailed description of known technology related to the present invention will unnecessarily obscure the gist of the present invention, the detailed description may be omitted in the description of the exemplary embodiments of the present invention.

[0044] Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, and throughout the drawings, the same reference numerals may be used to refer to the same or similar components.

[0045] Figure 1 is a block diagram showing a configuration of a power factor correction (PFC) circuit switching device 100 in accordance with an embodiment of the present invention. Referring to Figure 1 , the PFC circuit switching device 100 may include a charger 120 that receives external alternating current (AC) power 110 and converts the alternating current into direct current (DC) power, a battery 130 charged by the direct current, a PFC circuit 122, and a controller 140 that controls a converter 123.

[0046] The charger 120 may include a filter 121 capable of removing interfering electromagnetic waves from the alternating current V in a PFC circuit 122 capable of converting the alternating current into direct current and correcting power loss during the conversion, and a converter 123 capable of boosting or bucking the direct current.

[0047] The filter 121 can be used to remove interfering electromagnetic waves from the alternating current V in Examples of interfering electromagnetic waves may be electromagnetic interference (EMI). The types of electromagnetic interference may include conducted emissions and radiated emissions.

[0048] The PFC circuit 122 can be used to convert the alternating current from which the interfering electromagnetic waves have been removed into direct current and reduce the power loss during the conversion. In other words, the PFC circuit 122 can have an inverter configuration that performs the function of converting the alternating current into direct current and a configuration for improving the power factor. In other words, the PFC circuit 122 can be an inverter-type PFC.

[0049] The converter 123 can perform the function of boosting or bucking the direct current. The converter 123 can be a DC-DC converter.

[0050] The battery 130 may include battery cells (not shown) configured in series and / or in parallel, and the battery cells may be high-voltage (HV) battery cells for an electric vehicle (EV), such as nickel-metal battery cells, lithium-ion battery cells, lithium polymer battery cells, lithium-sulfur battery cells, sodium-sulfur battery cells, all-solid-state battery cells, etc.

[0051] Generally, a high-voltage battery may refer to a battery that serves as a power source for starting an electric vehicle and has a high voltage of more than 100V. However, the battery is not limited thereto and may also be a low-voltage battery (for example, less than 100V).

[0052] The controller 140 can perform functions such as controlling the PFC circuit 122, the converter 123, etc. Specifically, the controller 140 can perform switching control to control the switching operation of the PFC circuit 122, thereby reducing the common-mode leakage current. The controller 140 may include a microprocessor, a microcomputer, a modulation drive circuit that generates a modulation signal for switching, etc. The modulation signal may be a pulse width modulation (PWM) signal, a pulse frequency modulation (PFM) signal, etc.

[0053] The first output capacitor 101 and the second output capacitor 102 can be Y = Y capacitors respectively connected to the ground GND and the output side of the PFC circuit 122 / converter 123. In this case, a relatively large common-mode leakage current i CM . In one embodiment of the present invention, in order to reduce this relatively large common-mode leakage current i CM, the controller 140 can perform switching control on the PFC circuit 122.

[0054] Figure 2 is a circuit diagram showing a PFC circuit with Figure 1 the filter 121 shown. Refer to Figure 2 , the filter 121 can be connected to the external alternating current 110. In other words, both ends of the filter 121 can be connected to the AC input neutral terminal 201 and the AC input live terminal 202. The PFC circuit 122 can be a bridgeless PFC circuit.

[0055] The first inductor L b1,PFC and the second inductor L b2,PFC can be connected to the output terminal of the filter 121. Current can flow in the first inductor L b1,PFC . The first inductor L b1,PFC can be connected to the first pole 210, and the second inductor L b2,PFC can be connected to the second pole 220. At the first pole 210, the first switching element Q1 and the second switching element Q2 can be connected in series at a predetermined or set interval. At the second pole 220, the third switching element Q3 and the fourth switching element Q4 can be connected in series at a predetermined or set interval. The first pole 210 and the second pole 220 can be configured in parallel.

[0056] The first switching element Q1 to the fourth switching element Q4 can mainly use power metal-oxide-semiconductor field-effect transistors (MOSFETs), but field-effect transistors (FETs), insulated-gate bipolar transistors (IGBTs), etc. can also be used. Voltages V Q1 (t), V Q2 (t), V Q3 (t), and V Q4 (t) can be applied to the capacitors of the first switching element Q1 to the fourth switching element Q4 respectively. The first switching element Q1 to the fourth switching element Q4 can be configured with anti-parallel diodes. By the conduction of these anti-parallel diodes, the output capacitor voltage of the output capacitor 101 can be increased.

[0057] At the output terminal of the second pole 220, the upper Y capacitor C YPFC1 can be configured at the upper part of the output terminal of the second pole 220, the lower Y capacitor C YPFC2 can be configured at the lower part of the output terminal of the second pole 220, and the upper output capacitor C PFC1 and the lower output capacitor C PFC2 can be configured in parallel with the upper Y capacitor C YPFC1 and the lower Y capacitor C YPFC2 . The upper Y capacitor C YPFC1 and the lower Y capacitor CYPFC2 The center can be connected to ground GND. This can cause the common-mode leakage current i CYPFC12 (t) to flow from this center to the AC input side.

[0058] The upper Y-capacitor C YPFC1 and the lower Y-capacitor C YPFC2 can be respectively applied with voltages v CYPFC1 (t) and v CYPFC2 (t). Currents i YPFC1 (t) and i CYPFC2 (t) can respectively flow along the upper Y-capacitor C YPFC1 and the lower Y-capacitor C YPFC2 .

[0059] The upper output capacitor C PFC1 and the lower output capacitor C PFC2 can be polarized capacitors, which can output an output voltage (e.g., 0.5V PFC ).

[0060] Figure 3 is a circuit diagram of the PFC circuit 122 without the filter 121 shown. Referring to Figure 1 , for ease of explanation, the filter 121 can be removed from Figure 3 , and the external alternating current V Figure 2 can be connected to the first pole 210 and the second pole 220 via the first inductor L in (t) and the second inductor L b1,PFC and the second inductor L b2,PFC respectively. The first inductor L b1,PFC can be connected to the first node A of the first pole 210, and the second inductor L b2,PFC can be connected to the second node B of the second pole 220. It can also be assumed that there can virtually exist a third node O, a fourth node P, and a fifth node N representing the center, the upper part, and the lower part respectively at the output end of the bridgeless PFC circuit 122.

[0061] Figure 4 is a schematic diagram showing the Kirchhoff voltage law (KVL) loop for calculating the Y-capacitor voltage in Figure 3 . Referring to Figure 4 , the KVL loop can include the loop of C YPFC2 -L b2,PFC -the second node B - the third node O - C PFC2 . In other words, the KVL loop can be a rectangular loop formed along the arrow and the dashed line. Additionally explained, the KVL loop can calculate the voltage relationship between the corresponding components in the rectangular loop area.

[0062] ①<v Lb2,PFC (t)>TS = 0V

[0063] ② <v CYPFC2 (t)> TS = 0.5V PFC + <v BO (t)> Ts + <v Lb2,PFC (t)> Ts = 0.5V PFC (where v BO (t) is the voltage between the third node O and the second node B)

[0064] ③ <v CYPFC1 (t)> Ts = V PFC - <v CYPFC2 (t)> Ts = 0.5V PFC

[0065] ④ i CM.LowFreq ≈ i CYPFC12 (t) = i CYPFC1 (t) - i CYPFC2 (t) (where i CM.LowFreq is the low-frequency common-mode leakage current on the AC input side)

[0066] ⑤

[0067] In the above formula, the arrow brackets (<> Ts ) mean the averaging symbol, representing the average value of the internal variable. In the following formula, the averaging symbol (<>) is used for simplicity.

[0068] The above equation ① means the average value of v 1b2,PFC (t), which is the voltage of the inductor L in the KVL loop in the rectangular region b2,PFC . Due to the basic property of the inductor element, the average voltage of v Lb2,PFC (t) is 0V

[0069] The above equation ② means the voltage relationship of the rectangular region calculated considering the above ①. Calculate the voltage relationship along the direction of each arrow starting from the left and right sides of the dotted line

[0070] Additionally, it is given that the voltage relationship is equal to the sum of the voltages of the three arrows of 0.5V starting from the fifth node N on the right side and passing through the third node O and the second node B PFC、 v BO (t) and v Lb2.PFC (t)

[0071] The three voltages can be averaged, and the average symbol (<>) can be displayed during the calculation. However, 0.5V PFC can always be a constant value, so there is no need to display the average symbol. Since v BO (t) and v Lb2.PFC (t) can be 0V, so <v CYPFC2 (t)> ultimately equals 0.5V PFC .

[0072] In the case of Equation ③ above, the voltage from the fifth node N to the fourth node P has two 0.5V PFC， So the sum of the two is V PFC . However, the voltage from the fifth node N to the fourth node P also equals the sum of v CYPFC1 (t) and v CYPFC2 (t). Its mathematical expression is: V PFC = <v CYPFC1 (t)> Ts + <v CYPFC2 (t)> Ts .

[0073] In the above expression, move the terms for <v CYPFC2 (t)> Ts , and in the above expression, <v CYPFC2 (t)> Ts is 0.5V PFC , so the mathematical expression shown in Equation ③ above is obtained.

[0074] In the case of Equation ④ above, the low-frequency common-mode leakage current i CM.LowFreq is approximately equal to i CYPFC12 (t). At the same time, according to the direction of the current arrow, the low-frequency common-mode leakage current i CM.LowFreq is i CYPFC1 (t) minus i CYPFC2 (t).

[0075] In the case of Equation ⑤ above, i CYPFC1 (t) and i CYPFC2 (t) are the currents flowing in the first Y capacitor C YPFC1 and the second Y capacitor C YPFC2 , and the current flowing in the capacitor can be calculated according to the basic differential formula of the capacitor i = C(dv / dt). Considering the calculation of the average voltage, while displaying the average symbol ( <x>) In the case of, the low-frequency common-mode leakage current i CM.LowFreq is represented as shown in the above equation ⑤.

[0076] In the case of equation ⑤, the above v CYPFC1 (t) and v CYPFC2 (t) can be constants of 0.5V PFC , so when differential operation is applied, they become zero. Therefore, the low-frequency common-mode leakage current i CM.LowFreq can become 0A.

[0077] Figure 5A and Figure 5B are waveform diagrams of the pole reference voltage and the individual pole voltage according to an embodiment of the present invention. More specifically, Figure 5A is the waveform diagram of the pole reference voltage, Figure 5B is the waveform diagram of the individual pole voltage.

[0078] Referring to Figure 5A , the first pole 210 and the second pole 220 share the same carrier, and the control command V A.ref (t) of the first pole 210 is a sine wave from 0° to 360°, varying between +0.5V PFC and -0.5V PFC . In addition, the control command V A.ref (t) has an amplitude V g (t) from 0V to the trough of the sine wave. The control command V B.ref (t) of the second pole 220 has a constant voltage (e.g., 0V).

[0079] Therefore, the control command V A.ref (t) of the first pole 210 and the control command V B.ref (t) of the second pole 220 can have a phase difference of 90° from each other.

[0080] Referring to Figure 5B , the pole voltage <V AO (t)> Ts of the first pole 210 is a sine wave from 0° to 360°, varying between +0.5V PFC and -0.5V PFC . In addition, the pole voltage <V AO (t)> Ts of the first pole 210 has an amplitude V g(t) from 0V to the trough of the sine wave. The pole voltage <V BO (t)> Ts of the second pole 220 has a constant voltage (e.g., 0V).

[0081] The pole voltage <V AO (t)> of the first pole 210 Ts is the voltage between the first node on the first pole 210 ( Figure 3 A in FIG.) and the third node on the output terminal of the PFC circuit 122 ( Figure 3 O in FIG.), and the pole voltage <V BO (t)> Ts is the voltage between the second node on the second pole 220 ( Figure 3 B in FIG.) and the third node on the output terminal of the PFC circuit 122 (O in FIG.).

[0082] Figure 6 is the waveform diagram of the output voltage of the Y - capacitor according to an embodiment of the present invention. Refer to Figure 6 , which shows the output voltage of the first output capacitor 101 connected to the output terminal of the PFC circuit 122. The output capacitor voltage V PFC is the sum of the voltage v YPFC1 (t) of the upper Y - capacitor C CYPFC1 and the voltage V YPFC2 (t) of the lower Y - capacitor C CYPFC2 . In other words, the voltage v YPFC1 (t) of the upper Y - capacitor C CYPFC1 and the voltage v YPFC2 (t) of the lower Y - capacitor C CYPFC2 are respectively 0.5V PFC . The output capacitor voltage V PFC is the voltage increasing from the fifth node ( Figure 3 N in FIG.) of 0V.

[0083] Figure 7A is the flowchart showing the process of controlling the PFC circuit 122 according to an embodiment of the present invention. Refer to Figure 7A , in operation S710, when the external alternating current 110 is connected to the charger 120, the controller 140 can perform the initial charging operation of the output capacitor 101 to increase the output capacitor voltage for the first time. The output capacitor 101 includes the upper Y - capacitor C YPFC1 and the lower Y - capacitor C YPFC2 . At this time, the first pole 210 and the second pole 220 are not switched. However, the anti - parallel diodes of the first switch element Q1 to the fourth switch element Q4 are turned on, so that the output capacitor voltage increases for the first time. The amplitude of the increased output capacitor voltage can be about 311V.

[0084] Then, in operation S720, the controller 140 can confirm whether the output capacitor voltage increased for the first time reaches the first reference voltage (for example, about 311V).

[0085] In operation S720, as a result of the confirmation, if the output capacitor voltage that has increased for the first time reaches the first reference voltage (e.g., approximately 311 V), then in operation S730, the controller 140 can perform a high-speed switching operation of several tens of kHz on the first pole 210 and the second pole 220 of the PFC circuit 122 to increase the output capacitor voltage a second time. Advantageously, all of the first switching element Q1 to the fourth switching element Q4 arranged on the first pole 210 and the second pole 220 operate alternately with a variable duty cycle.

[0086] Conversely, in operation S720, as a result of the confirmation, if the output capacitor voltage does not reach the first reference voltage (e.g., approximately 311 V), then operations S710 to S720 can be performed again.

[0087] After operation S730, in operation S740, the controller 140 can confirm whether the output capacitor voltage that has increased a second time reaches the second reference voltage (e.g., approximately 750 V).

[0088] In operation S740, as a result of the confirmation, if the output capacitor voltage that has increased a second time reaches the second reference voltage (e.g., approximately 750 V), then in operations S750 and S760, the controller 140 can operate to switch the first pole 210 and the second pole 220 arranged with different duty cycles.

[0089] Additionally, in operation S750, the controller 140 can alternately operate the first switching element Q1 and the second switching element Q2 connected to the AC input live wire terminal 202 with a variable preset duty cycle. That is, in the case of the first pole 210, variable duty cycle control can be employed.

[0090] Furthermore, in operation S760, the controller 140 can alternately operate the third switching element Q3 and the fourth switching element Q4 connected to the AC input neutral terminal 201 with a fixed preset duty cycle. That is to say, for the second pole 220, a control operation with a fixed duty cycle of 0.5 can be applied.

[0091] For illustrative purposes, operations S750 and S760 are separate, but operations S750 and S760 can be performed simultaneously.

[0092] On the other hand, in operation S740, as a result of the confirmation, if the output capacitor voltage that has increased a second time does not reach the second reference voltage, then operations S730 to S740 can be performed again.

[0093] Figure 7B It is a schematic diagram showing the operation intervals according to an embodiment of the present invention. The first operation interval (Interval 1) corresponds to operation S710, the second operation interval (Interval 2) corresponds to operation S730, and the third operation interval (Interval 3) corresponds to operations S750 and S760.

[0094] Figure 8 It is a schematic diagram showing a leakage current simulation embodiment of a PFC circuit according to an embodiment of the present invention. Refer to Figure 8 , from top to bottom, instruction waveforms 810 and 820 representing the instruction voltages of the first pole 210 and the second pole are shown, the input voltage waveform 830 representing the input voltage V in , the inductor current waveform 840 representing the inductor current, the output capacitor voltage V PFC , the voltage across the lower Y capacitor C YPFC2 , the output voltage waveforms 850, 860, and 870 of the voltage across the upper Y capacitor C YPFC1 , and the current waveform 880 representing the leakage current i cm .

[0095] Figure 8 The effective value of the leakage current in rms is about 2.6 mA, indicating that the on-board charger (OBC) is normally performing the charging operation. In addition, Figure 8 the waveform of the leakage current i cm in

[0096] shows that the low-frequency leakage current is significantly reduced and only high-frequency components exist. Figure 8 In the case of

[0097] Table 1

[0098] Parameter Value <![CDATA[Input voltage (V in )]]> <![CDATA[220V ac > <![CDATA[Input voltage frequency (F line )]]> 50Hz <![CDATA[Output voltage (V PFC )]]> <![CDATA[750V DC > <![CDATA[Inductor (L b1,PFC and L b2,PFC )]]> 180 μH <![CDATA[Output capacitors (C PRC1 and C PFC2 )]]> 1.1 mF Switching frequency 50 kHz <![CDATA[Output Y capacitors (C YPFC1 and C YPFC2 )]]> 100 nF

[0099] The low-frequency common-mode leakage current is calculated as follows:

[0100] i CM.LowFreq ≒i CYPFC12 (t) = 0.5 vin.max ω line (C YPFC1 + C YPFC2 ) cos(ω line t) = 0 [A].

[0101] Figure 9 And Figure 10 is a schematic diagram showing the experimental results according to an embodiment of the present invention. Refer to Figure 9 And Figure 10 , the experimental conditions are, for example, that the output Y capacitor is 100 nF.

[0102] Figure 9 is the no-load operation waveform, Figure 10 is the 3.3 kW operation waveform. In Figure 9 the leakage current i CM there is no low-frequency component. In Figure 10 the case of, although the high-frequency component of the leakage current i CM increases as the load increases, but with the application of the switching technique according to the embodiments of the present invention, the low-frequency reduction performance can be fully confirmed.

[0103] In addition, the steps of the methods or algorithms described in connection with the exemplary embodiments disclosed herein may be implemented in the form of program instructions, which may be executed by various computer implementation means (such as microprocessors, processors, central processing units (CPUs), etc.), and read from / recorded on a computer-readable medium. The computer-readable medium may include program (instruction) codes, data files, data structures, etc. alone or in combination.< / x>

Claims

1. A power factor correction circuit switching method for reducing leakage current, comprising: Connecting the power factor correction circuit and AC power so that the controller performs an initial charging operation on the output capacitor, thereby increasing the output capacitor voltage for the first time; The controller increases the output capacitor voltage for a second time according to whether the output capacitor voltage increased for the first time reaches the first preset reference voltage; The controller switches the first pole and the second pole configured in the power factor correction circuit at different duty ratios according to whether the secondarily increased output capacitor voltage reaches a second preset reference voltage.

2. The power factor correction circuit switching method for reducing leakage current according to claim 1, wherein: The output capacitor voltage is increased by turning on the anti-parallel diodes of the first to fourth switching elements arranged at the first and second electrodes to increase the output capacitor voltage, thereby increasing the output capacitor voltage for the first time.

3. The power factor correction circuit switching method for reducing leakage current according to claim 2, wherein: The output capacitor voltage is increased secondarily by: The controller determines whether the output capacitor voltage increased for the first time reaches a first preset reference voltage; As a result of the confirmation, if the output capacitor voltage increased for the first time reaches the first preset reference voltage, the controller is caused to alternately operate all of the first to fourth switching elements configured at the first and second poles at a variable duty ratio.

4. The power factor correction circuit switching method for reducing leakage current according to claim 3, wherein: The controller switches the first pole and the second pole at different duty cycles including: enabling the controller to confirm whether the second increased output capacitor voltage reaches a second preset reference voltage; As a result of the confirmation, if the secondarily increased output capacitor voltage reaches the second preset reference voltage, the controller is caused to alternately operate the first switching element and the second switching element configured at the first pole connected to the AC input live terminal at a variable duty ratio.

5. The power factor correction circuit switching method for reducing leakage current according to claim 4, wherein: Switching the first pole and the second pole at different duty ratios includes: causing the controller to alternately operate a third switching element and a fourth switching element connected to the neutral terminal of the AC input and configured on the second pole at a fixed preset duty ratio.

6. The power factor correction circuit switching method for reducing leakage current according to claim 1, wherein: The first control instruction of the first pole is a 0° to 360° sine wave, and the second control instruction of the second pole is a constant voltage.

7. The power factor correction circuit switching method for reducing leakage current according to claim 1, wherein: The first pole voltage of the first pole is a sine wave of 0° to 360°, and the second pole voltage of the second pole is a constant voltage.

8. The power factor correction circuit switching method for reducing leakage current according to claim 7, wherein: The first pole voltage of the first pole is a voltage between a first node on the first pole and a third node on the output end of the power factor correction circuit.

9. The power factor correction circuit switching method for reducing leakage current according to claim 7, wherein: The second pole voltage of the second pole is a voltage between a second node on the second pole and a third node on the output end of the power factor correction circuit.

10. The power factor correction circuit switching method for reducing leakage current according to claim 1, wherein: The output capacitor voltage generated for the first time or the output capacitor voltage generated for the first time by the output end of the power factor correction circuit is the sum of the voltage of the upper Y capacitor configured at the upper part of the output end of the second pole and the voltage of the lower Y capacitor configured at the lower part of the output end of the second pole.

11. The power factor correction circuit switching method for reducing leakage current according to claim 10, wherein: The leakage current is a low frequency common mode leakage current on the AC input side and is calculated using a Kirchhoff voltage law loop including a lower Y capacitor, an inductor connected to a second node formed on a second pole, a second node, a third node representing the center of the output end of the power factor correction circuit, and a lower Y capacitor.

12. The power factor correction circuit switching method for reducing leakage current according to claim 1, wherein: The power factor correction circuit is a bridgeless power factor correction circuit.

13. A power factor correction circuit switching method for reducing leakage current, comprising: After an AC power source is connected to a power factor correction circuit switching device including a charger and a controller, an initial charging operation is performed by the controller on an output capacitor of the charger to increase the output capacitor voltage for the first time by turning on anti-parallel diodes of first to fourth switching elements in the charger; The controller confirms whether the output capacitor voltage of the charger that is increased for the first time exceeds the first reference voltage; In response to the output capacitor voltage increased for the first time exceeding the first reference voltage, the controller performs a high-speed switching operation of tens of kHz on the first pole and the second pole of the charger to increase the output capacitor voltage of the output capacitor of the charger for the second time; The controller determines whether the secondarily increased output capacitor voltage of the charger exceeds a second reference voltage; In response to the second increased output capacitor voltage exceeding the second reference voltage, the first pole and the second pole of the charger are switched by the controller at different duty cycles.

14. The power factor correction circuit switching method for reducing leakage current according to claim 13, wherein: Switching the first and second poles of the charger at different duty cycles includes: Alternatingly operating a first switching element and a second switching element connected to an AC input live terminal of an AC power source at a variable duty cycle; The third switching element and the fourth switching element connected to the AC input neutral terminal of the AC power source are alternately operated at a fixed duty ratio.

15. The power factor correction circuit switching method for reducing leakage current according to claim 13, wherein: The output capacitor includes an upper Y capacitor and a lower Y capacitor.

16. A system for charging a battery of a vehicle, for reducing leakage current, the system comprising: a charger configured to be connected between an AC power source and a battery of a vehicle; as well as A controller connected to the charger, wherein the controller is configured to control charging of the battery from the AC power source through the charger, and is configured to: Perform an initial charging operation on the charger's output capacitor to increase the charger's output capacitor voltage for the first time, In response to the first increased output capacitor voltage reaching the first preset reference voltage, the output capacitor voltage of the charger is increased secondarily with a variable duty cycle, In response to the second increased output capacitor voltage reaching a second preset reference voltage, a first pole and a second pole in a power factor correction circuit of the charger are switched at different duty ratios.

17. The system for charging a battery of a vehicle according to claim 16, wherein: Increasing the output capacitor voltage for the first time includes: turning on the anti-parallel diodes of the first switching element to the fourth switching element configured at the first and second electrodes of the charger to increase the output capacitor voltage, Secondarily increasing the output capacitor voltage includes alternately operating all of the first to fourth switching elements configured at the first and second poles at a variable duty ratio.

18. The system for charging a battery of a vehicle according to claim 17, wherein: Switching the first pole and the second pole at different duty cycles includes: Alternatingly operating a first switching element and a second switching element configured at a first pole with a variable duty cycle; The third switching element and the fourth switching element arranged at the second electrode are alternately operated at a fixed duty ratio.

19. The system for charging a battery of a vehicle according to claim 16, wherein: The output capacitor voltage generated first or the output capacitor voltage generated first by the output terminal of the power factor correction circuit is the sum of the upper Y capacitor voltage of the upper Y capacitor configured at the upper part of the output terminal of the second pole and the lower Y capacitor voltage of the lower Y capacitor configured at the lower part of the output terminal of the second pole, The leakage current is a low frequency common mode leakage current on the AC input side and is calculated using a Kirchhoff voltage law loop including a lower Y capacitor, an inductor connected to a second node formed on a second pole, a second node, a third node representing the center of the output end of the power factor correction circuit, and a lower Y capacitor.

20. The system for charging a battery of a vehicle according to claim 16, wherein: The power factor correction circuit is a bridgeless power factor correction circuit.

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