Voltage doubling rectifying circuit and isolation relay chip

Abstract

The invention provides a voltage-multiplying rectifying circuit and an isolation relay chip, which are applied to the technical field of voltage-multiplying rectification, and are provided with a Schottky diode assembly and a capacitor assembly, and when alternating current flows through the voltage-multiplying rectifying circuit, the Schottky diode assembly is connected with the capacitor assembly. And the capacitor assembly is charged and discharged to output a direct current level by utilizing one-way conduction and alternating current rectification of the Schottky diode assembly. Compared with a traditional rectification booster circuit, the structure uses a small number of devices, high VGS driving voltage can be achieved, voltage doubling rectification is achieved only through the Schottky diode assembly and the capacitor assembly, part of devices of the rectification circuit and the booster circuit are saved, and the chip area and power consumption are saved.

Description

Technical Field

[0001] The present application relates to the technical field of voltage-doubling rectifier circuits, and particularly relates to a voltage-doubling rectifier circuit and an isolation relay chip. Background Art

[0002] There is a rectifier boost circuit in the related art. This circuit can be divided into two parts: a rectifier circuit and a boost circuit. After the current on the coil flows through the secondary rectifier circuit, a fixed level will be generated. This level can be used as the power supply for the entire secondary circuit. At the same time, the oscillation signal on the coil, after passing through three inverters, serves as the clock signal for the secondary boost circuit. The high voltage generated by the boost circuit is used to drive the gate of the MOS transistor (Metal Oxide Semiconductor Field Effect Transistor), so that the MOS transistor conducts. Due to the losses of the actual charge pump boost circuit, multiple boost modules are required to generate enough VGS voltage (Gate-Source Voltage) to drive the MOS, which will greatly increase the area and power consumption of the chip.

[0003] Based on this, a new technical solution is needed. Summary of the Invention

[0004] In view of this, the present application provides a voltage-doubling rectifier circuit and an isolation relay chip.

[0005] The present application provides the following technical solutions:

[0006] A voltage-doubling rectifier circuit according to the present application has a Schottky diode component and a capacitor component, and when an alternating current flows through the voltage-doubling rectifier circuit, it uses the unidirectional conduction of the Schottky diode component and the charging and discharging of the capacitor component after rectifying the alternating current to output a DC level.

[0007] Preferably, the Schottky diode component includes a first Schottky diode and a second Schottky diode; the capacitor component includes a first capacitor and a second capacitor;

[0008] The primary coil generates an alternating current in the secondary coil through electromagnetic induction;

[0009] The first port of the secondary coil is connected to the negative electrode of the first Schottky diode and the positive electrode of the second Schottky diode; the positive electrode of the first Schottky diode is connected to the upper plate of the first capacitor and the source electrode of the power field effect transistor; the negative electrode of the second Schottky diode is connected to the upper plate of the second capacitor; the second port of the secondary coil is connected to the lower plate of the first capacitor and the lower plate of the second capacitor.

[0010] Preferably, the voltage-doubling rectification circuit further includes a first resistor and a second resistor; the positive electrode of the first Schottky diode is further connected to one end of the second resistor; the negative electrode of the second Schottky diode is further connected to one end of the first resistor; the second port of the secondary coil is further connected to the other ends of the first resistor and the second resistor; the voltage-doubling rectification circuit further includes a third capacitor, the positive electrode of the first Schottky diode is further connected to the lower plate of the third capacitor, and the negative electrode of the second Schottky diode is further connected to the upper plate of the third capacitor.

[0011] Preferably, the voltage-doubling rectification circuit further includes a first electrostatic discharge protection device; the negative electrode of the first Schottky diode is further connected to one end of the first electrostatic discharge protection device; the negative electrode of the second Schottky diode is further connected to the other end of the first electrostatic discharge protection device, so that the first electrostatic discharge protection device prevents the devices on the path from being broken down by the instantaneous electrostatic discharge voltage generated by the interference of the primary and secondary coils.

[0012] and / or,

[0013] The voltage-doubling rectification circuit further includes a second electrostatic discharge protection device; one end of the second electrostatic discharge protection device is connected to the gate of the power field effect transistor, and the other end of the second electrostatic discharge protection device is connected to the source of the power field effect transistor, so that the voltage energy of the gate of the power field effect transistor is released to the source of the power field effect transistor through the second electrostatic discharge protection device for gate-source voltage protection of the power field effect transistor.

[0014] Preferably, the secondary coil is used to conduct a sine wave with a peak voltage of the positive and negative power supply voltages; when the first port of the secondary coil is positive and the second port of the secondary coil is negative, the second Schottky diode conducts, the first Schottky diode cuts off, and the second capacitor is charged through the second Schottky diode. After charging, the voltage of the negative electrode of the second Schottky diode relative to the lower plate of the first capacitor is positive.

[0015] When the first port of the secondary coil is negative and the second port of the secondary coil is positive, the second Schottky diode cuts off, the first Schottky diode conducts, and the first capacitor is charged through the first Schottky diode. After charging, the voltage of the negative electrode of the second Schottky diode relative to the upper plate of the first capacitor is positive.

[0016] Preferably, on different paths, by arranging capacitors and resistors of different sizes, and using the different charge release speeds and release times at different nodes on different paths, the turning on or off of the power field effect transistor is controlled.

[0017] Preferably, the voltage-doubling rectification circuit further includes a third Schottky diode, a third resistor, a fourth resistor, a constant current diode, a fourth capacitor, a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, a fourth field-effect transistor, a fifth resistor, a sixth resistor, and a seventh resistor;

[0018] The positive electrode of the third Schottky diode is connected to the positive electrode of the second Schottky diode; the negative electrode of the third Schottky diode is connected to one end of the third resistor, and the other end of the third resistor is connected to one end of the fourth resistor, the negative electrode of the constant current diode, the upper plate of the fourth capacitor, and the gate of the first field-effect transistor; the other end of the fourth resistor is connected to one end of the second resistor, the positive electrode of the constant current diode, the lower plate of the fourth capacitor, the source of the first field-effect transistor, the source of the fourth field-effect transistor, the source of the second field-effect transistor, and the source of the power field-effect transistor;

[0019] One end of the fifth resistor is connected to the negative electrode of the second Schottky diode and one end of the sixth resistor; the other end of the fifth resistor is connected to the drain of the first field-effect transistor, the gate of the third field-effect transistor, the drain of the third field-effect transistor, and the gate of the second field-effect transistor; the drain of the third field-effect transistor is connected to the gate and drain of the fourth field-effect transistor;

[0020] The other end of the sixth resistor is connected to one end of the seventh resistor and the gate of the power field-effect transistor; the other end of the seventh resistor is connected to the drain of the second field-effect transistor;

[0021] When the voltage-doubling rectification circuit works, the gate voltage of the first field-effect transistor exceeds the threshold voltage, and the first field-effect transistor is in the on state. The gate voltage of the first field-effect transistor is the source voltage of the power field-effect transistor, and the second field-effect transistor is in the off state. The voltage between the gate and source of the power field-effect transistor is the voltage output by the voltage-doubling rectification circuit, and the power field-effect transistor conducts to realize the switch path; when there is no alternating current in the voltage-doubling rectification circuit, the first field-effect transistor turns off, and the second field-effect transistor turns on, pulling the gate and source of the power field-effect transistor to the same potential to realize the switch open circuit.

[0022] According to the present application, there is also provided an isolation relay chip, which includes a primary chip, a secondary chip, a primary and secondary coil, and a power field-effect transistor. The secondary chip applies the voltage-doubling rectification circuit described in any one of the above, and the primary coil and the secondary coil form the primary and secondary coil; the isolation relay chip uses the energy transmitted by the primary chip through the primary and secondary coil to supply power, and rectifies and boosts at the secondary chip to turn on or off the power field-effect transistor.

[0023] Preferably, the primary chip, the primary and secondary coil, the secondary chip, and the power field-effect transistor are encapsulated in the same package;

[0024] The primary and secondary coils are arranged on a substrate, and the primary and secondary coils are connected to the primary chip and the secondary chip through encapsulation wire bonding. The output of the secondary chip is connected to the power field effect transistor.

[0025] Preferably, the primary chip includes a linear voltage regulator and a transmitting circuit with a cross-coupled oscillator; the first input pin of the chip is connected to the linear voltage regulator, the linear voltage regulator is connected to the transmitting circuit, and the second input pin of the chip is respectively connected to the linear voltage regulator and the transmitting circuit, so that when the input current is higher than a preset value, the voltage signal is input into the isolation relay chip through the first input pin and the second input pin of the chip, and after passing through the linear voltage regulator, a stable power supply voltage is provided; the cross-coupled oscillator inside the transmitting circuit generates an electrical signal on the primary coil, the secondary coil generates an alternating current through electromagnetic induction, and the alternating current generates a driving high voltage through the secondary chip to drive the power field effect transistor to conduct; when the input current is lower than the preset value, the linear voltage regulator is turned off, the cross-coupled oscillator stops working, there is no voltage signal on the secondary coil, and the power field effect transistor is turned off for isolation switching.

[0026] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above technical solutions adopted in this application at least include:

[0027] Compared with the traditional rectifier boost circuit, this architecture uses a small number of devices, can achieve a relatively high VGS driving voltage, and realizes voltage doubling rectification only by using Schottky diode components and capacitor components, saving some devices of the rectifier circuit and the boost circuit, and saving chip area and power consumption. Description of the Drawings

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained according to these drawings without creative efforts.

[0029] Figure 1 Shows a schematic diagram of the traditional rectifier boost circuit architecture;

[0030] Figure 2 Shows the complete chip architecture diagram of the MOS relay based on magnetic isolation of the present application;

[0031] Figure 3 Shows the circuit architecture diagram of the low-cost rectifier boost circuit with VGS protection in the present application. Detailed Embodiments

[0032] The embodiments of the present application will be described in detail below with reference to the drawings.

[0033] The following describes the embodiments of the present application through specific specific examples. Those skilled in the art can easily understand the other advantages and effects of the present application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts belong to the scope of protection of the present application.

[0034] It should be noted that the following describes various aspects of the embodiments within the scope of the appended claims. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is illustrative only. Based on the present application, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspects described herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using other structures and / or functionality in addition to one or more of the aspects described herein.

[0035] It should also be noted that the diagrams provided in the following embodiments only illustrate the basic concept of the present application schematically. The diagrams only show the components related to the present application and are not drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in its actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0036] In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the examples can be practiced without these specific details.

[0037] In view of this, the applicant has conducted in-depth research and improvement exploration on the rectifier boost circuit and found that: as Figure 1The shown traditional rectifier-booster circuit structure: 1 and 2 are connected to both ends of the inductance coil. The AC voltage on the inductance coil passes through diodes 3, 4, 5, and 6, generating a constant high level at port 23 relative to port 22 for use by other circuits on the secondary side. 8, 9, 10, and 11 are inverters, which can shape the sine wave signal from the coil into a square wave signal. The outputs of inverter 10 and inverter 11 are two inverted square wave signals, serving as the two clock signals for the subsequent charge pump boost circuit. In particular, the power supply voltage of the inverter is from port 23. 12 to 21 is the charge pump boost circuit. The input signal 23 is the output of the previous rectifier circuit. After being amplified by four-stage charge pumps, a relatively high VGS voltage is finally output to drive the MOS transistor to conduct or turn off. That is, this voltage-doubling rectifier circuit rectifies a stable level, approximately 3V, at node 23. At the same time, the sine wave signal between nodes 5 and 6 passes through inverters 8, 9, and 10 to form a square wave signal as the clock, and then passes through 11 to form a clock with a 180° phase difference from the output of inverter 10. These clock signals and the stable level enter the boost circuit simultaneously, and finally a stable high level is output at node 21 to drive the power transistor.

[0038] The following combines the accompanying drawings to illustrate the technical solutions provided by the embodiments of the present application.

[0039] Based on this, an embodiment of this specification proposes a voltage-doubling rectifier circuit with a gate voltage protection function, as Figure 3 shown, which has a Schottky diode component and a capacitor component. When an alternating current flows through this voltage-doubling rectifier circuit, the unidirectional conductivity of the Schottky diode component and the charging and discharging of the capacitor component after alternating current rectification are utilized to output a DC level. When an alternating current appears on the primary coil, due to electromagnetic induction, an alternating current also appears on the secondary coil. The alternating current flows through the voltage-doubling rectifier circuit, and by utilizing the unidirectional conductivity of the Schottky diode and the principle of charging and discharging the capacitor after rectifying the positive and negative half-cycles of the alternating current, a DC level is output.

[0040] In one embodiment, as Figure 3 shown, the Schottky diode component includes a first Schottky diode and a second Schottky diode; the capacitor component includes a first capacitor and a second capacitor; the primary coil generates an alternating current in the secondary coil through electromagnetic induction; the first port of the secondary coil is connected to the negative electrode of the first Schottky diode and the positive electrode of the second Schottky diode; the positive electrode of the first Schottky diode is connected to the upper plate of the first capacitor and the source electrode of the power field effect transistor; the negative electrode of the second Schottky diode is connected to the upper plate of the second capacitor; the second port of the secondary coil is connected to the lower plate of the first capacitor and the lower plate of the second capacitor.

[0041] The voltage-doubling rectification circuit further includes a first resistor and a second resistor; the positive electrode of the first Schottky diode is further connected to one end of the second resistor; the negative electrode of the second Schottky diode is further connected to one end of the first resistor; the second port of the secondary coil is further connected to the other end of the first resistor and the other end of the second resistor; the voltage-doubling rectification circuit further includes a third capacitor, the positive electrode of the first Schottky diode is further connected to the lower plate of the third capacitor, and the negative electrode of the second Schottky diode is further connected to the upper plate of the third capacitor. In this application, on different paths, by arranging different capacitor sizes and different resistor values on the paths, the different charge release speeds at different nodes on different paths are realized when the chip is turned off.

[0042] In one embodiment, the voltage-doubling rectification circuit further includes a first electrostatic discharge protection device; the negative electrode of the first Schottky diode is further connected to one end of the first electrostatic discharge protection device; the negative electrode of the second Schottky diode is further connected to the other end of the first electrostatic discharge protection device, so that the first electrostatic discharge protection device prevents the instantaneous electrostatic discharge voltage generated by the interference of the primary and secondary coils from breaking down the devices on the path.

[0043] And / or, the voltage-doubling rectification circuit further includes a second electrostatic discharge protection device; one end of the second electrostatic discharge protection device is connected to the gate of the power field effect transistor, and the other end of the second electrostatic discharge protection device is connected to the source of the power field effect transistor, so that the voltage energy of the gate of the power field effect transistor is released to the source of the power field effect transistor through the second electrostatic discharge protection device for gate-source voltage protection of the power field effect transistor.

[0044] In one embodiment, the secondary coil is used to pass a sine wave with a peak voltage of the positive and negative power supply voltages; when the first port of the secondary coil is positive and the second port of the secondary coil is negative, the second Schottky diode conducts, the first Schottky diode cuts off, and the second capacitor is charged through the second Schottky diode. After charging, the voltage of the negative electrode of the second Schottky diode with respect to the lower plate of the first capacitor is positive.

[0045] When the first port of the secondary coil is negative and the second port of the secondary coil is positive, the second Schottky diode cuts off, the first Schottky diode conducts, and the first capacitor is charged through the first Schottky diode. After charging, the voltage of the negative electrode of the second Schottky diode with respect to the upper plate of the first capacitor is positive.

[0046] In one embodiment, on different paths of the voltage-doubling rectification circuit, by arranging capacitors and resistors of different sizes, and using the different charge release speeds and release times at different nodes on different paths, the turning on or off of the power field effect transistor is controlled. That is, the voltage-doubling rectification circuit controls the turning on or off of the power field effect transistor by controlling the turning on or off of the first field effect transistor (transistor 49) and the second field effect transistor (transistor 54).

[0047] In one embodiment, the voltage-doubling rectifier circuit further includes a third Schottky diode, a third resistor, a fourth resistor, a constant current diode, a fourth capacitor, a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, a fourth field-effect transistor, a fifth resistor, a sixth resistor, and a seventh resistor.

[0048] The positive electrode of the third Schottky diode is connected to the positive electrode of the second Schottky diode; the negative electrode of the third Schottky diode is connected to one end of the third resistor, and the other end of the third resistor is connected to one end of the fourth resistor, the negative electrode of the constant current diode, the upper plate of the fourth capacitor, and the gate of the first field-effect transistor; the other end of the fourth resistor is connected to one end of the second resistor, the positive electrode of the constant current diode, the lower plate of the fourth capacitor, the source of the first field-effect transistor, the source of the fourth field-effect transistor, the source of the second field-effect transistor, and the source of the power field-effect transistor.

[0049] One end of the fifth resistor is connected to the negative electrode of the second Schottky diode and one end of the sixth resistor; the other end of the fifth resistor is connected to the drain of the first field-effect transistor, the gate of the third field-effect transistor, the drain of the third field-effect transistor, and the gate of the second field-effect transistor; the drain of the third field-effect transistor is connected to the gate and drain of the fourth field-effect transistor.

[0050] The other end of the sixth resistor is connected to one end of the seventh resistor and the gate of the power field-effect transistor; the other end of the seventh resistor is connected to the drain of the second field-effect transistor.

[0051] When the voltage-doubling rectifier circuit works, the gate voltage of the first field-effect transistor exceeds the threshold voltage, the first field-effect transistor is in the on state, the gate voltage of the first field-effect transistor is the source voltage of the power field-effect transistor, the second field-effect transistor is in the off state, the voltage between the gate and source of the power field-effect transistor is the voltage output by the voltage-doubling rectifier circuit, and the power field-effect transistor conducts to realize the switch path; when there is no alternating current in the voltage-doubling rectifier circuit, the first field-effect transistor is turned off, the second field-effect transistor is turned on, and the gate and source of the power field-effect transistor are pulled to the same potential to realize the switch open circuit.

[0052] As Figure 3As shown, it is the secondary rectifier circuit architecture. 34 is the transformer coil, and 34c and 34d are the connection points between the secondary coil and the secondary chip. A sine wave with a peak voltage of ±vdd (Voltage Drain Drain, power supply voltage) flows through the secondary side of the coil. The Schottky diodes 35, 36 and the resistors 39, 40 form a current loop. At the same time, taking advantage of the characteristic that the voltage across the capacitors 37 and 38 cannot change suddenly, 35 - 40 form a voltage doubler rectifier circuit. During the positive half-cycle of the power supply, the upper end of the secondary of the transformer 34 is positive and the lower end is negative. Diode 36 conducts and diode 35 is cut off. Capacitor 38 is charged through diode 36. After charging, the voltage across capacitor 38 is close to the peak voltage of the secondary of the transformer 34, with the upper end positive and the lower end negative (the voltage of node 36a relative to the lower plate of capacitor 37 is positive). During the negative half-cycle of the power supply, the upper end of the secondary of the transformer 34 is negative and the lower end is positive. Diode 36 is cut off and diode 35 conducts. Capacitor 37 is charged through diode 35. After charging, the voltage of 36a relative to the upper plate of capacitor 37 is positive, and the level between 36a and 55c is twice the peak voltage of the coil, that is, 2vdd.

[0053] To make the rectified voltage as large as possible, Schottky diodes are selected here to minimize the voltage drop across the diodes. At the same time, the capacitors 41 and the resistors 39, 40 play a role in filtering and stabilizing the voltage generated by the rectifier circuit. 42 is an ESD (Electro-Static discharge) protection device to prevent the instantaneous ESD voltage generated by the coil being disturbed from breaking down the devices on the path. Similarly, the device 56 is also an ESD protection device. Since 55b is connected to the outside of the chip, if there is an instantaneous voltage applied to 55b, due to the coupling of the Cgd capacitance (gate-drain capacitance) of the MOS device 55, the voltage will be instantaneously applied to the gate 55a of the MOS. This energy will be released to 55c through the device 56, thus realizing the VGS protection of the chip.

[0054] When the rectifier circuit is working, the gate voltage of the MOS transistor 49 exceeds the threshold voltage, and 49 is in the on state. The gate voltage of the MOS transistor 54 is the voltage of 55c, so the MOS transistor 54 is not turned on. The voltage between 55a and 55c is the voltage output by the voltage doubler rectifier circuit, and the MOS transistor 55 conducts to realize the switching path. However, when the primary side is turned off and there is no alternating current on the coil, since the MOS transistor 49 is turned off first, the state of 49 does not affect the state of 54. And the gate voltage of 54 is the bias voltage of two diodes, about 2v, and MOS54 turns on, pulling the gate and source of 55 to the same potential, realizing the opening of the switch. Among them, diode refers to the two diodes formed by the MOS transistors 51 and 52.

[0055] Figure 3Among them, 34 represents the transformer coil, 34a represents the first port of the primary coil, 34b represents the second port of the primary coil, 34c represents the first port of the secondary coil, 34d represents the second port of the secondary coil, 35 represents the first Schottky diode, 36 represents the second Schottky diode, 37 represents the first capacitor, 38 represents the second capacitor, 39 represents the first resistor, 40 represents the second resistor, 36a represents the cathode of the second Schottky diode, 41 represents the third capacitor, 42 represents the first electrostatic discharge protection device, 56 represents the second electrostatic discharge protection device, 55 represents the power field effect transistor, 55a represents the gate of the power field effect transistor, 55b represents the drain of the power field effect transistor, 55c represents the source of the power field effect transistor; 43 represents the third Schottky diode, 44 represents the third resistor, 45 represents the fourth resistor, 46 represents the constant current diode, 47 represents the fourth capacitor, 49 represents the first field effect transistor, 54 represents the second field effect transistor, 51 represents the third field effect transistor, 52 represents the fourth field effect transistor, 48 represents the fifth resistor, 50 represents the sixth resistor, 53 represents the seventh resistor, 33 represents the eighth capacitor.

[0056] This application is a voltage multiplier rectifier circuit, which is applied to circuits such as MOS safety drive, voltage detection of automotive battery packs, and insulation detection. Compared with the traditional rectifier drive circuit, this application can save two Schottky diodes in the rectifier circuit and eliminate multiple inverters and capacitor modules in the boost circuit while being compatible with the application of the original rectifier boost drive circuit, saving chip area and power consumption.

[0057] The embodiment of this specification also provides an isolation relay chip, as Figure 2 and Figure 3 shown, including a primary chip, a secondary chip, primary and secondary coils, and a power field effect transistor. The secondary chip applies the voltage multiplier rectifier circuit of any one of the above embodiments of the claims. The primary coil and the secondary coil form the primary and secondary coils; the isolation relay chip is powered by the energy transmitted by the primary chip through the primary and secondary coils, and rectifies and boosts at the secondary chip to turn on or off the power field effect transistor.

[0058] In one embodiment, the primary chip, the primary and secondary coils, the secondary chip, and the power field effect transistor are encapsulated in the same package; the primary and secondary coils are arranged on the substrate, and the primary and secondary coils are connected to the primary chip and the secondary chip through wire bonding in the package, and the output of the secondary chip is connected to the power field effect transistor.

[0059] In one embodiment, the primary-side chip includes a linear voltage regulator and a transmitting circuit with a cross-coupled oscillator; the first input pin of the chip is connected to the linear voltage regulator, the linear voltage regulator is connected to the transmitting circuit, and the second input pin of the chip is respectively connected to the linear voltage regulator and the transmitting circuit, so that when the input current is higher than a preset value, the voltage signal is input into the isolation relay chip through the first input pin and the second input pin of the chip, and after passing through the linear voltage regulator, a stable power supply voltage is provided; the cross-coupled oscillator inside the transmitting circuit generates an electrical signal on the primary-side coil, and the secondary-side coil generates an alternating current through electromagnetic induction. The alternating current passes through the secondary-side chip to generate a driving high voltage to drive the power field-effect transistor to conduct; when the input current is lower than the preset value, the linear voltage regulator is turned off, the cross-coupled oscillator stops working, there is no voltage signal on the secondary-side coil, and the power field-effect transistor is turned off for isolation switching.

[0060] As Figure 2 shown, the complete chip architecture of the isolation relay based on magnetic isolation. This architecture consists of four parts 26, 27, 30, 31, and these four parts are encapsulated in the same package, reducing the volume of the isolation relay and improving the integration of the system. Among them, 33a, 33b are the primary-side input pins of the chip; 32a, 32b are the secondary-side outputs of the chip. 26 is the primary-side die of the isolation relay, 27 is the primary and secondary coils, and this coil is designed on the substrate and connected to 26 and 31 through wire bonding during packaging. 31 is the secondary-side die of the isolation relay, and the output of 31 is connected to 30, and 30 is a power MOSFET (field-effect transistor). Die represents a chip, 27a is the primary-side coil, and 27b is the secondary-side coil. Figure 3 The transformer coil 34 in Figure 2 is equivalent to Figure 3 the primary and secondary coils 27 in Figure 2 and the marker 55 in

[0061] and the marker 30 in

[0062] The present application provides a secondary rectification drive circuit architecture for a magnetic isolation-based MOS relay. This architecture is powered by the energy transferred through a coil on the primary side, realizes rectification and boost on the secondary side, and enables the turning on or off of the driven MOS. Meanwhile, appropriate protection devices are placed at key positions vulnerable to external interference in this architecture, enabling the chip to operate safely in various complex application environments. Compared with common rectification boost circuits, this architecture uses a small number of devices and can achieve a relatively high VGS drive voltage.

[0063] The core idea of the present application is to achieve voltage-doubling rectification simply by using two Schottky diodes, two capacitors, and two resistors. Additionally, appropriate ESD protection devices are placed at circuit nodes vulnerable to external interference to protect the VGS from overvoltage under any circumstances and safeguard the power MOS. Another key point of the present application is to control the turning on or off of the MOS transistor by taking advantage of the different charge release times on different paths through the voltage generated by the voltage-doubling rectification circuit.

[0064] In this specification, for the same or similar parts among various embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the embodiments described later, since the description is relatively simple, reference can be made to the relevant parts of the foregoing embodiments for the relevant content.

[0065] As described above, the above are only specific implementation manners of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A voltage doubler rectifier circuit, characterized in that: The invention comprises a Schottky diode component and a capacitor component. When an alternating current flows through the voltage doubler rectifier circuit, the unidirectional conduction of the Schottky diode component and the alternating current are rectified to charge and discharge the capacitor component to output a DC level.

2. The voltage doubler rectifier circuit according to claim 1, characterized in that: The Schottky diode component includes a first Schottky diode and a second Schottky diode; the capacitor component includes a first capacitor and a second capacitor; The primary coil generates an alternating current in the secondary coil through electromagnetic induction; The first port of the secondary coil is connected to the cathode of the first Schottky diode and the anode of the second Schottky diode; the anode of the first Schottky diode is connected to the upper plate of the first capacitor and the source of the power field effect transistor; the cathode of the second Schottky diode is connected to the upper plate of the second capacitor; the second port of the secondary coil is connected to the lower plate of the first capacitor and the lower plate of the second capacitor.

3. The voltage doubler rectifier circuit according to claim 2, characterized in that: The voltage doubler rectifier circuit also includes a first resistor and a second resistor; the positive electrode of the first Schottky diode is also connected to one end of the second resistor; the negative electrode of the second Schottky diode is also connected to one end of the first resistor; the second port of the secondary coil is also connected to the other end of the first resistor and the other end of the second resistor; The voltage doubler rectifier circuit also includes a third capacitor, the positive electrode of the first Schottky diode is also connected to the lower plate of the third capacitor, and the negative electrode of the second Schottky diode is also connected to the upper plate of the third capacitor.

4. The voltage doubler rectifier circuit according to claim 2, characterized in that: The voltage doubler rectifier circuit also includes a first electrostatic discharge protection device; the cathode of the first Schottky diode is also connected to one end of the first electrostatic discharge protection device; the cathode of the second Schottky diode is also connected to the other end of the first electrostatic discharge protection device, so that the first electrostatic discharge protection device prevents the instantaneous electrostatic discharge voltage generated by the interference of the primary and secondary coils from breaking through the devices on the path; and / or, The voltage doubler rectifier circuit also includes a second electrostatic discharge protection device; one end of the second electrostatic discharge protection device is connected to the gate of the power field effect tube, and the other end of the second electrostatic discharge protection device is connected to the source of the power field effect tube, so that the voltage energy of the gate of the power field effect tube is released to the source of the power field effect tube through the second electrostatic discharge protection device, thereby protecting the gate-source voltage of the power field effect tube.

5. The voltage doubler rectifier circuit according to claim 2, characterized in that: The secondary coil is used to flow a sine wave with a peak voltage of positive and negative power supply voltages; when the first port of the secondary coil is positive and the second port of the secondary coil is negative, the second Schottky diode is turned on and the first Schottky diode is turned off, and the second capacitor is charged through the second Schottky diode. After charging, the voltage of the cathode of the second Schottky diode relative to the lower plate of the first capacitor is positive; When the first port of the secondary coil is negative and the second port of the secondary coil is positive, the second Schottky diode is cut off and the first Schottky diode is turned on, and the first capacitor is charged through the first Schottky diode. After charging, the voltage of the cathode of the second Schottky diode relative to the upper plate of the first capacitor is positive.

6. The voltage doubler rectifier circuit according to claim 2, characterized in that: The voltage doubler rectifier circuit places capacitors and resistors of different sizes on different paths and utilizes the differences in charge release speed and release time at different nodes on different paths to control the on or off of the power field effect tube.

7. The voltage doubler rectifier circuit according to claim 2, characterized in that: The voltage doubler rectifier circuit also includes a third Schottky diode, a third resistor, a fourth resistor, a constant current diode, a fourth capacitor, a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a fifth resistor, a sixth resistor and a seventh resistor; The anode of the third Schottky diode is connected to the anode of the second Schottky diode; the abdominal muscle of the third Schottky diode is connected to one end of the third resistor, and the other end of the third resistor is connected to one end of the fourth resistor, the cathode of the constant current diode, the upper plate of the fourth capacitor and the gate of the first field effect tube; the other end of the fourth resistor is connected to one end of the second resistor, the anode of the constant current diode, the lower plate of the fourth capacitor, the source of the first field effect tube, the source of the fourth field effect tube, the source of the second field effect tube and the source of the power field effect tube; One end of the fifth resistor is connected to the cathode of the second Schottky diode and one end of the sixth resistor; the other end of the fifth resistor is connected to the drain of the first field effect transistor, the gate of the third field effect transistor, the drain of the third field effect transistor and the gate of the second field effect transistor; the drain of the third field effect transistor is connected to the gate and drain of the fourth field effect transistor; The other end of the sixth resistor is connected to one end of the seventh resistor and the gate of the power field effect transistor; the other end of the seventh resistor is connected to the drain of the second field effect transistor; When the voltage-doubling rectifier circuit is working, the gate voltage of the first field effect tube exceeds the threshold voltage, the first field effect tube is in the on state, the gate voltage of the first field effect tube is the source voltage of the power field effect tube, the second field effect tube is in the off state, the voltage between the gate and the source of the power field effect tube is the voltage output by the voltage-doubling rectifier circuit, the power field effect tube is turned on, and the switch path is realized; when there is no alternating current in the voltage-doubling rectifier circuit, the first field effect tube is turned off, the second field effect tube is turned on, and the gate and source of the power field effect tube are pulled to the same potential to realize the switch disconnection.

8. An isolation relay chip, characterized in that: The invention comprises a primary chip, a secondary chip, primary and secondary coils and a power field effect transistor. The secondary chip applies the voltage doubling rectifier circuit described in any one of claims 1 to 7, and the primary coil and the secondary coil constitute the primary and secondary coils. The isolation relay chip uses the energy transmitted by the primary chip through the primary and secondary coils to supply power, performs rectification and boosting in the secondary chip, and turns on or off the power field effect transistor.

9. The isolation relay chip according to claim 8, characterized in that: The primary chip, the primary-secondary coil, the secondary chip and the power field effect transistor are sealed in the same package; The primary and secondary coils are arranged on a substrate, and are connected to a primary chip and a secondary chip through packaging wire bonding, and the output of the secondary chip is connected to the power field effect tube.

10. The isolation relay chip according to claim 8, characterized in that: The primary chip includes a linear regulator and a transmitting circuit with a cross-coupled oscillator; the first input pin of the chip is connected to the linear regulator, the linear regulator is connected to the transmitting circuit, and the second input pin of the chip is respectively connected to the linear regulator and the transmitting circuit, so that when the input current is higher than a preset value, the voltage signal is input into the isolation relay chip through the first input pin of the chip and the second input pin of the chip, and passes through the linear regulator to provide a stable power supply voltage; The cross-coupled oscillator inside the transmitting circuit generates an electrical signal on the primary coil, and the secondary coil generates an alternating current through electromagnetic induction. The alternating current passes through the secondary chip to generate a driving high voltage to drive the power field effect tube to conduct; When the input current is lower than the preset value, the linear regulator is turned off, the cross-coupled oscillator stops working, there is no voltage signal in the secondary coil, the power field effect tube is turned off, and the isolation switch is performed.

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