Preparation method of diamond heterojunction with high carrier mobility

Abstract

The invention discloses a preparation method of a diamond heterojunction with high carrier mobility, and belongs to the field of preparation of diamond semiconductor materials. A quantum well is formed by using the strain of a diamond and SiC interface, and then a high carrier mobility channel is realized. The process comprises the following steps of: a, selecting a high-quality CVD (Chemical Vapor Deposition) monocrystal diamond substrate; b, injecting silicon ions on the diamond substrate by using an ion injection technology; and c, step-by-step high-temperature annealing treatment is carried out, lattice mismatch is relieved, the defect concentration is reduced, the crystal quality of crystals is improved, and a silicon carbide buried layer is formed. And the crystal lattice is stretched by stress, so that the forbidden band width of the diamond is adjusted, and a strain heterojunction is formed. And d, carrying out ion implantation on the silicon carbide layer to form an n-type or p-type doped silicon carbide diamond heterojunction so as to realize the conductive semiconductor with high carrier mobility.

Description

Technical Field

[0001] The present invention belongs to the technical field of diamond semiconductor material preparation. The specific content is as follows: By means of ion implantation technology, silicon ions are implanted into a high-quality diamond substrate and annealed to prepare a silicon carbide layer, forming a silicon carbide diamond strained heterojunction, thereby realizing a high carrier mobility channel. Technical Background

[0002] Diamond is a wide bandgap semiconductor (WBG) material with characteristics such as high thermal conductivity (~20 W / cm·K), wide bandgap (~5.4 eV), high critical breakdown field strength (~5.6 MV / cm), and chemical inertness. It has great potential in high-power / high-temperature applications. However, the practical application of diamond as a semiconductor material still faces many technical challenges, especially there are many unsolved problems in the realization of doped devices. Currently, although certain progress has been made in p-type doping, for both n-type and p-type doping, the low activation energy of doped atoms remains a long-term unsolved problem. The main problems are low element doping efficiency, low ionization efficiency, high activation energy, and limited mobility; while hydrogen-terminated diamond doping can achieve a surface p-type conductive channel, but it is limited by the surface layer, with insufficient conductivity and instability. Once the surface layer is damaged, it is easy to lose conductivity.

[0003] Heterojunction is another common form of semiconductor conduction. Heterojunctions such as III-V compound semiconductors GaN and AlGaN, GaAs and AlGaAs are the most common. It usually realizes the modulation of strain and bandgap width by means of element composition adjustment. It is reported that for the AlGaN / GaN heterojunction, by utilizing the polarization effect at the heterojunction interface and disconnecting the 2DEG conduction channel through the GaN channel, an AlGaN / GaN heterojunction ultraviolet photodetector with high responsivity and low dark current has been successfully prepared (American Chemical Society, 2018, 5(11): 4277 - 4282). The InAlN / GaN heterojunction does not require doping and can already generate a surface density as high as ~1.1×10 13 cm -2 at the heterojunction interface, and the electron mobility exceeds 1200 cm -2 / V·s (Superlattices and Microstructures, 2006, 40(4-6): 214-218). Heterojunctions can also be realized in group-IV semiconductors such as Si / SiGe through interface strain. Since the lattice constants of silicon and germanium are different, strain is generated at the heterojunction interface, changing the electronic structure, adjusting the bandgap width, and enhancing the carrier mobility. For the diamond / SiC heterojunction, it has been proposed to use a PN junction composed of P-type doped diamond and doped N-type silicon carbide, but fundamentally, the problem of carrier activation caused by doping itself has not been solved. At present, it has also been reported that polycrystalline diamond-silicon carbide heterojunctions have been prepared by CVD epitaxial growth method. However, due to the large distortion during growth itself, and the nucleation and growth of diamond require high temperature, which easily causes interface defects. And soft breakdown occurs under reverse bias, and there are high-density interface states, and the electrical properties of the heterojunction (Institute of Electrical and Electronics Engineers, 2016:1-4) are still poor. Summary of the Invention

[0004] The present invention utilizes the characteristics that cubic silicon carbide and diamond have similar lattice constants and different thermal expansion coefficients, selects a suitable diamond substrate, forms a buried layer by silicon ion implantation, and generates a cubic silicon carbide compound layer through annealing treatment.

[0005] A preparation method of a diamond heterojunction with high carrier mobility, characterized in that, utilizing the characteristics that cubic silicon carbide and diamond have similar lattice constants and different thermal expansion coefficients, selecting a suitable diamond substrate, forming a buried layer by silicon ion implantation, and generating a cubic silicon carbide layer through annealing treatment; because both the diamond substrate and the 3C-SiC crystal have a diamond structure, and the lattice mismatch rate is 24%, the silicon carbide thin layer inside the diamond will be affected by the lattice stress of the substrate and match the substrate lattice, forming a coherent or pseudomorphic heterointerface; the carrier quantum well provides a high-mobility channel for the majority carriers of p-type or n-type semiconductors, and can realize a high-performance strained heterojunction.

[0006] As described above, a preparation method of a diamond heterojunction with high carrier mobility, the specific implementation steps are as follows:

[0007] Step 1: Screening of single-crystal diamond substrate

[0008] Screen high-quality single-crystal diamond with a size of 5×5 mm or more as the substrate material, with an impurity content of less than 1 ppb and a surface roughness lower than 0.1 nm.

[0009] Step 2: Pretreatment for facilitating substrate ion implantation experiment

[0010] Boil and pickling the selected substrate with a mixed solution of H2SO4 / HNO3 (3:1) for 25 - 35 minutes, then ultrasonically clean the sample in acetone, absolute ethanol, and deionized water for 10 - 20 minutes respectively to remove impurities on the surface of the sample.

[0011] Step 3: Silicon ion implantation into the diamond substrate

[0012] Perform silicon ion implantation on the diamond substrate through an ion implantation device, with an implantation energy of 20 - 60 keV and an implantation dose of 1×10 16 -1×10 18 ions / cm 2 。

[0013] Step 4: Annealing process

[0014] Adopt a step-by-step annealing process. First, anneal at 700 - 800 °C for 10 - 30 minutes to restore the crystal structure. Subsequently, perform high-temperature annealing at 1000 - 1200 °C for 10 - 30 minutes to rearrange carbon atoms and migrate them to the correct lattice positions.

[0015] Step 5: Doping process

[0016] Perform ion implantation on the silicon carbide buried layer. If it is N-type doping, inject nitrogen or phosphorus ions at a high temperature of 300 - 800 °C, with an implantation dose of 10 14 -10 16 ions / cm 2 。If it is P-type doping, inject aluminum ions at a high temperature of 300 - 800 °C, with an implantation dose of 10 14 -10 16 ions / cm 2 。

[0017] Furthermore, the diamond substrate material selected in Step 1 should be a CVD high-quality single-crystal diamond substrate to achieve the best electrical properties of the diamond heterojunction.

[0018] Furthermore, in Step 3, the substrate temperature is 400 - 600 °C, which can reduce lattice damage caused by implantation, inhibit the amorphization phenomenon, and reduce the damage accumulation effect.

[0019] Furthermore, the implantation energy in Step 3 is 20 - 60 keV. The implantation energy affects the depth and thickness of the implanted layer. If the thickness exceeds the critical value, relaxation may occur by forming extended defects. The implantation dose is 10 16 -10 18 ions / cm 2 ,The dose affects the Si ion concentration in the implanted layer, thereby affecting the size and quantity of silicon carbide. It is necessary to appropriately increase the Si ion implantation dose (>10 16ions / cm 2 ), and it cannot exceed the critical dose (<10 18 ions / cm 2 ), otherwise it will cause the generation of misfit dislocations.

[0020] Furthermore, in step 4, the primary annealing temperature is 600 - 800 °C, and solid-phase epitaxial growth occurs. The lattice can be rearranged and epitaxial growth can be achieved on the diamond substrate. Through high-temperature annealing treatment at 1000 - 1200 °C, the internal stress caused by implantation can be effectively reduced, thereby improving the overall quality and performance of the material.

[0021] Furthermore, in step 5, the ion implantation dose is 10 14 -10 16 ions / cm 2 It can improve the conductivity. If it is too low, the carrier concentration is small. If it is too high, the lattice damage will be increased, resulting in a decrease in mobility.

[0022] The key to the implementation process of the present invention lies in:

[0023] (1) To ensure the quality of the diamond-silicon carbide heterojunction, certain requirements are imposed on the ion source. A pure silicon ion source is required, and a heavily doped ion source cannot be used.

[0024] (2) There is an optimal ion implantation condition to effectively improve the strain relaxation of the SiC layer, that is, the relaxation ratio increases with the increase of the ion dose, but when it exceeds a certain critical dose, the relaxation ratio begins to decrease significantly. However, a high dose of Si is required to form SiC crystals, and the implantation dose is about 10 16 ~10 18 ions / cm 2 . However, the increased dose may simultaneously damage the diamond substrate and the newly nucleated SiC nanocrystals. Increasing the implantation temperature may help prevent this implantation-induced damage.

[0025] (3) The ion implantation energy affects the depth and thickness of the buried layer. By using an energy of 20 - 60 keV, an implantation of about 50 nm can be achieved. If it is too thick, it may exceed the critical thickness, causing serious lattice mismatch.

[0026] (4) The vacancies and interstitial atoms generated by a large amount of silicon ion implantation will significantly reduce the crystallinity of the diamond, and an amorphous carbon damaged layer will be formed at a depth of about 50 nm in the subsurface layer of the sample. By performing high-temperature annealing on the sample at a temperature of 600 - 800 °C, the lattice can be rearranged and epitaxial growth can be achieved on the diamond substrate, thereby restoring its crystal structure. This process is solid-phase epitaxial growth. Subsequently, high-temperature annealing at 1000 - 1200 °C is carried out to rearrange the carbon atoms and migrate them to the correct lattice positions.

[0027] (5) For the selection of the annealing environment, annealing is carried out in a vacuum annealing or inert gas (such as argon) environment to avoid oxidation or graphitization of diamond due to reaction with oxygen at high temperatures.

[0028] (6) To increase the carrier concentration, n-type or p-type doping can be achieved by ion implantation of nitrogen, phosphorus elements or aluminum ions through the silicon carbide layer, or a pn junction form can be constructed by doping the diamond substrate to improve the channel conductivity.

[0029] The beneficial effects of the present invention and the prior art are as follows:

[0030] (1) The present invention realizes the elastic strain of diamond through silicon ion implantation and annealing of the diamond substrate, making the process of realizing the elastic strain of diamond relatively accurate. Ion implantation can precisely control the total implantation amount and purity, thereby narrowing the bandgap of diamond and obtaining a high-performance diamond semiconductor.

[0031] (2) The present invention can achieve high-mobility hole or electron channels through p-type or n-type doping of the ion-implanted SiC layer.

[0032] (3) Through this process, the present invention can enrich the heterogeneous integration of SiC and diamond semiconductor devices and promote the integrated innovation of various power electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions of the present invention, the drawings used in the embodiments will be briefly introduced below. The following drawings are only a brief introduction of the present invention.

[0034] Figure 1 . Schematic diagram of a preparation method for a diamond heterojunction with an adjustable bandgap. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0035] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention.

[0036] Example 1

[0037] Select a high-quality single-crystal diamond substrate according to size. A 5×5 mm diamond is used as the substrate material, with an impurity content of less than 0.63 ppb and a surface roughness of 0.3 nm. The selected substrate is boiled and pickled with a H2SO4 / HNO3 (3:1) mixed solution for 30 minutes, and then the sample is ultrasonically cleaned in acetone, absolute ethanol, and deionized water for 15 minutes respectively to remove the impurities on the surface of the sample. Then, silicon ions are implanted into the diamond substrate through an ion implantation device, with an implantation energy of 35 kev and an implantation dose of 4×10 17 ions / cm 2Subsequently, a step annealing process was adopted. First, annealing was carried out at 750 °C for 30 minutes to restore the crystal structure. Subsequently, high-temperature annealing was carried out at 1000 °C for 30 minutes to rearrange the carbon atoms and migrate them to the correct lattice positions. Through XPS detection, it was proved that the ion implantation layer was a standard SiC layer. The surface of the diamond was tested with a multimeter, and the multimeter showed a resistance of 2.83 MΩ, indicating that the diamond surface was conductive.

[0038] Example 2

[0039] High-quality single-crystal diamond substrates were screened according to size. 5×5 mm diamonds were used as substrate materials, with an impurity content of 0.9 ppb and a surface roughness of 0.65 nm. The selected substrates were pickled by boiling in a mixed solution of H2SO4 / HNO3 (3:1) for 30 minutes, and then the samples were ultrasonically cleaned in acetone, absolute ethanol, and deionized water for 15 minutes respectively to remove the impurities on the sample surface. Then, silicon ions were implanted into the diamond substrates through an ion implantation device, with an implantation energy of 50 kev and an implantation dose of 1×10 18 ions / cm 2 Subsequently, a step annealing process was adopted. First, annealing was carried out at 800 °C for 15 minutes to restore the crystal structure. Subsequently, high-temperature annealing was carried out at 1100 °C for 15 minutes to rearrange the carbon atoms and migrate them to the correct lattice positions. Through XPS detection, it was proved that the ion implantation layer was a SiC layer. The surface of the diamond was tested with a multimeter, and the multimeter showed a resistance of 6.50 MΩ, indicating that the diamond surface was conductive.

Claims

1. A method for preparing a high carrier mobility diamond heterojunction, characterized in that: Taking advantage of the fact that cubic silicon carbide and diamond have similar lattice constants but different thermal expansion coefficients, a suitable diamond substrate is selected, and a buried layer is formed by silicon ion implantation, and a cubic silicon carbide alloy layer is generated by annealing. Because the diamond substrate and the 3C-SiC crystal are both diamond structures and the lattice mismatch rate is 24%, the silicon carbide thin layer inside the diamond will be affected by the substrate lattice stress and match the substrate lattice to form a coherent or pseudomorphic heterointerface. The carrier quantum well provides a high-mobility channel for the majority carriers of p-type or n-type semiconductors, which can realize high-performance strained heterojunction.

2. A method for preparing a high carrier mobility diamond heterojunction as claimed in claim 1, characterized in that: The specific implementation steps are: Step 1: Screening of single crystal diamond substrates Screen high-quality single crystal diamond with a size of 5×5mm or above as substrate material, with an impurity content of less than 1ppb and a surface roughness of less than 0.1nm; Step 2: Pretreatment of substrate for ion implantation experiment The screened substrates were boiled and pickled with a H2SO4 / HNO3 (3:1) mixed solution for 25-35 minutes, and then ultrasonically cleaned in acetone, anhydrous ethanol, and deionized water for 10-20 minutes to remove impurities on the sample surface; Step 3: Diamond substrate silicon ion implantation Silicon ions are implanted into the diamond substrate using an ion implantation device with an implantation energy of 20-60 keV and an implantation dose of 1×10 16 -1×10 18 ions / cm 2 ; Step 4: Annealing process A step-by-step annealing process is used, first annealing at 700-800°C for 10-30 minutes to restore the crystal structure; then high-temperature annealing at 1000-1200°C for 10-30 minutes is performed to rearrange the carbon atoms and migrate to the correct lattice position; Step 5: Doping process Ion implantation is performed on the buried silicon carbide layer. If N-type doping is used, nitrogen or phosphorus ions are implanted at a high temperature of 300-800°C with an implantation dose of 10 14 -10 16 ions / cm 2 ; If P-type doping is used, aluminum ions are injected at a high temperature of 300-800°C with an injection dose of 10 14 -10 16 ions / cm 2 .

3. A method for preparing a high carrier mobility diamond heterojunction as claimed in claim 2, characterized in that: The diamond substrate material screened in step 1 should be a CVD high-quality single crystal diamond substrate to achieve the best electrical properties of the diamond heterojunction.

4. A method for preparing a high carrier mobility diamond heterojunction as claimed in claim 2, characterized in that: In step 3, the substrate temperature is 400-600° C., which can reduce the lattice damage caused by implantation, inhibit amorphization, and reduce the damage accumulation effect.

5. A method for preparing a high carrier mobility diamond heterojunction as claimed in claim 2, characterized in that: The implantation energy in step 3 is 20-60keV. The implantation energy affects the depth and thickness of the implanted layer. If the thickness exceeds the critical value, it may relax by forming extended defects. The implantation dose is 10 16 -10 18 ions / cm 2 The dose affects the Si ion concentration of the implanted layer, thus affecting the size and quantity of silicon carbide. It is necessary to increase the Si ion implantation dose appropriately (>10 16 ions / cm 2 ), and cannot exceed the critical dose (<10 18 ions / cm 2 ), otherwise misfit dislocations will occur.

6. A method for preparing a high carrier mobility diamond heterojunction as claimed in claim 2, characterized in that: In step 4, the initial annealing temperature is 600-800°C, and solid phase epitaxial growth is performed, the lattice can be rearranged and epitaxial growth can be achieved on the diamond substrate; through high temperature annealing treatment at 1000-1200°C, the internal stress caused by injection is effectively reduced, thereby improving the overall quality and performance of the material.

7. A method for preparing a high carrier mobility diamond heterojunction as claimed in claim 2, characterized in that: The ion implantation dose in step 5 is 10 14 -10 16 ions / cm 2 It can improve conductivity. If the carrier concentration is too low, it will be small. If it is too high, it will increase the lattice damage and cause the mobility to decrease.

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