Non-volatile two-end storage part, manufacturing method and related product

Abstract

The present disclosure discloses a non-volatile two-terminal memory portion, a method of manufacture, and a related product, the non-volatile two-terminal memory portion including a lower electrode, an upper electrode, and a conversion layer disposed between the lower electrode and the upper electrode, the conversion layer at least comprises a first area, a second area and a first transition area which is in contact with the first area and the second area respectively; wherein the conversion layer is provided with a local high electric field region, the local high electric field region is located in the first transition region, and the thickness of the first transition region is smaller than the thickness of the first region and the thickness of the second region; and in the direction from the upper electrode to the lower electrode, the projection of the first region and the projection of the second region at least have an overlapping region. According to the scheme disclosed by the invention, the positions where the conductive filaments are formed have certain regularity, so that the difference between the memory units of the memory can be reduced.

Description

Technical Field

[0001] This disclosure generally relates to the field of semiconductor technology. More specifically, this disclosure relates to a non-volatile two-terminal memory, a manufacturing method, and related products. Background Art

[0002] A non-volatile two-terminal memory can retain data without loss after power-off. Structurally, it can be composed of two electrodes sandwiching a functional material to form a "sandwich" structure, and it can utilize the physical properties of the material (such as resistance change, phase change, or ferroelectric polarization, etc.) to achieve data storage. In non-volatile two-terminal memories, common memories can include resistive random access memory (RRAM). RRAM is a non-volatile memory based on resistance change. It utilizes the characteristic that the resistance state of the storage medium changes under different voltages to store data. The basic principle of RRAM is to apply different voltages to the storage unit to make the storage unit switch between a high resistance state (HRS) and a low resistance state (LRS), thereby achieving data storage and reading.

[0003] The basic structure of RRAM usually consists of two upper and lower electrodes and a resistive switching layer (storage medium) sandwiched in the middle, that is, a typical "metal-insulator-metal (MIM)" structure. Specifically, the main role of the electrodes of RRAM is to provide electrical signals to the resistive switching layer to achieve read and write operations on the storage unit. Electrode materials are generally selected as metals with good electrical conductivity, such as platinum (Pt), titanium (Ti), tungsten (W), copper (Cu), etc. The interface characteristics between different electrode materials and the resistive switching layer will affect the performance of RRAM. For example, factors such as the work function and surface roughness of the electrode material will affect the injection and transmission of electrons, and thus affect the resistance switching characteristics, operating voltage, and durability of RRAM. The resistive switching layer of RRAM is the core part to achieve the resistance switching function, and usually uses metal oxides (such as TiO2, ZnOT, etc.) perovskite structure materials or other materials with resistive switching characteristics. Under the action of an external electric field, physical or chemical changes will occur inside the resistive switching layer, resulting in reversible conversion of its resistance between the high resistance state and the low resistance state, thereby achieving data storage.

[0004] It can be understood that the relevant conversion layer is integrated between the upper electrode and the lower electrode. Since the conversion layer has a planar structure and a relatively thin thickness (for example, only 1 - 20 nm), the position regions where the thinnest thickness and the thickest thickness are located in the thickness of each memory cell are random. This not only leads to unstable operating voltages of the memory cells, but also makes the regions where conductive filaments are formed randomly distributed at the thinnest positions of the conversion layer thickness. Therefore, there are also significant differences between memory cells.

[0005] In view of this, there is an urgent need to provide a non-volatile two-terminal memory part, a manufacturing method and related product solutions, so as to be able to determine the position region where conductive filaments are formed. Summary of the Invention

[0006] In order to solve at least one or more of the above-mentioned technical problems, the present disclosure proposes a non-volatile two-terminal memory part, a manufacturing method and related product solutions in multiple aspects.

[0007] In a first aspect, the present application provides a non-volatile two-terminal memory part, which includes a lower electrode, an upper electrode and a conversion layer. The conversion layer is disposed between the lower electrode and the upper electrode. The conversion layer at least includes a first region, a second region and a first transition region respectively in contact with the first region and the second region; wherein, the conversion layer has a local high electric field region, and the local high electric field region is located in the first transition region, and the thickness of the first transition region is less than the thickness of the first region and the thickness of the second region; wherein, along the direction from the upper electrode to the lower electrode, the projection of the first region and the projection of the second region at least have an overlapping region.

[0008] In some embodiments, the conversion layer further includes a third region, the third region has a third inner surface and a third outer surface, and the second region has a second inner surface and a second outer surface. Wherein, the third inner surface and the second inner surface form a first conversion angle, and the third outer surface and the second outer surface form a second conversion angle, and the first conversion angle is less than or equal to the second conversion angle.

[0009] In some embodiments, along the direction from the upper electrode to the lower electrode, the projection of the third region and the projection of the second region at least have an overlapping region.

[0010] In some embodiments, the non-volatile two-terminal memory part further includes a dielectric layer, the dielectric layer is disposed between the lower electrode and the upper electrode, and wherein, the dielectric layer is provided with a first through hole, and the surface of the first through hole is in contact with the first outer surface of the first region.

[0011] In some embodiments, a first concave structure is formed on a side of the lower electrode facing the conversion layer, and the first concave structure has a first concave sidewall and a first concave bottom surface; the first concave sidewall is cooperatively connected with a surface of the first through hole, and the first concave sidewall is in contact with at least part of a first outer surface; the first concave bottom surface is in contact with a second outer surface of the second region, such that at least part of the conversion layer is disposed within the first concave structure.

[0012] In some embodiments, when there is a potential difference between the lower electrode and the upper electrode, a conductive filament can be formed in the first transition region of the conversion layer.

[0013] In some embodiments, the first region has a first outer surface, the second region has a second outer surface, and an angular range of an included angle formed by the first outer surface and the second outer surface is 30° - 90°.

[0014] In a second aspect, the present application provides a manufacturing method for manufacturing a non-volatile two-terminal storage part, and the method includes: forming a dielectric layer on a lower electrode; forming a first through hole in the dielectric layer, wherein a bottom diameter of the first through hole is larger than a top diameter of the first through hole; and forming a conversion layer and an upper electrode in the first through hole, so that the conversion layer includes a first transition region having a local high electric field region.

[0015] In some embodiments, forming the first through hole in the dielectric layer includes: etching the dielectric layer along an inclined direction, such that the bottom diameter of the first through hole is larger than the top diameter of the first through hole.

[0016] In some embodiments, after forming the first through hole in the dielectric layer, the method further includes: etching the lower electrode to obtain a first concave structure.

[0017] In some embodiments, forming the conversion layer and the upper electrode in the first through hole includes: depositing and forming the conversion layer on a surface of the dielectric layer and the lower electrode, wherein the surface of the dielectric layer includes a surface of the first through hole; and forming an upper electrode on the conversion layer.

[0018] In some embodiments, forming the upper electrode on the conversion layer includes: using a planarization processing method to remove the conversion layer located on the dielectric layer; and depositing and forming the upper electrode on the dielectric layer from which the conversion layer is removed and on the conversion layer.

[0019] In some embodiments, depositing and forming the conversion layer on the surface of the dielectric layer and the lower electrode includes: using a physical vapor deposition method or using a chemical vapor deposition method to deposit and form the conversion layer on the surface of the dielectric layer and the lower electrode.

[0020] In a third aspect, the present application provides a memory, comprising: one or more non-volatile two-terminal storage parts according to any one of the first aspects.

[0021] In a fourth aspect, the present application provides an electronic device, comprising: one or more non-volatile two-terminal storage parts according to any one of the first aspects.

[0022] Through a non-volatile two-terminal storage part, manufacturing method and related products provided as above, the solution of the present disclosure enables the conductive filaments in the conversion layer to be formed in the first transition region by making the thickness of the first transition region less than the thicknesses of the first region and the second region, and enables the positions where the conductive filaments are formed to have a certain regularity, which can avoid the randomness and uncontrollability of the conductive filaments as in traditional resistive random access memories, thereby reducing the differences between the storage units of the memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] By reading the following detailed description with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood. In the drawings, several embodiments of the present disclosure are shown in an exemplary rather than restrictive manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0024] Figure 1a An exemplary cross-sectional view of a storage unit of an existing resistive random access memory is shown;

[0025] Figure 1b An exemplary cross-sectional view of the formation of conductive filaments in a storage unit of an existing resistive random access memory is shown;

[0026] Figure 2 An exemplary cross-sectional view of a non-volatile two-terminal storage part of some embodiments of the present disclosure is shown;

[0027] Figure 3 An exemplary cross-sectional view of a non-volatile two-terminal storage part of some other embodiments of the present disclosure is shown;

[0028] Figure 4a An exemplary cross-sectional view of a non-volatile two-terminal storage part of some other embodiments of the present disclosure is shown;

[0029] Figure 4b An exemplary cross-sectional view of a non-volatile two-terminal storage part of some other embodiments of the present disclosure is shown;

[0030] Figure 5 An exemplary block diagram of a method 500 for manufacturing a non-volatile two-terminal storage part of some embodiments of the present disclosure is shown;

[0031] Figure 6aShows an exemplary structural diagram after etching a dielectric layer along an inclined direction in some embodiments of the present disclosure;

[0032] Figure 6b Shows an exemplary structural diagram of etching a dielectric layer along multiple directions in some other embodiments of the present disclosure;

[0033] Figure 6c Shows an exemplary structural diagram of etching a dielectric layer along multiple directions in still some other embodiments of the present disclosure;

[0034] Figure 7 Shows an exemplary block diagram of method 700 for forming a conversion layer and an upper electrode in a first through-hole in some embodiments of the present disclosure.

[0035] Marking name

[0036] 10 - lower electrode, 20 - upper electrode, 30 - conversion layer, 31 - first region, 32 - second region, 321 - second inner surface, 322 - second outer surface, 33 - third region, 331 - third inner surface, 332 - third outer surface, 40 - dielectric layer, 41 - first through-hole. Detailed implementation manners

[0037] Next, the technical solutions in the embodiments of the present disclosure will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present disclosure.

[0038] It should be understood that the terms "including" and "comprising" used in the specification and claims of the present disclosure indicate the presence of the described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their combinations.

[0039] It should also be understood that the terms used in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. As used in the specification and claims of the present disclosure, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include the plural forms. It should also be further understood that the term " / and / " used in the specification and claims of the present disclosure refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0040] As used in this specification and the claims, the term "if" can be construed, depending on the context, as "when", "once", "in response to determining", or "in response to detecting". Similarly, the phrase "if determined" or "if [described condition or event] is detected" can be construed, depending on the context, to mean "once determined", "in response to determining", "once [described condition or event] is detected", or "in response to detecting [described condition or event]".

[0041] The specific embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0042] Figure 1a An exemplary cross-sectional view of a storage cell of an existing resistive random access memory is shown; Figure 1b An exemplary cross-sectional view of the formation of a conductive filament in a storage cell of an existing resistive random access memory is shown. As Figure 1a and 1b shown, the cross-sections of the upper electrode 20, the lower electrode 10, and the switching layer 30 of the existing resistive random access memory can be rectangular, and the distance between the upper electrode 20 and the lower electrode 10 can be equal. However, during the manufacturing process, due to the thin thickness of the switching layer (e.g., 1 - 20 nm) and problems in the manufacturing process of the switching layer, it is difficult to ensure the uniformity of the thickness of the switching layer, and the position with the minimum thickness of the switching layer cannot be determined, which makes the region where the conductive filament is formed also random, resulting in a large difference between storage cells.

[0043] Figure 2 An exemplary cross-sectional view of a non-volatile two-terminal storage section according to some embodiments of the present disclosure is shown. As Figure 2 shown, the non-volatile two-terminal storage section includes a lower electrode 10, an upper electrode 20, and a switching layer 30. The switching layer 30 is disposed between the lower electrode 10 and the upper electrode 20. The switching layer 30 at least includes a first region 31, a second region 32, and a first transition region (not shown in the figure) respectively in contact with the first region 31 and the second region 32. Wherein, the switching layer has a local high electric field region, and the local high electric field region is located in the first transition region. The thickness of the first transition region is less than the thicknesses of the first region and the second region. Wherein, along the direction from the upper electrode to the lower electrode, the projection of the first region and the projection of the second region at least have an overlapping region. In some embodiments, when there is a potential difference between the lower electrode 10 and the upper electrode 20, the switching layer 30 can form a conductive filament in the first transition region.

[0044] In some embodiments, the above non-volatile two-terminal storage section may include a resistive memory, a phase change memory, a ferroelectric memory, a magnetoresistive memory, etc., and other memories with similar structures, which are not limited herein.

[0045] In some embodiments, the aforementioned lower electrode 10 may be located at the bottom of the non-volatile two-terminal storage portion, the upper electrode 20 may be located at the top of the non-volatile two-terminal storage portion, and the conversion layer may be located between the lower electrode 10 and the upper electrode 20. Furthermore, the material of the lower electrode 10 may be an active metal, such as Ag, Cu and other metals. Preferably, the material of the lower electrode 10 may be copper metal. Compared with other metals, the main advantages of copper metal are high electrical conductivity and thermal conductivity, corrosion resistance, suitable strength, easy processing and forming, etc. In the embodiments of the present application, the first region lower electrode 10 may also be made of other metals as needed, which is not limited here. Furthermore, the material of the upper electrode 20 may be an inert metal, such as Pt, TiN and other metals. The material of the conversion layer may be a metal oxide, such as HfO2, TaO x , TiO2 and other metal oxides, the material of the conversion layer can also be a sulfur compound, such as GeS2 and other sulfur compounds.

[0046] In some embodiments, a convex structure may be formed on the side of the upper electrode 20 facing the lower electrode 10, and the convex structure may include a convex sidewall and a convex bottom. In some embodiments, the first region 31 may have a first inner surface and a first outer surface, and the second region 32 may have a second inner surface and a second outer surface. Specifically, the first inner surface may be the side facing the convex sidewall of the upper electrode 20, and the first outer surface may be the side facing away from the convex sidewall of the upper electrode 20. The second outer surface may be the side facing the lower electrode 10, and the second inner surface may be the side facing away from the lower electrode 10.

[0047] It should be understood that in the existing memory, when voltage is applied to the upper electrode 20 and the lower electrode 10, metal ions can migrate under the action of the electric field and form a conductive channel, which can be a conductive filament. When the voltage between the upper electrode 20 and the lower electrode 10 is removed, the conductive filament can dissipate. In this embodiment, the thickness of the first region, the thickness of the second region, or the thickness of the first transition region can be controlled to be the minimum value of the thickness of the conversion layer, so that the metal ions can form a conductive channel in the first region 31, the second region 32, or the first transition region, thereby forming a local high electric field region, so that the conductive filament can be formed in the local high electric field, wherein the aforementioned first transition region can be a portion connecting the first region 31 and the second region 32 in the conversion layer, and the composition of the first transition region can be the same as or different from the composition of the first region and the second region.

[0048] In some embodiments, the thickness of the first transition region can be less than the thickness of the first region 31 and the thickness of the second region 32. That is, at this time, there is a part with the minimum thickness in the first transition region, and the local high - electric - field region can be located in the first transition region. Specifically, after a voltage is applied between the lower electrode 10 and the upper electrode 20, in the conversion layer, since the thickness of the first transition region is less than the thickness of the first region 31, the intensity of the electric field in the first transition region can be greater than the intensity of the electric field in the first region 31. For the same reason, since the thickness of the first transition region is less than the thickness of the second region 32, the intensity of the electric field in the first transition region can also be greater than the intensity of the electric field in the second region 32. Therefore, the voltage in the first transition region of the conversion layer can be greater than the voltage in the first region 31 and the voltage in the second region 32 of the conversion layer, thereby forming a local high - electric - field region.

[0049] When the non - volatile two - terminal storage part is used for the first time, an initialization operation can be performed on the non - volatile two - terminal storage part. Specifically, taking the thickness of the first transition region being less than the thickness of the first region and the thickness of the second region as an example, a relatively high voltage (such as 3 - 5V) can be applied between the lower electrode 10 and the upper electrode 20 of the non - volatile two - terminal storage part, so that metal cations (such as Ag + 、Cu 2+ ) or oxygen vacancies in the conversion layer migrate under the drive of the electric field. It can be understood that since the intensity of the electric field in the first transition region is greater than the intensity of the electric field in the first region 31 and the second region 32, cations or oxygen vacancies can form nano - scale conductive channels in the first transition region, and these conductive channels can be conductive filaments. The conductive filaments can connect the lower electrode 10 and the upper electrode 20, enabling the storage unit of the non - volatile two - terminal storage part to enter the low - resistance state.

[0050] Furthermore, when writing to the storage unit of the non - volatile two - terminal storage part is required, a positive voltage (such as + 1V) can be applied to maintain or strengthen the conductive filament, and the storage unit can remain in the low - resistance state. When erasing the storage unit of the non - volatile two - terminal storage part is required, a reverse voltage (such as - 1V) can be applied to partially or completely destroy the conductive filament, enabling the storage unit to return to the high - resistance state.

[0051] Even further, when reading the storage unit of the non - volatile two - terminal storage part is required, a low voltage (such as 0.1 - 0.5V) can be applied, and the state of the storage unit can be judged by detecting the magnitude of the current. For example, when the current is large, the storage unit can be in the low - configuration state; when the current is small, it can be in the high - resistance state. It should be understood that the magnitude of the aforementioned low voltage is not sufficient to change the state of the storage unit.

[0052] In some embodiments, along the direction from the upper electrode 20 to the lower electrode 10, the projections of the first region 31 and the second region 32 may at least have an overlapping region. Specifically, the second outer surface of the second region 32 may be arranged parallel to the surface of the lower electrode 10. The thickness of the second region 32 may be fixed or variable. The distance between the first outer surface and the first inner surface may also be fixed or variable.

[0053] In a cross-sectional view of a storage cell of a non-volatile two-terminal storage section, along the direction from the upper electrode 20 to the lower electrode 10, the projection of the first region 31 may be a first line segment, and the projection of the second region 32 may be a second line segment, where the length of the first line segment may be less than the length of the second line segment, and the first line segment may be located inside the second line segment.

[0054] In a top view of a storage cell of a non-volatile two-terminal storage section, along the direction from the upper electrode 20 to the lower electrode 10, the projection of the first region 31 may be in the shape of a ring, the projection of the second region 32 may be in the shape of a circle, and the aforementioned ring may be located inside the circle, having an overlapping region.

[0055] In some embodiments, the included angle between the first inner surface and the second inner surface may be a third conversion angle, and the included angle between the first outer surface and the second outer surface may be a fourth conversion angle. It can be understood that when the projection of the first region and the projection of the second region at least have an overlapping region, the third conversion angle may be less than or equal to the fourth conversion angle. Further, the aforementioned third conversion angle may be an acute angle.

[0056] In some embodiments, the conversion layer may further include a third region 33 and a second transition region (not shown in the figure) that are in contact with the second region 32 and the third region 33 respectively. It can be understood that the second transition region may be a connecting portion of the second region 32 and the third region 33. The third region may have a third inner surface and a third outer surface.

[0057] In some embodiments, along the direction from the upper electrode to the lower electrode, the projection of the third region may have an overlapping portion with the projection of the second region. It can be understood that at this time, the angle formed by the third inner surface and the second inner surface may be an acute angle.

[0058] In some other embodiments, along the direction from the upper electrode to the lower electrode, the projection of the third region and the projection of the second region may be connected together, but they do not have an overlapping portion. It can be understood that at this time, the angle formed by the third inner surface and the second inner surface may be a right angle (as shown in Figure 2 the figure) or an obtuse angle.

[0059] According to the solution of the present disclosure, when the conductive filaments are formed in the first transition region, it is beneficial to inhibit the formation of conductive filaments in other regions of the switching layer, enabling the positions where the conductive filaments are formed to have a certain regularity, and avoiding the randomness and uncontrollability of the conductive filaments as in traditional resistive random access memories, thereby reducing the differences between the memory cells of the memory.

[0060] Figure 3 An exemplary cross-sectional view of a non-volatile two-terminal memory section according to some other embodiments of the present disclosure is shown. As Figure 3 shown, the switching layer further includes a third region 33, the third region 33 having a third inner surface 331 and a third outer surface 332, and the second region 32 having a second inner surface 321 and a second outer surface 322. Among them, the third inner surface 331 and the second inner surface 321 form a first switching angle, and the third outer surface 332 and the second outer surface 322 form a second switching angle, where the first switching angle is less than or equal to the second switching angle.

[0061] In some embodiments, the switching layer may include a first region 31, a second region 32, a third region 33, a first transition region, and a second transition region. Among them, the first transition region may be in contact with the first region 31 and the second region 32, and the second transition region may be in contact with the second region 32 and the third region 33.

[0062] In some embodiments, the second inner surface and the third inner surface may be surfaces facing the upper electrode, and the second outer surface and the third outer surface may be surfaces facing away from the upper electrode.

[0063] It can be understood that when the first switching angle is less than the second switching angle, within the second region 32, along the direction from the third region 33 to the first region 31, the distance between the second outer surface and the second inner surface may gradually increase; within the third region 33, along the direction from the lower electrode to the upper electrode, the distance between the third outer surface and the third inner surface may also gradually increase. Therefore, the thickness of the second transition region may be less than the thickness of the second region 32 and the thickness of the third region 33. At this time, when a voltage is applied between the lower electrode and the upper electrode, the voltage of the switching layer in the second transition region may be greater than the voltage in the second region 32 and the voltage in the third region 33. It can be understood that at this time, the thickness of the first transition region may be less than, equal to, or greater than the thickness of the second transition region. Therefore, the conductive filaments may be formed in the first transition region and / or the second transition region. Further, when the distance between the first switching angle and the second switching angle is the minimum value of the thickness of the second transition region, the conductive filaments may be formed between the first switching angle and the second switching angle.

[0064] When the first conversion angle is equal to the second conversion angle, it can be understood that at this time, the distance between the second inner surface and the second outer surface of the second region 32 can be maintained unchanged, and the distance between the third inner surface and the third inner surface of the third region 33 can also be maintained unchanged. It should be understood that since the thickness of the first transition region can be smaller than the thickness of the second region, the conductive filaments can also be formed in the first transition region.

[0065] By setting the first conversion angle to be less than or equal to the second conversion angle, the conductive filaments can be formed in the second transition region or the first transition region, which can make the positions where the conductive filaments are formed have a certain regularity, thereby reducing the difference between the storage units of the memory.

[0066] In some embodiments, along the direction from the upper electrode to the lower electrode, the projection of the third region 33 and the projection of the second region 32 have at least an overlapping region.

[0067] In some embodiments, the second outer surface of the second region 32 can be arranged parallel to the surface of the lower electrode. The thickness of the second region 32 can be fixed or variable. Specifically, when the thickness of the second region 32 is fixed, the distance between the second outer surface and the second inner surface can be fixed. When the thickness of the second region 32 is variable, the distance between the second outer surface and the second inner surface is also variable. For the same reason, the distance between the first outer surface and the first inner surface can also be fixed or variable.

[0068] In the cross-sectional view of the storage unit of the non-volatile two-terminal storage part, along the direction from the upper electrode 20 to the lower electrode 10, the projection of the third region 33 can be the third line segment, and the projection of the second region 32 can be the second line segment, wherein the length of the third line segment can be smaller than the length of the second line segment, and the third line segment can be located inside the second line segment.

[0069] In the top view of the storage unit of the non-volatile two-terminal storage part, along the direction from the upper electrode 20 to the lower electrode 10, the projection of the third region 33 can be in the shape of an annulus, and the projection of the second region 32 can be a circle, and the aforementioned partial annulus can be located inside the circle, having an overlapping region.

[0070] Figure 4a An exemplary cross-sectional view of a non-volatile two-terminal storage part showing other embodiments of the present disclosure is shown. Figure 4b An exemplary cross-sectional view of a non-volatile two-terminal storage part showing other embodiments of the present disclosure is shown. As Figure 4a and 4bAs shown, the non-volatile two-terminal storage portion further includes a dielectric layer 40, which is disposed between the lower electrode 10 and the upper electrode 20. Among them, the dielectric layer 40 is provided with a first through hole 41, and the surface of the first through hole is in contact with the first outer surface of the first region. In some embodiments, a first concave structure is formed on the side of the lower electrode facing the conversion layer. The first concave structure has a first concave side wall and a first concave bottom surface; the first concave side wall is cooperatively connected with the surface of the first through hole, and the first concave side wall is in contact with at least part of the first outer surface; the first concave bottom surface is in contact with the second outer surface of the second region, so that at least part of the conversion layer is disposed within the first concave structure.

[0071] In some embodiments, the first region has a first outer surface, the second region has a second outer surface, and the angle range of the included angle formed by the first outer surface and the second outer surface is 30° - 90°.

[0072] In some embodiments, the non-volatile two-terminal storage portion may include a lower electrode 10, an upper electrode 20, a conversion layer 30, and a dielectric layer 40. Specifically, the dielectric layer may be composed of an insulating material, such as a high dielectric constant material (such as SiO2, HfO2, etc.) or a nitride (such as SiN x ) etc. This dielectric layer can limit the migration path of ions / vacancies, thereby improving the controllability of the formation of conductive filaments.

[0073] In some embodiments, the dielectric layer 40 may be provided with a first through hole 41. Further, the bottom diameter of the first through hole may be greater than the top diameter of the first through hole. At this time, the surface of the first through hole may be inclined, and the surface of the first through hole and the plane where the lower electrode is located may form an acute angle. It can be understood that after the first through hole 41 is formed, when the conversion layer 30 is formed in the first through hole 41, since the surface of the first through hole is inclined, the first region of the conversion layer can also be formed on the surface of the first through hole in an inclined manner, and the first outer surface can be in contact with the surface of the first through hole.

[0074] In some other embodiments, the surface of the first through hole may include a first surface and a second surface. Among them, the first surface may be inclined and form an acute angle with the plane where the lower electrode is located; the second surface may be vertical and form a right angle with the plane where the lower electrode is located. In some embodiments, in the direction from the upper electrode to the lower electrode, the projection of the aforementioned first concave structure may be a ring.

[0075] Through the setting of the first concave structure, when the upper and lower electrodes are energized, the electric field can be concentrated in a smaller area to reduce the voltage required to form a conductive filament.

[0076] In some embodiments, the first region has a first outer surface, the second region has a second outer surface, and the angular range of the angle formed by the first outer surface and the second outer surface is 30°-90°.

[0077] In some embodiments, the angle formed by the aforementioned first outer surface and the second outer surface may be a fourth conversion angle, and the fourth conversion angle may be 30°, 60°, or 90°, etc. It can be understood that the conversion layer can be grown on the surface of the first through-hole of the dielectric layer. Therefore, the fourth conversion angle can be the same as the second dielectric angle of the first through-hole. Thus, the angular range of the second dielectric angle can also be 30°-90°.

[0078] It should be understood that when forming the conversion layer on the surface of the dielectric layer, the arrival angle of the surface and the deposition speed of the conversion layer can have a positive correlation. That is, when the arrival angle is smaller, the deposition speed can be slower; when the arrival angle is larger, the deposition speed of the conversion layer can be faster. On the dielectric layer, the arrival angle of the region around the second dielectric angle can reach the minimum value, that is, the deposition speed in the first transition region can be the slowest, so that the thickness of the conversion layer in this region can be precisely controlled. This will be combined later with Figure 5 a detailed description of the arrival angle of the dielectric layer.

[0079] Through the solution disclosed in this disclosure, the thickness of the conversion layer in the first conversion region can be more precisely controlled, and it can be ensured that the thickness of this region has better consistency.

[0080] Figure 5 An exemplary block diagram of a method 500 for manufacturing a non-volatile two-terminal storage part according to some embodiments of this disclosure is shown. As Figure 5 shown, the method includes: S501 forming a dielectric layer on a lower electrode; S502 forming a first through-hole in the dielectric layer, wherein the bottom diameter of the first through-hole is larger than the top diameter of the first through-hole; and S503 forming a conversion layer and an upper electrode in the first through-hole, so that the conversion layer includes a first transition region with a local high electric field region.

[0081] In some embodiments, before step S501, a substrate may be provided first, where the substrate may include a silicon-based substrate, a glass substrate, or a metal substrate, etc., and the specific selection of the substrate can be made according to the application scenario. Further, an electrode material may be deposited on the substrate to form a first electrode.

[0082] In step S501, forming a dielectric layer on the lower electrode may include depositing a dielectric layer on the lower electrode. The lower electrode may be made of a metal material, which may include titanium, tungsten, ruthenium, iridium, nickel, platinum, copper, silver, gold, aluminum, etc. The aforementioned dielectric layer may be a metal oxide with resistive switching characteristics, which may include aluminum, magnesium, yttrium, lanthanum, titanium, zirconium, hafnium, niobium, tantalum, cerium, chromium, molybdenum, tungsten, manganese, iron, cobalt, nickel, copper, gadolinium, zinc, germanium, tin, ytterbium, lutetium, etc.

[0083] Further, depositing a dielectric layer on the lower electrode may include growing it by physical methods such as Physical Vapor Deposition (PVD) or chemical methods such as Chemical Vapor Deposition (CVD).

[0084] In step S502, forming a first through-hole in the dielectric layer may include etching the dielectric layer to form the first through-hole. It can be understood that the etching can be performed in an inclined direction in the dielectric layer, so that the bottom diameter of the first through-hole is larger than the top diameter of the first through-hole. In some embodiments, the dielectric layer may be etched in a vacuum reaction chamber to form the first through-hole in the dielectric layer, exposing a part of the lower electrode that was originally covered by the dielectric layer. The direction from the lower electrode layer to the upper electrode layer may be the first direction, and the inclined direction may be a direction inclined to the first direction. In some embodiments, the included angle formed by the top surface of the dielectric layer and the surface of the first through-hole may be the first dielectric angle; the included angle formed by the surface of the first through-hole and the exposed surface of the lower electrode may be the second dielectric angle. Further, since the top radius of the first through-hole may be smaller than the bottom radius, the first dielectric angle may be greater than 270°, and the second dielectric angle may be less than 90°.

[0085] In step S503, a conversion layer and an upper electrode are formed in the first through-hole, so that the conversion layer includes a first transition region with a locally high electric field region. In some embodiments, the conversion layer may be formed in the first through-hole. After obtaining the conversion layer, the upper electrode may be formed on the conversion layer.

[0086] In some embodiments, the aforementioned conversion layer may have a locally high electric field region, which may be located in the first transition region. The thickness of the first transition region may be smaller than the thicknesses of the first region and the second region. Along the direction from the upper electrode to the lower electrode, the projections of the first region and the second region may at least have an overlapping region.

[0087] In some embodiments, forming a conversion layer in the first through-hole may include depositing on the top of the dielectric layer and the surface of the first through-hole of the dielectric layer, where methods such as PVD or CVD can be used for deposition.

[0088] It should be understood that during deposition, the angle formed by the surface being deposited can be the arrival angle. For example, when depositing on a flat surface, the arrival angle can be 180°; when depositing on a surface forming an acute angle, the arrival angle can be an acute angle, and when depositing on a surface forming a right angle, the arrival angle can be a right angle. Further, the deposition rate can be related to the arrival angle. When the arrival angle is smaller, the deposition rate is slower; when the arrival angle is larger, the deposition rate can be faster.

[0089] In some embodiments, when depositing on the top of the dielectric layer, the arrival angle can remain unchanged at 180°, so the deposition rate can remain unchanged. When depositing on the area where the top of the dielectric layer is in contact with the first through-hole (i.e., the area near the first dielectric angle), the arrival angle can be greater than 270°, and at this time the deposition rate can be relatively fast.

[0090] Further, when depositing on the surface of the first through-hole, the angle of the arrival angle can remain unchanged at 180°, and at this time the deposition rate can remain unchanged. After depositing on the surface of the first through-hole, the first region of the conversion layer can be formed. Furthermore, when depositing to the area where the first through-hole is in contact with the top of the lower electrode (i.e., the area near the second dielectric angle), at this time the arrival angle can be an acute angle, so the deposition rate can be slower at this time. After depositing on the area where the second dielectric angle is located, the first transition region of the conversion layer can be formed. When depositing on the exposed lower electrode, the arrival angle can also remain unchanged at 180°, and at this time the deposition rate can remain unchanged. After depositing on the lower electrode, the second region of the conversion layer can be formed.

[0091] It can be understood that during the above deposition process, since the deposition rate in the first transition region is the slowest, its thickness has better uniformity, and the thickness of this first transition region can be smaller than the thickness of the first region and the second region.

[0092] After finishing the deposition, deposition can be carried out on the deposited conversion layer to obtain the upper electrode. At this time, the thickness of the transition region can be smaller than the thickness of the first region and the second region.

[0093] In some embodiments, after the deposition of the conversion layer is completed, the first region, the conversion layer, and / or the second region of the conversion layer can also be etched as required to change the thickness of the first region, the conversion layer, and / or the second region, so that the thickness of the first region, the conversion region, or the second region can be minimized, thereby controlling the formation position of the conductive filaments. In other embodiments, when depositing the conversion layer on the dielectric layer, the deposition time can be controlled to control the deposition thickness. For example, when the deposition time in the first region is less than the deposition times in the first transition region and the second region, the minimum thickness can be obtained in the first region at this time. When the deposition time in the first transition region is less than the deposition times in the first region and the second region, the minimum thickness of the first transition region can be obtained at this time. When the deposition time in the second region is less than the deposition times in the first region and the first transition region, the minimum thickness of the second region can be obtained at this time. It can be understood that when the thickness of the first region or the second region is less than that of the first transition region, the corresponding process is relatively complex and difficult to control.

[0094] Preferably, through the above deposition process, the thickness of the first transition region can be made less than the thicknesses of the first region and the second region, so that the conductive filaments can be formed within the first transition region, which is beneficial to suppressing the formation of conductive filaments in other regions of the conversion layer and enabling the formation position of the conductive filaments to have a certain regularity.

[0095] Through the solution of the present disclosure, when forming the conversion layer, since the second dielectric angle of the dielectric layer is an acute angle, the deposition speed is the slowest in the region where the second dielectric angle is located, so that the thickness of the deposited first transition region is more uniform, and the thickness of the first transition region can be less than that of the first transition region and the second transition region. The formation position of the conductive filaments can be controlled within the first transition region, and the difference between different memory cells can be reduced. Further, by controlling the thicknesses of the first region, the conversion region, and the second region of the conversion layer, the region where the conductive filaments are formed can be controlled, the situation where the conductive filaments are formed at random positions can be reduced, and thus the difference between different memory cells can be reduced.

[0096] Figure 6a An exemplary structural diagram of the dielectric layer etched along an inclined direction in some embodiments of the present disclosure is shown; Figure 6b An exemplary structural diagram of the dielectric layer etched along multiple directions in other embodiments of the present disclosure is shown; Figure 6c An exemplary structural diagram of the dielectric layer etched along multiple directions in still other embodiments of the present disclosure is shown.

[0097] In some embodiments, forming the first through hole in the dielectric layer includes: etching the dielectric layer along an inclined direction such that the bottom diameter of the first through hole is larger than the top diameter of the first through hole.

[0098] In some embodiments, before etching the dielectric layer, a photoresist may be formed on the upper surface of the dielectric layer. The photoresist is selectively exposed by an exposure machine, and the exposed part or part of the photoresist of the unexposed part is removed by development to form a patterned mask layer. Further, a first through hole may be formed by etching the dielectric layer not covered by the patterned mask layer, and an exposed lower electrode may be obtained. After forming the first through hole, the patterned mask layer is removed.

[0099] As Figure 6a shown, in some embodiments, when etching the dielectric layer, the sidewall of the first through hole may be inclined by adjusting the tilt angle of the substrate or the incident direction of the ion beam. At this time, the bottom diameter of the first through hole may be larger than the top diameter of the first channel, and the first through hole may form a frustum-shaped structure with a smaller upper end and a larger lower end, etc. At this time, the cross-sectional shape of the first through hole may be a trapezoid without right angles.

[0100] In other embodiments, forming the first through hole in the dielectric layer may include etching the dielectric layer along multiple directions. Specifically, the dielectric layer may be etched along an inclined direction and a vertical direction. The first through hole as shown in Figure 6b or 6c can be obtained. At this time, the first through hole may form a frustum-shaped structure with a smaller upper end and a larger lower end, and its cross-sectional shape may be a right trapezoid.

[0101] Etching the dielectric layer along the inclined direction makes the second dielectric angle formed by the surface of the first through hole and the surface of the exposed lower electrode an acute angle. When depositing in the region where the acute angle is located subsequently, the deposition rate can be reduced, which is beneficial to maintaining the thickness of the conversion layer in this region.

[0102] In some embodiments, after forming the first through hole in the dielectric layer, the method further includes: etching the lower electrode to obtain a first concave structure.

[0103] In some embodiments, before etching the dielectric layer, a photoresist may be formed on the upper surface of the dielectric layer. The photoresist is selectively exposed by an exposure machine, and the exposed part or part of the photoresist of the unexposed part is removed by development to form a patterned mask layer. Further, a first through hole may be formed by etching the dielectric layer not covered by the patterned mask layer. At this time, the first through hole may be in contact with the lower electrode, and an exposed lower electrode may be obtained. Further, the exposed lower electrode may be continuously etched, so that a first concave structure can be obtained. After obtaining the first concave structure, the patterned mask layer is removed.

[0104] By etching the lower electrode, an edge structure can be formed such that an electric field can be formed in a local area, and when a conductive filament is formed in the first transition region, the voltage required for forming the conductive filament can be reduced.

[0105] Figure 7 FIG. 700 is an exemplary block diagram of a method for forming a conversion layer and an upper electrode in a first through hole according to some embodiments of the present disclosure. As Figure 7 shown, forming the conversion layer and the upper electrode in the first through hole includes: S701 depositing to form the conversion layer on the surface of the dielectric layer and the lower electrode, wherein the surface of the dielectric layer includes the surface of the first through hole; and S702 forming an upper electrode on the conversion layer.

[0106] In some embodiments, forming the upper electrode on the conversion layer includes: using a planarization method to remove the conversion layer located on the dielectric layer; and depositing to form the upper electrode on the dielectric layer from which the conversion layer has been removed and the conversion layer.

[0107] In some embodiments, during the process of depositing to form the conversion layer, at least the deposited conversion layer should cover the exposed first electrode and the surface of the first through hole of the dielectric layer, and methods such as PVD or CVD can be used for deposition. After depositing on the surface of the first through hole of the dielectric layer, a first region can be formed. Since the surface of the first through hole can remain unchanged at 180°, the arrival angle at the first through hole can remain unchanged at 180°, resulting in a constant deposition rate on the surface of the first through hole. When depositing on the lower electrode, a second region can be obtained, and its arrival angle can remain unchanged at 180°, resulting in a constant deposition rate on the surface of the lower electrode. After depositing on the region where the second dielectric angle is located, a first transition region can be formed. Since its arrival angle can be an acute angle, the deposition rate in this region can be less than the deposition rate on the surface of the first through hole and the deposition rate on the surface of the lower electrode, so the thickness of the deposition in the first transition region can have good consistency.

[0108] It can be understood that after obtaining the conversion layer, the conversion layer can cover the upper surface of the dielectric layer, the surface of the first through hole, and the surface of the exposed lower electrode. In some embodiments, the upper electrode can be directly deposited on the aforementioned conversion layer. In other embodiments, after removing the conversion layer located on the dielectric layer, deposition can be performed again to obtain the upper electrode. In some embodiments, when removing the conversion layer located on the dielectric layer, a planarization method can be used, which can include Chemical Mechanical Polishing (CMP).

[0109] With the solution disclosed herein, the speed of forming the first transition region can be relatively slow, so that the thickness of the first transition region can have better uniformity. Further, by removing the conversion layer on the dielectric layer, the upper electrode can be in direct contact with the dielectric layer, and the surface unevenness and defects can be reduced. This helps to improve the interface quality between the upper electrode and the dielectric layer, and improve the reliability and performance of the device.

[0110] In some embodiments, depositing and forming the conversion layer on the surface of the dielectric layer and the lower electrode includes: depositing and forming the conversion layer on the surface of the dielectric layer and the lower electrode by using physical vapor deposition method or chemical vapor deposition method.

[0111] The present disclosure also provides a memory, which includes: one or more non-volatile two-terminal storage parts of any one of the foregoing embodiments. These non-volatile two-terminal storages can be used to store instructions or data.

[0112] The present disclosure also provides an electronic device, which may include: one or more volatile two-terminal storage parts of any one of the foregoing embodiments.

[0113] In summary, with the solution disclosed herein, when the conductive filament is formed in the first transition region, it is beneficial to inhibit the formation of the conductive filament in other regions of the conversion layer, and the position where the conductive filament is formed can have a certain regularity, which can avoid the randomness and uncontrollability of the conductive filament as in the traditional resistive random access memory, so as to reduce the difference between the storage units of the memory.

[0114] Although multiple embodiments of the present disclosure have been shown and described herein, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Those skilled in the art can think of many changes, alterations, and alternative ways without departing from the spirit and scope of the present disclosure. It should be understood that various alternative solutions to the embodiments of the present disclosure described herein can be adopted in the practice of the present disclosure. The appended claims are intended to define the scope of protection of the present disclosure, and thus cover equivalents or alternative solutions within the scope of these claims.

Claims

1. A non-volatile two-terminal storage unit, characterized in that: The non-volatile two-terminal storage portion comprises a lower electrode (10), an upper electrode (20) and a conversion layer (30), wherein the conversion layer (30) is arranged between the lower electrode (10) and the upper electrode (20), and the conversion layer (30) comprises at least a first region (31), a second region (32) and a first transition region respectively contacting the first region (31) and the second region (32); The conversion layer (30) has a local high electric field region, the local high electric field region is located in the first transition region, and the thickness of the first transition region is smaller than the thickness of the first region (31) and the thickness of the second region (32); Wherein, along the direction from the upper electrode (20) to the lower electrode (10), the projection of the first region (31) and the projection of the second region (32) have at least an overlapping area.

2. The nonvolatile two-terminal storage unit according to claim 1, characterized in that: The conversion layer (30) further includes a third region, the third region having a third inner surface (331) and a third outer surface (332), the second region (32) having a second inner surface (321) and a second outer surface (322), wherein the third inner surface (331) and the second inner surface (321) form a first conversion angle, and the third outer surface (332) and the second outer surface (322) form a second conversion angle, wherein the first conversion angle is less than or equal to the second conversion angle.

3. The nonvolatile two-terminal storage unit according to claim 2, characterized in that: Along the direction from the upper electrode (20) to the lower electrode (10), the projection of the third region and the projection of the second region (32) have at least an overlapping area.

4. The nonvolatile two-terminal storage unit according to claim 1, characterized in that: The non-volatile two-terminal storage unit further comprises a dielectric layer (40), wherein the dielectric layer (40) is arranged between the lower electrode (10) and the upper electrode (20), wherein the dielectric layer (40) is provided with a first through hole (41), and a surface of the first through hole (41) is in contact with a first outer surface of the first region (31).

5. The nonvolatile two-terminal storage unit according to claim 4, characterized in that: A first concave structure is formed on a side of the lower electrode (10) facing the conversion layer (30), wherein the first concave structure has a first concave side wall and a first concave bottom surface; The first concave side wall is cooperatively connected with the surface of the first through hole (41), and the first concave side wall is in contact with at least a portion of the first outer surface; The first concave bottom surface is in contact with the second outer surface (322) of the second region (32), so that the conversion layer (30) is at least partially disposed within the first concave structure.

6. The nonvolatile two-terminal storage unit according to claim 1, characterized in that: When there is a potential difference between the lower electrode (10) and the upper electrode (20), the conversion layer (30) can form a conductive filament in the first transition region.

7. The nonvolatile two-terminal storage unit according to claim 1, wherein: The first region (31) has a first outer surface, the second region (32) has a second outer surface (322), and the angle formed by the first outer surface and the second outer surface (322) is in the range of 30°-90°.

8. A method for manufacturing a non-volatile two-terminal storage unit, characterized in that: The method comprises: forming a dielectric layer on the lower electrode; forming a first through hole in the dielectric layer, wherein a bottom diameter of the first through hole is greater than a top diameter of the first through hole; and A conversion layer and an upper electrode are formed in the first through hole so that the conversion layer includes a first transition region having a local high electric field region.

9. The method according to claim 8, characterized in that The forming of the first through hole in the dielectric layer comprises: etching the dielectric layer along an inclined direction so that a bottom diameter of the first through hole is larger than a top diameter of the first through hole.

10. The method according to claim 8, characterized in that After forming the first through hole in the dielectric layer, the method further comprises: etching the lower electrode to obtain a first concave structure.

11. The method according to claim 8, characterized in that The forming of the conversion layer and the upper electrode in the first through hole comprises: Depositing the conversion layer on the surface of the dielectric layer and the lower electrode, wherein the surface of the dielectric layer includes the surface of the first through hole; and An upper electrode is formed on the conversion layer.

12. The method according to claim 11, characterized in that Forming an upper electrode on the conversion layer comprises: Using a planarization method to remove the conversion layer located on the dielectric layer; and The upper electrode is deposited on the dielectric layer from which the conversion layer is removed and on the conversion layer.

13. The method according to claim 11, characterized in that Depositing the conversion layer on the surface of the dielectric layer and the lower electrode includes: depositing the conversion layer on the surface of the dielectric layer and the lower electrode using a physical vapor deposition method or a chemical vapor deposition method.

14. A memory, characterized in that: include: One or more non-volatile two-terminal storage units according to any one of claims 1-7.

15. An electronic device, characterized in that: include: One or more non-volatile two-terminal storage units according to any one of claims 1-7.

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