Method for selecting defect atlas in automatic optical inspection system

By designing the graph database and graph judgment system in the automatic optical inspection system and automatically selecting the appropriate defect map, the problem that existing systems cannot effectively detect defect chips when facing different wafers is solved, achieving more efficient detection accuracy and scanning speed, ensuring production delivery and cost-effectiveness.

CN120195183APending Publication Date: 2025-06-24JIANGSU SILICON INTEGRITY SEMICON TECH CO LTD
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Patent Information

Application Number
CN202510276422.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-10
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

When facing different batches and types of wafers, the existing automatic optical inspection system cannot effectively select the appropriate defect map, resulting in the defective chip being misjudged as invalid chips, which increases the need for manual retrieval and consumes time and resources.

Method used

Design a defect map selection method for automatic optical inspection system, preset the design map database and actual map database, and build a map judgment system, and automatically select the corresponding map based on the read Wafer ID of the wafer to be tested to detect and take photos of the defect chip.

Benefits of technology

This method can automatically select the corresponding maps of different wafers, reduce the number of defect maps, improve the efficiency of defect discrimination, improve the accuracy of chip detection, shorten the scanning time, ensure delivery time and save costs.

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Abstract

The invention discloses a method for selecting defect maps in an automatic optical inspection system. The method comprises the following steps: presetting a design map database, an actual map database and a map judgment system in the system; the system sends the read Wafer ID of the wafer to be detected to an atlas judgment system; the atlas judgment system executes according to the Wafer ID of the to-be-detected wafer in different situations, for different batches of wafers, whether an actual atlas identical to the Wafer ID of the to-be-detected wafer exists in an actual atlas database or not is judged firstly, if yes, defective chips on the surface of the to-be-detected wafer are detected according to distribution of effective chips in the actual atlas, and a defect atlas is obtained; and if the corresponding atlas of the Wafer ID of the wafer to be detected does not exist in the actual atlas database, calling a design atlas with the same Wafer ID from the design atlas database, and detecting a defective chip on the surface of the wafer to be detected to obtain a defect atlas. According to the invention, the number of defect maps can be reduced, the efficiency of defect discrimination is improved, and the accuracy and speed of chip detection are improved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor detection technology, and more particularly to a method for selecting defect maps in an automatic optical inspection system. Background Art

[0002] In the field of wafer-level packaging, a wafer is a circular silicon wafer on which many independent circuits are built, and a single independent circuit is called a die. For products that are directly wafer-level packaged after leaving the wafer fab, the total number of chips on each wafer is the same, and a map template with a fixed number of chips can be used for operation, and the automatic optical inspection can scan the fixed map; as Figure 4 shown in the wafer map in, the dark gray are functional chips, and the white is the invalid area at the wafer edge. The method for selecting defective chips is relatively simple.

[0003] Due to the development of advanced packaging technology, the packaging of chiplet, e-WLB and other chip recombinations is becoming increasingly popular. Each recombined wafer will have functional chips, invalid chips and / or defective chips. In the case of various different chip numbers, if the current automatic optical inspection system still operates according to the strategy of fixed scanning maps, it cannot meet the production requirements.

[0004] Currently, as Figure 5 shown in the wafer map in, the dark gray are functional chips, and the light gray are invalid chips (not defective chips). Due to the limitation of the equipment inspection principle, the invalid chips in this case will also be photographed as defective chips. Then, it is necessary to manually re-judge them as qualified chips later, which consumes the time of personnel and the scanning time, increases the production cycle of the product.

[0005] Therefore, there is an urgent need to provide a new method for selecting defect maps in an automatic optical inspection system. Summary of the Invention

[0006] In order to solve the above problems, the present invention provides a method for selecting defect maps in an automatic optical inspection system. This method can automatically select the maps corresponding to different wafers, reduce the number of defect maps, improve the efficiency of defect discrimination, greatly improve the accuracy of chip detection, increase the scanning speed, and ensure the delivery date and save costs as much as possible.

[0007] The present invention discloses a method for selecting defect maps in an automatic optical inspection system, which includes the following steps:

[0008] S1. Preset a design pattern database, an actual pattern database, and a pattern judgment system in the automatic optical inspection system; the design pattern database stores the design patterns of wafers in different batches and records the layout of the entire wafer; each design pattern is named with a unique code Wafer ID, and a scanning program is created according to the design pattern; the actual pattern database stores the actual patterns of wafers in different batches and records the distribution of valid chips in the wafer; each actual pattern is named with a unique code Wafer ID;

[0009] S2. The automatic optical inspection system sends the Wafer ID of the wafer to be tested read to the pattern judgment system;

[0010] S3. When the wafers to be tested in the same batch are all complete wafers, the pattern judgment system retrieves the design pattern with the same Wafer ID from the design pattern database according to the Wafer ID of the wafer to be tested, and operates according to the scanning program corresponding to the Wafer ID in the design pattern database. After detecting the defective chips on the surface of the wafer to be tested, it feeds back to the automatic optical inspection system and takes a fixed-point photo to obtain a defect pattern;

[0011] S4. When there are incomplete wafers in the wafers to be tested in the same batch or when the wafers to be tested are in different batches, the pattern judgment system first judges whether there is an actual pattern in the actual pattern database that is the same as the Wafer ID of the wafer to be tested according to the Wafer ID of the wafer to be tested. If it exists, retrieve the actual pattern and inspect the defective chips on the surface of the wafer to be tested according to the distribution of valid chips in the actual pattern, feed back to the automatic optical inspection system, and take a fixed-point photo to obtain a defect pattern; if there is no corresponding pattern of the Wafer ID of the wafer to be tested in the actual pattern database, retrieve the design pattern with the same Wafer ID from the design pattern database, and operate according to the scanning program corresponding to the Wafer ID in the design pattern database. After detecting the defective chips on the surface of the wafer to be tested, it feeds back to the automatic optical inspection system and takes a fixed-point photo to obtain a defect pattern.

[0012] Preferably, in step S1, the actual pattern is the electronic pattern generated when the sample wafer is loaded and converted into the pattern used by AOI, named with a unique code Wafer ID, and stored in the actual pattern database.

[0013] Preferably, the steps for establishing the scanning program of the design pattern are as follows:

[0014] Start creating a scanning program and create reading programs for wafers in different batches;

[0015] Align the wafer, import the design pattern, and create a standard image;

[0016] Select a wafer sample plan, Sample Plan, to determine the scanning range of the subsequent wafers to be tested; the rule is: when the wafer to be tested is a complete wafer, the scanned Sample Plan is the chip that fully selects the design pattern; when the wafer to be tested is an incomplete wafer, the scanned Sample Plan is to select the valid chips in the design pattern;

[0017] Create a new photographing program, including the magnification and light source parameters for photographing;

[0018] Complete the program establishment.

[0019] Preferably, in step S2, the automatic optical inspection system reads the Wafer ID of the wafer to be tested through optical character recognition OCR.

[0020] Preferably, in step S4, the pattern judgment system first identifies the positions of the valid chips in the actual pattern, inspects the chips at the corresponding positions of the wafer to be tested based on these positions. If any defective chips are detected, it records and feeds back the position information of the defective chips to the automatic optical inspection system, and then takes a fixed-point photograph to obtain a defective pattern.

[0021] Preferably, the automatic optical inspection system takes a fixed-point photograph with a color camera to obtain a defective photo.

[0022] Compared with the prior art, the beneficial effects of the present invention are:

[0023] When inspecting wafers of the same batch, different batches, complete, and incomplete wafers, the system in the present invention can automatically select the corresponding actual pattern / design pattern for different wafers, and operate according to the corresponding scanning plan, improving the scanning rate, reducing the number of defective patterns in the system operation in the prior art, improving the efficiency of defective chip discrimination, greatly improving the accuracy of chip detection, increasing the scanning speed, and maximizing the guarantee of delivery time and cost savings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic diagram of the electronic pattern generated when the sample wafer in the present invention is loaded;

[0025] Figure 2 is Figure 1 A schematic diagram of the actual pattern obtained by converting the electronic pattern into AOI;

[0026] Figure 3 It is a schematic diagram of the design pattern of the sample wafer in the present invention;

[0027] Figure 4 It is a schematic diagram of a wafer pattern with the same total number of chips as that of a wafer in the prior art;

[0028] Figure 5Schematic diagram of a wafer map with different total numbers of chips in the prior art. Detailed implementation manners

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments.

[0030] This embodiment discloses a method for selecting a defect map in an automatic optical inspection system, which includes the following steps:

[0031] S1. Pre-set a design map database, an actual map database, and a map judgment system in the automatic optical inspection system; the design map database stores the design maps of wafers in different batches and records the layout of the entire wafer; each design map is named with a unique code Wafer ID, and a scanning program is created according to the design map; the actual map database stores the actual maps of wafers in different batches and records the distribution of valid chips in the wafer; each actual map is named with a unique code Wafer ID.

[0032] S2. The automatic optical inspection system sends the Wafer ID of the wafer to be tested read to the map judgment system; the automatic optical inspection system reads the Wafer ID of the wafer to be tested through optical character recognition (OCR).

[0033] S3. When the wafers to be tested in the same batch are all complete wafers, the map judgment system retrieves the design map with the same Wafer ID from the design map database according to the Wafer ID of the wafer to be tested, and operates according to the scanning program corresponding to the Wafer ID in the design map database. After detecting the defective chips on the surface of the wafer to be tested, it feeds back to the automatic optical inspection system and takes a fixed-point photo to obtain a defect map.

[0034] S4. When there are incomplete wafers in the wafers to be tested in the same batch or wafers to be tested in different batches, the map judgment system first determines whether there is an actual map in the actual map database that is the same as the Wafer ID of the wafer to be tested according to the Wafer ID of the wafer to be tested. If it exists, retrieve the actual map and inspect the defective chips on the surface of the wafer to be tested according to the distribution of valid chips in the actual map, feed back to the automatic optical inspection system, and take a fixed-point photo to obtain a defect map; if there is no corresponding map of the Wafer ID of the wafer to be tested in the actual map database, retrieve the design map with the same Wafer ID from the design map database, and operate according to the scanning program corresponding to the Wafer ID in the design map database. After detecting the defective chips on the surface of the wafer to be tested, it feeds back to the automatic optical inspection system and takes a fixed-point photo to obtain a defect map.

[0035] In specific implementation, the pattern judgment system first identifies the positions of the valid chips in the actual pattern, inspects the chips at the corresponding positions on the wafer to be tested according to these positions. If defective chips are detected, it records and feeds back the position information of the defective chips to the automatic optical inspection system, and then takes a fixed-point photo to obtain a defect pattern.

[0036] The automatic optical inspection system takes a fixed-point photo through a color camera to obtain a defect photo.

[0037] In step S1, the actual pattern is the electronic pattern generated when the sample wafer is loaded, which is converted into the pattern used by AOI, named with a unique code Wafer ID, and stored in the actual pattern database. During the production process of the wafer, certain positions are prone to certain defects. For example, some chips have defects such as "metal residue", and some chips have defects such as "bump missing". The existence of these defective chips will inevitably affect the product quality. The actual pattern in the actual pattern database clearly records the positions of the defective chips in the wafer pattern to be tested. The electronic pattern generated when a batch of sample wafers are loaded is as Figure 1 shown, and its converted AOI actual pattern (visible pattern) is as Figure 2 shown. As can be seen from Figure 1 , Figure 2 , the electronic pattern records the regions of 00 valid chips, @@ alignment chips, FF invalid chips, and -- invalid regions. After being converted into the actual pattern, it can be intuitively seen that the green region is the valid chip region, the red region is the invalid chip region, the white region is the alignment chip, and the gray region is the invalid region. The actual pattern is more convenient for selecting defective chips in the wafer to be tested, reducing the situation of misjudging qualified valid chips as defective chips.

[0038] The design pattern is the electronic pattern of the layout of the entire wafer, as Figure 3 shown. The actual reconstituted wafer will have half valid chips and half dummy chips. The number of valid chips of this kind of wafer is part of the design pattern. When the program is established, it is newly built according to the designed pattern (100%). However, the actual reconstituted wafer has different proportions of chips, and these are all part of the design pattern. For example, a wafer can be designed with 4000 chips. When a wafer has 4000 chips, it is a complete wafer; when a wafer has only 2000 chips and the other 2000 are dummy chips, this is a semi-true and semi-false wafer, that is, an incomplete wafer. By establishing the scanning program for the design pattern, even for an incomplete wafer, the scanning range can be reduced, the scanning speed can be increased, and the detection time of defective chips can be saved.

[0039] The steps for establishing the scanning program of the design pattern are as follows:

[0040] Start to create a new scanning program and create reading programs for wafers of different batches;

[0041] Align the wafer, import the design pattern, and create a standard image; when detecting the subsequent wafers to be tested, compare each chip with the standard image;

[0042] Select the wafer sample plan (Sample Plan) to determine the scanning range of the subsequent wafers to be tested; the rule is: when the wafer to be tested is a complete wafer, the scanned Sample Plan is to select all the chips in the design pattern; when the wafer to be tested is an incomplete wafer, the scanned Sample Plan is to select the valid chips in the design pattern; this can narrow the scanning range and improve the scanning speed;

[0043] Create a new photographing program, including the magnification and light source parameters for photographing;

[0044] Complete the program establishment.

[0045] Among them, the photographing program takes photos of the defects on the chip for manual discrimination, because there will be over-inspection in the initial scanning results of the machine, and it is necessary to manually identify which ones are over-inspected to improve the yield.

[0046] Through the method for selecting defect patterns disclosed in the present invention, when facing the inspection of wafers of the same batch, different batches, complete, and incomplete wafers, the system can automatically select the actual patterns / design patterns corresponding to different wafers and operate according to the corresponding scanning plan, improve the scanning speed, reduce the number of defect patterns in the system operation in the prior art, improve the efficiency of defect chip discrimination, greatly improve the accuracy of chip detection, increase the scanning speed, and ensure the delivery date and save costs to the greatest extent.

[0047] The above are only some embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the creative concept of the present invention, other deformations and improvements can be made, and these all belong to the protection scope of the present invention.

Claims

1. A method for selecting a defect map in an automatic optical inspection system, characterized in that: The method comprises the following steps: S1. Preset a design map database, an actual map database and a map judgment system in the automatic optical inspection system; the design map database stores the design maps of different batches of wafers and records the layout of the entire wafer; each design map is named with a unique Wafer ID, and a new scanning program is created according to the design map; the actual map database stores the actual maps of different batches of wafers and records the distribution of valid chips in the wafer; each actual map is named with a unique Wafer ID; S2, the automatic optical inspection system sends the read Wafer ID of the wafer to be tested to the image judgment system; S3. When all wafers to be tested in the same batch are complete wafers, the pattern judgment system retrieves the design pattern with the same Wafer ID from the design pattern database according to the Wafer ID of the wafer to be tested, and operates according to the scanning program of the corresponding Wafer ID in the design pattern database. After inspecting the defective chips on the surface of the wafer to be tested, it is fed back to the automatic optical inspection system, and a fixed-point photo is taken to obtain a defect pattern; S4. When there are incomplete wafers in the same batch of wafers to be tested or wafers in different batches to be tested, the spectrum judgment system first determines whether there is an actual spectrum with the same Wafer ID as the wafer to be tested in the actual spectrum database according to the Wafer ID of the wafer to be tested. If so, the actual spectrum is retrieved and the defective chips on the surface of the wafer to be tested are inspected according to the distribution of valid chips in the actual spectrum, and the defective chips are fed back to the automatic optical inspection system, and a fixed-point photo is taken to obtain a defect spectrum; If the corresponding map of the Wafer ID of the wafer to be tested does not exist in the actual map database, the design map of the same Wafer ID is retrieved from the design map database, and the scanning procedure of the corresponding Wafer ID in the design map database is followed. After the defective chips on the surface of the wafer to be tested are detected, they are fed back to the automatic optical inspection system, and fixed-point photos are taken to obtain a defect map.

2. The method for selecting a defect map in an automatic optical inspection system according to claim 1, characterized in that: In step S1, the actual map is the electronic map generated when the sample wafer is loaded, which is converted into a map used by AOI, and is named with a unique Wafer ID and saved in the actual map database.

3. The method for selecting a defect map in an automatic optical inspection system according to claim 2, characterized in that: The steps for establishing the scanning program of the design map are as follows: Start creating a new scanning program and a new reading program for different batches of wafers; Wafer alignment, import design drawings, and create standard images; Select the wafer sample plan Sample Plan to determine the scanning range of the subsequent wafer to be tested; the rule is: when the wafer to be tested is a complete wafer, the scanned Sample Plan is the chip of the fully selected design map; when the wafer to be tested is an incomplete wafer, the scanned Sample Plan is the valid chip of the selected design map; Create a new photo-taking program, including the magnification and light source parameters; Complete program creation.

4. The method for selecting a defect map in an automatic optical inspection system according to claim 1, characterized in that: In step S2, the automatic optical inspection system reads the Wafer ID of the wafer to be tested through optical character recognition (OCR).

5. A method for selecting defect maps in an automatic optical inspection system according to claim 3 or 4, characterized in that: In step S4, the map judgment system first identifies the positions of valid chips in the actual map, and inspects the chips at corresponding positions of the wafer to be tested based on these positions. If defects are found during the inspection, the position information of the defective chips is recorded and fed back to the automatic optical inspection system, and then a fixed-point photo is taken to obtain a defect map.

6. The method for selecting a defect map in an automatic optical inspection system according to claim 5, characterized in that: The automatic optical inspection system obtains defect photos by taking photos at fixed points with a color camera.