Method and system for testing characteristics of MOS (Metal Oxide Semiconductor) transistor

By designing a MOS tube testing system that supports multi-channel interfaces and flexible signal allocation, the problem that traditional testing methods are difficult to evaluate the collaborative working performance of MOS tubes is solved, and efficient, comprehensive and accurate MOS tube testing is achieved, which is suitable for multi-tube parallel or series application scenarios.

CN120195523AActive Publication Date: 2025-06-24SHENZHEN XINTONG ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202510364437.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-26
Publication Date
2025-06-24
Estimated Expiration
2045-03-26

AI Technical Summary

Technical Problem

Traditional MOS tube testing methods are difficult to meet the complex requirements for the collaborative working performance of MOS tubes in multi-tube parallel or series application scenarios, especially in terms of voltage distribution uniformity, current distribution uniformity, thermal distribution characteristics, etc.

Method used

A method and system for testing the characteristics of MOS tubes is designed. Multiple MOS tubes are connected simultaneously through multi-channel interfaces. Combined with a flexible signal distribution unit, the energy recovery module and data acquisition module are used to measure the key characteristic parameters of the MOS tubes in real time, and the bias signal is dynamically adjusted through the feedback control algorithm to evaluate the collaborative working performance of the MOS tubes.

Benefits of technology

The efficiency of MOS tube testing is greatly improved, and the performance of MOS tubes can be evaluated from multiple dimensions (such as voltage distribution uniformity, current distribution uniformity, switching losses, thermal distribution characteristics, dynamic response speed and reliability coefficient), providing a scientific basis for design optimization and significantly reducing energy waste.

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Abstract

The invention discloses a method and a system for testing characteristics of an MOS (Metal Oxide Semiconductor) tube, and belongs to the technical field of MOS tube testing. The invention discloses a method for testing characteristics of MOS (Metal Oxide Semiconductor) tubes. The method comprises the following steps of: constructing a batch test system, arranging a multi-channel interface, connecting the MOS tubes to be tested, selecting different connection modes as required to construct a test circuit, designing an energy recovery module, storing excess energy through a super capacitor, and applying a bias signal to the test circuit. The multi-channel interface supports simultaneous connection of a plurality of MOS tubes, the flexible signal distribution unit is combined, the test efficiency is greatly improved, the energy recovery module stores excess energy through a super capacitor, energy waste is remarkably reduced, the environmental protection performance of the system is improved, a PID controller is used for dynamically adjusting bias signals, it is ensured that the test result meets the target condition, and the test efficiency is improved. Human intervention is avoided, and the performance of the MOS transistor in practical application is evaluated in multiple dimensions.
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Description

Technical Field

[0001] The present invention relates to the technical field of MOS transistor testing, and specifically provides a method and system for testing the characteristics of MOS transistors. Background Art

[0002] MOS transistors are power switching devices widely used in modern electronic equipment. Their performance directly affects the efficiency, stability, and reliability of circuits. Therefore, in the design and application processes, comprehensive testing of the characteristics of MOS transistors is particularly important.

[0003] Traditional MOS transistor testing methods usually perform static or dynamic parameter measurements on individual devices. However, with the development of power electronics technology, especially in application scenarios with multiple transistors in parallel or series, the cooperative working performance of MOS transistors (such as voltage distribution uniformity, current distribution uniformity, thermal distribution characteristics, etc.) has become a key indicator for evaluating the overall performance of the system. Traditional testing methods are difficult to meet these complex requirements. Summary of the Invention

[0004] The purpose of the present invention is to provide a method and system for testing the characteristics of MOS transistors. By supporting simultaneous connection of multiple MOS transistors through a multi-channel interface and combining a flexible signal distribution unit, the testing efficiency is greatly improved, thus solving the problems raised in the above background art.

[0005] To achieve the above purpose, the present invention provides the following technical solution: A method for testing the characteristics of MOS transistors, including building a batch testing system, setting a multi-channel interface, connecting the MOS transistors to be tested, constructing a test circuit according to different connection methods as needed, designing an energy recovery module, storing excess energy through a super capacitor, reusing the unused energy during high-voltage or high-current testing, applying a bias signal to the test circuit, using a data acquisition module to measure the key characteristic parameters of the MOS transistors in real time, analyzing the test data based on the collected data, evaluating the cooperative working performance of the MOS transistors in actual applications, where the evaluation of the cooperative working performance includes but is not limited to voltage distribution uniformity, current distribution uniformity, switching loss, thermal distribution characteristics, dynamic response speed, and reliability coefficient, and generating a detailed performance report.

[0006] Preferably, the steps for designing the energy recovery module are as follows:

[0007] The energy recovery module is integrated into the test system and works in coordination with the multi-channel interface and data acquisition module. The bidirectional DC-DC converter is connected to the power output terminal of the test circuit, and the energy storage element, the supercapacitor, is connected to the energy storage terminal of the bidirectional DC-DC converter. The energy management module communicates with the control module of the test system and uses voltage sensors and current sensors to monitor the output voltage and current of the test circuit in real time. If the output voltage of the test circuit exceeds the set threshold, it is considered that there is excess energy to be recovered. If the output current of the test circuit is lower than the set threshold, energy recovery can also be triggered. The energy management module controls the bidirectional DC-DC converter to enter the boost mode, and boosts the excess energy in the test circuit through the bidirectional DC-DC converter and stores it in the supercapacitor. When energy needs to be released, the energy management module controls the bidirectional DC-DC converter to enter the buck mode, and releases the energy in the supercapacitor through the bidirectional DC-DC converter and releases it into the test circuit. The voltage and remaining capacity of the supercapacitor are monitored in real time to avoid over-discharge, and the voltage and remaining capacity of the supercapacitor are monitored in real time to ensure its normal operation.

[0008] Preferably, the application of the bias signal is dynamically adjusted, and the specific steps are as follows:

[0009] According to the specifications or empirical values of the MOS transistors, set the initial bias signal and apply these initial values to the test circuit;

[0010] Use the data acquisition module to measure the key characteristic parameters of the MOS transistors in real time, store the collected data and perform preliminary analysis;

[0011] Calculate the key performance indicator KPI based on the collected data and determine whether the current bias signal meets the test objectives;

[0012] If the current bias signal fails to achieve the expected effect, dynamically adjust the bias signal according to the feedback control algorithm, reapply the adjusted bias signal to the test circuit, and repeat the data acquisition and analysis process until the target is met.

[0013] Preferably, the test objectives include clarifying the test purpose, determining the key parameters, and formulating specific target conditions. Clarifying the test purpose includes performance verification to verify whether the MOS transistors meet the design specifications, such as on-resistance, switching time, etc.; reliability assessment to evaluate the long-term stability of the MOS transistors under different operating conditions; optimization design to find the optimal operating point of the MOS transistors or improve the design scheme; fault diagnosis to locate potential problems or failure modes of the MOS transistors; according to the test purpose, select the key parameters to be tested, and set a reasonable numerical range or target value for each key parameter.

[0014] Adjust the target conditions according to the actual application environment of the MOS transistors;

[0015] A tolerance range is set for each target value to cope with fluctuations in actual tests. In some cases, there may be conflicts between multiple targets, and in this situation, a multi-objective optimization strategy needs to be introduced.

[0016] Preferably, the specific steps for the feedback control algorithm to dynamically adjust the bias signal are as follows:

[0017] The data acquisition module calculates the error signal e(t) by calculating the target value and the actual measured value;

[0018] The PID controller processes the error signal through three parts: proportional, integral, and derivative, and calculates a new bias signal value.

[0019] u(t): The adjusted bias signal;

[0020] e(t): The error signal, which is the difference between the target value and the actual value;

[0021] K p K i K d : Proportional, integral, and derivative coefficients. K p reflects the influence of the current error and directly adjusts the bias signal. K i eliminates the steady-state error and ensures long-term stability. K d suppresses the change rate of the error and prevents overshoot;

[0022] According to the current error signal e(t) and historical data, calculate a new bias signal value, and apply the calculated new bias signal to the test circuit;

[0023] After applying the new bias signal, re-collect the key characteristic parameters of the MOS transistor, calculate the key indicators according to the newly collected data, and determine whether the target value is reached. If the target is still not met, repeat the above steps until the error signal approaches zero or meets the accuracy requirements.

[0024] Preferably, the key characteristic parameters collected by the data acquisition module include but are not limited to: drain current I d , on-resistance R ds(on) , drain-source voltage V ds , gate drive current I g , switching time, power consumption or switching loss. A limiter circuit is added to the data acquisition module to prevent damage to the data acquisition module caused by excessive voltage or current. Opto-isolation or transformer isolation is used to protect the data acquisition module to avoid high-voltage or strong electromagnetic interference environments. A differential amplifier is used in the data acquisition link, which can effectively suppress common-mode interference and improve the signal-to-noise ratio; the collected data is filtered to eliminate high-frequency noise and other interference signals; the data acquisition module is calibrated regularly to ensure its measurement accuracy and stability.

[0025] Preferably, the method for evaluating the collaborative working performance of the MOS transistor in actual application is as follows:

[0026] Clean the data detected by the data acquisition module after meeting the test objectives, use filtering algorithms to remove noise, group the data by time, channel or test conditions for subsequent analysis, and perform normalization or standardization processing on data with different dimensions to ensure comparability of each parameter, and calculate the voltage distribution uniformity, current distribution uniformity, switching loss, thermal distribution characteristics, dynamic response speed and reliability coefficient.

[0027] Score the performance of each MOS transistor according to the above indicators, and organize the evaluation results into a report.

[0028] Preferably, the method further includes:

[0029] Design corresponding fault injection circuits according to the fault modes of the MOS transistors, where the fault modes include short circuit, open circuit, oxide layer breakdown and thermal runaway faults;

[0030] When testing the MOS transistors, connect the corresponding fault injection circuits and sequentially perform fault injection on the MOS transistors using each fault injection circuit;

[0031] During the fault injection process, monitor the characteristic parameters of the MOS transistors in real time, where the characteristic parameters of the MOS transistors include drain current, on-resistance, gate voltage and temperature;

[0032] Input the characteristic parameters monitored in real time into the test system, and evaluate the performance and reliability of the MOS transistors under fault conditions according to the characteristic parameters;

[0033] Analyze the fault tolerance and fault recovery capabilities of the MOS transistors according to the characteristic parameters, output the performance degradation index and recovery duration of the MOS transistors under fault conditions, and compare them with the predetermined performance degradation threshold and recovery required duration threshold respectively. If the performance degradation index is less than the performance degradation threshold and the recovery duration is less than the recovery required duration threshold, it means that the fault tolerance and fault recovery capabilities of the MOS transistors meet the requirements, otherwise, it means that the fault tolerance and / or fault recovery capabilities of the MOS transistors do not meet the requirements, and a MOS transistor performance warning message is issued.

[0034] Preferably, during the fault injection process, it further includes:

[0035] Dynamically adjust the intensity and strategy timing of fault injection according to the characteristic parameters monitored in real time, where

[0036] The intensity of fault injection is achieved by adjusting the power supply voltage or injecting current. Specifically, the PID control algorithm is used to dynamically adjust the intensity of fault injection. The PID control algorithm is as follows:

[0037]

[0038] where u(t) is the output data of PID control, K p is the proportional gain of PID control, e(t) is the error signal, and e(t) is equal to the target performance index minus the actual performance index. K i is the integral gain of PID control, e(τ) is the error signal at time τ, and K d is the derivative gain of PID control;

[0039] The strategy timing of fault injection includes: when the drain current exceeds the set current threshold, short-circuit fault injection is started; when the temperature exceeds the set temperature threshold, thermal runaway fault injection is started;

[0040] The following formula is used to evaluate the fault recovery ability of the MOS transistor:

[0041] t r = t 结束 - t 开始

[0042]

[0043] where t r is the fault recovery duration, t 结束 is the recovery time after fault injection, t 开始 is the start time of fault injection, η is the fault recovery rate, μ t is the number of fault recoveries within the predetermined fault injection measurement time t, and ω t is the number of fault injections within the predetermined fault injection measurement time t;

[0044] If the fault recovery duration and / or the fault recovery rate do not meet the set corresponding parameter requirements, a MOS transistor performance warning message is issued.

[0045] Preferably, the system includes:

[0046] Data acquisition module: used to measure the key characteristic parameters of the MOS transistor in real time. A shielded cable is used to connect the sensor and the data acquisition module to reduce the influence of noise;

[0047] Multi-channel interface: supports connecting multiple MOS transistors simultaneously to improve the test efficiency. The multi-channel interface includes, but is not limited to, series, parallel, and hybrid connection methods;

[0048] Signal generation module: provides a bias signal for the test circuit;

[0049] Energy recovery module: Stores excess energy through supercapacitors to reduce energy waste;

[0050] Data analysis and storage module: Processes the collected data and saves the test results to a database for subsequent analysis and comparison;

[0051] Display module: Displays test results and characteristic curves.

[0052] Compared with the prior art, the beneficial effects of the present invention are:

[0053] A method and system for testing the characteristics of MOS transistors proposed by the present invention. The multi-channel interface supports connecting multiple MOS transistors simultaneously. Combined with a flexible signal distribution unit, the test efficiency is significantly improved. The energy recovery module stores excess energy through supercapacitors, significantly reducing energy waste and enhancing the environmental performance of the system. The PID controller is used to dynamically adjust the bias signal to ensure that the test results meet the target conditions and avoid human intervention. The performance of MOS transistors in practical applications is evaluated from multiple dimensions such as voltage distribution uniformity, current distribution uniformity, switching loss, thermal distribution characteristics, dynamic response speed, and reliability coefficient, providing a scientific basis for design optimization. Through the above method and system, comprehensive, efficient, and accurate testing of the characteristics of MOS transistors can be achieved, providing reliable technical support for the design and application of MOS transistors. Description of the Drawings

[0054] Figure 1 It is a flowchart of the method for testing the characteristics of MOS transistors of the present invention. Detailed Embodiments

[0055] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0056] To solve the problem that the existing traditional MOS transistor test methods usually perform static or dynamic parameter measurements on a single device, please refer to Figure 1 , the following technical solutions are provided in this embodiment:

[0057] To achieve the above object, the present invention provides the following technical solutions: A method for testing the characteristics of MOS transistors, including building a batch testing system. Specifically, building the batch testing system includes constructing a temperature and humidity controlled testing environment to reduce the influence of external factors on the test results. A temperature and humidity test chamber is used as the core device. Inside the temperature and humidity test chamber, there are heating and cooling systems, humidifying and dehumidifying systems, air circulation systems, and heat insulation and sealing systems. A PID controller is used to adjust the power of the heating and cooling systems to precisely control the temperature. In combination with the humidifying and dehumidifying systems, the humidity is adjusted through the PID controller. The temperature and humidity control need to work together to avoid mutual interference. A data acquisition module is used to record the temperature and humidity change curves and provide a visualization interface to display the current temperature and humidity status in real time.

[0058] Set up multi-channel interfaces to connect the MOS transistors to be tested. Select different connection methods according to needs to construct a test circuit. Design an energy recovery module to store excess energy through a supercapacitor and reuse the unused energy in high-voltage or high-current tests. Apply a bias signal to the test circuit. Use a data acquisition module to measure the key characteristic parameters of the MOS transistors in real time. Based on the collected data, analyze the test data and evaluate the cooperative working performance of the MOS transistors in actual applications. The evaluation of the cooperative working performance includes, but is not limited to, voltage distribution uniformity, current distribution uniformity, switching loss, thermal distribution characteristics, dynamic response speed, and reliability coefficient, and generate a detailed performance report.

[0059] The steps for designing the energy recovery module are as follows:

[0060] The energy recovery module is integrated into the test system and works in cooperation with the multi-channel interfaces and the data acquisition module. Connect a bidirectional DC-DC converter to the power output terminal of the test circuit. The energy storage element, the supercapacitor, is connected to the energy storage terminal of the bidirectional DC-DC converter. The energy management module communicates with the control module of the test system. Use voltage sensors and current sensors to monitor the output voltage and current of the test circuit in real time. If the output voltage of the test circuit exceeds the set threshold, it is considered that there is excess energy to be recovered. If the output current of the test circuit is lower than the set threshold, energy recovery can also be triggered. The energy management module controls the bidirectional DC-DC converter to enter the boost mode, boosts the excess energy in the test circuit through the bidirectional DC-DC converter, and stores it in the supercapacitor. When energy needs to be released, the energy management module controls the bidirectional DC-DC converter to enter the buck mode, and releases the energy in the supercapacitor through the bidirectional DC-DC converter to the test circuit. Monitor the voltage and remaining capacity of the supercapacitor in real time to avoid over-discharge and ensure its normal operation.

[0061] For applying the bias signal, dynamic adjustment is adopted. The specific steps are as follows:

[0062] Set the initial bias signal according to the specifications or empirical values of the MOS transistor, and apply these initial values to the test circuit;

[0063] Use a data acquisition module to measure the key characteristic parameters of the MOS transistor in real time, including but not limited to: drain current I d, on-resistance R ds(on) , drain-source voltage V ds , switching time (rise time and fall time), store the collected data and perform preliminary analysis;

[0064] Calculate the key performance indicators KPI based on the collected data, for example: R ds(on) = I d / V ds , switching loss: calculated by integrating the energy during the switching process, E loss = ∫V ds · I d dt, and determine whether the current bias signal meets the test objectives, such as the on-resistance being lower than a certain threshold, minimizing the switching loss, etc.;

[0065] If the current bias signal fails to achieve the expected effect, adjust the bias signal dynamically according to the feedback control algorithm, re-apply the adjusted bias signal to the test circuit, and repeat the data acquisition and analysis process until the objective is met.

[0066] The test objectives include clarifying the test purpose, determining the key parameters, and formulating specific target conditions. Clarifying the test purpose includes performance verification to verify whether the MOS transistor meets the design specifications, such as on-resistance, switching time, etc.; reliability assessment to evaluate the long-term stability of the MOS transistor under different operating conditions; optimization design to find the optimal operating point of the MOS transistor or improve the design scheme; fault diagnosis to locate potential problems or failure modes of the MOS transistor; according to the test purpose, select the key parameters to be tested, and set a reasonable value range or target value for each key parameter, for example:

[0067] On-resistance R ds(on) : The target value is 0.5Ω ± 0.05Ω;

[0068] Switching time: turn-on time t on < 100ns, turn-off time t off < 150ns.

[0069] Temperature rise: junction temperature T j ≤ 125°C.

[0070] Adjust the target conditions according to the actual application environment of the MOS transistor. For example: in high-frequency applications, give priority to reducing the switching loss E loss , in high-power applications, pay attention to the thermal distribution characteristics and reliability.

[0071] A tolerance range is set for each target value to cope with fluctuations in actual tests. For example, the target value of the on-resistance is 0.5 Ω, and the tolerance range is ±0.05 Ω. In some cases, there may be conflicts between multiple targets. For example, reducing the on-resistance may increase the switching loss. In this case, a multi-objective optimization strategy needs to be introduced: Trade-off analysis: Assign weights to different targets according to actual needs. For example, prioritize ensuring the on-resistance and then optimize the switching loss.

[0072] Pareto optimal solution: Use a multi-objective optimization algorithm to find a set of parameter combinations with the best comprehensive performance.

[0073] The specific steps for the feedback control algorithm to dynamically adjust the bias signal are as follows:

[0074] The data acquisition module calculates the error signal e(t) by computing the target value and the actual measured value;

[0075] The PID controller processes the error signal through three parts: proportional, integral, and derivative, and calculates a new bias signal value,

[0076] u(t): The adjusted bias signal;

[0077] e(t): The error signal, which is the difference between the target value and the actual value;

[0078] K p , K i , K d : Proportional, integral, and derivative coefficients. K p reflects the influence of the current error and directly adjusts the bias signal. K i eliminates the steady-state error and ensures long-term stability. K d suppresses the change rate of the error and prevents overshoot;

[0079] Based on the current error signal e(t) and historical data, calculate a new bias signal value. If the current on-resistance is R current = 2 Ω, the target value is R target = 1 Ω, and K p = 0.5, K i = 0.1, K d = 0.01, then the new gate voltage is:

[0080]

[0081] Apply the calculated new bias signal to the test circuit;

[0082] After applying a new bias signal, the key characteristic parameters of the MOS transistor are recollected, the key indicators are calculated based on the newly collected data, and it is judged whether the target value is reached. If the target is still not met, the above steps are repeated until the error signal approaches zero or meets the accuracy requirements.

[0083] The key characteristic parameters collected by the data acquisition module include but are not limited to: drain current I d 、on-resistance R ds(on) 、drain-source voltage V ds 、gate drive current I g 、switching time, power consumption or switching loss. An amplitude limiting circuit is added to the data acquisition module to prevent damage to the data acquisition module caused by excessive voltage or current. Opto-isolation or transformer isolation is used to protect the data acquisition module to avoid high voltage or strong electromagnetic interference environments. A differential amplifier is used in the data acquisition link, which can effectively suppress common-mode interference and improve the signal-to-noise ratio; the collected data is filtered to eliminate high-frequency noise and other interference signals; the data acquisition module is calibrated regularly to ensure its measurement accuracy and stability.

[0084] The method for evaluating the cooperative working performance of the MOS transistor in actual applications is as follows:

[0085] The data detected by the data acquisition module after meeting the test target is subjected to data cleaning. Filtering algorithms are used to remove noise, and the data is grouped by time, channel or test conditions for subsequent analysis. Data with different dimensions is normalized or standardized to ensure the comparability of each parameter. Calculate the voltage distribution uniformity, current distribution uniformity, switching loss, thermal distribution characteristics, dynamic response speed and reliability coefficient.

[0086] Specifically, the voltage deviation ΔV max = max(V ds , i) - min(V ds , i);

[0087] V ds , i: the drain-source voltage of the i-th MOS transistor. If ΔV max exceeds the set threshold, it is considered that the voltage distribution is uneven;

[0088] The current deviation ΔI max = max(I d , i) - min(I d , i);

[0089] I d , i: the drain current of the i-th MOS transistor. If ΔI max exceeds the set threshold, it is considered that the current distribution is uneven;

[0090] Switching loss: E loss= ∫V ds ·I d dt, where the integration range is the switching transient process, the turn-on or turn-off stage, comparing the switching losses of different MOS transistors to identify high-loss devices;

[0091] Thermal distribution characteristics, calculating the temperature rise ΔT = T max -T ambient ;

[0092] T max : the maximum junction temperature, T ambient : the ambient temperature. If the temperature rise of a certain MOS transistor is significantly higher than that of other devices, there may be uneven thermal distribution;

[0093] Dynamic response speed: measuring the rise time and fall time:

[0094] Rise time: the time for the drain current I d to reach the steady value from 10% to 90%,

[0095] Fall time: the time for the drain current I d to approach zero from 90% to 10%. Comparing the dynamic response speeds of different MOS transistors to identify devices with abnormal response speeds;

[0096] Reliability coefficient calculation of failure rate:

[0097] Based on historical data or the results of accelerated life tests, estimating the failure rate of MOS transistors;

[0098] λ = total operating time number of failures / number of failures total operating time;

[0099] If the failure rate of one of the MOS transistors is significantly higher than that of other devices, it is necessary to further check its manufacturing process or application conditions;

[0100] According to the above indicators, score the performance of each MOS transistor and organize the evaluation results into a report.

[0101] On the basis of the foregoing embodiments, the method further includes:

[0102] According to the failure modes of MOS transistors, designing corresponding fault injection circuits, where the failure modes include short circuit, open circuit, oxide layer breakdown, and thermal runaway faults;

[0103] When testing MOS transistors, by connecting the corresponding fault injection circuits, sequentially perform fault injection on the MOS transistors using each fault injection circuit;

[0104] During the fault injection process, real-time monitor the characteristic parameters of the MOS transistors, where the characteristic parameters of the MOS transistors include drain current, on-resistance, gate voltage, and temperature;

[0105] Input the real-time monitored characteristic parameters into the test system, and evaluate the performance and reliability of the MOS transistor under fault conditions according to the characteristic parameters;

[0106] Analyze the fault tolerance and fault recovery capabilities of the MOS transistor according to the characteristic parameters, output the performance degradation index and recovery duration of the MOS transistor under fault conditions, and compare them with the predetermined performance degradation threshold and recovery required duration threshold respectively. If the performance degradation index is less than the performance degradation threshold and the recovery duration is less than the recovery required duration threshold, it means that the fault tolerance and fault recovery capabilities of the MOS transistor meet the requirements; otherwise, it means that the fault tolerance and / or fault recovery capabilities of the MOS transistor do not meet the requirements, and a MOS transistor performance warning message is issued.

[0107] Specifically, for the test of the MOS transistor characteristics, this solution selects to build a fault injection circuit. By implementing fault injection during the MOS transistor test, various possible fault conditions of the MOS transistor are simulated, and the characteristic parameters of the MOS transistor during this fault injection are monitored. This serves as the basis for data analysis. The test system evaluates according to the characteristic parameters of the MOS transistor during this fault injection. The performance degradation index and recovery duration are used as the performance evaluation indicators of the MOS transistor and compared with the predetermined performance degradation threshold and recovery required duration threshold respectively, so as to quantitatively analyze an objective evaluation conclusion. According to the quantitative comparison conclusion, it is judged whether a warning is needed. The MOS transistor test of this solution is more targeted, improving the objectivity and reliability of the conclusion.

[0108] On the basis of the foregoing embodiments, during the fault injection process, it further includes:

[0109] Dynamically adjust the intensity and strategy timing of fault injection according to the real-time monitored characteristic parameters, where,

[0110] The intensity of fault injection is achieved by adjusting the power supply voltage or injecting current. Specifically, the PID control algorithm is used to dynamically adjust the intensity of fault injection. The PID control algorithm is as follows:

[0111]

[0112] where, u(t) is the output data of the PID control, K p is the proportional gain of the PID control, e(t) is the error signal, e(t) is equal to the target performance index minus the actual performance index, K i is the integral gain of the PID control, e(τ) is the error signal at time τ, K d is the differential gain of the PID control;

[0113] The policy timing of fault injection includes: when the drain current exceeds the set current threshold, short-circuit fault injection starts; when the temperature exceeds the set temperature threshold, thermal runaway fault injection starts.

[0114] The following formula is used to evaluate the fault recovery ability of the MOS transistor:

[0115] t r = t 结束 - t 开始

[0116]

[0117] where, t r is the fault recovery duration, t 结束 is the recovery moment after fault injection, t 开始 is the start moment of fault injection, η is the fault recovery rate, μ t is the number of fault recoveries within the predetermined fault injection measurement time t, ω t is the number of fault injections within the predetermined fault injection measurement time t;

[0118] If the fault recovery duration and / or the fault recovery rate do not meet the requirements of the set corresponding parameters, a warning message about the performance of the MOS transistor is issued.

[0119] Specifically, when using the fault injection method to detect the characteristics of the MOS transistor, the timing and intensity of fault injection are adjusted accordingly according to the detection data. On the one hand, it can make the fault injection test more similar to the fault occurrence in the application, making the evaluation of the applicability of the MOS transistor more accurate; on the other hand, by reasonably determining the fault injection timing, the test energy consumption can be saved and the test efficiency can be improved; the intensity regulation uses the PID control algorithm, which is convenient for control operation and easy to implement; it provides a relatively simple calculation method for evaluation parameters, which can improve the timeliness of feedback of test results and the test efficiency. Using calculation to implement quantitative evaluation is also beneficial to improving the objectivity, visibility and reliability of the results.

[0120] To better show the process of testing the characteristics of the MOS transistor, this embodiment now proposes a system for testing the characteristics of the MOS transistor, including the following steps:

[0121] Data acquisition module: used to measure the key characteristic parameters of the MOS transistor in real time. A shielded cable is used to connect the sensor and the data acquisition module to reduce the influence of noise;

[0122] Multi-channel interface: supports connecting multiple MOS transistors simultaneously to improve the test efficiency. The multi-channel interface includes, but is not limited to, series, parallel and hybrid connection methods; the multi-channel interface includes:

[0123] Physical connection ports, used to connect the pins or terminals of the device under test, including pins, sockets, fixtures, or other customized connectors.

[0124] Signal distribution unit, responsible for distributing the signals of the test system to each channel, including a switch matrix or multiplexer, for flexible switching of signal paths;

[0125] Isolation and protection unit, ensuring electrical isolation between each channel, preventing signal interference or damage, including functions such as overvoltage protection, overcurrent protection, and electrostatic discharge protection;

[0126] Drive and amplification unit, providing sufficient driving ability to ensure that signals can be accurately transmitted to each device under test, may include a power amplifier or buffer to enhance signal quality;

[0127] Data acquisition unit, used to monitor the output signals of each channel in real time, including an analog-to-digital converter ADC and a digital signal processor DSP to achieve high-precision data acquisition.

[0128] Signal generation module: provides a bias signal for the test circuit;

[0129] Energy recovery module: stores excess energy through a supercapacitor to reduce energy waste;

[0130] Data analysis and storage module: processes the collected data and saves the test results to a database for subsequent analysis and comparison;

[0131] Display module: displays the test results and characteristic curves.

[0132] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "including", "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device.

[0133] Although the embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention.

Claims

1. A method for testing the characteristics of a MOS tube, characterized in that: It includes building a batch test system, setting up a multi-channel interface, connecting the MOS tube to be tested, selecting different connection methods as needed to build a test circuit, designing an energy recovery module, storing excess energy through supercapacitors, applying a bias signal to the test circuit, and using a data acquisition module to measure the key characteristic parameters of the MOS tube in real time. Based on the collected data, the test data is analyzed and the collaborative working performance of the MOS tube in actual applications is evaluated. At the same time, according to the failure mode of the MOS tube, the corresponding fault injection circuit is designed and implemented, the performance, reliability, fault tolerance and fault recovery capability of the MOS tube in fault conditions are monitored and evaluated in real time, and a detailed performance report is generated.

2. The method for testing MOS tube characteristics according to claim 1, characterized in that: The steps of designing the energy recovery module are as follows: The energy recovery module is integrated into the test system and works in conjunction with the multi-channel interface and data acquisition module to connect the bidirectional DC-DC converter to the power output end of the test circuit, and the energy storage element supercapacitor is connected to the energy storage end of the bidirectional DC-DC converter. The energy management module communicates with the control module of the test system and uses a voltage sensor and a current sensor to monitor the output voltage and current of the test circuit in real time. If the output voltage of the test circuit exceeds the set threshold, it is considered that there is excess energy that can be recovered. If the output current of the test circuit is lower than the set threshold, energy recovery is triggered, and the energy management module controls the bidirectional DC-DC converter to enter the boost mode, and the excess energy in the test circuit is boosted by the bidirectional DC-DC converter and stored in the supercapacitor. When energy needs to be released, the energy management module controls the bidirectional DC-DC converter to enter the buck mode, and the energy in the supercapacitor is bucked by the bidirectional DC-DC converter and released to the test circuit.

3. The method for testing MOS tube characteristics according to claim 1, characterized in that: The bias signal is dynamically adjusted, and the specific steps are as follows: According to the specifications or empirical values ​​of the MOS tube, set the initial bias signal and apply these initial values ​​to the test circuit; Use the data acquisition module to measure the key characteristic parameters of the MOS tube in real time, store the collected data and conduct preliminary analysis; Calculate the key performance indicator KPI based on the collected data to determine whether the current bias signal meets the test objectives; If the current bias signal fails to achieve the expected effect, the bias signal is dynamically adjusted according to the feedback control algorithm, the adjusted bias signal is reapplied to the test circuit, and the data acquisition and analysis process is repeated until the target is met.

4. The method for testing MOS tube characteristics according to claim 3, characterized in that: The test objectives include clarifying the test purpose, determining key parameters and formulating specific target conditions. The test objectives include performance verification, reliability evaluation, design optimization, and fault diagnosis. According to the test purpose, the key parameters to be tested are selected, and a reasonable numerical range or target value is set for each key parameter. The target conditions are adjusted according to the actual application environment of the MOS tube, and a tolerance range is set for each target value to cope with fluctuations in actual testing.

5. The method for testing MOS tube characteristics according to claim 3, characterized in that: The specific steps of the feedback control algorithm to dynamically adjust the bias signal are as follows: The data acquisition module calculates the target value and the actual measured value to calculate the error signal e(t); The PID controller processes the error signal through three parts: proportional, integral and differential, and calculates the new bias signal value. u(t): adjusted bias signal; e(t): error signal, the difference between the target value and the actual value; K p , K i , K d : Proportional, integral and differential coefficients, K p Reflect the impact of the current error and directly adjust the bias signal, K i Eliminate steady-state errors and ensure long-term stability, K d Suppress the rate of change of error to prevent overshoot; Calculate a new bias signal value according to the current error signal e(t) and historical data, and apply the calculated new bias signal to the test circuit; After applying a new bias signal, the key characteristic parameters of the MOS tube are collected again, and the key indicators are calculated based on the newly collected data to determine whether the target value is reached. If the target is still not met, the above steps are repeated until the error signal approaches zero or meets the accuracy requirements.

6. The method for testing MOS tube characteristics according to claim 1, characterized in that: The key characteristic parameters collected by the data acquisition module include but are not limited to: drain current I d , on-resistance R ds(on) , drain-source voltage V ds , Gate drive current I g , switching time, power consumption or switching loss, use a differential amplifier in the data acquisition process; filter the collected data to eliminate high-frequency noise and other interference signals; and calibrate the data acquisition module regularly.

7. The method for testing MOS tube characteristics according to claim 1, characterized in that: The method for evaluating the collaborative working performance of MOS tubes in practical applications is as follows: After the test objectives are met, the data detected by the data acquisition module is cleaned, and the noise is removed using a filtering algorithm. The data is grouped by time, channel or test condition to facilitate subsequent analysis. The data of different dimensions are normalized or standardized to ensure the comparability of various parameters. The voltage distribution uniformity, current distribution uniformity, switching loss, thermal distribution characteristics, dynamic response speed and reliability coefficient are calculated. The performance of each MOS tube is scored according to the above indicators, and the evaluation results are compiled into a report.

8. The method for testing MOS tube characteristics according to claim 1, characterized in that: Also includes: Design the corresponding fault injection circuit according to the failure mode of MOS tube, where the failure mode includes short circuit, open circuit, oxide layer breakdown and thermal runaway failure; When testing the MOS tube, by connecting the corresponding fault injection circuits, each fault injection circuit is used in turn to inject faults into the MOS tube; During the fault injection process, the characteristic parameters of the MOS tube are monitored in real time, wherein the characteristic parameters of the MOS tube include drain current, on-resistance, gate voltage and temperature; Input the characteristic parameters monitored in real time into the test system, and evaluate the performance and reliability of the MOS tube under fault conditions based on the characteristic parameters; The fault tolerance and fault recovery capabilities of the MOS tube are analyzed according to the characteristic parameters, and the performance degradation index and recovery time of the MOS tube in a fault situation are output, and compared with the preset performance degradation threshold and the required recovery time threshold respectively. If the performance degradation index is less than the performance degradation threshold and the recovery time is less than the required recovery time threshold, it means that the fault tolerance and fault recovery capabilities of the MOS tube meet the requirements. Otherwise, it means that the fault tolerance and / or fault recovery capabilities of the MOS tube do not meet the requirements, and a MOS tube performance warning message is issued.

9. The method for testing MOS tube characteristics according to claim 8, characterized in that: The fault injection process also includes: According to the characteristic parameters monitored in real time, the intensity and strategy timing of fault injection are dynamically adjusted, including: The strength of the fault injection is achieved by adjusting the power supply voltage or the injection current. Specifically, the strength of the fault injection is dynamically adjusted by using a PID control algorithm. The PID control algorithm is as follows: Among them, u(t) is the output data of PID control, K p is the proportional gain of PID control, e(t) is the error signal, e(t) is equal to the target performance index minus the actual performance index, K i is the integral gain of PID control, e(τ) is the error signal at time τ, K d is the differential gain of PID control; The strategic timing of fault injection includes: when the drain current exceeds the set current threshold, short-circuit fault injection begins; when the temperature exceeds the set temperature threshold, thermal runaway fault injection begins; The following formula is used to evaluate the fault recovery capability of MOS tube: t r =t 结束 -t 开始 Among them, t r is the fault recovery time, t 结束 is the recovery time after fault injection, t 开始 is the start time of fault injection, η is the fault recovery rate, μ t is the number of fault recovery times within the predetermined fault injection measurement time t, ω t is the number of fault injections within the predetermined fault injection measurement time t; If the fault recovery time and / or fault recovery rate do not meet the set corresponding parameter requirements, a MOS tube performance warning message will be issued.

10. A system for testing MOS tube characteristics, used to implement the method for testing MOS tube characteristics according to any one of claims 1 to 7, characterized in that: The system comprises: Data acquisition module: used to measure the key characteristic parameters of the MOS tube in real time. Shielded cables are used to connect the sensor and data acquisition module to reduce the impact of noise. Multi-channel interface: supports simultaneous connection of multiple MOS tubes to improve test efficiency. Multi-channel interface includes but is not limited to series, parallel and mixed connection modes; Signal generation module: provides bias signal for the test circuit; Energy recovery module: stores excess energy through supercapacitors to reduce energy waste; Data analysis and storage module: process the collected data and save the test results to the database for subsequent analysis and comparison; Display module: displays test results and characteristic curves.

Citation Information

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