Real-time high-precision radar echo simulation system capable of being flexibly configured

Abstract

The invention discloses a real-time high-precision radar echo simulation system capable of being flexibly configured, and relates to the technical field of signal transceiving and processing. The system comprises NM-element expansion interconnection calculation matrixes and a control computer, on one hand, calculation arrays of different topological structures and different scales can be constructed through connection relations between upper and lower expansion interconnection calculation matrix hierarchies, between expansion interconnection calculation matrixes and interconnection calculation matrixes and between internal calculation units of the interconnection calculation matrixes; the larger the number of array elements of the interconnection calculation matrix is, the larger the number of layers of expansion interconnection is, the larger the scale of the calculation matrix is, the larger the total calculation power and the larger the storage space are, the larger-scale radar echo simulation requirement can be met, different channel scales and calculation complexity are adapted, and the method is suitable for large-scale radar echo simulation. And on the other hand, by designing a working method of a control computer and a calculation unit, large-scale parallel echo calculation can be realized, multi-channel high-precision radar echo simulation can be achieved, and the total cost can also be reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of signal transceiver and processing, and particularly relates to a flexible-configurable real-time high-precision radar echo simulation system. Background Art

[0002] When conducting in-field tests on radar systems, a common user requirement is to simulate radar echoes in typical scenarios (which refers to the electromagnetic waves that are transmitted by a radar system to detect targets, reflected after reaching the surface of an object, and then transmitted back to the radar antenna). These radar echoes include both the echoes generated by the targets that the radar hopes to detect and the echoes generated by environmental objects that the radar does not hope to detect. Among them, the latter is usually referred to as environmental clutter. When evaluating the detection ability of a radar, almost always the detection accuracy and sensitivity of the radar to targets are examined in the presence of a large amount of environmental clutter. Users generally hope to be able to test the performance of the radar indoors, and at this time, simulation equipment for high-precision radar target echoes and environmental clutter is required.

[0003] Currently, there are already many mature commercial cases of radar target simulators in the existing market, while environmental clutter simulators are still rare. And these two existing radar echo simulators generally have the following problems:

[0004] (1) Insufficient target echo simulation ability, that is, existing radar echo simulators are generally designed with a simulation method of single channel, single reflection characteristic, and single radar echo propagation path. However, new radars use polarization, MIMO (Multiple-in Multiple-out), and multi-static radar technologies to detect targets, resulting in a radar target generating echoes for radar transmission waveforms from one or more azimuths, one or more antennas for each azimuth, and one or more polarization directions for each antenna. And the radar echoes for different azimuths, different antennas, and different polarizations are different, which has many different combinations and variations. However, most of the current radar echo simulators do not have such simulation ability;

[0005] (2) Insufficient environmental clutter simulation ability, that is, all environmental objects will generate radar echoes. Compared with radar targets, environmental objects are far more complex, so the accurate simulation of environmental clutter is also more complex. Accurate radar clutter simulation usually first performs high-precision modeling of the environment, and then divides the environmental model into a large number of small environmental grids. At this time, approximate echo calculations can be performed for each grid based on the radar point target simulation method, and then the radar echoes of all grids are vectorially summed at the receiving antenna. Finally, the sum obtained is the radar clutter. However, there is currently a lack of a real-time and accurate radar clutter simulator in the market that can achieve large-scale grid division and simulation;

[0006] (3) Insufficient channel and computing power expansion capabilities. That is, for complex simulation scenarios, the number of channels required for target echo or environmental clutter simulation may be as high as dozens, and there may also be mutual coupling relationships between channels - that is, the echo or clutter simulation of a certain channel is related to the transmitted waves of other channels. This results in the need to multiply expand the number of channels and computing power of the simulator according to requirements. However, currently available radar echo simulators on the market do not have such capabilities;

[0007] (4) High overall system construction cost. That is, radar echo simulators generally interact via radio frequency links, and radio frequency links generally have high costs, so the cost of radar echo simulators also increases accordingly. Especially for application requirements with a large number of channels, the cost is even higher.

[0008] In summary, currently available radar target echo simulators and radar environmental clutter simulators on the market have problems such as insufficient target echo simulation capabilities, insufficient environmental clutter simulation capabilities, insufficient channel and computing power expansion capabilities, and high overall system construction costs. Summary of the Invention

[0009] The purpose of the present invention is to provide a flexibly configurable real-time high-precision radar echo simulation system to solve the problems of insufficient target echo simulation capabilities, insufficient environmental clutter simulation capabilities, insufficient channel and computing power expansion capabilities, and high overall system construction costs existing in existing radar echo simulation solutions.

[0010] To achieve the above purpose, the present invention adopts the following technical solutions:

[0011] The present invention provides a flexibly configurable real-time high-precision radar echo simulation system, including a meta-expansion interconnected computing matrix and a control computer. Among them, the meta-expansion interconnected computing matrix includes N M pieces of meta-expansion interconnected computing matrices. The meta-expansion interconnected computing matrix includes N M-1 pieces of meta-expansion interconnected computing matrices, and so on. The meta-expansion interconnected computing matrix includes N M-m pieces of meta-expansion interconnected computing matrices, until the meta-expansion interconnected computing matrix includes N2 pieces of N1 - element interconnected computing matrices. The N1 - element interconnected computing matrix includes N1 computing units, which is the abbreviation form of N M ×N M-1 ×…×N M-m ×…×N2×N1, where NM , N M-1 , N M-m , N2 and N1 respectively represent integers greater than or equal to 2, M represents an integer greater than or equal to 2, m exists when M is greater than or equal to 3, and represents an integer greater than or equal to 0 and less than M - 2;

[0012] Any two of the N1 computing units are communicatively connected;

[0013] For each of the computing units in any one of the N1 - element interconnected computing matrices, the corresponding unit is respectively communicatively connected to the computing units in N2 - 1 other N1 - element interconnected computing matrices and at the corresponding positions, where the any one of the N1 - element interconnected computing matrices and the N2 - 1 other N1 - element interconnected computing matrices form the N - element extended interconnected computing matrix;

[0014] For each of the computing units in any one N - element extended interconnected computing matrix, the corresponding unit is respectively communicatively connected to the computing units in N M-m -1 other N - element extended interconnected computing matrices and at the corresponding positions, where the any one N - element extended interconnected computing matrix and the N M-m -1 other N - element extended interconnected computing matrices form the N - element extended interconnected computing matrix;

[0015] The control computer is respectively communicatively connected to the controlled ends of each of the computing units in the N - element extended interconnected computing matrix;

[0016] When the computing unit has a signal receiving channel and is configured to receive a computing unit, it is used to transmit the radar emission waveform signal received through the signal receiving channel to each of the computing units in the N - element extended interconnected computing matrix and configured to participate in the computing unit;

[0017] The control computer is used to perform grid parameter calculation and transmit the calculated grid parameters to each of the computing units in the N - element extended interconnected computing matrix and configured to participate in the computing unit;

[0018] When the computing unit is configured to participate in the computing unit, it is used to perform electromagnetic reflection calculation, vector synthesis calculation, and / or electromagnetic propagation calculation on all the received radar emission waveform signals according to the received grid parameters, and transmit the calculated radar echo signals to the The computing unit in the meta-expanded interconnected computing matrix that has a signal transmitting channel and is configured to transmit computing units;

[0019] When the computing unit has a signal transmitting channel and is configured to transmit computing units, it is used to perform vector synthesis on all the received radar echo signals to obtain the final radar echo signal, and send it out through this signal transmitting channel.

[0020] Based on the above invention content, a flexible configurable real-time high-precision radar echo simulation system is provided, which includes an N M meta-expanded interconnected computing matrix and a control computer. On the one hand, through the connection relationships between the upper and lower levels of the expanded interconnected computing matrix, between the expanded interconnected computing matrix and the interconnected computing matrix, and between the computing units inside the interconnected computing matrix, different topological structures and different scales of computing arrays can be constructed. And the more the number of array elements of the interconnected computing matrix and the more the number of expanded interconnected levels, the larger the scale of the computing matrix, the greater the total computing power and storage space, which can meet the radar echo simulation requirements of a larger scale, adapt to different channel scales and computing complexities. On the other hand, by designing the control computer and the working methods of the computing units in the matrix, large-scale parallel echo calculation can be realized, high-precision radar echo simulation of multiple channels can be achieved, and by designing decoupled computing units, the signal transceiver unit can be removed from the echo simulation nodes without radio frequency signal transceiver, thereby reducing the overall cost, and further solving the problems existing in the existing radar echo simulation schemes, such as insufficient target echo simulation ability, insufficient environmental clutter simulation ability, insufficient channel and computing power expansion ability, and high overall system construction cost, which is convenient for practical application and promotion.

[0021] In a possible design, the grid parameter calculation includes:

[0022] Dividing the radar target and / or environmental object into multiple grids;

[0023] For each grid in the multiple grids, according to the corresponding electromagnetic wave incident angle, electromagnetic wave outgoing angle, and the geometric shape and surface characteristics of the object in the grid, a corresponding plurality of electromagnetic reflection parameters are calculated, where the plurality of electromagnetic reflection parameters include radar cross section, RCS fluctuation model parameters, backscattering coefficient, clutter distribution model parameters, and / or polarization scattering coefficient.

[0024] In a possible design, transmitting the calculated grid parameters to each of the computing units in the meta-expanded interconnected computing matrix that are configured to participate in the computing units, includes:

[0025] In the In the meta-expanded interconnected computing matrix, the computing unit that has a signal transmission channel and is configured to transmit computing units is the central computing unit. The meta-expanded interconnected computing matrix is decomposed layer by layer into multi-order computing resources in the following manner: The computing resources within the central computing unit are divided into zero-order computing resources, and the computing resources within all other computing units in the meta-interconnected computing matrix where the central computing unit is located are divided into first-order computing resources. The computing resources within all other N1 meta-interconnected computing matrices in the N1 meta-interconnected computing matrix where the central computing unit is located are divided into second-order computing resources, and so on to determine the M - m order computing resources, M - 1 order computing resources, and M order computing resources; The computing resources within all other N1 meta-interconnected computing matrices in the meta-expanded interconnected computing matrix are divided into second-order computing resources, and so on to determine the M - m order computing resources, M - 1 order computing resources, and M order computing resources;

[0026] Transmit the calculated grid parameters corresponding to the proximal grid to each of the computing units in the meta-expanded interconnected computing matrix that are configured to participate in computing units and whose computing resources within the unit are divided into low-order computing resources, and transmit the calculated grid parameters corresponding to the distal grid to each of the computing units in the meta-expanded interconnected computing matrix that are configured to participate in computing units and whose computing resources within the unit are divided into high-order computing resources. Here, the proximal grid refers to the grid that is closer to the radar in the radar echo simulation scenario, and the distal grid refers to the grid that is farther from the radar in the radar echo simulation scenario. Both the proximal grid and the distal grid belong to the multiple grids obtained by dividing the radar target and / or environmental objects. Both the low-order computing resources and the high-order computing resources belong to the multi-order computing resources.

[0027] In a possible design, when the computing resources within the computing unit are divided into non-zero-order computing resources and it is configured to participate in the computing unit, transmit the calculated radar echo signal to the computing unit in the meta-expanded interconnected computing matrix that has a signal transmission channel and is configured to transmit computing units, including:

[0028] If the local computing unit is directly communicatively connected to the first computing unit, then vectorially synthesize the radar echo signal calculated by the local computing unit and the radar echo signals calculated by all second computing units to obtain a new radar echo signal, and then transmit the new radar echo signal to the first computing unit. Otherwise, transmit the radar echo signal calculated by the local computing unit to the third computing unit so that it can be transmitted to the first computing unit through the third computing unit. Here, the first computing unit refers to the The computing unit in the N1 - element extended interconnected computing matrix that has a signal - transmitting channel and is configured to transmit computing units. The second computing unit refers to other computing units in the N1 - element interconnected computing matrix where the local computing unit is located, which are configured to participate in the computing units and the computing resources within the unit are of the same order as those within the local computing unit. The third computing unit refers to other computing units in the N1 - element interconnected computing matrix where the local computing unit is located, which are directly communicatively connected to the first computing unit and the computing resources within the unit are of the same order as those within the local computing unit.

[0029] In a possible design, the electromagnetic reflection calculation includes:

[0030] According to the received grid parameters and in combination with the attribute parameters of the radar - transmitted waveform signal, perform electromagnetic reflection simulation on the radar - transmitted waveform signal according to the following formula:

[0031] F r F(t,n)=F t (t)·A(n)·σ(λ,n)·g(t,n)·f(θ,φ,pol)

[0032] In the formula, n represents the grid serial number and is a positive integer, t represents time, F r (t,n) represents the reflected electromagnetic wave of the n - th grid, F t (t) represents the incident electromagnetic wave, A(n) represents the area of the n - th grid, σ(λ,n) represents the reference radar cross - section area or back - scattering coefficient of the n - th grid related to the shape and material properties of the radar target and the wavelength λ of the incident electromagnetic wave, g(t,n) represents the RCS fluctuation model or clutter distribution model of the n - th grid, and f(θ,φ,pol) represents the influence function of the incident angle θ, reflection angle φ, and polarization state pol on the radar cross - section area.

[0033] In a possible design, the vector synthesis calculation includes:

[0034] Perform vector synthesis on the reflected electromagnetic waves of adjacent grid groups containing at least two grids according to the following formula:

[0035] F r F(t)=ΣΔ(F r (t,n')·Φ(f,n')

[0036] In the formula, t represents time, F r (t) represents the vector synthesis result of the reflected electromagnetic waves of the adjacent grid group, n' represents the grid serial number in the adjacent grid group and is a positive integer, F r(t, n') represents the reflected electromagnetic wave of the n'-th grid in the adjacent grid group, Δ(x, n') represents the time delay caused by the difference in radial distance relative to the direction of the radar receiving antenna between the n'-th grid and the first grid in the adjacent grid group, Φ(f, n') represents the Doppler frequency shift generated by the relative motion between the n'-th grid and the first grid, and x represents the function input variable.

[0037] In a possible design, the electromagnetic propagation calculation includes:

[0038] Perform electromagnetic propagation on the vector synthesis result of the reflected electromagnetic waves of the grid group according to the following formula:

[0039]

[0040] In the formula, t represents time, F a (t) represents the reflected electromagnetic wave received by the radar receiving antenna, F r (t) represents the vector synthesis result of the reflected electromagnetic waves of the grid group, G t represents the gain of the radar transmitting antenna, G r represents the gain of the radar receiving antenna, R represents the radial distance in the direction of the radar receiving antenna, Η(x) represents the multipath effect response function, Δ(x, R) represents the time delay caused by the radial distance R in the direction of the radar receiving antenna, Φ(f) represents the Doppler frequency shift generated by the motion relative to the radar receiving antenna, and x represents the function input variable.

[0041] In a possible design, the computing unit is communicatively connected to K signal transceiver units, where K represents a positive integer, and the signal transceiver units are used to provide the signal receiving channel and / or the signal transmitting channel.

[0042] In a possible design, when the signal transceiver unit includes a second FPGA module, a second storage module, and a second high-speed serial interface that are respectively communicatively connected to the second FPGA module, the signal transceiver unit is also used as an extended computing unit relative to the computing unit to share the computing tasks of the computing unit.

[0043] In a possible design, the computing unit includes a first FPGA module, a first storage module, and a first high-speed serial interface, where the number of the first high-speed serial interfaces is at least one and is used to communicatively connect to the signal transceiver unit or other computing units;

[0044] The first FPGA module is respectively communicatively connected to the first storage module and the first high-speed serial interface.

[0045] In a possible design, the first storage module adopts dynamic random access memory, and the first high-speed serial interface adopts Nano-Pitch interface, MiniSAS HD interface, SFP interface, SFP+ interface, QSFP interface, QSFP+ interface, QSFP28 interface or QSFP56 interface.

[0046] Beneficial effects of the above solution:

[0047] (1) The present invention provides a flexible configurable real-time high-precision radar echo simulation system, including an N M element extended interconnected computing matrix and a control computer. On the one hand, by the connection relationships between the upper and lower extended interconnected computing matrix levels, between the extended interconnected computing matrix and the interconnected computing matrix, and between the computing units inside the interconnected computing matrix, computing arrays with different topological structures and different scales can be constructed. And the more the number of array elements of the interconnected computing matrix and the more the number of extended interconnected levels, the larger the scale of the computing matrix, the greater the total computing power and storage space, which can meet the radar echo simulation requirements of a larger scale, adapt to different channel scales and computing complexities. On the other hand, by designing the control computer and the working methods of the computing units in the matrix, large-scale parallel echo calculation can be realized, achieving multi-channel high-precision radar echo simulation. And by designing decoupled computing units, the signal transceiver unit can be removed from the echo simulation node without radio frequency signal transceiver, thereby reducing the overall cost. Furthermore, the problems existing in the existing radar echo simulation solutions, such as insufficient target echo simulation ability, insufficient environmental clutter simulation ability, insufficient channel and computing power expansion ability, and high overall system construction cost, can be solved, which is convenient for practical application and promotion;

[0048] (2) Flexible expandability and splitability: The computing topological structure designed by the present invention is applicable to radar echo simulation systems from several channels to several hundred channels. A small-scale radar echo simulation system can be conveniently expanded into a large-scale system, and a large-scale system can also be easily split into several small-scale systems;

[0049] (3) High-precision radar echo simulation: The accuracy that the radar echo simulation system can simulate mainly depends on the number of grid divisions of the radar target and environmental objects. The more grids, the higher the simulation accuracy, and the higher the computing power, data throughput and access capabilities of the corresponding computing system are required. The computing topological structure designed by the present invention can flexibly expand the number of computing units, their communication interfaces and storage units for each radar echo, thereby improving the ability of high-precision echo simulation;

[0050] (4) Low computational latency: The hardware circuit characteristics of the FPGA itself have the feature of low computational latency. At the same time, the designed computational matrix topology in the present invention enables data interaction between any two computational units to only pass through a very short data exchange path. Therefore, the entire computational matrix has the advantage of low computational latency. This topology also retains the low-latency characteristics of low-order computational units during step-by-step expansion and has the feature of a significant increase in computing power of high-order computational units, which exactly matches the characteristics of radar clutter simulation where the near echo has low latency and the radar illumination area is small, while the far echo has large latency and the illumination area is large;

[0051] (5) Low cost: Due to the standardization of computational units and the interconnected computational matrix, the construction and expansion of large-scale radar echo simulation systems no longer need to be customized, thus enabling low cost;

[0052] (6) Easy configuration: Since the designed computational topology in the present invention is a completely symmetric structure, only the algorithm and program need to be designed for a single computational unit to complete the algorithm and program design of the entire computational matrix;

[0053] (7) Customizable: The signal transceiver unit provides extended computing capabilities, and the realization of this part of the computing power is completely decoupled from the computational matrix. Therefore, it is easy to provide customized signal processing capabilities for radar echo simulation port devices. Description of the Drawings

[0054] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0055] Figure 1 It is a schematic diagram of the specific structure of the computational unit in the real-time high-precision radar echo simulation system provided by the embodiment of the present invention.

[0056] Figure 2 It is a schematic diagram of the specific structure of the 2-element interconnected computational matrix provided by the embodiment of the present invention.

[0057] Figure 3 It is a schematic diagram of the structure of the N-element interconnected computational matrix provided by the embodiment of the present invention, where Figure 3 Figure (a) shows the schematic diagram of the structure of the 3-element interconnected computational matrix, Figure 3 Figure (b) shows the schematic diagram of the structure of the 4-element interconnected computational matrix, Figure 3 Figure (c) shows the schematic diagram of the structure of the 5-element interconnected computational matrix.

[0058] Figure 4Schematic diagram of the structure of the 3×3 element extended interconnected computing matrix provided by the embodiment of the present invention.

[0059] Figure 5 Schematic diagram of the structure of the 4×3 element extended interconnected computing matrix provided by the embodiment of the present invention.

[0060] Figure 6 Schematic diagram of the structure of the 4×4 element extended interconnected computing matrix provided by the embodiment of the present invention.

[0061] Figure 7 Schematic diagram of the specific structure of the signal transceiver unit in the real-time high-precision radar echo simulation system provided by the embodiment of the present invention.

[0062] Figure 8 Example diagram of the connection relationship between the 4×4 element interconnected computing matrix and the signal transceiver unit provided by the embodiment of the present invention.

[0063] Figure 9 Example diagram of the topological structure after the calculation extension of the 4×4 element interconnected computing matrix provided by the embodiment of the present invention.

[0064] Figure 10 Example diagram of the connection relationship between the 4×3 element interconnected computing matrix and the signal transceiver unit provided by the embodiment of the present invention.

[0065] Figure 11 Example diagram of implementing the first radar echo simulation calculation logic based on the 4×3 element extended interconnected computing matrix provided by the embodiment of the present invention.

[0066] Figure 12 Example diagram of implementing the second radar echo simulation calculation logic based on the 4×3 element extended interconnected computing matrix provided by the embodiment of the present invention. Detailed implementation manners

[0067] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the present invention in combination with the accompanying drawings and the descriptions of the embodiments or the prior art. Obviously, the following descriptions of the structures of the drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other embodiments can be obtained based on these embodiments. It should be noted here that the descriptions of these embodiments are used to help understand the present invention, but do not constitute a limitation to the present invention.

[0068] It should be understood that although terms such as first and second etc. may be used herein to describe various objects, these objects should not be limited by these terms. These terms are only used to distinguish one object from another. For example, the first object may be referred to as the second object, and similarly the second object may be referred to as the first object, without departing from the scope of the exemplary embodiments of the present invention.

[0069] It should be understood that for the term "and / or" that may appear herein, it is merely an association relationship describing associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, B exists alone, or A and B exist simultaneously; for another example, A, B and / or C may represent any one of A, B and C or any combination of them; for the term " / and" that may appear herein, it is a description of another associated object relationship, indicating that two relationships may exist. For example, A / and B may represent: A exists alone or A and B exist simultaneously; in addition, for the character " / " that may appear herein, generally it represents that the associated objects before and after are in an "or" relationship.

[0070] Embodiment

[0071] As Figures 1 to 12 shown, the real-time high-precision radar echo simulation system provided and flexibly configurable in this embodiment includes, but is not limited to, a meta-expanded interconnected computing matrix and a control computer, etc. Among them, the meta-expanded interconnected computing matrix includes N M pieces of meta-expanded interconnected computing matrix, the meta-expanded interconnected computing matrix includes N M-1 pieces of meta-expanded interconnected computing matrix, and so on. There is meta-expanded interconnected computing matrix including N M-m pieces of meta-expanded interconnected computing matrix, until meta-expanded interconnected computing matrix includes N2 pieces of N1-element interconnected computing matrix, and the N1-element interconnected computing matrix includes N1 computing units. is the abbreviated form of N M ×N M-1 ×…×N M-m ×…×N2×N1, N M 、N M-1 、N M-m, N2 and N1 respectively represent integers greater than or equal to 2, M represents an integer greater than or equal to 2, m exists when M is greater than or equal to 3, and represents an integer greater than or equal to 0 and less than M - 2; any two of the N1 computing units are communicatively connected; for each of the computing units in any one of the N1 - element interconnected computing matrices, the corresponding unit is respectively communicatively connected to the computing unit in the corresponding position in N2 - 1 other N1 - element interconnected computing matrices, where any one of the N1 - element interconnected computing matrices and the N2 - 1 other N1 - element interconnected computing matrices constitute the element - extended interconnected computing matrix; for each of the computing units in any one element - extended interconnected computing matrix, the corresponding unit is respectively communicatively connected to the computing unit in the corresponding position in N M-m - 1 other element - extended interconnected computing matrices, where any one element - extended interconnected computing matrix and the N M-m - 1 other element - extended interconnected computing matrices constitute the element - extended interconnected computing matrix.

[0072] As Figures 1 to 11 shown, in the specific structure of the real - time high - precision radar echo simulation system, the element - extended interconnected computing matrix is the main body for performing radar echo simulation calculations, and can arbitrarily expand the scale of the computing units according to different values of N M , N M-1 , N M-m , N2, N1 and M, so as to change product characteristics, expand product functions and adjust channel scales according to different user requirements, thereby solving the problems of insufficient channel and computing power expansion capabilities and high overall system construction costs existing in current radar target echo simulators and radar environmental clutter simulators in the market. In addition, due to the complete symmetry of the construction of the foregoing computing matrix, when performing radar echo simulation calculations, if the embedded computing program of a certain computing unit is designed well, the embedded computing program of the entire computing matrix can be completed.

[0073] As Figure 1As shown, specifically, the computing unit includes, but is not limited to, a first FPGA module, a first storage module, and a first high-speed serial interface, etc. Among them, the number of the first high-speed serial interfaces is multiple and is used for communicatively connecting the signal transceiver unit or other computing units; the first FPGA module is communicatively connected to the first storage module and the first high-speed serial interface respectively. The first FPGA (Field Programmable Gate Array) module is used for performing radar echo simulation calculations, which can be specifically implemented by using existing device products; the number of the first FPGA modules can be one or multiple, and when there are multiple first FPGA modules, multiple first FPGA modules can be interconnected through a high-speed communication interface, so that data required for calculation can be shared among the FPGA modules (at this time, the computing unit composed of multiple first FPGA modules is still logically regarded as a whole computing unit externally, thereby enhancing the computing power, storage capacity, and the number of high-speed serial interfaces of a single computing unit, and improving the overall computing power and expansion ability of the interconnected computing matrix). The first storage module (i.e., Figure 1 represented by DRAM in Figure 1The first high-speed serial interface (denoted by D in Chinese) is mainly used for the following four purposes: (a) high-speed interconnection with other computing units within the same circuit board; (b) high-speed interconnection with computing units in other circuit boards through connectors of high-speed serial interfaces (such as high-speed connectors like QSFP28 or QSFP56, etc.); (c) connection with the high-speed serial interface of the signal transceiver unit; (d) connection with the high-speed serial interface of other peripherals. More specifically, the first high-speed serial interface can be but is not limited to using Nano-Pitch interface, MiniSAS HD (Serial Attached Small Computer System Interface, where HD is the abbreviation of High Definition in English) interface, SFP (Small Form Pluggable) interface, SFP+ interface, QSFP (Quad Small Form-factor Pluggable) interface, QSFP+ interface, QSFP28 interface or QSFP56 interface, etc. Preferably, a Nano-Pitch standard 42-pin (not limited to this standard) connector is used as a compact and high-rate connection interface. Each connector can provide up to 6 unidirectional data transmission links with a rate of up to 16 Gbps, for a total of 96 Gbps (12 GB / s) of bidirectional data transmission links.

[0074] As Figure 2 shown, the two computing units can communicate and connect with each other through the high-speed serial interface to form a 2-element interconnection computing matrix; the 2-element interconnection computing matrix can be connected through high-speed serial cables or can be implemented on the same circuit board. The latter can eliminate the high-speed serial connectors and cables, simplify the interconnection between them, reduce the interconnection cost, and increase the interconnection data rate; the two computing units can exchange and share data at high speed through high-speed interconnection, and at the same time perform parallel computing on different data, increasing the computing power. Moreover, the two 2-element interconnection computing matrices can be further extended and interconnected through the high-speed serial interface to construct a 2 2 -element extended interconnection computing matrix (the method of extended interconnection is: each computing unit of one 2-element interconnection computing matrix is connected pairwise with the corresponding computing unit of the other 2-element interconnection computing matrix). Each computing unit in the 2 2 -element extended interconnection matrix can perform high-speed data exchange with any other computing unit through at most one intermediate computing unit, thus ensuring that each computing unit can efficiently obtain the required computing data from other computing units.

[0075] Based on the above-mentioned construction method of the 2-element interconnected computing matrix, further: N1 of the computing units are fully interconnected (here, full interconnection means that any one computing unit is directly connected in pairs with the other N1-1 computing units through high-speed serial connections), forming an N1-element interconnected computing matrix; for example, a 3-element interconnected computing matrix is as shown in Figure 3 as shown in (a) of Figure 3 as shown in (b) of Figure 3 as shown in (c) of , and so on.

[0076] Based on the above-mentioned 2 2 -element extended interconnected computing matrix construction method, further: an N1-element interconnected computing matrix can be extended and interconnected with up to N2-1 other N1-element interconnected computing matrices through high-speed serial interfaces to construct a maximum N2×N1-element extended interconnected computing matrix (the method of its extended interconnection is that each computing unit of the N1-element interconnected computing matrix is connected in pairs with the corresponding computing units of other N1-element interconnected computing matrices). For example, as shown in Figure 4 : 3 3-element interconnected computing matrices are extended into a 3×3-element extended interconnected computing matrix; as shown in Figure 5 : 4 3-element interconnected computing matrices are extended into a 4×3-element extended interconnected computing matrix; as shown in Figure 6 : 4 4-element interconnected computing matrices are extended into a 4×4-element extended interconnected computing matrix, and so on.

[0077] Based on the above Figures 4 to 6It can be seen that the topological structure in the N2×N1 - element extended interconnected computing matrix is completely symmetric; that is to say, the position and connection relationship of each computing unit in the matrix are completely consistent and symmetric with respect to other computing units. Therefore, each of the computing units in the extended interconnected computing matrix is equivalent, which makes the computing matrix very suitable for performing highly parallel and symmetric computations. In addition to the symmetry of the topological structure, each computing unit in the N2×N1 - element extended interconnected computing matrix can complete data exchange with any other computing unit through at most one intermediate computing unit, thus ensuring that each computing unit can easily establish low - latency communication with other computing units, and then all data in the entire computing matrix can be obtained with low latency. At the same time, the calculation of radar echo simulation exactly conforms to these several characteristics: (1) The calculation of each echo may be related to all input signals; (2) The calculation of each echo uses the same algorithm and needs to be extended according to requirements; (3) The calculation of the echo needs to meet the requirements of real - time and low latency (specifically because the radar detection range is usually as close as 1 km, and the time for electromagnetic waves to be emitted from the antenna to a target 1 km away and then reflected back is only 6.6 us. Therefore, in real - time simulation, the total time for the calculation and transmission of radar echoes needs to be completed within this time limit, so the computing system needs to have the characteristic of low latency). Thus, an N2×N1 - element extended interconnected computing matrix can be extended and interconnected with at most N3 - 1 other N2×N1 - element interconnected computing matrices (where N3 represents an integer greater than or equal to 2) based on the same extension method as above, to construct a maximum N3×N2×N1 - element extended interconnected computing matrix (i.e., - element interconnected computing matrix), and so on, and can be further extended to an N M ×N M-1 ×…×N M-m ×…×N2×N1 - element extended interconnected computing matrix (i.e., the - element extended interconnected computing matrix). Each computing unit in the - element extended interconnected computing matrix is also equivalent, and it can perform high - speed data exchange with any other computing unit through at most M - 1 intermediate computing units, thus ensuring that each computing unit can efficiently and with low latency obtain the required computing data from other computing units.

[0078] Based on the above - mentioned extension method of the interconnected computing matrix, computing arrays with different topological structures and different scales can be constructed. The more the number of array elements in the interconnected computing matrix and the more the number of levels of extended interconnection, the larger the scale of the computing matrix, the greater the total computing power and storage space, and the more adaptable to the radar echo simulation requirements of a larger scale.

[0079] The control computer is respectively communicatively connected to the The controlled ends of the respective computing units in the yuan-expanded interconnected computing matrix. As Figure 1 and Figure 2 shown, the controlled end of the computing unit is specifically a control bus interface (i.e., Figure 1 denoted by C in ), which is preferably connected to the bus interface circuit using a PCIe bus or a PCIe-based instrument expansion bus (such as PXIe, CPCIe, VPX, etc.) as the communication and control bus. The PCIe bus and PCIe-based instrument expansion buses have mature and complete hardware and software ecosystems, enabling users to easily add various I / O modules based on such bus platforms and control and manage the system using mature system and data management software. Such bus platforms also provide a modular architecture, allowing users to easily expand the functions and capabilities of the system using different types and quantities of modules. To enable the computing unit to have a signal receiving channel and / or a signal transmitting channel, specifically, the computing unit is communicatively connected to K signal transceiver units, where K represents a positive integer (i.e., it can be a positive integer such as 1, 2, or 3, and additionally, under specific conditions, the computing unit may not be connected to the signal transceiver unit), and the signal transceiver units are used to provide the signal receiving channel and / or the signal transmitting channel, where the signal receiving channel is used to receive an input digital signal converted from an input radio frequency signal or receive an input radio frequency signal and convert it into an input digital signal; the signal transmitting channel is used to transmit an output digital signal for conversion into an output radio frequency signal or directly convert the output digital signal into an output radio frequency signal and transmit it.

[0080] Since the calculation inputs of the aforementioned interconnected computing matrix usually come from external radio frequency signals, and the calculation outputs usually need to be sent to the outside as well, the signal transceiver unit is required to collect, obtain, generate, and transmit signals. In addition to being responsible for the high-speed transceiver of digital signals or analog signals, the signal transceiver unit can also perform signal processing according to specific requirements. It is mainly composed of an FPGA module, a high-speed serial interface, etc. Specifically, when the signal transceiver unit is used to provide a signal receiving channel and a signal transmitting channel, and the signal receiving channel is used to receive the input radio frequency signal and convert it into an input digital signal, and the signal transmitting channel is used to directly convert the output digital signal into an output radio frequency signal and transmit it, the signal transceiver unit includes, but is not limited to, an analog receiving front-end module, an analog transmitting front-end module, an ADC module, a DAC module, a second FPGA module, a second storage module, and a second high-speed serial interface, etc. Among them, the analog receiving front-end module is used to receive the input radio frequency signal, the analog transmitting front-end module is used to transmit the output radio frequency signal, and the second high-speed serial interface is used to communicate and connect to the computing unit; the output end of the analog receiving front-end module is communicatively connected to the input end of the ADC module, the output end of the ADC module is communicatively connected to the input end of the second FPGA module, the input end of the analog transmitting front-end module is communicatively connected to the output end of the DAC module, the input end of the DAC module is communicatively connected to the output end of the second FPGA module, and the second FPGA module is also communicatively connected to the second storage module and the second high-speed serial interface respectively.

[0081] Such as Figure 7As shown, in the specific structure of the signal transceiver unit, the analog receiving front-end module and the analog transmitting front-end module are respectively and correspondingly matched with the ADC module and the DAC module, and are used for frequency conversion, amplification, conditioning, filtering, receiving and transmitting analog signals, and realizing the conversion between analog signals and digital signals. The second FPGA module has high-speed data throughput capacity and is a key device connecting the ADC / DAC and the analog front-end. With its characteristics suitable for high-speed parallel fixed-point number calculation, it can provide real-time signal preprocessing ability for the system. On the one hand, it completes part of the signal processing work, and on the other hand, it can also complete the extraction and compression of valid data, reducing the amount of data transmitted to the back-end signal processor. The second FPGA module can also have a signal processing delay as low as the ns level, and realizes low-delay signal transceiver through the ADC module and the DAC module. The second storage module specifically includes but is not limited to DRAM and FLASH. Among them, the former is used for local caching and temporary storage of high-speed signal data, and the latter is used for storing firmware programs. The second high-speed serial interface can specifically be implemented by a high-speed serial bus interface adopting the Aurora communication protocol, that is, preferably adopting a high-speed serial transmission protocol of Aurora 16Gbps x6 or higher speed, which has a peak data throughput rate of 11GB / s and a transmission delay as short as the microsecond level. It can provide a large enough transmission bandwidth and a short enough transmission delay for most real-time signal processing applications, ensuring the continuity and timeliness of data transmission and providing basic conditions for real-time signal processing; the second high-speed serial interface is further preferably implemented by using the Nano-Pitch series connectors produced by Molex Company. This series of connectors can provide a data transmission capacity of up to 25Gbps x8, which is sufficient to meet the full-duplex transmission requirements of 2-way 2GHz instantaneous bandwidth signals.

[0082] Further preferably, the signal transceiver unit further includes but is not limited to a clock and trigger signal interface, an on-board OCXO module, and a clock generation and distribution circuit module based on a phase-locked loop mechanism, etc. Among them, the clock and trigger signal interface ( Figure 7 denoted by DIO in Figure 7 ) is used for but not limited to receiving external sampling clock signals, reference clock signals, GPS second pulse signals, trigger signals, etc. The on-board OCXO module ( Figure 7The clock signal output terminals (represented by PLL in Chinese) are respectively communicatively connected to the analog receiving front-end module, the analog transmitting front-end module, the ADC module, the DAC module, and the second FPGA module. The connector of the clock and trigger signal interface can be selected according to the specific signal frequency and quantity. The sampling clock signal, the reference clock signal, the GPS second pulse signal, and the time base signal are used to provide clock signals for the analog receiving front-end module, the analog transmitting front-end module, the ADC module, the DAC module, and the second FPGA module respectively through the clock generation and distribution circuit module based on the phase-locked loop. The trigger signal is connected to the second FPGA module and is used for the internal processing logic triggered by external events. Thus, through the aforementioned clock and trigger mechanism, multiple parallel or distributed signal transceiver units can work synchronously to achieve the reception or transmission of coherent signals.

[0083] The interconnected computing matrix can connect the signal transceiver units according to the echo simulation requirements. The number of channels of the signal receiving channels and the signal transmitting channels provided by each signal transceiver unit can be different and can also be set according to the echo simulation requirements. Since the connection of the complete interconnected computing matrix to the signal transceiver units is also completely symmetric, for the element extended interconnected computing matrix, if all N M ×N M-1 ×…×N M-m ×…×N2×N1 computing units are connected to ( represents a positive integer) signal transceiver units, and each signal transceiver unit has J pairs of transceiver channels, then the real-time high-precision radar echo simulation system has a total of pairs of transceiver channels, that is, an H-receive and H-transmit radar echo simulation system is formed. At the same time, according to the structure of the signal transceiver unit, it can be known that: the signal transceiver unit actually also includes the structure of the computing unit, that is, the combination of FPGA, DRAM, and high-speed serial port. Therefore, when the signal transceiver unit is connected to the interconnected computing matrix, it is actually equivalent to connecting new computing units to each node of the interconnected computing matrix. As Figure 8 shown, in a 4-element interconnected computing matrix, each computing unit is connected to 2 signal transceiver units, and the signal transceiver units are used to receive and transmit radio frequency signals; since the signal transceiver unit includes the computing unit structure, this interconnected computing matrix is equivalent to being expanded into Figure 9The extended interconnected computing matrix topology shown. Although each computing unit of the extended interconnected computing matrix does not have as sufficient computing unit interconnections as the interconnected computing matrix or the extended interconnected computing matrix (i.e., each computing unit is interconnected with multiple other computing units through high-speed serial interfaces), the computing power of each computing unit of the original extended interconnected computing matrix has been enhanced. This enables the extended interconnected computing matrix to not only perform fully symmetric channel simulation calculations but also complete further signal processing work related to the devices connected to each channel simulation port. That is, further preferably, when the signal transceiver unit includes a second FPGA module, a second storage module, and a second high-speed serial interface that are respectively communicatively connected to the second FPGA module, the signal transceiver unit is also used as an extended computing unit relative to the computing unit to share the computing tasks of the computing unit; in addition, the extended computing unit can also be used to execute any one or any combination of the following extended computing tasks (A) to (I): (A) increasing the signal instantaneous bandwidth by interpolation processing; (B) reducing the signal instantaneous bandwidth by decimation processing; (C) changing the center frequency of the signal by digital frequency conversion; (D) calculating the spectrum of the signal in real time; (E) calculating the target echo or clutter in real time; (F) simulating the signal phase offset at each port of the multi-channel direction finding receiver; (G) simulating the signal amplitude and phase of each channel in the radar sum-difference channel and auxiliary channels; (H) performing data transceiver through a high-speed serial bus; (I) performing amplitude calibration and phase calibration of the transceiver signals. This aforementioned extended computing ability greatly increases the functions that the real-time high-precision radar echo simulation system can simulate. Figure 9 shows the topological structure after the computing extension of the 4-element interconnected computing matrix, and so on. All element extended interconnected computing matrices can form an extended extended interconnected computing matrix by connecting the signal transceiver unit to any number of computing units. As Figure 10 shown, a 2 3-element extended interconnected computing matrix, and each computing unit is connected to 1 signal transceiver unit. In addition, the computing input of the aforementioned interconnected computing matrix can also be injected in the form of a digital signal through a high-speed serial interface, and its computing output can also be output in the form of a digital signal through a high-speed serial interface. In this case, the relevant computing unit may not be connected to the signal transceiver unit.

[0084] Since the radar echo simulation system needs to calculate and generate echoes for each radar receiving antenna and output them to the corresponding radar receiving channels via RF or digital channels, and each output echo signal is generated by the simulation system through electromagnetic reflection, vector synthesis, and / or electromagnetic propagation simulation calculations based on one or more incident radar transmitted wave signals received, in the real-time high-precision radar echo simulation system, when the calculation unit has a signal receiving channel and is configured to receive the calculation unit, it is used to transmit the radar transmitted waveform signal received through this signal receiving channel to each of the calculation units in the element extended interconnected calculation matrix that is configured to participate in the calculation unit; the control computer is used to calculate grid parameters and transmit the calculated grid parameters to each of the calculation units in the element extended interconnected calculation matrix that is configured to participate in the calculation unit; when the calculation unit is configured to participate in the calculation unit, it is used to perform electromagnetic reflection calculations, vector synthesis calculations, and / or electromagnetic propagation calculations on all the received radar transmitted waveform signals according to the received grid parameters, and transmit the calculated radar echo signals to the calculation units in the element extended interconnected calculation matrix that has a signal transmitting channel and is configured to transmit the calculation unit; when the calculation unit has a signal transmitting channel and is configured to transmit the calculation unit, it is used to perform vector synthesis on all the received radar echo signals to obtain the final radar echo signal and send it out through this signal transmitting channel. In addition, before performing high-precision calculations for radar echo simulation, it is necessary to first determine the specific calculation units (and corresponding environmental modeling parameters) to participate according to the total number of grid calculation resources required, and determine the receiving calculation unit for the radar transmitted waveform signal and the transmitting calculation unit for the radar echo signal according to the hardware connection of the signal transceiver unit, and then manually configure the calculation units, receiving calculation units, and transmitting calculation units according to the foregoing determination results.

[0085] Specifically, the grid parameter calculation includes but is not limited to: dividing the radar target and / or environmental object into multiple grids; for each grid in the multiple grids, calculating corresponding multiple electromagnetic reflection parameters according to the corresponding electromagnetic wave incident angle, electromagnetic wave exit angle, and the geometric shape and surface characteristics of the object in the grid, where the multiple electromagnetic reflection parameters include but are not limited to radar cross-sectional area, RCS (Radar Cross Section) fluctuation model parameters, backscattering coefficient, clutter distribution model parameters, and / or polarization scattering coefficient, etc. The foregoing specific calculation process is an existing technical means and will not be elaborated here. In addition, the electromagnetic reflection parameters can be calculated in advance or directly read from external model parameters.

[0086] Since in the extended interconnected computing matrix, the positions and connection relationships of each computing unit in the matrix are completely consistent and symmetric, the N-element extended interconnected computing matrix can be decomposed layer by layer into multi-order computing resources centered on any one computing unit: the computing resources within any one computing unit are divided into zero-order computing resources, and the computing resources within all other computing units in the N1-element interconnected computing matrix where any one computing unit is located are divided into first-order computing resources. The computing resources within all other N1-element interconnected computing matrices in the N-element extended interconnected computing matrix where the N1-element interconnected computing matrix is located are divided into second-order computing resources, and so on to determine the M-m order computing resources, M-1 order computing resources, and M order computing resources. Since the aforementioned second-order computing resources need to be forwarded through at most one computing unit to establish a one-to-one high-speed serial connection with the central computing unit, its access speed is slower than that of the first-order computing resources, and the computing latency is also lower than that of the first-order computing resources; and so on. This computing resource topology is exactly suitable for the simulation calculation of radar environmental clutter because radar environmental clutter also has the following characteristics: the illumination area near the place with smaller echo delay is small and the number of grid cells is small; the illumination area far away with larger echo delay is large and the number of grid cells is large. When performing simulation calculations, low-order computing resources can be allocated to the nearby grids, and high-order computing resources can be allocated to the distant grids. That is, preferably, the calculated grid parameters are transmitted to each of the computing units in the N-element extended interconnected computing matrix that are configured to participate in the computing unit, including but not limited to: taking the computing unit in the N-element extended interconnected computing matrix that has a signal transmission channel and is configured to be a transmitting computing unit as the central computing unit, and decomposing the N-element extended interconnected computing matrix layer by layer into multi-order computing resources in the following manner: the computing resources within the central computing unit are divided into zero-order computing resources, and the computing resources within all other computing units in the N1-element interconnected computing matrix where the central computing unit is located are divided into first-order computing resources. The computing resources within all other N1-element interconnected computing matrices in the N-element extended interconnected computing matrix where the N1-element interconnected computing matrix is located are divided into second-order computing resources, and so on to determine the M-m order computing resources, M-1 order computing resources, and M order computing resources; the calculated grid parameters corresponding to the proximal grids are transmitted to each of the computing units in the N-element extended interconnected computing matrix that are configured to participate in the computing unit and the computing resources within the unit are divided into low-order computing resources, and the calculated grid parameters corresponding to the distal grids are transmitted to each of the computing units in the N-element extended interconnected computing matrix that are configured to participate in the computing unit and the computing resources within the unit are divided into high-order computing resources. N-element extended interconnected computing matrix, and Each of the computing units in the yuan-expanded interconnected computing matrix that are configured to participate in the computing unit and the computing resources within the unit are divided into high-order computing resources. Among them, the proximal grid refers to the grid closer to the radar in the radar echo simulation scenario, and the distal grid refers to the grid farther from the radar in the radar echo simulation scenario. Both the proximal grid and the distal grid belong to multiple grids obtained by dividing radar targets and / or environmental objects. Both the low-order computing resources and the high-order computing resources belong to the multi-order computing resources. The proximal grid and the distal grid are a pair of relative terms, and any grid can be determined as the proximal grid or the distal grid based on a conventional threshold comparison method. In addition, assuming that each computing unit has L-way grid computing resources, then the yuan-expanded interconnected computing matrix altogether has: L-way zero-order grid computing resources, (N1 - 1)×L-way first-order grid computing resources, (N2 - 1)×N1×L-way second-order grid computing resources, and so on. Altogether, there are N M ×N M-1 ×…×N M-m ×…×N2×N1×L-way grid computing resources.

[0087] Specifically, the electromagnetic reflection calculation includes but is not limited to: according to the received grid parameters and in combination with the attribute parameters of the radar emission waveform signal, the electromagnetic reflection simulation of the radar emission waveform signal is carried out according to the following formula:

[0088] F r (t,n) = F t (t)·A(n)·σ(λ,n)·g(t,n)·f(θ,φ,pol)

[0089] In the formula, n represents the grid serial number and is a positive integer, t represents time, F r (t,n) represents the reflected electromagnetic wave of the nth grid, F t (t) represents the incident electromagnetic wave, A(n) represents the area of the nth grid, σ(λ,n) represents the reference radar cross-sectional area or backscattering coefficient of the nth grid related to the shape and material characteristics of the radar target and the wavelength λ of the incident electromagnetic wave, g(t,n) represents the RCS fluctuation model or clutter distribution model of the nth grid, and f(θ,φ,pol) represents the influence function of the incident angle θ, reflection angle φ, and polarization state pol on the radar cross-sectional area. The aforementioned RCS fluctuation model or clutter distribution model is used to describe the change of the scattering characteristics of the radar target at time t, and specifically can but is not limited to using the Swerling model (such as the existing Swerling 1 model or Swerling 2 model, etc.) or the clutter statistical distribution model to represent these fluctuations.

[0090] Specifically, the vector synthesis calculation includes, but is not limited to: performing vector synthesis on the reflected electromagnetic waves of an adjacent grid group including at least two grids according to the following formula:

[0091] F r (t) = ΣΔ(F r (t,n')·Φ(f,n')

[0092] In the formula, t represents time, F r (t) represents the vector synthesis result of the reflected electromagnetic waves of the adjacent grid group, n' represents the grid serial number in the adjacent grid group and is a positive integer, F r (t,n') represents the reflected electromagnetic waves of the n'th grid in the adjacent grid group, Δ(x,n') represents the time delay caused by the radial distance difference of the n'th grid compared with the first grid in the adjacent grid group due to the direction relative to the radar receiving antenna, Φ(f,n') represents the Doppler frequency shift generated by the relative motion of the n'th grid compared with the first grid, and x represents the function input variable.

[0093] Specifically, the electromagnetic propagation calculation includes, but is not limited to: performing electromagnetic propagation on the vector synthesis result of the reflected electromagnetic waves of the grid group according to the following formula:

[0094]

[0095] In the formula, t represents time, F a (t) represents the reflected electromagnetic waves received by the radar receiving antenna, F r (t) represents the vector synthesis result of the reflected electromagnetic waves of the grid group, G t represents the gain of the radar transmitting antenna, G r represents the gain of the radar receiving antenna, R represents the radial distance in the direction of the radar receiving antenna, Η(x) represents the multipath effect response function, Δ(x,R) represents the time delay caused by the radial distance R in the direction of the radar receiving antenna, Φ(f) represents the Doppler frequency shift generated by the motion relative to the radar receiving antenna, and x represents the function input variable.

[0096] Specifically, when the computing resources within the computing unit are divided into non-zero order computing resources and are configured to participate in the computing unit, the calculated radar echo signal is transmitted to the The computing units in the N - element extended interconnected computing matrix that have signal - transmitting channels and are configured to transmit computing units include, but are not limited to: If the local computing unit is directly communicatively connected to the first computing unit, then vectorially synthesize the radar echo signal calculated by the local computing unit and the radar echo signals calculated by all second computing units to obtain a new radar echo signal, and then transmit the new radar echo signal to the first computing unit; otherwise, transmit the radar echo signal calculated by the local computing unit to the third computing unit so that it can be further transmitted to the first computing unit through the third computing unit. Wherein, the first computing unit refers to the one in the The computing units in the N - element extended interconnected computing matrix that have signal - transmitting channels and are configured to transmit computing units; the second computing units refer to other computing units in the N1 - element interconnected computing matrix where the local computing unit is located, which are configured to participate in the computing units and the computing resources within the unit are of the same order as the computing resources within the local computing unit; the third computing units refer to other computing units in the N1 - element interconnected computing matrix where the local computing unit is located, which are directly communicatively connected to the first computing unit and the computing resources within the unit are of the same order as the computing resources within the local computing unit.

[0097] In this embodiment, a 4×3 N - element extended interconnected computing matrix is taken as an example to number each computing unit and signal transceiver channel group: In the computing unit numbering rule U(N2,N1), N1 is the position of each computing unit in each interconnected computing matrix, N2 is the position of each interconnected computing matrix in the extended interconnected computing matrix, the value of N1 ranges from 0 to 2, and the value of N2 ranges from 0 to 3; if a computing unit is connected to a signal transceiver unit, then the signal transceiver channels connected to the signal transceiver unit are numbered as R(N2,N1,J) and T(N2,N1,J) respectively, where J is the J - th signal transceiver channel connected to this computing unit (the value starts from 0), N1 is the position of each computing unit in each interconnected computing matrix, and N2 is the position of each interconnected computing matrix in the extended interconnected computing matrix.

[0098] First sub - example of implementation:

[0099] Such as Figure 11As shown (in this example diagram, the connections between each computing unit and signal transceiver unit: solid lines represent high-speed connections that are utilized, dashed lines represent high-speed connections that are not utilized, and dotted lines represent high-speed connections between the computing unit and signal transceiver unit), the U(0,0) computing unit is connected to 1 set of signal transceiver channels, namely the R(0,0,0) receiving channel and the T(0,0,0) transmitting channel. A total of 9 computing units are required to perform high-precision echo calculations; the U(1,0) computing unit, U(1,1) computing unit, and U(1,2) computing unit are each connected to 1 set of signal transceiver channels, and 1 computing unit of its own is required to perform lower-precision echo calculations.

[0100] Taking the T(0,0,0) transmitting channel on the U(0,0) computing unit as an example, the calculation of radar echo simulation is divided into the following four steps:

[0101] (A1) Send the radar transmission waveform signal received by the U(0,0) computing unit from the R(0,0,0) receiving channel to the computing units configured to participate in the calculation through the high-speed serial connection relationship between the computing units, including the U(0,X) computing unit, U(2,X) computing unit, and U(3,X) computing unit, a total of 8 computing units;

[0102] (B1) Control the computer to perform grid parameter calculations and send the calculated grid parameters to each computing unit through the control bus interface;

[0103] (C1) Each computing unit performs electromagnetic reflection, vector synthesis, and electromagnetic propagation calculations respectively, and sends the calculated results to the U(0,0) computing unit through the high-speed serial connection relationship between the computing units. Among them, the U(2,X) computing unit and U(3,X) computing unit need to first perform vector synthesis on the echo calculation results within the interconnected computing matrix where they are located, and then send the synthesized echo to the U(0,0) computing unit through the high-speed serial connection relationship between the U(2,0) computing unit, U(3,0) computing unit, and U(0,0) computing unit;

[0104] (D1) After the U(0,0) computing unit performs final vector synthesis on all echo calculation results, it sends them out through the T(0,0,0) transmitting channel.

[0105] Taking the T(1,0,0) transmitting channel and R(1,0,0) receiving channel on the U(1,0) computing unit as an example, the calculation of radar echo simulation is divided into the following two steps:

[0106] (E1) Control the computer to perform grid parameter calculations and send the calculated grid parameters to the U(1,0) computing unit through the control bus interface;

[0107] (F1) The U(1,0) calculation unit performs electromagnetic reflection, vector synthesis, and electromagnetic propagation calculations, and sends the calculated results through the T(0,0,0) transmission channel.

[0108] Embodiment Sub - example Two:

[0109] As Figure 12 shown (in this example diagram, the connections between each calculation unit and signal transceiver unit: solid lines represent the high - speed connections utilized, dashed lines represent the high - speed connections not utilized, and dotted lines represent the high - speed connections between the calculation unit and the signal transceiver unit). Four U(X,0) calculation units are each connected to 1 signal receiving channel and 2 signal transmitting channels, namely the R(X,0,0) receiving channel and the T(X,0,Y) transmitting channel shown in the figure, and a total of 9 calculation units are utilized; Based on the radar emission waveforms received by these 4 signal receiving channels, high - precision echo calculations are performed for all 8 signal transmitting channels.

[0110] Taking the T(0,0,0) transmission channel and the T(0,0,1) transmission channel on the U(0,0) calculation unit as an example, the calculation of radar echo simulation is divided into the following four steps:

[0111] (A2) The radar emission waveform signals received from the R(0,0,0) receiving channel, R(1,0,0) receiving channel, R(2,0,0) receiving channel, and R(3,0,0) receiving channel on the U(0,0) calculation unit, U(1,0) calculation unit, U(2,0) calculation unit, and U(3,0) calculation unit are sent to the U(0,0) calculation unit through the high - speed serial connection relationship between the calculation units, and then sent by the U(0,0) calculation unit to the U(0,1) calculation unit and the U(0,2) calculation unit;

[0112] (B2) The control computer performs grid parameter calculations and sends the calculated grid parameters to each calculation unit through the control bus interface;

[0113] (C2) The U(0,0) calculation unit, U(0,1) calculation unit, and U(0,2) calculation unit respectively perform electromagnetic reflection, vector synthesis, and electromagnetic propagation calculations, and the U(0,1) calculation unit and the U(0,2) calculation unit send the calculated results to the U(0,0) calculation unit through the high - speed serial connection relationship between the calculation units;

[0114] (D2) After the U(0,0) calculation unit performs the final vector synthesis on the echo calculation results of the U(0,0) calculation unit, U(0,1) calculation unit, and U(0,2) calculation unit, it sends them out through the T(0,0,0) transmission channel and the T(0,0,1) transmission channel.

[0115] The echo calculation and transmission processes of the U(1,0) computing unit, U(2,0) computing unit, and U(3,0) computing unit can be extended by analogy.

[0116] In summary, the real-time high-precision radar echo simulation system provided by this embodiment has the following technical effects:

[0117] (1) This embodiment provides a flexible configurable real-time high-precision radar echo simulation system, which includes an N M element extended interconnected computing matrix and a control computer. On the one hand, through the connection relationships between the upper and lower extended interconnected computing matrix levels, between the extended interconnected computing matrix and the interconnected computing matrix, and between the computing units within the interconnected computing matrix, different topological structures and different scale computing arrays can be constructed. The more array elements of the interconnected computing matrix and the more extended interconnected levels, the larger the scale of the computing matrix, the greater the total computing power and storage space, which can meet the radar echo simulation requirements of larger scales, adapt to different channel scales and computing complexities. On the other hand, by designing the control computer and the working methods of the computing units in the matrix, large-scale parallel echo calculation can be realized, achieving high-precision radar echo simulation of multiple channels. And by designing decoupled computing units, the signal transceiver unit can be removed from the echo simulation node without radio frequency signal transceiver, thereby reducing the overall cost. Furthermore, it can solve the problems existing in the existing radar echo simulation schemes, such as insufficient target echo simulation ability, insufficient environmental clutter simulation ability, insufficient channel and computing power expansion ability, and high overall system construction cost, which is convenient for practical application and promotion;

[0118] (2) Flexible expansion and splitting: The designed computing topology in this embodiment is applicable to radar echo simulation systems with several channels to several hundred channels. It can easily expand a small-scale radar echo simulation system into a large-scale system and can also easily split a large-scale system into several small-scale systems;

[0119] (3) High-precision radar echo simulation: The accuracy that the radar echo simulation system can simulate mainly depends on the number of grid divisions of radar targets and environmental objects. The more grids, the higher the simulation accuracy, and the higher the computing power, data throughput, and access capabilities required for the corresponding computing system. The designed computing topology in this embodiment can flexibly expand the number of computing units, their communication interfaces, and storage units for each radar echo, thereby enhancing the ability of high-precision echo simulation;

[0120] (4) Low computational latency: The hardware circuit characteristics of the FPGA itself have the feature of low computational latency. At the same time, the designed computational matrix topology in this embodiment enables data interaction between any two computational units to only pass through a very short data exchange path. Therefore, the entire computational matrix has the advantage of low computational latency. This topology also retains the low-latency characteristics of low-order computational units when expanding step by step, and has the feature of a significant increase in the computing power of high-order computational units, which exactly matches the characteristics of radar clutter simulation where the near echo has a low delay and a small radar illumination area, while the far echo has a large delay and a large illumination area;

[0121] (5) Low cost: Due to the standardization of computational units and the interconnected computational matrix, the construction and expansion of large-scale radar echo simulation systems no longer need to be customized, thus enabling low cost;

[0122] (6) Easy configuration: Since the computational topology designed in this embodiment is a completely symmetric structure, only the algorithm and program need to be designed for a single computational unit to complete the algorithm and program design of the entire computational matrix;

[0123] (7) Customizable: The signal transceiver unit provides extended computing capabilities, and the implementation of this part of the computing power is completely decoupled from the computational matrix, so it is easy to provide customized signal processing capabilities for radar echo simulation port devices.

[0124] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the protection scope of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A flexible and configurable real-time high-precision radar echo simulation system, characterized in that: Included Meta-extension interconnection computing matrix and control computer, wherein the The meta-extension interconnection computing matrix includes N M indivual Meta-Extended Interconnection Computing Matrix, the The meta-extension interconnection computing matrix includes N M-1 indivual Meta-extended interconnected computing matrix, and so on The meta-extension interconnection computing matrix includes N M-m indivual Meta-extends the interconnected computing matrix until The meta-extension interconnection computing matrix includes N2 N1 meta-interconnection computing matrices, wherein the N1 meta-interconnection computing matrix includes N1 computing units. N M ×N M-1 ×…×N M-m The abbreviation of ×…×N2×N1, N M 、N M-1 、N M-m , N2 and N1 represent integers greater than or equal to 2, respectively, M represents an integer greater than or equal to 2, m exists when M is greater than or equal to 3, and represents an integer greater than or equal to 0 and less than M-2; Any two of the N1 computing units are communicatively connected; For each of the computing units in any N1-element interconnection computing matrix, the corresponding unit is respectively connected to the computing units in the N2-1 other N1-element interconnection computing matrices and at the corresponding position, wherein the any N1-element interconnection computing matrix and the N2-1 other N1-element interconnection computing matrices constitute the Meta-extended interconnected computing matrix; For any Each of the computing units in the N-th element expansion interconnection computing matrix is ​​connected to each other. M-m -1 other The computing units in corresponding positions in the meta-extension interconnection computing matrix are connected in communication, wherein any one Meta-extended interconnection computing matrix and the N M-m -1 other The meta-extension interconnection computing matrix is ​​described Meta-extended interconnected computing matrix; The control computers are respectively connected in communication with the The controlled end of each of the computing units in the meta-extended interconnected computing matrix; When the computing unit has a signal receiving channel and is configured as a receiving computing unit, it is used to transmit the radar transmission waveform signal received through the signal receiving channel to the Each of the computing units in the meta-extended interconnected computing matrix and configured as participating computing units; The control computer is used to calculate the grid parameters and transmit the calculated grid parameters to the Each of the computing units in the meta-extended interconnected computing matrix and configured as participating computing units; When the computing unit is configured as a participating computing unit, the computing unit is used to perform electromagnetic reflection calculation, vector synthesis calculation and / or electromagnetic propagation calculation on all received radar transmission waveform signals according to the received grid parameters, and transmit the calculated radar echo signals to the grid. The computing unit in the meta-extension interconnection computing matrix having a signal transmission channel and configured as a transmitting computing unit; When the calculation unit has a signal transmission channel and is configured as a transmission calculation unit, it is used to perform vector synthesis on all the received radar echo signals to obtain a final radar echo signal, and send it out through the signal transmission channel.

2. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The grid parameter calculation includes: Dividing radar targets and / or environmental objects into a plurality of grids; For each grid in the multiple grids, a corresponding multiple electromagnetic reflection parameters are calculated according to the corresponding electromagnetic wave incident angle, electromagnetic wave exit angle, and the geometric shape and surface characteristics of the object in the grid, wherein the multiple electromagnetic reflection parameters include radar scattering cross-section, RCS fluctuation model parameters, backscattering coefficient, clutter distribution model parameters and / or polarization scattering coefficient.

3. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The calculated grid parameters are transferred to the Each of the computing units in the meta-extension interconnected computing matrix and configured as participating computing units includes: In the The computing unit in the meta-extension interconnection computing matrix that has a signal transmission channel and is configured as a transmission computing unit is a central computing unit. The meta-extension interconnection computing matrix is ​​decomposed outward layer by layer into multi-order computing resources: the computing resources in the central computing unit are divided into zero-order computing resources, the computing resources in all other computing units in the N1 meta-interconnection computing matrix where the central computing unit is located are divided into first-order computing resources, and the computing resources in all other computing units in the N1 meta-interconnection computing matrix where the central computing unit is located are divided into first-order computing resources. The computing resources in all other N1 element interconnection computing matrices in the element extension interconnection computing matrix are divided into second-order computing resources, and the Mm-order computing resources, M-1-order computing resources and M-order computing resources are determined by analogy; The calculated grid parameters corresponding to the near-end grid are transmitted to the Each of the computing units in the meta-extended interconnected computing matrix is ​​configured as a participating computing unit and the computing resources in the unit are divided into low-order computing resources, and the grid parameters calculated and corresponding to the remote grid are transmitted to the remote grid. The computing units in the meta-extended interconnected computing matrix are configured as participating computing units and the computing resources within the units are divided into high-order computing resources, wherein the proximal grid refers to a grid that is closer to the radar in the radar echo simulation scene, and the distal grid refers to a grid that is farther from the radar in the radar echo simulation scene, and the proximal grid and the distal grid both belong to multiple grids obtained by dividing radar targets and / or environmental objects, and the low-order computing resources and the high-order computing resources both belong to the multi-order computing resources.

4. The real-time high-precision radar echo simulation system according to claim 3, characterized in that: When the computing resources in the computing unit are divided into non-zero-order computing resources and configured as participating computing units, the radar echo signal calculated is transmitted to the computing unit in the The computing unit in the meta-extension interconnection computing matrix having a signal transmission channel and configured as a transmission computing unit includes: If the local computing unit is directly connected to the first computing unit for communication, vector synthesis is performed on the radar echo signal calculated by the local computing unit and the radar echo signals calculated by all the second computing units to obtain a new radar echo signal, and then the new radar echo signal is transmitted to the first computing unit; otherwise, the radar echo signal calculated by the local computing unit is transmitted to the third computing unit so as to be transmitted to the first computing unit through the third computing unit, wherein the first computing unit refers to the The computing unit in the meta-extension interconnection computing matrix has a signal transmission channel and is configured as a transmitting computing unit, the second computing unit refers to the other computing units configured as participating computing units in the N1 meta-interconnection computing matrix where the local computing unit is located and the computing resources in the unit are of the same order as the computing resources in the local computing unit, and the third computing unit refers to the other computing units in the N1 meta-interconnection computing matrix where the local computing unit is located that are directly communicated with the first computing unit and the computing resources in the unit are of the same order as the computing resources in the local computing unit.

5. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The electromagnetic reflection calculation includes: According to the received grid parameters and in combination with the attribute parameters of the radar transmitting waveform signal, the electromagnetic reflection simulation of the radar transmitting waveform signal is performed according to the following formula: F r (t,n)=F t (t)·A(n)·σ(λ,n)·g(t,n)·f(θ,φ,pol) In the formula, n represents the grid number and is a positive integer, t represents time, and F r (t,n) represents the reflected electromagnetic wave of the nth grid, F t where (t) represents the incident electromagnetic wave, A(n) represents the area of ​​the nth grid, σ(λ,n) represents the reference radar cross-section area or backscattering coefficient of the nth grid and is related to the shape and material properties of the radar target and the wavelength λ of the incident electromagnetic wave, g(t,n) represents the RCS fluctuation model or clutter distribution model of the nth grid, and f(θ,φ,pol) represents the influence function of the incident angle θ, reflection angle φ and polarization state pol on the radar cross-section area.

6. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The vector synthesis calculation includes: The reflected electromagnetic waves of an adjacent grid group containing at least two grids are vector-synthesized according to the following formula: F r (t)=ΣΔ(F r (t,n'),n')·Φ(f,n') In the formula, t represents time, F r (t) represents the vector synthesis result of the reflected electromagnetic wave of the adjacent grid group, n' represents the grid number in the adjacent grid group and is a positive integer, F r (t,n') represents the reflected electromagnetic wave of the n'th grid in the adjacent grid group, Δ(x,n') represents the time delay caused by the radial distance difference relative to the direction of the radar receiving antenna of the n'th grid compared to the first grid in the adjacent grid group, Φ(f,n') represents the Doppler frequency shift caused by the relative motion of the n'th grid compared to the first grid, and x represents the function input variable.

7. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The electromagnetic propagation calculation includes: Electromagnetic propagation is performed on the vector synthesis results of the reflected electromagnetic waves of the grid group according to the following formula: In the formula, t represents time, F a (t) represents the reflected electromagnetic wave received by the radar receiving antenna, F r (t) represents the vector synthesis result of the reflected electromagnetic wave of the grid group, G t Represents the gain of the radar transmitting antenna, G r represents the gain of the radar receiving antenna, R represents the radial distance in the direction of the radar receiving antenna, Η(x) represents the multipath effect response function, Δ(x,R) represents the time delay caused by the radial distance R in the direction of the radar receiving antenna, Φ(f) represents the Doppler frequency shift caused by the movement relative to the radar receiving antenna, and x represents the function input variable.

8. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The computing unit is communicatively connected to K signal transceiver units, wherein K represents a positive integer, and the signal transceiver units are used to provide the signal receiving channel and / or the signal transmitting channel.

9. The real-time high-precision radar echo simulation system according to claim 8, characterized in that: When the signal transceiver unit includes a second FPGA module and a second storage module and a second high-speed serial interface respectively communicatively connected to the second FPGA module, the signal transceiver unit is also used as an extended computing unit relative to the computing unit so as to share the computing tasks of the computing unit.

10. The real-time high-precision radar echo simulation system according to claim 1, characterized in that: The computing unit includes a first FPGA module, a first storage module and a first high-speed serial interface, wherein the first high-speed serial interface has at least one and is used for communication connection with a signal transceiver unit or other computing units; The first FPGA module is communicatively connected to the first storage module and the first high-speed serial interface respectively.

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