Pixel driving circuit, display panel and display equipment

Abstract

The embodiment of the invention discloses a pixel driving circuit, a display panel and display equipment, and belongs to the technical field of display. The pixel driving circuit comprises a light-emitting diode, a driving transistor, a light-emitting control transistor, a reset transistor, a voltage sampling transistor, a first capacitor, a second capacitor and a voltage anti-shake module, wherein the first end of the voltage anti-shake module is electrically connected with the second end of the driving transistor, the reference voltage is connected to the second end of the voltage anti-shake module, and the voltage anti-shake module is used for writing the reference voltage into the second end of the driving transistor in the initialization stage. According to the embodiment of the invention, by introducing the voltage anti-shake module, the constant reference voltage can be provided for the pixel driving circuits at different positions in the initialization stage, so that the problem of non-uniform display effects at different positions due to different local voltages of the pixel driving circuits at different positions is solved.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of display technologies, and in particular, to a pixel driving circuit, a display panel, and a display device. Background Art

[0002] Currently, in a related display panel, the VDD and VSS voltages are provided with a global voltage (Global_VDD / Global_VSS) by a power supply and supplied to each pixel driving circuit via contact holes (CT, contact) and respective power supply wirings. Since the CT and the power supply wirings themselves have resistance, and there is current passing through the CT and the power supply wirings when the pixel emits light, there is a current resistance voltage drop (IR drop), resulting in a deviation between the local voltage (Local_VDD / Local_VSS) actually supplied to the pixel driving circuit and the global voltage, and there are also differences in the local voltages of the pixel driving circuits at different positions, thus making the display effects at different positions uneven. Summary of the Invention

[0003] The main purpose of the embodiments of the present application is to provide a pixel driving circuit, a display panel, and a display device, aiming to solve the technical problem of how to avoid uneven display effects at different positions due to different local voltages of the pixel driving circuits at different positions.

[0004] To achieve the above object, an embodiment of the present application provides a pixel driving circuit, and the pixel driving circuit includes:

[0005] A light-emitting diode, the cathode of the light-emitting diode is connected to a first power supply voltage;

[0006] A driving transistor, a first end of the driving transistor is electrically connected to the anode of the light-emitting diode;

[0007] A light-emitting control transistor, a first end of the light-emitting control transistor is electrically connected to a second end of the driving transistor, a controlled end of the light-emitting control transistor is connected to a light-emitting control signal, a second end of the light-emitting control transistor is connected to a second power supply voltage, and the second power supply voltage is greater than the first power supply voltage;

[0008] A reset transistor, a first end of the reset transistor is electrically connected to the anode of the light-emitting diode, a controlled end of the reset transistor is connected to a reset control signal, a second end of the reset transistor is connected to a reset voltage, and the reset voltage is less than the second power supply voltage;

[0009] A voltage sampling transistor, a first end of the voltage sampling transistor is electrically connected to a controlled end of the driving transistor, a controlled end of the voltage sampling transistor is connected to a voltage sampling control signal, and a second end of the voltage sampling transistor is connected to a data signal line;

[0010] A first capacitor, a first end of the first capacitor is electrically connected to a controlled end of the driving transistor, and a second end of the first capacitor is electrically connected to a second end of the driving transistor;

[0011] A voltage anti-shake module, a first end of the voltage anti-shake module is electrically connected to the second end of the driving transistor, a second end of the voltage anti-shake module accesses a reference voltage, and the voltage anti-shake module is configured to write the reference voltage to the second end of the driving transistor in an initialization stage;

[0012] A second capacitor, a first end of the second capacitor is electrically connected to the second end of the first capacitor, and a second end of the second capacitor is electrically connected to the second end of the voltage anti-shake module.

[0013] In one embodiment, the reference voltage is not equal to the second power supply voltage, the reference voltage is not less than the reset voltage, and a difference between the reference voltage and the first power supply voltage is not greater than a threshold voltage of the light-emitting diode.

[0014] In one embodiment, the voltage anti-shake module includes:

[0015] The voltage anti-shake module includes:

[0016] An anti-shake transistor, a first end of the anti-shake transistor is electrically connected to the second end of the driving transistor, a controlled end of the anti-shake transistor accesses an anti-shake control signal, a second end of the anti-shake transistor accesses the reference voltage, and the anti-shake transistor is controlled by the anti-shake control signal to be turned on in the initialization stage to write the reference voltage to the second end of the driving transistor.

[0017] In one embodiment, the data signal line is configured to provide an initialization voltage and a data voltage;

[0018] The pixel driving circuit sequentially operates in an initialization stage, a threshold voltage correction stage, a data writing stage, and a light-emitting stage under the control of the light-emitting control signal, the reset control signal, and the voltage sampling control signal.

[0019] In one embodiment, the pixel driving circuit further includes:

[0020] An initialization module, a first end of the initialization module is electrically connected to the controlled end of the driving transistor, a second end of the initialization module accesses an initialization voltage, and the initialization module is configured to write the initialization voltage to the controlled end of the driving transistor in the initialization stage.

[0021] In one embodiment,

[0022] The initialization module includes:

[0023] Initialize a transistor. A first end of the initialization transistor is electrically connected to a controlled end of the driving transistor. A control signal of the initialization transistor is connected to an initialization control signal, and a second end of the initialization transistor is connected to the initialization voltage. The initialization transistor is configured to conduct during the initialization phase under the control of the initialization control signal to write the initialization voltage into the controlled end of the driving transistor.

[0024] In one embodiment, the data signal line is configured to provide a data voltage.

[0025] The pixel driving circuit operates in sequence in the initialization phase, threshold voltage correction phase, data writing phase, and light emitting phase under the control of the light emitting control signal, the reset control signal, and the voltage sampling control signal.

[0026] In one embodiment, when the light emitting control transistor is turned off, the reset transistor is turned on or off, the voltage sampling transistor is turned on, and the driving transistor is turned on based on the reference voltage and the initialization voltage, the pixel driving circuit operates in the initialization phase.

[0027] When the light emitting control transistor is turned off, the reset transistor is turned on, the voltage sampling transistor is turned off, and the driving transistor changes from on to off, the pixel driving circuit operates in the threshold voltage correction phase.

[0028] When the light emitting control transistor is turned off, the reset transistor is turned on, the voltage sampling transistor is turned on, and the data voltage is written into the controlled end of the driving transistor, the pixel driving circuit operates in the data writing phase.

[0029] When the light emitting control transistor is turned on, the reset transistor is turned off, the voltage sampling transistor is turned off, and the driving transistor is turned on, the pixel driving circuit operates in the light emitting phase.

[0030] In addition, to achieve the above object, an embodiment of the present application further provides a display panel, and the display panel includes the pixel driving circuit as described above.

[0031] In addition, to achieve the above object, an embodiment of the present application further provides a display device, and the display device includes the display panel as described above.

[0032] An embodiment of the present application provides a pixel driving circuit, a display panel, and a display device. The pixel driving circuit includes: a light-emitting diode, the cathode of the light-emitting diode is connected to a first power supply voltage; a driving transistor, the first end of the driving transistor is electrically connected to the anode of the light-emitting diode; a light-emitting control transistor, the first end of the light-emitting control transistor is electrically connected to the second end of the driving transistor, the controlled end of the light-emitting control transistor is connected to a light-emitting control signal, and the second end of the light-emitting control transistor is connected to a second power supply voltage, and the second power supply voltage is greater than the first power supply voltage; a reset transistor, the first end of the reset transistor is electrically connected to the anode of the light-emitting diode, the controlled end of the reset transistor is connected to a reset control signal, and the second end of the reset transistor is connected to a reset voltage, and the reset voltage is less than the second power supply voltage; a voltage sampling transistor, the first end of the voltage sampling transistor is electrically connected to the controlled end of the driving transistor, the controlled end of the voltage sampling transistor is connected to a voltage sampling control signal, and the second end of the voltage sampling transistor is connected to a data signal; a first capacitor, the first end of the first capacitor is electrically connected to the controlled end of the driving transistor, and the second end of the first capacitor is electrically connected to the second end of the driving transistor; a voltage anti-shake module, the first end of the voltage anti-shake module is electrically connected to the second end of the driving transistor, the second end of the voltage anti-shake module is connected to a reference voltage, and the voltage anti-shake module is configured to write the reference voltage to the second end of the driving transistor in the initialization stage; a second capacitor, the first end of the second capacitor is electrically connected to the second end of the first capacitor, and the second end of the second capacitor is electrically connected to the second end of the voltage anti-shake module. By introducing the voltage anti-shake module in the embodiment of the present application, a fixed reference voltage can be provided to the pixel driving circuits at different positions in the initialization stage, thereby solving the problem that the display effects at different positions are uneven due to the different local voltages of the pixel driving circuits at different positions. Description of the Drawings

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only a part of the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0034] Figure 1 It is a schematic structural diagram of a pixel driving circuit of a display panel in the related art;

[0035] Figure 2 is Figure 1 a schematic circuit diagram of the power supply method involved in the pixel driving circuit in;

[0036] Figure 3 is Figure 1 a broken line schematic diagram of the power supply voltage of the pixel driving circuit involved in changing with the display panel in different frame periods;

[0037] Figure 4 Schematic diagram of the structure of a pixel driving circuit provided by an embodiment of the present application;

[0038] Figure 5 To illustrate Figure 4 Schematic diagram of a specific implementation of the voltage anti-shake module in;

[0039] Figure 6 Based on Figure 5 Schematic diagram of a control timing provided for the shown structural schematic;

[0040] Figure 7 After adding an initialization module on the basis of; Figure 4 Schematic diagram of the structure;

[0041] Figure 8 To illustrate Figure 7 Schematic diagram of a specific implementation of the initialization module in;

[0042] Figure 9 After combining Figure 5 and Figure 8 Schematic diagram of the structure of a pixel driving circuit obtained;

[0043] Figure 10 Based on Figure 9 Schematic diagram of a control timing provided for the shown structural schematic;

[0044] Figure 11 Based on Figure 6 The control timing provided for controlling the pixel driving circuit as shown in Figure 5 Schematic diagram of the working state at time T1 after control;

[0045] Figure 12 Based on Figure 6 The control timing provided for controlling the pixel driving circuit as shown in Figure 5 Schematic diagram of the working state at time T2 after control;

[0046] Figure 13 Based on Figure 6 The control timing provided for controlling the pixel driving circuit as shown in Figure 5 Schematic diagram of the working state at time T3 after control;

[0047] Figure 14 Based on Figure 6 The control timing provided for controlling the pixel driving circuit as shown in Figure 5 Schematic diagram of the working state at time T4 after control;

[0048] Figure 15 Based on Figure 10The schematic diagram of the working state during the T1 period after controlling the pixel driving circuit as shown in Figure 9 by the provided control timing;

[0049] Figure 16 is the schematic diagram of the working state during the T2 period after controlling the pixel driving circuit as shown in Figure 10 by the provided control timing; Figure 9 is the schematic diagram of the working state during the T3 period after controlling the pixel driving circuit as shown in

[0050] Figure 17 by the provided control timing; Figure 10 is the schematic diagram of the working state during the T4 period after controlling the pixel driving circuit as shown in Figure 9 by the provided control timing;

[0051] Figure 18 is the schematic diagram of a control timing obtained after adjusting the reset control signal AZ[n] from low level to high level during the T1 period in Figure 10 is the schematic diagram of a control timing obtained after adjusting the reset control signal AZ[n] from low level to high level during the T1 period in Figure 9 is the schematic diagram of the working state during the T1 period after controlling the pixel driving circuit as shown in

[0052] Figure 19 by the provided control timing; Figure 6 is the schematic diagram of the working state during the T1 period after controlling the pixel driving circuit as shown in

[0053] Figure 20 by the provided control timing; Figure 10 is the schematic diagram of a control timing obtained after adjusting the reset control signal AZ[n] from low level to high level during the T1 period in

[0054] Figure 21 is the schematic diagram of the working state during the T1 period after controlling the pixel driving circuit as shown in Figure 19 by the provided control timing; Figure 5 is the schematic diagram of the working state during the T1 period after controlling the pixel driving circuit as shown in

[0055] Figure 22 by the provided control timing; Figure 20 is the schematic diagram of the working state during the T1 period after controlling the pixel driving circuit as shown in Figure 9 by the provided control timing.

[0056] Explanation of the reference numerals in the attached drawings:

[0057] LED, light-emitting diode; ELVSS, first power supply voltage; M1, driving transistor;

[0058] M2, light-emitting control transistor; DS[n], light-emitting control signal;

[0059] ELVDD_local, second power supply voltage; M3, reset transistor; AZ[n], reset control signal;

[0060] VAR, reset voltage; M4, voltage sampling transistor; WS[n], voltage sampling control signal;

[0061] DATA[m], data signal; C1, first capacitor; 10, voltage anti-shake module;

[0062] VREF, reference voltage; C2, second capacitor; M5, anti-shake transistor;

[0063] REF[n], anti-shake control signal; VOFS, initialization voltage; VDATA, data voltage;

[0064] 20, initialization module; M6, initialization transistor; OFS[n], initialization control signal. Detailed implementation manner

[0065] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present application. However, those skilled in the art should clearly understand that the embodiments of the present application can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid unnecessary details from interfering with the description of the embodiments of the present application.

[0066] Currently, in the related art, the voltage used in the pixel circuit of an OLED (Organic Light-Emitting Diode) display panel is provided by the global voltages ELVDD_global / ELVSS_global supplied by the power supply through contact holes (CT, contact) and respective power supply wirings to each pixel driving circuit (a single pixel driving circuit is as Figure 1 shown), however, since the contact holes and the power supply wirings themselves have resistance, and there is current passing through the contact holes and the power supply wirings when the OLED emits light, there is a current resistance voltage drop (IR drop), resulting in a deviation between the local voltages ELVDD_local / ELVSS_local actually provided to the specific pixel driving circuit and the global voltage, and there are also differences in the local voltages of the pixel driving circuits at different positions, thus making the display effects at different positions uneven.

[0067] Further, referring to Figure 2 , the ELVDD power supply voltage drop situation of a single pixel driving circuit in the OLED display panel can be understood in combination with Figure 2 as follows, from Figure 2It can be known that in this power supply mode, the relationship between the electrical parameters satisfies: ELVDD_local = ELVDD_global - I_oled * r_ELVDD. When the global voltage and resistance are basically unchanged, the larger I_oled is, the smaller ELVDD_local will be.

[0068] Furthermore, referring to Figure 3 , Figure 3 shows the voltage drop of the local voltage ELVDD_local during different frame periods of the display panel. Combining Figure 3 and the above conclusion, the problems existing in this solution can be further analyzed. In Figure 3 , V1 is the gate voltage Vg for writing to the gate (G) of the driving transistor as shown in Figure 1 . V2 is the local voltage value ELVDD_local(white) in the all-white frame period, and V3 is the local voltage value ELVDD_local(black) in the all-black frame period. Based on the pixel driving circuit shown in Figure 1 , the potential difference Vgs between the G and S poles of the driving transistor M1 is V1 - V3 at t_frame1 and V1 - V2 at t_frame3. It can be known from Figure 3 that during t_frame1 and t_frame5, the display panel shows black, at this time the OLED is turned off, the current on the power supply line can be ignored, and the voltage drop is low, so it can be considered that ELVDD_local(black) is equal to the global voltage value ELVDD_global; during t_frame3, the display panel shows white, the current on the power supply line is relatively large, the voltage drop is large, resulting in a relatively low voltage of ELVDD_local(white); during t_frame2, the display panel changes from black to white line by line, so the current increases with the programming progress of the pixel circuit, and the voltage drop on the power supply line also gradually increases. According to I_oled = 1 / 2 * μ * Cox * [Vgs - Vth] 2 it can be known that assuming Vth is a fixed value in a short time, then the larger Vgs is, the larger the I_oled current will be. Therefore, when writing the same programming voltage Vg to the gate of the driving transistor, if ELVDD is not compensated or isolated and the source voltage Vs of the driving transistor is directly equal to the local voltage ELVDD_local, it will cause the I_oled current to be inconsistent, and further cause the OLED emission brightness to be inconsistent.

[0069] Specifically, the above-mentioned frame1 and frame5 are all-black picture frames, and the gray scale of each pixel is 0; frame2, 3, and 4 are all-white picture frames, and the gray scale of each pixel is 255. During one frame time (t_frame2) of frame2, since the pixels in each row change from gray scale 0 to gray scale 255 row by row, the local voltage ELVDD_local gradually decreases as the number of illuminated pixels increases; correspondingly, during one frame time (t_frame4) of frame4, since the pixels in each row change from gray scale 255 to gray scale 0 row by row, the local voltage ELVDD_local gradually increases as the number of non-illuminated pixels increases. As an example, assume that the display panel includes N rows of pixels, the current frame shows black, and the next frame shows white. Then the N rows of pixels change from black to white row by row, that is, the data voltage of the white picture is written into each row of pixel circuits row by row, and the time for each row of pixel circuits to write the data voltage is different. When the current row of pixel driving circuit writes the data voltage, the previous row of pixel driving circuit enters the light-emitting stage. As the white is displayed row by row, the current on the ELVDD power supply line gradually becomes higher, and the local voltage ELVDD_local gradually decreases, that is, corresponding to Figure 3 the voltage change shown from t_frame1 to t_frame2 in

[0070] Based on the above problem analysis process, in the actual situation where the local voltage ELVDD_local fluctuates, such as Figure 1 the driving process of the pixel driving circuit shown is as follows:

[0071] In the first stage, that is, the initialization stage, the voltage written to the source S of the driving transistor M1 is VS1 = VDD_local1. Since the moments when the pixel circuits of different rows enter the initialization stage are different, there are also differences in VS1 of different rows;

[0072] In the second stage, that is, the threshold voltage compensation stage, the source of the driving transistor starts to discharge from VS1. Since the starting voltages of the discharges of the pixel circuits of different rows are different, it is easy to cause the voltages to be different after the same discharge time, and then cause the voltage Vth' stored at both ends of C1 at the end of the second stage to deviate from the actual threshold voltage Vth of the driving transistor, and finally cause problems such as inconsistent light-emitting brightness and uneven picture display in the light-emitting stage;

[0073] In the third stage, that is, the data voltage writing stage, even if the deviation between Vth' and the actual Vth at the end of the second stage is not considered, since VDD_local2 ≠ VDD_local3, therefore, Vgs = Vth - △VDATA = Vth - ((VDD_local3 - VDATA) - (VDD_local2 - VOFS)) * C2 / C1 + C2;

[0074] In the fourth stage, i.e., the light-emitting stage, due to the capacitor bootstrap effect, the potential difference Vgs across C1 remains unchanged. Therefore, the current I_oled is actually related to the voltage difference between VDD_local2 and VDD_local3. For two pixels with the same data voltage written in different rows, the voltage difference between VDD_local2 and VDD_local3 is different, and the light-emitting current of the OLED is also different. As a result, the phenomenon of inconsistent light-emitting brightness occurs.

[0075] Based on this, the embodiments of the present application provide a pixel driving circuit, a display panel, and a display device. By introducing a voltage anti-jitter module, a fixed and non-jittery reference voltage VREF can be provided to the pixel driving circuits at different positions during the initialization stage, thereby solving the problem that the voltages of the driving transistors of the pixel driving circuits written at different positions are different due to the jitter of the ELVDD_local power supply line, and further resulting in uneven light-emitting effects at different positions of the display panel.

[0076] The pixel driving circuit, the display panel, and the display device provided by the embodiments of the present application are specifically described through the following embodiments. First, the pixel driving circuit in the embodiments of the present application is described.

[0077] The embodiments of the present application provide a pixel driving circuit, referring to Figure 4 , Figure 4 which is a schematic structural diagram of a pixel driving circuit provided by the embodiments of the present application. In this embodiment, the pixel driving circuit includes:

[0078] A light-emitting diode LED, the cathode of the light-emitting diode LED is connected to the first power supply voltage ELVSS;

[0079] A driving transistor M1, the first end of the driving transistor M1 is electrically connected to the anode of the light-emitting diode LED;

[0080] A light-emitting control transistor M2, the first end of the light-emitting control transistor M2 is electrically connected to the second end of the driving transistor M1, the controlled end of the light-emitting control transistor M2 is connected to the light-emitting control signal DS[n], and the second end of the light-emitting control transistor M2 is connected to the second power supply voltage ELVDD_local, and the second power supply voltage ELVDD_local is greater than the first power supply voltage ELVSS;

[0081] A reset transistor M3, the first end of the reset transistor M3 is electrically connected to the anode of the light-emitting diode LED, the controlled end of the reset transistor M3 is connected to the reset control signal AZ[n], and the second end of the reset transistor M3 is connected to the reset voltage VAR, and the reset voltage VAR is less than the second power supply voltage ELVDD_local;

[0082] A voltage sampling transistor M4, a first end of the voltage sampling transistor M4 is electrically connected to a controlled end of a driving transistor M1, a controlled end of the voltage sampling transistor M4 is connected to a voltage sampling control signal WS[n], and a second end of the voltage sampling transistor M4 is connected to a data signal line to access a data signal DATA[m];

[0083] A first capacitor C1, a first end of the first capacitor C1 is electrically connected to a controlled end of the driving transistor M1, and a second end of the first capacitor C1 is electrically connected to a second end of the driving transistor M1;

[0084] A voltage anti-shake module 10, a first end of the voltage anti-shake module 10 is electrically connected to a second end of the driving transistor M1, a second end of the voltage anti-shake module 10 is connected to a reference voltage VREF, and the voltage anti-shake module 10 is configured to write the reference voltage VREF into the second end of the driving transistor M1 during an initialization phase;

[0085] A second capacitor C2, a first end of the second capacitor C2 is electrically connected to a second end of the first capacitor C1, and a second end of the second capacitor C2 is electrically connected to a second end of the voltage anti-shake module 10.

[0086] In this embodiment, the light-emitting diode LED can be an OLED (Organic light-emitting diode), an AMOLED (Active-matrix organic light-emitting diode), a micro OLED (Micro Organic Light-Emitting Diode), a micro LED (Micro Light-Emitting Diode), etc., or can also be a light-emitting diode of other materials or an electronic device with similar characteristics, and this embodiment does not limit this.

[0087] In this embodiment, the first power supply voltage ELVSS is a low voltage that provides the current path for the light-emitting diode LED; the second power supply voltage ELVDD_local is a high voltage that provides current to the light-emitting diode LED, and it is also a local voltage provided to each pixel driving circuit via contact holes and respective power supply wirings from the global voltage supplied by the power supply of the display panel. Since there is current in the power supply line that transmits the second power supply voltage ELVDD_local, the second power supply voltage ELVDD_local may have a problem of voltage jitter. In order to avoid the problem that the voltage jitter of the second power supply voltage ELVDD_local ultimately leads to inconsistent emission brightness of the light-emitting diodes LED in the pixel driving circuits of different rows in the display panel, this embodiment introduces a voltage anti-jitter module 10 that writes a stable and non-jitter reference voltage VREF only to the second end of the driving transistor M1 during the initialization phase. Moreover, since there is no current in the signal line that transmits the reference voltage VREF, the reference voltage VREF will not be affected by the current and generate jitter. Since the reference voltage VREF is written to the second end of the driving transistor M1 during the initialization phase, in order to ensure that the driving transistor M1 and the reset transistor M3 can form a discharge path during the threshold voltage correction phase, in addition to being less than the second power supply voltage ELVDD_local, the reset voltage VAR cannot be greater than the reference voltage VREF. In addition, the reference voltage VREF does not need to be equal to the second power supply voltage ELVDD_local. At the same time, in order to avoid the light-emitting diode LED from emitting light during the initialization phase, the difference between the reference voltage VREF and the first power supply voltage ELVSS cannot be greater than the threshold voltage V_th_led of the light-emitting diode LED.

[0088] It should be noted that the transistors used in this embodiment can be thin film transistors TFT (Thin Film Transistor), metal-oxide-semiconductor field-effect transistors MOS (abbreviation of MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor), or other devices with similar functions. Taking the thin film transistor as an example, in this embodiment, the controlled ends of each transistor can be regarded as the gates of the thin film transistors, and the source and drain of the thin film transistor are symmetric, so its source and drain can be interchanged. Therefore, whether the first end and the second end of each transistor in this embodiment are the drain or the source can be determined according to the actual situation.

[0089] As an example, in Figure 4In the schematic structural diagram of the pixel driving circuit shown, the first end of the driving transistor M1 corresponds to the drain D, the controlled end corresponds to the gate G, and the second end corresponds to the source S; it should be noted that in this embodiment, only the driving transistor M1 is used as an example for illustration, and it does not mean that the first end of each transistor is the drain and the second end is the source. This embodiment does not limit this.

[0090] An embodiment of the present application provides a pixel driving circuit. By avoiding using the high voltage, i.e., the second power supply voltage ELVDD_local, which must provide current to the light-emitting diode LED during the light-emitting stage, during the initialization stage, but using a stable and non-jittery reference voltage VREF to write to the second end of the driving transistor M1 during the initialization stage, it can ensure that the light-emitting brightness of the light-emitting diodes LED in the pixel driving circuits of different rows is no longer affected by the second power supply voltage ELVDD_local that may have voltage jitter, overcoming the defect that in the related art, the 4T2C circuit and its driving method may cause inconsistent light-emitting brightness of pixels in different rows due to voltage jitter.

[0091] In some feasible embodiments, referring to Figure 5 , the above voltage anti-jitter module 10 may specifically include:

[0092] An anti-jitter transistor M5, the first end of the anti-jitter transistor M5 is electrically connected to the second end of the driving transistor M1, the controlled end of the anti-jitter transistor M5 accesses the anti-jitter control signal REF[n], the second end of the anti-jitter transistor M5 accesses the reference voltage VREF, and the anti-jitter control signal REF[n] is used to control the anti-jitter transistor M5 to conduct during the initialization stage to write the reference voltage VREF to the second end of the driving transistor M1.

[0093] In this embodiment, in order to enable the voltage anti-jitter module 10 to write the reference voltage VREF to the second end of the driving transistor M1 only during the initialization stage, it can be achieved by introducing the anti-jitter control signal REF[n] and the anti-jitter transistor M5 that can be controlled by the anti-jitter control signal REF[n].

[0094] In some feasible embodiments, the data signal DATA[m] provided by the data signal line may specifically include an initialization voltage Vofs and a data voltage VDATA;

[0095] The light-emitting control signal DS[n], the reset control signal AZ[n], and the voltage sampling control signal WS[n] are used to change the working timing of the pixel driving circuit, so that the pixel driving circuit works in the initialization stage, the threshold voltage correction stage, the data writing stage, and the light-emitting stage in sequence.

[0096] In this embodiment, during the initialization phase, the data signal DATA[m] is the initialization voltage V OFS, and during the threshold voltage correction phase, data writing phase, and light emission phase, the data signal DATA[m] is the data voltage V DATA.

[0097] In this embodiment, as Figure 4 shown, the pixel driving circuit is used to drive a sub-pixel in the n-th row of pixels of the display panel. The light emission control signal DS[n], reset control signal AZ[n], and voltage sampling control signal WS[n] come from different control lines of the n-th row of pixels, and the data signal DATA[m] comes from the m-th column data line. By controlling the light emission control signal DS[n], reset control signal AZ[n], and voltage sampling control signal WS[n] to output high and low levels according to a certain timing sequence, and cooperating with various voltages accessed by each component at different times, the pixel driving circuit can work in the initialization phase, threshold voltage correction phase, data writing phase, and light emission phase in sequence.

[0098] As an example, taking Figure 5 the structural schematic diagram shown as an example, when all transistors are P-type transistors, the control timing schematic diagrams of the above light emission control signal DS[n], reset control signal AZ[n], voltage sampling control signal WS[n], anti-shake control signal REF[n], and data signal DATA[m] can be as Figure 6 shown.

[0099] In some feasible embodiments, referring to Figure 7 , the above pixel driving circuit may further include:

[0100] An initialization module 20, the first end of the initialization module 20 is electrically connected to the controlled end of the driving transistor M1, the second end of the initialization module 20 accesses the initialization voltage V OFS, and the initialization module 20 is used to write the initialization voltage V OFS into the controlled end of the driving transistor M1 during the initialization phase.

[0101] In this embodiment, after introducing the initialization module 20 for writing the initialization voltage V OFS into the controlled end of the driving transistor M1 during the initialization phase, the data lines for transmitting the data signal DATA[m] in the above embodiments may no longer multiplex time division to transmit the initialization voltage V OFS and the data voltage V DATA respectively.

[0102] In some feasible embodiments, referring to Figure 8 , the above initialization module 20 may specifically include:

[0103] Initialize transistor M6. Initialize the first terminal of transistor M6 to be electrically connected to the controlled terminal of driving transistor M1. Initialize the controlled terminal of transistor M6 to receive initialization control signal OFS[n]. Initialize the second terminal of transistor M6 to receive initialization voltage Vofs. Initialization control signal OFS[n] is used to control transistor M6 to conduct during the initialization phase, so as to write initialization voltage Vofs into the controlled terminal of driving transistor M1.

[0104] In this embodiment, in order to enable initialization module 20 to write initialization voltage Vofs into the controlled terminal of driving transistor M1 only during the initialization phase, it can be achieved by introducing initialization control signal OFS[n] and initialization transistor M6 that can be controlled by initialization control signal OFS[n].

[0105] In some feasible embodiments, data signal DATA[m] includes data voltage VDATA;

[0106] Emission control signal DS[n], reset control signal AZ[n], and voltage sampling control signal WS[n] are used to change the working timing of the pixel driving circuit, so that the pixel driving circuit works in the initialization phase, threshold voltage correction phase, data writing phase, and emission phase in sequence.

[0107] As an example, combining the above Figure 5 and Figure 8 can obtain the structural schematic diagram of the pixel driving circuit as shown in Figure 9 . When all the transistors in Figure 9 are P-type transistors, the control timing schematic diagrams of the above emission control signal DS[n], reset control signal AZ[n], voltage sampling control signal WS[n], initialization control signal OFS[n], anti-shake control signal REF[n], and data signal DATA[m] can be as shown in Figure 10 .

[0108] In some feasible embodiments, when emission control transistor M2 is cut off, reset transistor M3 is conducting or cut off, voltage sampling transistor M4 is conducting, and driving transistor M1 conducts based on reference voltage VREF and initialization voltage Vofs, the pixel driving circuit works in the initialization phase;

[0109] When emission control transistor M2 is cut off, reset transistor M3 is conducting, voltage sampling transistor M4 is cut off, and driving transistor M1 changes from conducting to cut off, the pixel driving circuit works in the threshold voltage correction phase;

[0110] When the light-emitting control transistor M2 is turned off, the reset transistor M3 is turned on, the voltage sampling transistor M4 is turned on, and the data voltage VDATA is written to the controlled terminal of the driving transistor M1, the pixel driving circuit operates in the data writing stage;

[0111] When the light-emitting control transistor M2 is turned on, the reset transistor M3 is turned off, the voltage sampling transistor M4 is turned off, and the driving transistor M1 is turned on, the pixel driving circuit operates in the light-emitting stage.

[0112] As an example, in this embodiment, the on and off states of each transistor can be understood in combination with the Figure 6 control timing shown in the figure. The pixel driving circuit provided in this embodiment operates in the initialization stage, the threshold voltage correction stage, the data writing stage, and the light-emitting stage in sequence during the time periods T1 to T4, as follows:

[0113] During the time period T1, the pixel driving circuit operates in the initialization stage. The anti-shake transistor M5 is turned on, the reference voltage VREF is written to the source S of the driving transistor M1, the voltage sampling transistor M4 is turned on, the initialization voltage VOFS is written to the gate G of the driving transistor M1 through the data line, the light-emitting control transistor M2 is turned off, and the reset transistor M3 is turned on (at this time, the operating state of the pixel driving circuit shown in Figure 5 is as shown in Figure 11 ).

[0114] During the time period T2, the pixel driving circuit operates in the threshold voltage correction stage. Since |VOFS - VREF| > |Vth| and VREF > VAR, the driving transistor M1 and the reset transistor M3 form a discharge path. When the voltage at the S point of the driving transistor M1 gradually drops from VREF to VOFS - Vth, the driving transistor M1 is turned off. At this time, the potential difference across the first capacitor C1 is the threshold voltage Vth of the driving transistor M1 (at this time, the operating state of the pixel driving circuit shown in Figure 5 is as shown in Figure 12 ).

[0115] During the time period T3, the pixel driving circuit operates in the data writing stage. The voltage sampling transistor M4 is turned on, the data voltage VDATA is written to the gate G of the driving transistor M1, the light-emitting control transistor M2 is turned off, and the S point is floating. Due to the voltage division of the first capacitor C1 and the second capacitor C2, the voltage at the S point of the source of the driving transistor M1 at this time is Vs = VOFS - Vth + △V = VOFS - Vth + ((VREF - VDATA) - (VREF - VOFS)) * C2 / C1 + C2. Therefore, Vgs = Vth - (VOFS - VDATA) * C2 / C1 + C2 (at this time, the operating state of the pixel driving circuit shown in Figure 5 is as shown in Figure 13 ).

[0116] In the T4 period, the pixel driving circuit operates in the light-emitting stage. The anti-shake transistor M5, the voltage sampling transistor M4, and the reset transistor M3 are all turned off, and the light-emitting control transistor M2 is turned on. ELVDD_local is written to the source S of the driving transistor M1. Due to the bootstrap effect of the capacitor, the potential difference across the first capacitor C1 is maintained at Vgs = Vth - (VOFS - VDATA) * C2 / C1 + C2 (at this time, as Figure 5 shown, the operating state of the pixel driving circuit is as Figure 14 shown).

[0117] Combined with the calculation formula of the current when the light-emitting diode LED emits light, it can be known that the driving current of the light-emitting diode LED is related to Vgs - Vth, and Vgs - Vth = (VOFS - VDATA) * C2 / C1 + C2. Therefore, the light-emitting brightness of the light-emitting diode LED has nothing to do with the threshold voltage Vth of the driving transistor M1 and the second power supply voltage ELVDD_local that may have voltage jitter.

[0118] As an example, in this embodiment, the on and off states of each transistor can also be understood in combination with the control timing as Figure 10 shown. The pixel driving circuit provided in this embodiment operates in the initialization stage, the threshold voltage correction stage, the data writing stage, and the light-emitting stage in sequence from T1 to T4, as follows:

[0119] In the T1 period, the pixel driving circuit operates in the initialization stage. The anti-shake transistor M5 is turned on, the reference voltage VREF is written to the source S of the driving transistor M1, the voltage sampling transistor M4 is turned on, the initialization voltage VOFS is written to the gate G of the driving transistor M1 via the initialization transistor M6, the light-emitting control transistor M2 is turned off, and the reset transistor M3 is turned on (at this time, as Figure 9 shown, the operating state of the pixel driving circuit is as Figure 15 shown).

[0120] In the T2 period, the pixel driving circuit operates in the threshold voltage correction stage. Since |VOFS - VREF| > |Vth| and VREF > VAR, the driving transistor M1 and the reset transistor M3 form a discharge path. When the voltage at the S point of the driving transistor M1 gradually drops from VREF to VOFS - Vth, the driving transistor M1 is turned off. At this time, the potential difference across the first capacitor C1 is the threshold voltage Vth of the driving transistor M1 (at this time, as Figure 9 shown, the operating state of the pixel driving circuit is as Figure 16 shown).

[0121] During the T3 period, the pixel driving circuit operates in the data writing stage. The voltage sampling transistor M4 is turned on, and the data voltage VDATA is written into the gate G of the driving transistor M1. The light-emitting control transistor M2 is turned off, and the S point is floating. Due to the voltage division of the first capacitor C1 and the second capacitor C2, the voltage at the source S point of the driving transistor M1 at this time is Vs = VOFS - Vth + ΔV = VOFS - Vth + ((VREF - VDATA) - (VREF - VOFS)) * C2 / (C1 + C2). Therefore, Vgs = Vth - (VOFS - VDATA) * C2 / (C1 + C2) (at this time, as Figure 9 shown, the operating state of the pixel driving circuit is as Figure 17 shown).

[0122] During the T4 period, the pixel driving circuit operates in the light-emitting stage. The anti-shake transistor M5, the voltage sampling transistor M4, and the reset transistor M3 are all turned off. The light-emitting control transistor M2 is turned on, and ELVDD_local is written into the source S of the driving transistor M1. Due to the bootstrap effect of the capacitor, the potential difference across the first capacitor C1 is maintained at Vgs = Vth - (VOFS - VDATA) * C2 / (C1 + C2) (at this time, as Figure 9 shown, the operating state of the pixel driving circuit is as Figure 18 shown).

[0123] Combined with the calculation formula of the current when the light-emitting diode LED emits light, it can be known that the driving current of the light-emitting diode LED is related to Vgs - Vth, and Vgs - Vth = (VOFS - VDATA) * C2 / (C1 + C2). Therefore, the light-emitting brightness of the light-emitting diode LED has nothing to do with the threshold voltage Vth of the driving transistor M1 and the second power supply voltage ELVDD_local that may have voltage jitter.

[0124] In addition, in some feasible embodiments, it is also possible to Figure 6 and Figure 10 adjust the reset control signal AZ[n] in the T1 period from low level to high level (as Figure 19 and Figure 20 shown), thereby delaying the conduction time of the reset transistor M3, so that the reset transistor M3 is turned off in the initialization stage (at this time, as Figure 5 shown, the operating state of the pixel driving circuit in the T1 period is as Figure 21 shown, as Figure 9 shown, the operating state of the pixel driving circuit in the T1 period is as Figure 22 shown), to avoid current flowing from the source S of the driving transistor M1 into the second terminal of the reset transistor M3 when writing the initialization voltage VOFS into the gate G of the driving transistor M1.

[0125] In addition, an embodiment of the present application further provides a display panel, which includes the pixel driving circuit provided in the above embodiment.

[0126] As an example, the display panel in this embodiment may be an AMOLED display panel, a micro OLED display panel, or a micro LED display panel. Of course, it may also be other types of display panels, such as a TN (Twisted Nematic) display panel, an IPS (In-Plane Switching) display panel, a VA (Vertical Alignment) display panel, an MVA (Multi-Domain Vertical Alignment) display panel, etc. This embodiment does not impose any restrictions in this regard.

[0127] For the specific structure of the pixel driving circuit in this embodiment, refer to the above embodiment. Since the display panel provided in this embodiment adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, and will not be elaborated one by one here.

[0128] In addition, an embodiment of the present application further provides a display device, which includes the display panel provided in the above embodiment.

[0129] As an example, the display panel provided in the above embodiment can be applied to a display device, which can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc.

[0130] The display device proposed in this embodiment and the display panel proposed in the above embodiment belong to the same technical concept. Since the display panel proposed in the above embodiment adopts all the technical solutions proposed in the related embodiments of the pixel driving circuit, this embodiment has at least all the beneficial effects brought by the technical solutions of the above embodiments, and will not be elaborated one by one here.

[0131] It should be noted that although the logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order from that in the flowchart. Terms such as "first" and "second" in the specification, claims, and drawings are used to distinguish similar objects and do not necessarily need to describe a specific order or sequence.

[0132] It should also be understood that the references to "one embodiment" or "some embodiments" in the description of the embodiments of the present application mean that specific features, structures, or characteristics described in connection with that embodiment are included in one or more embodiments of the present application. Thus, the statements "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized. The terms "comprising", "including", "having" and their variants all mean "including but not limited to", unless otherwise specifically emphasized.

[0133] It should be noted that the technical solutions of the various embodiments of the present application can be combined with each other, but it must be based on the fact that those skilled in the art can implement them. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present application.

[0134] The above are only optional embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application under the application concept of the present application, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of the present application.

Claims

1. A pixel driving circuit, characterized in that: The pixel driving circuit comprises: A light emitting diode, wherein a cathode of the light emitting diode is connected to a first power supply voltage; A driving transistor, wherein a first terminal of the driving transistor is electrically connected to an anode of the light emitting diode; a light emitting control transistor, wherein a first end of the light emitting control transistor is electrically connected to a second end of the driving transistor, a controlled end of the light emitting control transistor is connected to a light emitting control signal, and a second end of the light emitting control transistor is connected to a second power supply voltage, wherein the second power supply voltage is greater than the first power supply voltage; a reset transistor, wherein a first terminal of the reset transistor is electrically connected to an anode of the light-emitting diode, a controlled terminal of the reset transistor is connected to a reset control signal, a second terminal of the reset transistor is connected to a reset voltage, and the reset voltage is less than the second power supply voltage; A voltage sampling transistor, wherein a first end of the voltage sampling transistor is electrically connected to a controlled end of the driving transistor, the controlled end of the voltage sampling transistor is connected to a voltage sampling control signal, and a second end of the voltage sampling transistor is connected to a data signal line; a first capacitor, wherein a first end of the first capacitor is electrically connected to a controlled end of the driving transistor, and a second end of the first capacitor is electrically connected to a second end of the driving transistor; A voltage anti-shake module, wherein a first end of the voltage anti-shake module is electrically connected to a second end of the driving transistor, a second end of the voltage anti-shake module is connected to a reference voltage, and the voltage anti-shake module is used to write the reference voltage into the second end of the driving transistor during an initialization phase; A second capacitor, wherein a first end of the second capacitor is electrically connected to a second end of the first capacitor, and a second end of the second capacitor is electrically connected to a second end of the voltage anti-shake module.

2. The pixel driving circuit according to claim 1, characterized in that: The reference voltage is not equal to the second power supply voltage, the reference voltage is not less than the reset voltage, and the difference between the reference voltage and the first power supply voltage is not greater than the threshold voltage of the light emitting diode.

3. The pixel driving circuit according to claim 1, wherein: The voltage anti-shake module includes: An anti-shake transistor, wherein the first end of the anti-shake transistor is electrically connected to the second end of the driving transistor, the controlled end of the anti-shake transistor is connected to the anti-shake control signal, the second end of the anti-shake transistor is connected to the reference voltage, and the anti-shake transistor is turned on in the initialization phase under the control of the anti-shake control signal to write the reference voltage into the second end of the driving transistor.

4. The pixel driving circuit according to claim 1, wherein: The data signal line is used to provide an initialization voltage and a data voltage; The pixel driving circuit operates in the initialization phase, the threshold voltage correction phase, the data writing phase and the light emitting phase in sequence under the control of the light emitting control signal, the reset control signal and the voltage sampling control signal.

5. The pixel driving circuit according to claim 1, wherein: The pixel driving circuit further includes: An initialization module, wherein a first end of the initialization module is electrically connected to the controlled end of the driving transistor, a second end of the initialization module is connected to an initialization voltage, and the initialization module is used to write the initialization voltage into the controlled end of the driving transistor during the initialization phase.

6. The pixel driving circuit according to claim 5, characterized in that: The initialization module includes: An initialization transistor, wherein the first end of the initialization transistor is electrically connected to the controlled end of the driving transistor, the controlled end of the initialization transistor is connected to an initialization control signal, the second end of the initialization transistor is connected to the initialization voltage, and the initialization transistor is used to be turned on during the initialization phase under the control of the initialization control signal to write the initialization voltage into the controlled end of the driving transistor.

7. The pixel driving circuit according to claim 6, characterized in that: The data signal line is used to provide a data voltage; The pixel driving circuit operates in the initialization phase, the threshold voltage correction phase, the data writing phase and the light emitting phase in sequence under the control of the light emitting control signal, the reset control signal and the voltage sampling control signal.

8. The pixel driving circuit according to claim 4 or 7, characterized in that: When the light emitting control transistor is turned off, the reset transistor is turned on or off, the voltage sampling transistor is turned on, and the driving transistor is turned on based on the reference voltage and the initialization voltage, the pixel driving circuit operates in the initialization stage; When the light emitting control transistor is turned off, the reset transistor is turned on, the voltage sampling transistor is turned off, and the driving transistor changes from being turned on to being turned off, the pixel driving circuit operates in the threshold voltage correction stage; When the light emitting control transistor is turned off, the reset transistor is turned on, the voltage sampling transistor is turned on, and the data voltage is written into the controlled end of the driving transistor, the pixel driving circuit operates in the data writing stage; When the light emitting control transistor is turned on, the reset transistor is turned off, the voltage sampling transistor is turned off, and the driving transistor is turned on, the pixel driving circuit operates in the light emitting stage.

9. A display panel, characterized in that: The display panel comprises the pixel driving circuit according to any one of claims 1 to 8.

10. A display device, characterized in that: The display device comprises the display panel according to claim 9.

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