Display driving chip and brightness compensation data storage method of display driving chip

Abstract

The invention relates to the technical field of display, in particular to a display driving chip and a brightness compensation data storage method of the display driving chip, and the display driving chip comprises a compensation MRAM (Magnetic Random Access Memory) and a frame buffer MRAM; the compensation MRAM comprises an MTJ (Magnetic Tunnel Junction) unit in a non-breakdown state and an MTJ unit in a breakdown state; the compensation MRAM represents a numerical value in a binary system through the MTJ unit in the non-breakdown state and the MTJ unit in the breakdown state, and is used for storing brightness compensation data; and the frame cache MRAM is used for caching frame data. The MRAM with a small bit area is adopted to replace a traditional SRAM, the hardware area needed for storing brightness compensation data and frame data is reduced, meanwhile, the brightness compensation data are directly stored in the MRAM in the mode of breaking down the MTJ unit, on the basis that good data retention capacity and data reading speed are guaranteed, an external flash memory is abandoned, and the cost is reduced. The storage density is improved, and the flexibility of the internal layout of the equipment is greatly improved.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and particularly to a display driving chip and a method for storing brightness compensation data of a display driving chip. Background Art

[0002] A display driving chip (Display Driver IC, abbreviated as "DDIC") is one of the main control components of a display panel and is also known as the "brain" of the panel. Its main function is to send driving signals and data to the display panel in the form of electrical signals, and through the control of the screen brightness and color, image information such as letters and pictures can be presented on the screen.

[0003] The RAM embedded in the DDIC has two functions. One is for brightness compensation data caching, and the other is for frame data caching. Specifically, in the process of the manufacturing process of high-resolution liquid crystal TV panels and OLED panels, brightness non-uniformity defects will occur due to process fluctuations. In order to compensate for the brightness non-uniformity phenomenon, after the screen assembly is completed, the brightness of pixel points can be corrected by means of brightness compensation. For pixels with relatively high display brightness, a certain compensation value is subtracted from the original gray level, and for pixels with relatively low display brightness, a certain compensation value is added to the original gray level, so that the brightness of each pixel is close to the same after gray level compensation, and the improvement of the brightness non-uniformity phenomenon is realized. This brightness compensation data will be stored in external storage (that is, the RAM mentioned above). After the screen leaves the factory, this data will basically not change anymore. When the screen is powered on, the display data is compensated in real time through the pre-stored brightness compensation data. The SRAM in the DDIC is also used for frame data caching. After the DDIC receives the external display image frame data, it is first stored in the SRAM, and then merged and processed with the brightness compensation data mentioned above and then output to the screen line by line for display. Currently, the DDIC usually uses a combination of SRAM (Static random-access memory) and external flash memory to store brightness compensation data. Since the SRAM will lose the internally stored data when powered off, the brightness compensation data is stored in the external flash memory when powered off, and then the external flash memory loads the brightness compensation data into the SRAM after power on to achieve the storage of brightness compensation data and the storage of frame data.

[0004] However, with the increase in the panel resolution, the SRAM capacity required for brightness compensation data and frame data will also continuously increase, resulting in an increasing occupation of the SRAM space. In some current DDICs, the area already occupies one-third or even more, and the external flash memory will also occupy a large amount of space, increasing the difficulty of the internal layout design of the device and posing new challenges to subsequent chip design.

[0005] Therefore, how to reduce the space occupation of the hardware part required for storing brightness compensation data and frame data and improve the storage density is an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0006] The object of the present invention is to provide a display driving chip and a method for storing brightness compensation data of the display driving chip to solve the problems in the prior art that the hardware required for storing brightness compensation data and frame data is too large, the storage density is low, and the difficulty of internal layout design of the device is high.

[0007] To solve the above technical problems, the present invention provides a display driving chip, including a compensation MRAM and a frame buffer MRAM;

[0008] The compensation MRAM includes non-broken state MTJ cells and broken state MTJ cells;

[0009] The compensation MRAM represents numerical values in binary through the non-broken state MTJ cells and the broken state MTJ cells, and is used to store brightness compensation data;

[0010] The frame buffer MRAM is used to cache frame data.

[0011] Optionally, in the display driving chip, the critical dimensions of the compensation MRAM and the frame buffer MRAM are the same.

[0012] Optionally, in the display driving chip, the substrate of the MTJ cells in the compensation MRAM is a substrate that has been roughened.

[0013] Optionally, in the display driving chip, all the non-broken state MTJ cells in the compensation MRAM are MTJ cells with the same magnetization direction.

[0014] Optionally, in the display driving chip, all the non-broken state MTJ cells in the compensation MRAM are MTJ cells in the anti-parallel direction.

[0015] Optionally, in the display driving chip, the read reference circuit in the frame buffer MRAM is a differential read reference circuit.

[0016] Optionally, in the display driving chip, the OTP read reference circuit of the compensation MRAM includes a sense amplifier, a first read reference selection switch, a second read reference selection switch, a working read reference resistor, and a breakdown read reference resistor;

[0017] The data terminal of the sense amplifier is connected to the corresponding MTJ cell, and the reference terminal of the sense amplifier is respectively connected to the first read reference selection switch and the second read reference selection switch;

[0018] The first read reference selection switch is connected in series with the working read reference resistor, and the second read reference selection switch is connected in series with the breakdown read reference resistor.

[0019] Optionally, in the display driver chip, the breakdown read reference resistor and the working read reference resistor are adjustable resistors.

[0020] A method for storing brightness compensation data of a display driver chip, comprising:

[0021] Receiving brightness compensation data;

[0022] Sending the brightness compensation data to the compensation MRAM of the display driver chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of the MTJ unit;

[0023] Breaking down the MTJ unit with the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data.

[0024] Optionally, in the method for storing brightness compensation data of the display driver chip, the breaking down of the MTJ unit with the target magnetization direction in the compensation MRAM includes:

[0025] Breaking down the MTJ unit in the anti-parallel direction in the compensation MRAM.

[0026] A display driver chip provided by the present invention includes a compensation MRAM and a frame buffer MRAM; the compensation MRAM includes an unbroken MTJ unit and a broken MTJ unit; the compensation MRAM represents numerical values in binary through the unbroken MTJ unit and the broken MTJ unit, and is used to store brightness compensation data; the frame buffer MRAM is used to cache frame data. By using an MRAM with a smaller bit area to replace the traditional SRAM, the present invention reduces the hardware area required for storing brightness compensation data and frame data. At the same time, by adopting the method of breaking down the MTJ unit to directly store the brightness compensation data in the MRAM, on the basis of ensuring good data retention ability, data reading speed, a large read window and read current, the external flash memory is discarded, that is, the space occupancy of the storage device is further improved, the storage density is increased, the flexibility of the internal layout of the device is greatly increased, and the layout design difficulty is reduced. The present invention also provides a method for storing brightness compensation data of a display driver chip having the above beneficial effects. Description of the Drawings

[0027] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0028] Figure 1 Schematic diagram of the structure of a specific embodiment of the display driving chip provided by the present invention;

[0029] Figure 2(a) is a schematic diagram of the structure of an MTJ unit grown on a flat surface in a specific embodiment of the display driving chip provided by the present invention;

[0030] Figure 2(b) is a schematic diagram of the structure of an MTJ unit grown on a rough surface in a specific embodiment of the display driving chip provided by the present invention;

[0031] Figure 3 Schematic diagram of the resistance distribution of the MTJ unit in each state;

[0032] Figure 4 Schematic diagram of the structure of the differential reading reference circuit in a specific embodiment of the display driving chip provided by the present invention;

[0033] Figure 5 Schematic diagram of the structure of the OTP reading reference circuit in a specific embodiment of the display driving chip provided by the present invention;

[0034] Figure 6 Schematic diagram of the structure of the local circuit in a specific embodiment of the display driving chip provided by the present invention;

[0035] Figure 7 Schematic diagram of the flow of a specific embodiment of the method for storing brightness compensation data of the display driving chip provided by the present invention;

[0036] Figure 8 Schematic diagram of the flow of a specific embodiment of the device for storing brightness compensation data of the display driving chip provided by the present invention.

[0037] In the figure, it includes 100 - compensation MRAM, 200 - frame buffer MRAM, 110 - non - breakdown MTJ cell, 120 - breakdown MTJ cell, 20 - barrier layer, 41 - differential sense amplifier, 42 - data bit MTJ cell, 43 - data N - MOS transistor, 44 - reference terminal MTJ cell, 45 - reference N - MOS transistor, 51 - sense amplifier, 52 - first read reference selection switch, 53 - working read reference resistor, 54 - second read reference selection switch, 55 - breakdown read reference resistor, 61 - first switch, 62 - second switch, 001 - receiving module, 002 - transmitting module, 003 - breakdown module. Detailed implementation manners

[0038] To enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0039] The core of the present invention is to provide a display driving chip, and the structural schematic diagram of a specific implementation manner is as Figure 1 shown, which is called specific implementation manner one, including compensation MRAM 100 and frame buffer MRAM 200;

[0040] The compensation MRAM 100 includes a non - breakdown MTJ cell 110 and a breakdown MTJ cell 120;

[0041] The compensation MRAM 100 represents the numerical value in binary through the non - breakdown MTJ cell 110 and the breakdown MTJ cell 120, and is used to store brightness compensation data;

[0042] The frame buffer MRAM 200 is used to cache frame data.

[0043] In the present invention, two kinds of MRAM (Magnetoresistive Random Access Memory) are used as new storage carriers to replace the traditional SRAM. Although the storage carrier of data has changed, the process of processing data has not changed. Still, first, the received image frame data is combined with the brightness compensation data in the compensation MRAM 100, then stored in the frame buffer MRAM 200, and finally output for display.

[0044] As a preferred implementation manner, the critical dimensions of the compensation MRAM 100 and the frame buffer MRAM 200 are the same.

[0045] In this preferred embodiment, the critical dimensions corresponding to the compensation MRAM 100 and the frame buffer MRAM 200 are set to the same value. Different critical dimensions require different mask plate sizes during the production process, and the subsequent process treatment optimizations are also inconsistent. Therefore, this preferred embodiment can greatly simplify the process, shorten the production time, and improve the production efficiency.

[0046] It should be noted that the smaller the critical dimension, the worse the data retention ability. However, after the dimension decreases, the requirement for the drive current of the MOS transistor acting as a switch is also smaller, that is, the MOS transistor can also be made smaller, so that the overall bit size can be reduced, and the array density, that is, the storage density, can be further improved. Therefore, in order to reduce the hardware space occupation of the storage part, the smallest possible critical dimension should be selected. In the compensation MRAM 100 and the frame buffer MRAM 200, the compensation MRAM 100 has a higher requirement for data retention ability. Therefore, in order to ensure the normal operation of the device, the critical dimensions of the compensation MRAM 100 and the frame buffer MRAM 200 should both be selected as the smallest critical dimension that the compensation MRAM 100 can meet the data retention duration.

[0047] Of course, the critical dimensions corresponding to the compensation MRAM 100 and the frame buffer MRAM 200 can also be different. At this time, as described above, the frame buffer MRAM 200 has a lower requirement for data retention ability. Therefore, the critical dimension of the frame buffer MRAM 200 can be further decreased, thereby further improving the data storage density and facilitating the miniaturization of the device.

[0048] In addition, the substrate of the MTJ unit in the compensation MRAM 100 is a substrate that has been roughened.

[0049] In other words, in this specific embodiment, the substrate of the MTJ unit in the compensation MRAM 100 is specially treated first to increase the roughness of the substrate, so that each layer of the MTJ grown on the substrate subsequently is not a flat epitaxial layer, but has a certain undulation. Specifically, reference can be made to FIG. 2(b). FIG. 2(b) is an MTJ unit grown on a rough surface, and FIG. 2(a) is an MTJ unit grown on a flat substrate that has not been roughened. By comparison, it can be seen that there are positions where the barrier layer 20 (generally magnesium oxide) of the MTJ unit grown on the rough substrate has a relatively thinner thickness (refer to the double-headed arrows in FIGS. 2(a) and 2(b)), which is more likely to be broken down, can reduce the breakdown voltage, save costs, and improve safety at the same time.

[0050] In a preferred embodiment, all the non - broken - down state MTJ cells 110 in the compensation MRAM 100 are MTJ cells with the same magnetization direction. In this preferred embodiment, defining the non - broken - down state MTJ cells 110 to have the same magnetization direction greatly reduces the complexity of signal processing and improves the signal processing efficiency.

[0051] Furthermore, all the non - broken - down state MTJ cells 110 in the compensation MRAM 100 are MTJ cells in the antiparallel direction.

[0052] Reference can be made to Figure 3 , Figure 3 which is a schematic diagram of the resistance distribution and reference selection of different states of MTJ cells. Among them, R_AP is the resistance distribution of MTJ cells in the antiparallel direction; R_P is the resistance distribution of MTJ cells in the parallel direction; R_BD is the resistance distribution of MTJ cells in the breakdown state; Rref_normal is the reference resistance value for distinguishing the parallel - direction state and the antiparallel - direction state in the normal working mode before breakdown; Rref_BD is the reference resistance schematic diagram for distinguishing the breakdown state and the normal working state after breakdown. The value of R_BD is usually only a few hundred Ω and the distribution is relatively convergent. The window between R_BD and R_AP is larger than the window between R_BD and R_P. Therefore, by selecting the MTJ cells in the antiparallel direction and the MTJ cells in the breakdown state as the carriers of the two values for storing binary data, the reliability of reading data can be increased. At the same time, the breakdown - state current I_BD is relatively large, and the sense amplifier 51 of the read circuit can detect it more quickly, so the read speed will also be improved to a certain extent.

[0053] Still further, the read reference circuit in the frame buffer MRAM 200 is a differential - mode read reference circuit.

[0054] Please refer to Figure 4 , Figure 4It is a schematic diagram of a differential-mode read reference circuit, which includes a differential sense amplifier 41 (abbreviated as SA), a data-bit MTJ cell 42, and a data N-MOS transistor 43 (N-type field-effect transistor) connecting the data-bit MTJ cell 42; a reference-terminal MTJ cell 44, and a reference N-MOS transistor 45 connecting the reference-terminal MTJ cell 44. It can be seen that the gate terminals of the N-MOS transistors of the data bit and the reference terminal are connected to the same line WL and are turned on synchronously. While writing the data bit, the reference terminal also writes the opposite data value. The differential sense amplifier 41 compares the magnitudes of the currents at the data terminal and the reference terminal to determine the value of the data bit. In this case, the resistance difference between the AP state and the P state is larger than the resistance difference between the reference terminal and the P / AP state of other types of read reference circuits, and the read window is also larger, enabling a sufficiently fast read speed to ensure both writing and reading are fast enough to adapt to large panels with high refresh rates, and at the same time, the read reliability can also be increased.

[0055] As a specific implementation, the OTP read reference circuit of the compensation MRAM100 includes a sense amplifier 51, a first read reference selection switch 52, a second read reference selection switch 54, a working read reference resistor 53, and a breakdown read reference resistor 55;

[0056] The data terminal of the sense amplifier 51 is connected to the corresponding MTJ cell, and the reference terminal of the sense amplifier 51 is respectively connected to the first read reference selection switch 52 and the second read reference selection switch 54;

[0057] The first read reference selection switch 52 is connected in series with the working read reference resistor 53, and the second read reference selection switch 54 is connected in series with the breakdown read reference resistor 55.

[0058] This specific implementation provides a way to implement the OTP read reference circuit of the compensation MRAM100, and the corresponding structural schematic diagram is as Figure 5 shown, and the equivalent load of the MYJ cell corresponding to the OTP read reference circuit is at Figure 5It is represented by C_MTJ in China. First, the brightness compensation data is input, and then the input of the brightness compensation data is realized by the way of breaking down a type of MTJ cell. The OTP (one-time programmable, full name "one time programmable") area is the part of the MRAM that stores the brightness compensation data. Two read reference switches are connected in series with two different resistors, which is equivalent to setting two read reference modes for selection. Among them, the mode corresponding to the first read reference selection switch 52 is used when normally storing the brightness compensation process data before breakdown. At this time, the first read reference selection switch 52 is turned on, and the second read reference selection switch 54 is turned off; the mode corresponding to the second read reference selection switch 54 is used when it is applied after breakdown, that is, after the panel leaves the factory. At this time, the second read reference selection switch 54 is turned on, and the first read reference selection switch 52 is turned off. The OTP read reference circuit structure given in this specific embodiment is simple, greatly reducing the space occupied by the steps of burning the brightness compensation data, and further improving the storage density of the data. Note Figure 5 It does not represent a complete circuit diagram, and only key modules are placed to express the inventive concept.

[0059] In the actual data burning process, the specific data storage process is as follows:

[0060] ① Open the first read reference selection switch 52 and close the second read reference selection switch 54 through configuration, and select the working read reference resistor 53 at the reference end;

[0061] ② The frame data MRAM array reads the compensation data during the brightness compensation process in the normal working mode;

[0062] ③ After the debugged brightness compensation data is confirmed to meet the picture quality, the breakdown operation of the MTJ in the compensation MRAM100 is performed; the previously read data is broken down, and the MTJ in the Rap state, that is, the MTJ with data 1, is broken down, and the MTJ with data 0 is not broken down;

[0063] ④ After the breakdown is completed, open the second read reference selection switch 54 and close the first read reference selection switch 52 through configuration, and select the breakdown read reference resistor 55 at the reference end, and write the configuration to death without further change.

[0064] Figure 6Schematic diagram of write and breakdown paths for some MTJs in MRAM100, including a first switch 61 for controlling the normal write mode and a second switch 62 for MTJ breakdown in a VCC direct connection manner; the current path WR_AP2P is the path for the normal write mode AP2P, i.e., writing 0; the current path WR_P2AP is the path for the normal write mode P2AP, i.e., writing 1; the current path WR_Breakdown is the path for MTJ breakdown in a VCC direct connection manner. During the debugging process before burning the brightness compensation data, the first switch 61 is turned on and the second switch 62 is turned off to enter the normal write mode, and the operations of writing 0 and writing 1 are performed respectively according to the two paths of WR_AP2P and WR_P2AP. After the debugging is completed, the brightness compensation data needs to be burned in, that is, the MTJ breakdown operation is performed. At this time, the second switch 62 is turned on and the first switch 61 is turned off to perform the VCC direct connection power supply mode, and the bits that need to be written 1 are broken down according to the WR_Breakdown path. This method can increase the voltage division on the MTJ and is easier to break down. Note Figure 6 It does not represent a complete circuit diagram, only key modules are placed to express the implementation idea

[0065] Furthermore, the breakdown read reference resistor 55 and the working read reference resistor 53 are adjustable resistors. With the process fluctuations during the production process, the optimal resistance of each wafer will shift, resulting in a very small or even no current window at the end. Using adjustable resistors can greatly increase the window and ensure the working stability of the device. Of course, the optimal resistance value can also be calculated and fixed resistors can be used. The present invention does not make any limitations in this regard.

[0066] A display driving chip provided by the present invention includes a compensation MRAM100 and a frame buffer MRAM200; the compensation MRAM100 includes an unbroken MTJ unit 110 and a broken MTJ unit 120; the compensation MRAM100 represents numerical values in binary through the unbroken MTJ unit 110 and the broken MTJ unit 120, and is used to store brightness compensation data; the frame buffer MRAM200 is used to cache frame data. By using MRAM with a smaller bit area instead of traditional SRAM, the present invention reduces the hardware area required for storing brightness compensation data and frame data. At the same time, by adopting the method of breaking down the MTJ unit, the brightness compensation data is directly stored in the MRAM. On the basis of ensuring good data retention ability, data reading speed, a large read window and read current, the external flash memory is discarded, that is, the space occupation of the storage device is further improved, the storage density is increased, the flexibility of the internal layout of the device is greatly increased, and the layout design difficulty is reduced.

[0067] The present invention also provides a method for storing brightness compensation data of a display driving chip. The schematic diagram of the flow of a specific implementation manner is as follows Figure 7As shown in the figure, which is called the second specific implementation manner and includes:

[0068] S101: Receive brightness compensation data.

[0069] S102: Send the brightness compensation data to the compensation MRAM of the display driver chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of the MTJ unit.

[0070] S103: Break down the MTJ unit with the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data.

[0071] The method for storing brightness compensation data of the display driver chip provided by the present invention corresponds to the display driver chip in the previous text. The technical features of the method for storing brightness compensation data of the display driver chip in the present invention can be referred to the previous text and will not be elaborated here one by one.

[0072] As a preferred implementation manner, breaking down the MTJ unit with the target magnetization direction in the compensation MRAM includes:

[0073] Break down the MTJ unit in the anti-parallel direction in the compensation MRAM.

[0074] As described above, the MTJ unit in the anti-parallel direction has the largest resistance difference from the broken-down MTJ unit, which can expand the electrical signal window and improve the signal recognition efficiency.

[0075] The method for storing brightness compensation data of a display driver chip provided by the present invention receives brightness compensation data; sends the brightness compensation data to the compensation MRAM of the display driver chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of the MTJ unit; breaks down the MTJ unit with the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data. By using MRAM with a smaller bit area instead of traditional SRAM, the present invention reduces the hardware area required for storing brightness compensation data and frame data. At the same time, by breaking down the MTJ unit, the brightness compensation data is directly stored in the MRAM. On the basis of ensuring good data retention ability, data reading speed, a large read window and read current, the external flash memory is abandoned, that is, the space occupation of the storage device is further improved, the storage density is increased, the flexibility of the internal layout of the device is greatly increased, and the layout design difficulty is reduced.

[0076] Next, the device for storing brightness compensation data of the display driver chip provided by the embodiments of the present invention will be introduced. The device for storing brightness compensation data of the display driver chip described below can be mutually corresponding and referred to with the method for storing brightness compensation data of the display driver chip described above.

[0077] Figure 8 This is a structural block diagram of a brightness compensation data storage device for a display driving chip provided by an embodiment of the present invention. Refer to Figure 8 The brightness compensation data storage device of the display driving chip may include:

[0078] A receiving module 001, configured to receive brightness compensation data;

[0079] A transmitting module 002, configured to send the brightness compensation data to the compensation MRAM of the display driving chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of MTJ cells;

[0080] A breakdown module 003, configured to break down the MTJ cells in the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data.

[0081] As a preferred embodiment, the breakdown module 003 includes:

[0082] An antiparallel breakdown unit, configured to break down the MTJ cells in the antiparallel direction in the compensation MRAM.

[0083] A brightness compensation data storage device for a display driving chip provided by the present invention includes a receiving module 001, configured to receive brightness compensation data; a transmitting module 002, configured to send the brightness compensation data to the compensation MRAM of the display driving chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of MTJ cells; a breakdown module 003, configured to break down the MTJ cells in the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data. By using an MRAM with a smaller bit area instead of a traditional SRAM, the present invention reduces the hardware area required for storing brightness compensation data and frame data. At the same time, by adopting the method of breaking down MTJ cells to directly store brightness compensation data in the MRAM, on the basis of ensuring good data retention ability, data reading speed, a larger read window and read current, the external flash memory is discarded, that is, the space occupation of the storage device is further improved, the storage density is increased, the flexibility of the internal layout of the device is greatly increased, and the layout design difficulty is reduced.

[0084] The brightness compensation data storage device of the display driver chip in this embodiment is used to implement the aforementioned brightness compensation data storage method of the display driver chip. Therefore, the specific implementation in the brightness compensation data storage device of the display driver chip can be seen in the embodiment part of the brightness compensation data storage method of the display driver chip in the previous text. For example, the receiving module 001, the sending module 002, and the breakdown module 003 are respectively used to implement steps S101, S102, and S103 in the above-mentioned brightness compensation data storage method of the display driver chip. Therefore, the specific implementation can refer to the descriptions of the corresponding individual embodiments and will not be elaborated here.

[0085] The present invention also provides a brightness compensation data storage device for a display driver chip, including:

[0086] A memory for storing a computer program;

[0087] A processor for implementing the steps of any of the above data access methods when executing the computer program. The brightness compensation data storage method provided by the present invention receives brightness compensation data; sends the brightness compensation data to the compensation MRAM of the display driver chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of the MTJ unit; breaks down the MTJ unit with the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data. By using MRAM with a smaller bit area instead of traditional SRAM, the present invention reduces the hardware area required for storing brightness compensation data and frame data. At the same time, by adopting the method of breaking down the MTJ unit to directly store the brightness compensation data in the MRAM, on the basis of ensuring good data retention ability, data reading speed, a large read window and read current, the external flash memory is discarded, that is, the space occupation of the storage device is further improved, the storage density is increased, the flexibility of the internal layout of the device is greatly increased, and the layout design difficulty is reduced.

[0088] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the data access method described in any one of the above are implemented. The brightness compensation data storage method for a display driver chip provided by the present invention includes receiving brightness compensation data; sending the brightness compensation data to the compensation MRAM of the display driver chip, so that the compensation MRAM records the brightness compensation data through two magnetization directions of the MTJ unit; breaking down the MTJ unit with the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data. By using MRAM with a smaller bit area to replace the traditional SRAM, the present invention reduces the hardware area required for storing brightness compensation data, improves the storage density. At the same time, by using the method of breaking down the MTJ unit to store the brightness compensation data, the data retention ability of the display driver chip in environments such as high temperature and magnetic field is greatly improved. At the same time, the read window and read current are increased, that is, the working reliability and data reading speed of the display driver chip are improved.

[0089] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the method part.

[0090] It should be noted that in this specification, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0091] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0092] The steps of the methods or algorithms described in combination with the embodiments disclosed herein can be directly implemented by hardware, software modules executed by a processor, or a combination of both. The software modules can be placed in a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium well-known in the technical field.

[0093] The above has introduced in detail the display driving chip and the method for storing brightness compensation data of the display driving chip provided by the present invention. Specific examples are used herein to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A display driving chip, characterized in that, Including a compensation MRAM and a frame buffer MRAM; The compensation MRAM includes unbroken MTJ cells and broken MTJ cells; The compensation MRAM represents numerical values in binary through the unbroken MTJ cells and the broken MTJ cells, and is used to store brightness compensation data; The frame buffer MRAM is used to cache frame data.

2. The display driving chip according to claim 1, characterized in that The critical dimensions of the compensation MRAM and the frame buffer MRAM are the same.

3. The display driving chip according to claim 1, wherein The substrate of the MTJ cells in the compensation MRAM is a substrate that has been roughened.

4. The display driving chip according to claim 1, characterized in that, All the unbroken MTJ cells in the compensation MRAM are MTJ cells with the same magnetization direction.

5. The display driving chip according to claim 4, wherein All the unbroken MTJ cells in the compensation MRAM are MTJ cells in the antiparallel direction.

6. The display driving chip according to claim 1, wherein The read reference circuit in the frame buffer MRAM is a differential read reference circuit.

7. The display driving chip according to claim 1, wherein The OTP read reference circuit of the compensation MRAM includes a sense amplifier, a first read reference selection switch, a second read reference selection switch, a working read reference resistor, and a breakdown read reference resistor; The data terminal of the sense amplifier is connected to the corresponding MTJ cell, and the reference terminals of the sense amplifier are respectively connected to the first read reference selection switch and the second read reference selection switch; The first read reference selection switch is connected in series with the working read reference resistor, and the second read reference selection switch is connected in series with the breakdown read reference resistor.

8. The display driving chip according to claim 7, wherein The breakdown read reference resistor and the working read reference resistor are adjustable resistors.

9. A method for storing brightness compensation data of a display driving chip, characterized in that, Including: Receiving brightness compensation data; Sending the brightness compensation data to the compensation MRAM of the display driver chip, so that the compensation MRAM records the brightness compensation data through the two magnetization directions of the MTJ cells; Breaking down the MTJ cells with the target magnetization direction in the compensation MRAM to complete the storage of the brightness compensation data.

10. The method for storing brightness compensation data of the display driving chip according to claim 9, wherein, The breaking down the MTJ cells with the target magnetization direction in the compensation MRAM includes: Breaking down the MTJ cells in the antiparallel direction in the compensation MRAM.

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