Redundancy conversion device and redundancy switching method

By designing a redundant conversion device, using the switching module and the FPGA module to realize the time-sharing multiplexing of redundant channels, the problem of redundant design in the prior art is solved, and the reliability of the current frequency conversion device is improved.

CN120200596APending Publication Date: 2025-06-24AEROSPACE SCI & IND INERTIA TECH CO LTD
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Patent Information

Application Number
CN202311774385.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-21
Publication Date
2025-06-24

AI Technical Summary

Technical Problem

The existing current frequency conversion circuit cannot be redundantly designed, resulting in the inability to realize time-sharing multiplexing of redundant channels in the event of channel failure, affecting the reliability of the system.

Method used

A redundant conversion device is designed, including multiple switching modules, multiple channels and FPGA modules, and time-sharing multiplexing of redundant channels is realized through the switching module, and data processing and warming are performed through the FPGA module.

Benefits of technology

Under the premise of almost no cost, mutual backup of channels is achieved, the reliability of the conversion device is improved, and information loss or system-level exceptions are avoided due to channel failure.

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Abstract

The invention provides a redundancy conversion device and a redundancy switching method, the redundancy conversion device comprises a plurality of switching modules, a plurality of channels and an FPGA module, the number of the switching modules is the same as that of the channels, the switching modules and the channels are in one-to-one correspondence, the switching modules are used for connecting an input source to the channels corresponding to the switching modules and realizing time division multiplexing of redundant channels when a fault channel exists, and the FPGA module is used for connecting the input source to the channels corresponding to the switching modules. The redundant channel is a channel determined according to a predetermined rule; the channel is used for collecting a current signal output by an input source and outputting a digital signal to the FPGA module; and the FPGA module is used for controlling the switching module and the channel, processing the digital signal output by the channel, performing temperature compensation and normalization on the processed data according to a preset formula, and outputting a result to the digital output module. The invention provides a redundancy conversion device and a redundancy switching method. The redundancy conversion device and the redundancy switching method are used for solving the problem that redundancy design cannot be carried out on a conversion circuit.
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Description

Technical Field

[0001] The present invention relates to the technical field of current frequency conversion, and particularly to a redundant conversion device and a redundant switching method. Background Art

[0002] Current frequency conversion circuits have been widely used in the field of inertial navigation. High requirements are put forward for the accuracy of the conversion circuits. Therefore, conversion circuits with digital output are more and more widely used. Currently, the design of the conversion circuit is mainly determined according to the user's usage requirements and scenarios to determine the range and number of channels of the conversion circuit. Limited by the volume and cost of the conversion circuit, redundant design cannot be carried out. Summary of the Invention

[0003] The present invention provides a redundant conversion device and a redundant switching method to solve the problem that redundant design cannot be carried out for the conversion circuit.

[0004] On the one hand, the present invention provides a redundant conversion device, including a plurality of switching modules, a plurality of channels and an FPGA module. The number of the switching modules is the same as that of the channels and they correspond one by one. Among them:

[0005] The switching module is used to connect the input source to the channel corresponding to the switching module, and realize time-sharing multiplexing of redundant channels when there is a faulty channel. The redundant channel is a channel determined according to a predetermined rule;

[0006] The channel is used to collect the current signal output by the input source and output a digital signal to the FPGA module;

[0007] The FPGA module is used to control the switching module and the channel, process the digital signal output by the channel, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module.

[0008] Optionally, the switching module is used to connect the input source to the channel corresponding to the switching module, including:

[0009] When the number of the input sources is less than or equal to the number of the channels, the switching module only needs to connect one of the input sources to the channel corresponding to the switching module;

[0010] When the number of the input sources is greater than the number of the channels, at least one of the switching modules needs to connect multiple input sources to the channel corresponding to the switching module through switching time-sharing. The number of input sources that each channel can connect through time-sharing at most is determined by the FPGA module.

[0011] Optionally, the realization of time-sharing multiplexing of redundant channels when there is a faulty channel includes:

[0012] When there is a faulty channel, the switching module corresponding to the redundant channel switches and connects the redundant channel to the input source corresponding to the faulty channel and the input source corresponding to the redundant channel in a time-sharing manner to collect data, thereby realizing time-sharing multiplexing of the redundant channel.

[0013] Optionally, the redundant channel is a channel determined according to a predetermined rule and includes:

[0014] The plurality of channels include a 1st channel to an Nth channel;

[0015] The redundant channel of the first channel is the Nth channel;

[0016] The redundant channel of any channel except the first channel is the first channel.

[0017] Optionally, the channel is used to collect the current signal output by the input source and output the digital signal to the FPGA module, including:

[0018] The channel includes an integration module, a constant current source module, a switch module and an AD sampling module;

[0019] The integration module is used to convert the current signal output by the input source into an analog voltage signal and output the analog voltage signal to the AD sampling module;

[0020] The AD sampling module is used to sample the analog voltage signal output by the integration module and output a digital signal to the FPGA module;

[0021] The constant current source module is used to provide a constant current to the integration module;

[0022] The switch module is used to control whether to turn on the constant current source module.

[0023] Optionally, the FPGA module is used to control the switching module and the channel, process the digital signal output by the channel, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module, including:

[0024] The FPGA module includes a signal control module, a data processing and temperature compensation module and a switching control module;

[0025] The signal control module is used to control the switch module;

[0026] The switching control module is used to control the switching module;

[0027] The data processing and temperature compensation module is used to process the digital signal output by the AD sampling module, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module.

[0028] Optionally, the predetermined formula is

[0029]

[0030] where: K out is the FPGA output scale factor, a0…a n are the temperature modeling compensation coefficients, n is the order of the temperature modeling formula, T is the current temperature, F is the full-scale output value of the scale factor, D is the effective range of the constant current source module, K is the original scale factor at the current temperature, the original scale factor at the current temperature is the processed data, and the temperature modeling compensation coefficients and the original scale factor at the current temperature are determined according to the channel to which they belong.

[0031] On the other hand, the present invention provides a redundancy switching method, which is applied to any of the above devices and includes:

[0032] Judging whether the channel is faulty according to the output of the channel;

[0033] If the channel is normal, continue to judge whether the channel is faulty according to the next output of the channel;

[0034] If the channel is faulty, judge whether the redundant channel is ready for switching;

[0035] If the redundant channel is not ready for switching, wait for the redundant channel to be ready for switching;

[0036] If the redundant channel is ready for switching, switch the redundant channel to collect the data of the input source corresponding to the faulty channel. After the redundant channel is ready for switching again, switch the redundant channel to collect the data of the input source corresponding to the redundant channel, and continue to judge whether the redundant channel is ready.

[0037] Optionally, the judging whether the channel is faulty according to the output of the channel includes:

[0038] Judging whether the output of the channel is continuously 0 or full-scale output;

[0039] If so, the channel is faulty;

[0040] If not, the channel is normal.

[0041] Optionally, the judging whether the redundant channel is ready for switching includes:

[0042] Judging whether the data output by the redundant channel has been latched;

[0043] If the latching has been completed, the redundant channel is ready for switching;

[0044] If the latching is not completed, the redundant channel is not ready for switching.

[0045] Compared with the prior art, the present invention has the following beneficial effects:

[0046] The current frequency conversion device of the present invention adopts a time-division multiplexing strategy, and a switching module is added on the basis of temperature compensation and normalization of the output data of each channel through a unified formula, so that the channels can be used as backups for each other with almost no increase in cost, improving the reliability of the conversion device and avoiding information loss or system-level anomalies caused by channel failures. Description of the Drawings

[0047] Figure 1 It is a schematic diagram of a redundant conversion device provided in Embodiment 1 of the present invention;

[0048] Figure 2 It is a schematic diagram of a redundant switching method provided in Embodiment 2 of the present invention. Detailed Embodiments

[0049] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0050] In the embodiments of the present invention, the term "and / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0051] The application scenarios described in the embodiments of the present invention are for more clearly illustrating the technical solutions of the embodiments of the present invention, and do not constitute a limitation on the technical solutions provided by the embodiments of the present invention. Those of ordinary skill in the art know that with the emergence of new application scenarios, the technical solutions provided by the embodiments of the present invention are equally applicable to similar technical problems. Among them, in the description of the present invention, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0052] Embodiment 1:

[0053] This embodiment provides a redundant conversion device, including a plurality of switching modules, a plurality of channels and an FPGA module. The number of switching modules and channels is the same and they correspond one by one. The number of channels of the conversion device usually depends on the actual usage scenario. In this embodiment, the number of both the switching modules and the channels is 2. For example,Figure 1 As shown, the first switching module corresponds to the first channel, and the second switching module corresponds to the second channel. In this embodiment, there are two input sources, including the first input source and the second input source. The first switching module connects the first input source to the first channel, and the second switching module connects the second input source to the second channel. In other embodiments, the number of input sources can be more or less than the number of channels. When the number of input sources is more than the number of channels, at least one switching module needs to connect multiple input sources to the corresponding channel of the switching module through time-sharing switching. The maximum number of input sources that can be connected to each channel through time-sharing is determined by the FPGA module. When the number of input sources is less than the number of channels, the switching module only needs to connect one input source to the corresponding channel of the switching module. The input source can be an accelerometer or other device that outputs a current signal.

[0054] When there are N channels, the rules for determining redundant channels are as follows:

[0055] The redundant channel of the first channel is the Nth channel;

[0056] The redundant channel of any channel except the first channel is the first channel.

[0057] Therefore, since the redundant channel of the first channel is the second channel, when the first channel fails, the second channel not only needs to collect the data of the second input source, but also needs to collect the data of the first input source. The second switching module connects the second channel to the first input source and the second input source through time-sharing switching to collect data, realizing the time-sharing multiplexing of the second channel; since the redundant channel of the second channel is the first channel, when the second channel fails, the first channel not only needs to collect the data of the first input source, but also needs to collect the data of the second input source. The first switching module connects the first channel to the first input source and the second input source through time-sharing switching to collect data, realizing the time-sharing multiplexing of the first channel.

[0058] The first channel and the second channel are respectively used to collect the current signals output by the first input source and the second input source and output digital signals to the FPGA module. The internal structures of the first channel and the second channel are the same, and both include an integration module, a constant current source module, a switching module, and an AD sampling module, where:

[0059] The integration module of the first channel is used to convert the current signal output by the first input source into an analog voltage signal and output the analog voltage signal to the AD sampling module. The integration module of the second channel is used to convert the current signal output by the second input source into an analog voltage signal and output the analog voltage signal to the AD sampling module;

[0060] The AD sampling module is used to sample the analog voltage signal output by the integration module and output a digital signal to the FPGA module;

[0061] The constant current source module is used to provide a constant current to the integration module;

[0062] The switch module is used to control whether the constant current source module is turned on.

[0063] The FPGA module is used to control the switching module and channels, process the digital signals output by the channels, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module. The FPGA module includes a signal control module, a data processing and temperature compensation module, and a switching control module, where:

[0064] The signal control module is used to control the switch module;

[0065] The switching control module is used to control the switching module;

[0066] The data processing and temperature compensation module is used to process the digital signals output by the AD sampling module, for example, encode the digital signals output by the AD sampling module, then perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module. The digital output module is used to implement the output of digital signals. The above-mentioned predetermined formula is:

[0067]

[0068] In the formula: K out is the FPGA output scale factor, and the FPGA output scale factor is the result output to the digital output module as mentioned above. a0…a n are the temperature modeling compensation coefficients, n is the order of the temperature modeling formula, T is the current temperature, F is the full-scale output value of the scale factor, D is the effective range of the constant current source module, K is the original scale factor at the current temperature, and the original scale factor at the current temperature is the processed data as mentioned above. The scale factor is the frequency quantity corresponding to the unit current input. The temperature modeling compensation coefficients and the original scale factor at the current temperature are determined according to the channels they belong to, and the temperature modeling compensation coefficients and the original scale factor at the current temperature of different channels are different. Through the processing of the above formula, the scale factor consistency of each channel of the conversion device can be ensured. On this basis, the time-division multiplexing of channels can be further realized through switching.

[0069] Embodiment 2:

[0070] This embodiment provides a redundant switching method, which can be applied to the redundant conversion device in Embodiment 1. As Figure 2 shown, in this embodiment, taking the judgment of whether the first channel is faulty as an example, the method for judging whether the second channel is faulty is the same as the method for judging whether the first channel is faulty, and includes:

[0071] Judge whether the first channel is faulty according to the output of the first channel, that is, judge whether the output of the first channel is continuously 0 or full-scale output. If so, the first channel is faulty; if not, the first channel is normal.

[0072] If the first channel is normal, continue to judge whether the first channel is faulty according to the next output of the first channel.

[0073] If the first channel is faulty, judge whether the redundant channel (i.e., the second channel) is ready for switching. Since the digital output of the conversion device is in sequential output mode, that is, the hexadecimal numbers are transmitted in order from high to low. For example, the hexadecimal of E is 1110, and 1, 1, 1, 0 are transmitted in order from high to low. After the data is latched by the FPGA module, the data processing and transmission time can be used to let the second channel collect the data of the first input source. Therefore, judging whether the second channel is ready for switching is to judge whether the data output by the second channel has been latched. After the latching is completed, a corresponding flag signal will be generated. If the latching is completed, the second channel is ready for switching; if the latching is not completed, the second channel is not ready for switching.

[0074] If the second channel is not ready for switching, wait for the second channel to be ready for switching.

[0075] If the second channel is ready for switching, switch the second channel to collect the data of the first input source. Wait for the second channel to be ready for switching again, then switch the second channel to collect the data of the second input source, and continue to judge whether the second channel is ready.

[0076] The data of the first input source and the second input source are collected by time-division multiplexing the second channel through the above method.

[0077] This embodiment can be applied to other multi-channel conversion devices as needed, such as 3-channel conversion devices or 4-channel conversion devices; it can also be applied to the situation where the number of input sources is more than the number of channels, and by default, at least one channel directly operates in the time-division multiplexing mode; it can also be applied to single-channel conversion devices, and by default, this single channel also directly operates in the time-division multiplexing mode.

[0078] Obviously, those skilled in the art can make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application also intends to include these changes and modifications.

Claims

1. A redundant conversion device, characterized in that, It includes multiple switching modules, multiple channels, and an FPGA module. The number of the switching modules is the same as that of the channels and they are in one-to-one correspondence, where: The switching module is used to connect the input source to the channel corresponding to the switching module, and when there is a faulty channel, it realizes time-division multiplexing of redundant channels, and the redundant channels are channels determined according to a predetermined rule; The channel is used to collect the current signal output by the input source and output a digital signal to the FPGA module; The FPGA module is used to control the switching module and the channel, process the digital signal output by the channel, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module.

2. The device according to claim 1, characterized in that, The switching module is used to connect the input source to the channel corresponding to the switching module, which includes: When the number of the input sources is less than or equal to the number of the channels, the switching module only needs to connect one of the input sources to the channel corresponding to the switching module; When the number of the input sources is greater than the number of the channels, at least one of the switching modules needs to connect multiple input sources to the channel corresponding to the switching module through switching time-division, and the number of input sources that each channel can connect through time-division at most is determined by the FPGA module.

3. The device according to claim 1, characterized in that, The realization of time-division multiplexing of redundant channels when there is a faulty channel includes: When there is a faulty channel, the switching module corresponding to the redundant channel connects the redundant channel to the input source corresponding to the faulty channel and the input source corresponding to the redundant channel through switching to collect data, realizing time-division multiplexing of the redundant channel.

4. The device according to claim 1, wherein The redundant channels are channels determined according to a predetermined rule, which includes: The multiple channels include the first channel to the Nth channel; The redundant channel of the first channel is the Nth channel; The redundant channel of any channel except the first channel is the first channel.

5. The device according to claim 1, characterized in that, The channel is used to collect the current signal output by the input source and output a digital signal to the FPGA module, which includes: The channel includes an integration module, a constant current source module, a switch module, and an AD sampling module; The integration module is used to convert the current signal output by the input source into an analog voltage signal and output the analog voltage signal to the AD sampling module; The AD sampling module is used to sample the analog voltage signal output by the integration module and output a digital signal to the FPGA module; The constant current source module is used to provide a constant current for the integration module; The switch module is used to control whether to connect the constant current source module.

6. The device according to claim 5, characterized in that The FPGA module is used to control the switching module and the channel, process the digital signal output by the channel, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the result to the digital output module, which includes: The FPGA module includes a signal control module, a data processing and temperature compensation module, and a switching control module; The signal control module is used to control the switch module; The switching control module is used to control the switching module; The data processing and temperature compensation module is used to process the digital signals output by the AD sampling module, perform temperature compensation and normalization on the processed data according to a predetermined formula, and output the results to the digital output module.

7. The device according to claim 1, characterized in that, The predetermined formula is Where: K out is the FPGA output scale factor, a0…a n are the temperature modeling compensation coefficients, n is the order of the temperature modeling formula, T is the current temperature, F is the full-scale output value of the scale factor, D is the effective range of the constant current source module, K is the original scale factor at the current temperature, the original scale factor at the current temperature is the processed data, and the temperature modeling compensation coefficients and the original scale factor at the current temperature are determined according to the channel to which they belong.

8. A redundancy switching method, applied to the device according to any one of claims 1-7, characterized in that, including: judging whether the channel is faulty according to the output of the channel; if the channel is normal, continue to judge whether the channel is faulty according to the next output of the channel; if the channel is faulty, judge whether the redundant channel is ready for switching; if the redundant channel is not ready for switching, wait for the redundant channel to be ready for switching; if the redundant channel is ready for switching, switch the redundant channel to collect the data of the input source corresponding to the faulty channel. Wait until the redundant channel is ready for switching again, then switch the redundant channel to collect the data of the input source corresponding to the redundant channel, and continue to judge whether the redundant channel is ready.

9. The method according to claim 8, wherein The judging whether the channel is faulty according to the output of the channel includes: judging whether the output of the channel is continuously 0 or full-scale output; if so, the channel is faulty; if not, the channel is normal.

10. The method according to claim 8, wherein The judging whether the redundant channel is ready for switching includes: judging whether the data output by the redundant channel has been latched; if the latching has been completed, the redundant channel is ready for switching; if the latching has not been completed, the redundant channel is not ready for switching.