Image sensor forming method and image sensor

Abstract

The invention provides an image sensor forming method, which comprises the following steps of: forming a photodiode in a semiconductor substrate, and forming a floating diffusion region at the upper part of the photodiode; an annular vertical transfer transistor is formed on the periphery of the floating diffusion region, and the space distance between any point of a channel region of the annular vertical transfer transistor and a gate dielectric layer of the annular vertical transfer transistor is smaller than a preset threshold value, so that silicon in the channel region of the floating diffusion region is completely exhausted, and the reading control capability is improved. According to the scheme, on one hand, the control capability of the vertical transfer transistor is improved, on the other hand, the number of photomask layers for ion implantation can be reduced on the basis of the design, and the production cost is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a method for forming an image sensor and an image sensor. Background Art

[0002] With the rapid development of image sensors and the increasingly wide application fields of image sensors, the performance requirements of image sensors are increasing day by day. The size of sensor pixels is getting smaller and smaller, and the full well capacitance density of sensor pixels is rapidly increasing, resulting in a huge pressure on charge readout. Among pixel structures, the design of transfer transistors is particularly important for pixel readout. For pixels fabricated at advanced nodes, a series of optimization designs are also carried out for transfer transistors. In particular, vertical transfer transistors can effectively improve the readout ability while reducing the isolation pressure on photodiodes, bringing great convenience to pixel design.

[0003] The bottom surface of the vertical transfer transistor protrudes towards the photodiode, thus expanding the gate oxide area of the transistor and enhancing the control ability of the transfer transistor over the transmission channel. At the same time, a deeper bottom surface of the transfer transistor can be paired with a deeper photodiode, significantly reducing the punch-through risk between the photodiode and other peripheral regions, and thus further improving the designed depletion voltage of the photodiode. However, in existing vertical transfer transistor schemes, since the vertical transfer transistor can only partially control the transmission channel from the vertical transfer transistor to the floating diffusion region, the gate control range of the vertical transfer transistor is limited. The farther the silicon substrate is from the channel surface, the weaker the gate's control over it. Therefore, there will be situations such as low electron readout efficiency and poor turn-off, so the control ability over the transmission channel is limited, which is not conducive to electron transmission.

[0004] As Figure 1 shown is a top view of a common existing design, Figure 2 and Figure 1 is a cross-sectional view along the A-A' direction in Figure 2 . Among them, 101 represents the dielectric layer region, 102a represents the vertical transfer transistor, 102b represents the vertical polysilicon gate, 103 represents the gate sidewall, 104 represents N-type implant 1, 105 represents N-type implant 2, 106 represents N-type implant 3, 107 represents the floating diffusion region, 108 represents the functional transistor, 109 represents the grounding region, 110 is P+-type doped silicon, 111 is P--type doped silicon, 112 represents doped polysilicon, 113 represents the P-type doped region, and 114 represents the photodiode region. It can be seen that the control range of the vertical transfer transistor over the silicon substrate is only at positions close to the transistor channel surface (as shown by the dashed box in Figure 2 ), so it is still necessary to form an electron transmission channel through multiple ion implants (such as the three N-type implants 104, 105, and 106 in Figure 1 , Figure 2 ).Figure 2 The path indicated by the arrow in the figure). Summary of the Invention

[0005] The object of the present invention is to provide a method for forming an image sensor, including: Forming a photodiode in a semiconductor substrate, and forming a floating diffusion region at an upper position of the photodiode; Forming an annular vertical transfer transistor around the floating diffusion region, and the spatial distance between any point in the channel region of the annular vertical transfer transistor and the gate dielectric layer of the annular vertical transfer transistor is less than a preset threshold, so that all the silicon in the channel region of the floating diffusion region is depleted, thereby improving the readout control ability.

[0006] Further, the floating diffusion region, the channel of the annular vertical transfer transistor, and the photosensitive region of the photodiode have the same doping type and are formed in the same process.

[0007] Further, the aspect ratio of the floating diffusion region is not less than 1.2:1.

[0008] Further, it also includes: through an etching process, keeping a preset height difference between the gate of the annular vertical transfer transistor and the floating diffusion region, so as to reduce the electric field strength between the floating diffusion region and the channel of the annular vertical transfer transistor.

[0009] Further, the inner side of the annular vertical transfer transistor serves as an anti-halo overflow channel.

[0010] Further, forming the photodiode in the semiconductor substrate includes: Etching the semiconductor substrate according to a first lithography pattern to form a first trench; Forming a first dielectric layer on the surface of the first trench; Filling a polysilicon material on the surface of the first dielectric layer to form a polysilicon layer, which serves as an isolation structure between the photodiodes.

[0011] Further, after forming the photodiode, it also includes: Etching the surface of the photodiode according to a second lithography pattern to form an annular second trench, and forming the floating diffusion region area above the photodiode; Filling a dielectric in the second trench to form a second dielectric layer; Etching the second dielectric layer and the semiconductor substrate to the range of the photodiode to form a third trench, and retaining a part of the second dielectric layer around the floating diffusion region; Filling a dielectric and a polysilicon material in the third trench to form the gate of the annular vertical transfer transistor.

[0012] Further, after forming the gate of the ring-shaped vertical transfer transistor, the following steps are also included: Performing ion implantation on the floating diffusion region, where the depth of the ion implantation is close to or deeper than the depth of the second trench and shallower than the depth of the third trench; Performing doping ion implantation with a doping type opposite to that of the photodiode at the bottom of the third trench to form a dark current blocking structure and a channel barrier structure; Applying a voltage to the gate of the ring-shaped vertical transfer transistor to turn on the semiconductor substrate surrounded by the ring-shaped vertical transfer transistor and form an electron transfer channel.

[0013] The present invention also provides an image sensor formed by using the image sensor forming method as described above.

[0014] Through the above solution, the present invention proposes a new method for forming an image sensor. On the one hand, it improves the control ability of the vertical transfer transistor. On the other hand, based on this design, the number of photomasks for ion implantation can be saved, reducing the production cost. In this solution, the vertical transfer transistor is designed in a ring shape, and the floating diffusion region is surrounded by the vertical transfer transistor. The vertical transfer transistor is equivalent to controlling the electron readout channel from the photodiode to the floating diffusion region from all around, improving the control ability of the vertical transfer transistor. Therefore, the readout efficiency of the vertical transfer transistor is improved. In addition, since the control ability of the vertical transfer transistor is enhanced, the vertical transfer transistor can be directly extended into the photodiode, so that there is no need for ion implantation connection between the bottom of the vertical transfer transistor and the photodiode through an additional photomask. Moreover, since the floating diffusion region is directly above the photodiode region, the channel doping of the vertical transfer transistor can be completed together with the doping of the photodiode. Therefore, no additional photomask is required, the number of photomasks for ion implantation can be reduced, and the production cost can be lowered. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Other features, objects, and advantages of the present invention will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0016] Figure 1 Is a top view of the vertical transfer transistor structure in the prior art solution; Figure 2 Is a cross-sectional view of the prior art solution according to Figure 1 The A-A' direction; Figure 3 Is a top view of the vertical transfer transistor structure in the solution of the present invention; Figure 4 Is a cross-sectional view of the solution of the present invention according to Figure 3 The B-B' direction; In the figures, throughout the different views, the same or similar reference numerals denote the same or similar devices (modules) or steps. Embodiment

[0017] An object of the present invention is to provide a method for forming an image sensor, including: Step S100: Form a photodiode 114 in a semiconductor substrate, and form a floating diffusion region 107 at an upper position of the photodiode 114; Step S200: Form an annular vertical transfer transistor 102a around the floating diffusion region 107, and a spatial distance between any point in the channel region of the annular vertical transfer transistor 102a and the gate dielectric layer of the annular vertical transfer transistor 102a is less than a preset threshold value, so that all the silicon in the channel region of the floating diffusion region 107 is depleted, thereby improving the readout control ability.

[0018] As Figure 3 shown is a top view of the designed structure in this solution, Figure 4 is a schematic cross-sectional structure view along the Figure 3 B-B' direction in. Wherein 108 represents a functional transistor, and 109 represents a grounding region, which is preferably formed by selecting a heavily doped P-type semiconductor material.

[0019] That is, preferably, the annular vertical transfer transistor 102a and the floating diffusion region 107 are in a relatively flat annular shape. For example, in an optional embodiment, the aspect ratio of the floating diffusion region 107 is not less than 1.2:1. Since the floating diffusion region 107 is in the middle of the pixel unit and is surrounded by the annular vertical transfer transistor 102a in this solution, the annular vertical transfer transistor 102a can control the electron readout channel together from all around, so that the control ability of the readout channel is enhanced and the electron transfer efficiency is improved.

[0020] In an optional embodiment, the floating diffusion region 107, the channel of the annular vertical transfer transistor 102a, and the photosensitive region of the photodiode 114 have the same doping type and are formed in the same process. In this embodiment, the bottom of the annular vertical transfer transistor 102a can directly extend to the photodiode 114 region, and no additional photomask is required for ion implantation between the annular vertical transfer transistor 102a and the photodiode 114 region. The floating diffusion region 107 is directly above the photodiode region 114, so that the channel doping of the annular vertical transfer transistor 102a can be completed together with the doping of the photodiode 114. Further, no additional photomask is required for the doping between the annular vertical transfer transistor 102a and the floating diffusion region 107, achieving the effect of reducing the number of photomask layers in the process and lowering the production cost.

[0021] In an alternative embodiment, it further includes: through an etching process, making the gate 102b of the ring-shaped vertical transfer transistor have a preset height difference from the floating diffusion region 107 to reduce the electric field strength between the floating diffusion region 107 and the channel of the ring-shaped vertical transfer transistor 102a.

[0022] Further, the inner side of the ring-shaped vertical transfer transistor 102a serves as an anti-halo overflow channel.

[0023] Specifically, in an alternative embodiment, forming the photodiode 114 in step S100 includes: Step S110: Etch the semiconductor substrate 200 according to the first lithography pattern to form a first trench 210 (not shown in the figure); Step S120: Form a first dielectric layer 211 (not shown in the figure) on the surface of the first trench 210; Step S130: Fill the surface of the first dielectric layer 211 with a polysilicon material to form a polysilicon layer 112 as an isolation structure between the photodiodes 114.

[0024] On this basis, after forming the photodiode 114 in step S100, the following steps can be further performed to form the gate 102b of the ring-shaped vertical transfer transistor 102a: Step S210: According to the second lithography pattern, etch the surface of the photodiode 114 to form a ring-shaped second trench 310 (not shown in the figure), and form the floating diffusion region area 107 above the photodiode 114; Step S220: Fill the second trench 310 with a dielectric to form a second dielectric layer 101; Step S230: Etch the second dielectric layer 101 and the semiconductor substrate 200 to the range of the photodiode 114 to form a third trench 320, and retain a part of the second dielectric layer 101 around the floating diffusion region 107; Step S240: Fill the third trench 320 with a dielectric and a polysilicon material to form the gate 102b of the ring-shaped vertical transfer transistor 102a.

[0025] Preferably, in an alternative embodiment, after forming the gate 102b of the ring-shaped vertical transfer transistor 102a, it further includes: Step S250: Perform ion implantation on the floating diffusion region 107, and the depth of the ion implantation is close to or deeper than the depth of the second trench 310 and shallower than the depth of the third trench 320 (such as Figure 4 the position of 106 in the figure); Step S260: Perform doping ion implantation of a doping type opposite to that of the photodiode 114 at the bottom of the third trench 320 (such as Figure 4 the position of 113 in ), to form a dark current blocking structure and a channel barrier structure;

[0026] In the existing design, the control range of the vertical transfer transistor over the silicon substrate is only at the position close to the surface of the transistor channel (such as Figure 2 shown by the dashed box in Figure 1 ), so multiple ion implantations (such as Figure 2 the three N-type implantations of 104, 105, and 106 in Figure 4 are required to form an electron transfer channel; in this solution, due to the design of the annular vertical transfer transistor 102a, surrounding the floating diffusion region 107 in a circle, it can control the transfer channel from the bottom of the vertical transfer transistor 102a to the floating diffusion region 107 from all around, and the control range can also cover the substrate area below the floating diffusion region 107 (such as Figure 4 shown by the dashed box in

[0027] ), so only one ion implantation 106 needs to be performed in the floating diffusion region 107, for example, one N-type ion implantation is performed, and the depth of this ion implantation is slightly less than the depth of the third trench 320. The vertical transfer transistor 102a makes the substrate surrounded by the vertical transfer transistor 102a conduct (on or off) by applying pressure, so as to form an electron transfer channel (such as Figure 4 the path indicated by the arrow in

[0027] ).

[0028] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and without departing from the spirit or basic characteristics of the present invention, the present invention can be implemented in other specific forms. Therefore, in any case, the embodiments should be regarded as exemplary and non-limiting. In addition, obviously, the word "including" does not exclude other elements and steps, and the term "one" does not exclude a plurality. Multiple elements stated in the device claims can also be implemented by one element. Words such as first and second are used to represent names and do not represent any specific order.

Claims

1. A method for forming an image sensor, characterized in that, Including: Forming a photodiode in a semiconductor substrate and forming a floating diffusion region at an upper position of the photodiode; Forming an annular vertical transfer transistor around the floating diffusion region, wherein a spatial distance between any point in the channel region of the annular vertical transfer transistor and the gate dielectric layer of the annular vertical transfer transistor is less than a preset threshold value, so that all silicon in the channel region of the floating diffusion region is depleted, thereby improving the readout control ability.

2. The method for forming an image sensor according to claim 1, wherein The floating diffusion region, the channel of the annular vertical transfer transistor, and the photosensitive region of the photodiode have the same doping type and are formed in the same process.

3. The method for forming an image sensor according to claim 1, wherein, The aspect ratio of the floating diffusion region is not less than 1.2:

1.

4. The method for forming an image sensor according to claim 1, wherein, Further including: By means of an etching process, keeping a preset height difference between the gate of the annular vertical transfer transistor and the floating diffusion region to reduce the electric field strength between the floating diffusion region and the channel of the annular vertical transfer transistor.

5. The method for forming an image sensor according to claim 1, wherein The inner side of the annular vertical transfer transistor serves as an anti-halo overflow channel.

6. The method for forming an image sensor according to claim 1, wherein The forming of the photodiode in the semiconductor substrate includes: Etching the semiconductor substrate according to a first lithography pattern to form a first trench; Forming a first dielectric layer on the surface of the first trench; Filling a polysilicon material on the surface of the first dielectric layer to form a polysilicon layer, which serves as an isolation structure between the photodiodes.

7. The method for forming an image sensor according to claim 1, wherein After forming the photodiode, further including: Etching the surface of the photodiode according to a second lithography pattern to form an annular second trench, and forming the floating diffusion region area above the photodiode; Filling a dielectric in the second trench to form a second dielectric layer; Etching the second dielectric layer and the semiconductor substrate to the range of the photodiode to form a third trench, and retaining a part of the second dielectric layer around the floating diffusion region; Filling a dielectric and a polysilicon material in the third trench to form the gate of the annular vertical transfer transistor.

8. The method for forming an image sensor according to claim 7, wherein, After forming the gate of the annular vertical transfer transistor, further including: Performing ion implantation on the floating diffusion region, wherein the depth of the ion implantation is close to or deeper than the depth of the second trench and shallower than the depth of the third trench; Performing doping ion implantation with a doping type opposite to that of the photodiode at the bottom of the third trench to form a dark current blocking structure and a channel barrier structure; Applying a voltage to the gate of the annular vertical transfer transistor to make the semiconductor substrate surrounded by the annular vertical transfer transistor conduct, thereby forming an electron transport channel.

9. An image sensor, characterized in that, Formed by using the image sensor forming method as described in claims 1 to 8.

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