Image sensor

Abstract

An image sensor is provided. The image sensor includes: a first substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; and a color filter disposed on the second surface of the first substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is provided on 36 photoelectric conversion elements among the plurality of photoelectric conversion elements. The 36 photoelectric conversion elements are arranged in six columns extending in a first direction and six rows extending in a second direction crossing the first direction. The floating diffusion regions of 12 of the 36 photoelectric conversion elements are connected to each other.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0188858, filed with the Korean Intellectual Property Office on December 21, 2023, and Korean Patent Application No. 10 - 2024 - 0038747, filed with the Korean Intellectual Property Office on March 20, 2024, the disclosures of which are hereby incorporated by reference in their entirety. Technical field

[0003] The present disclosure relates to an image sensor. Background art

[0004] An image sensor is a semiconductor device that converts an optical image into an electrical signal. Image sensors can be classified, for example, as charge - coupled device (CCD) type image sensors or complementary metal - oxide - semiconductor (CMOS) type image sensors (CIS) based on silicon semiconductors.

[0005] CMOS type image sensors have a simple driving method and can integrate a signal processing circuit on a single chip, enabling miniaturization and low power consumption, so they can be applied to products with limited battery capacity. With the progress of the electronics industry, various research efforts are being made to enhance the performance of CMOS image sensors. Summary of the invention

[0006] According to an aspect of an exemplary embodiment, an image sensor includes: a first substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; a color filter disposed on the second surface of the first substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is disposed on 36 of the plurality of photoelectric conversion elements. The 36 photoelectric conversion elements are arranged in six columns extending in a first direction and six rows extending in a second direction intersecting the first direction. The floating diffusion regions of 12 of the 36 photoelectric conversion elements are connected to each other.

[0007] According to another aspect of the exemplary embodiment, an image sensor includes: a substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; and a color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, a third color filter, and a fourth color filter, wherein the first color filter and the fourth color filter correspond to a common color. The first color region of the image sensor includes the first color filter, and the first color filter is disposed on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements. Each of the three groups provided with the first color filter includes 12 photoelectric conversion elements arranged in six columns extending in a first direction and two rows extending in a second direction. Among them, for each of the three groups provided with the first color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be commonly connected. The second color region of the image sensor includes the second color filter, and the second color filter is disposed on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements. Each of the three groups provided with the second color filter includes 12 photoelectric conversion elements arranged in six columns extending in a first direction and two rows extending in a second direction. Among them, for each of the three groups provided with the second color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be commonly connected. The third color region of the image sensor includes the third color filter, and the third color filter is disposed on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements. Each of the three groups provided with the third color filter includes 12 photoelectric conversion elements arranged in six columns extending in a first direction and two rows extending in a second direction. Among them, for each of the three groups provided with the third color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be commonly connected. The fourth color region of the image sensor includes the fourth color filter, and the fourth color filter is disposed on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements. Each of the three groups provided with the fourth color filter includes 12 photoelectric conversion elements arranged in six columns extending in a first direction and two rows extending in a second direction. Among them, for each of the three groups provided with the fourth color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be commonly connected.

[0008] According to another aspect of the exemplary embodiment, an image sensor includes: a substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; and a color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, and a third color filter. The first color filter is disposed on 36 photoelectric conversion elements among the plurality of photoelectric conversion elements. The 36 photoelectric conversion elements are arranged in six columns extending in a first direction and six rows extending in a second direction intersecting the first direction. The floating diffusion regions of nine of the 36 photoelectric conversion elements are connected to each other. Description of the Drawings

[0009] The above and other aspects and features will become more apparent from the following description of exemplary embodiments with reference to the accompanying drawings, in which:

[0010] Figure 1 is a block diagram of an image sensor according to an exemplary embodiment;

[0011] Figure 2 is a plan view showing an image sensor according to an exemplary embodiment;

[0012] Figure 3 is a cross-sectional view taken along line A-A' according to an exemplary embodiment; Figure 2 of;

[0013] Figure 4 is according to an exemplary embodiment of the Figure 3 is an enlarged view of the portion marked B in;

[0014] Figure 5 shows a plurality of photoelectric conversion elements and microlenses in an image sensor according to an exemplary embodiment;

[0015] Figure 6 shows the same area as that of Figure 5 for another exemplary embodiment;

[0016] Figure 7 shows the same area as that of Figure 5 for another exemplary embodiment;

[0017] Figure 8 shows the same area as that of Figure 5 for another exemplary embodiment;

[0018] Figure 9 shows the same area as that of Figure 5 for another exemplary embodiment;

[0019] Figure 10 shows the same area as that of Figure 5 for another exemplary embodiment;

[0020] Figure 11 is a cross-sectional view taken along line A-A' according to an exemplary embodiment; Figure 10 of;

[0021] Figure 12 is a cross-sectional view taken along line B-B' according to an exemplary embodiment; Figure 10 of;

[0022] Figure 13 shows the same area as that of Figure 10 for another exemplary embodiment;

[0023] Figure 14 is a cross-sectional view taken along line C-C' of Figure 13 ;

[0024] Figure 15 shows the same region as that for another exemplary embodiment related to Figure 10 ;

[0025] Figure 16 is a cross-sectional view taken along line D-D' of Figure 15 ;

[0026] Figure 17 is a circuit diagram of a pixel included in an image sensor according to an exemplary embodiment;

[0027] Figure 18 is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment;

[0028] Figure 19 is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment;

[0029] Figure 20 is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment;

[0030] Figure 21 shows the same region as that for another exemplary embodiment related to Figure 5 ;

[0031] Figure 22 is a plan view showing nine photoelectric conversion elements in an image sensor according to an exemplary embodiment;

[0032] Figure 23 is a cross-sectional view taken along line E-E' of Figure 22 according to an exemplary embodiment;

[0033] Figure 24 is a circuit diagram of a pixel included in an image sensor according to an exemplary embodiment;

[0034] Figure 25 is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment; and

[0035] Figure 26 is a cross-sectional view of an image sensor according to an exemplary embodiment. DETAILED DESCRIPTION

[0036] Example embodiments will be described more fully hereinafter with reference to the accompanying drawings. As those skilled in the art will recognize, the example embodiments described herein can be modified in various different ways, all of which do not depart from the spirit or scope of the present disclosure. Throughout the specification, like components are denoted by like reference numerals, and repetitive descriptions thereof are omitted. It will be understood that when an element or layer is referred to as being "on", "connected to", or "coupled to" another element or layer, the element or layer can be directly on, directly connected to, or directly coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element or layer is referred to as being "directly on", "directly connected to", or "directly coupled to" another element or layer, no intervening elements or layers are present. Each example embodiment provided in the following description does not exclude association with one or more features of another example or another example embodiment provided or not provided herein that is consistent with the present disclosure.

[0037] In the drawings, the thickness of layers, films, panels, regions, etc. are exaggerated for clarity. Throughout the specification, like reference numerals represent like elements. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element can be directly on the other element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, no intervening elements are present.

[0038] Hereinafter, a semiconductor device and an electronic system according to an example embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0039] Figure 1 is a block diagram of an image sensor according to an example embodiment.

[0040] Referring to Figure 1 , an image sensor 100 according to an example embodiment may include a controller (i.e., a control circuit) 110, a timing generator (i.e., a timing generation circuit) 120, a row driver (i.e., a row driving circuit) 130, a pixel array 140, a readout circuit 150, a ramp signal generator (i.e., a ramp signal generation circuit) 160, a data buffer 170, and an image signal processor 180. In an example embodiment, the image signal processor 180 may be disposed outside the image sensor 100.

[0041] The image sensor 100 can generate an image signal by converting light received from the outside into an electrical signal. The image signal IMS may be provided to the image signal processor 180.

[0042] The image sensor 100 may be mounted on an electronic device having a function of sensing an image or light. For example, the image sensor 100 may be mounted on an electronic device such as a camera, a smart phone, a wearable device, an Internet of Things (IoT) device, a household appliance, a personal computer, a personal digital assistant (PDA), a portable multimedia player (PMP), a navigation device, a drone, and an advanced driver assistance system (ADAS). Alternatively, the image sensor 100 may be mounted on an electronic device provided as a component in a vehicle, furniture, a manufacturing facility, a door, and various measuring devices.

[0043] The controller 110 may generally control each of the components 120, 130, 150, 160, and 170 included in the image sensor 100. The controller 110 may use a control signal to control the operation timing of each of the components 120, 130, 150, 160, and 170. In an exemplary embodiment, the controller 110 may receive a mode signal indicating an imaging mode from an application processor and may generally control the image sensor 100 based on the received mode signal. For example, the application processor may determine the imaging mode of the image sensor 100 according to various scenarios (such as the illuminance of the imaging environment, the user's resolution setting, and the sensed or learned state) and provide the determined result as a mode signal to the controller 110. The controller 110 may control the plurality of pixels of the pixel array 140 to output pixel signals according to the imaging mode. The pixel array 140 may output pixel signals of each of the plurality of pixels or pixel signals of some of the plurality of pixels, and the readout circuit 150 may sample and process the pixel signals received from the pixel array 140. The timing generator 120 may generate a signal serving as a reference for the operation timing of the components of the image sensor 100. The timing generator 120 may control the timing of the row driver 130, the readout circuit 150, and the ramp signal generator 160. The timing generator 120 may provide a control signal for controlling the timing of the row driver 130, the readout circuit 150, and the ramp signal generator 160.

[0044] The pixel array 140 may include a plurality of pixels PX, a plurality of row lines RL respectively connected to the plurality of pixels PX, and a plurality of column lines LL. In an exemplary embodiment, each pixel PX may include one or more photoelectric conversion elements. The photoelectric conversion element may detect incident light and convert the incident light into an electrical signal, i.e., a plurality of analog pixel signals, according to the amount of light. The photoelectric conversion element may be a photodiode, a pinned diode, etc. In addition, the photoelectric conversion element may be a single photon avalanche diode (SPAD) applied to a 3D sensor pixel. The level of the analog pixel signal output from the photoelectric conversion element may be proportional to the amount of charge output from the photoelectric conversion element. That is, the level of the analog pixel signal output from the photoelectric conversion element may be determined according to the amount of light received in the pixel array 140.

[0045] A plurality of row lines RL may extend in a first direction and may be connected to pixels PX arranged along the first direction. For example, a control signal output from the row driver 130 to the row line RL may be transmitted to the gates of transistors of a plurality of pixels PX connected to the row line RL. Column lines LL may extend in a second direction intersecting the first direction and may be connected to pixels PX arranged along the second direction. A plurality of pixel signals output from the plurality of pixels PX may be transmitted to the readout circuit 150 through the plurality of column lines LL.

[0046] A color filter layer and a microlens layer may be provided on the pixel array 140. The microlens layer may include a plurality of microlenses, and each of the plurality of microlenses may be provided on at least one corresponding pixel PX. The color filter layer may include color filters such as a red color filter, a green color filter, and a blue color filter, and may also include a white color filter. For one pixel PX, a color filter of one color may be provided between the pixel PX and the corresponding microlens. The specific structures of the color filter layer and the microlens layer will be described later in Figure 4 described.

[0047] The row driver 130 may generate a control signal for driving the pixel array 140 in response to a control signal from the timing generator 120, and provide the control signal to a plurality of pixels PX of the pixel array 140 through the plurality of row lines RL. In an exemplary embodiment, the row driver 130 may be controlled to detect light incident on the pixels PX in units of row lines. The row line unit may include at least one row line RL. For example, the row driver 130 may provide a transmission signal, a reset signal, a selection signal, etc. to the pixel array 140.

[0048] In response to a control signal from the timing generator 120, the readout circuit 150 may convert a pixel signal (or an electrical signal) from a pixel PX of the pixels PX selected from the plurality of pixels PX and connected to the row line RL into a pixel value representing the amount of light. The readout circuit 150 may convert the pixel signal output through the corresponding column line LL into a pixel value. For example, the readout circuit 150 may convert the pixel signal into a pixel value by comparing a ramp signal with the pixel signal. The pixel value may be image data having a plurality of bits. Specifically, the readout circuit 150 may include a selector, a plurality of comparators, a plurality of counter circuits, etc.

[0049] The ramp signal generator 160 may generate a reference signal and send the reference signal to the readout circuit 150.

[0050] The ramp signal generator 160 may include a current source, a resistor, and a capacitor. The ramp signal generator 160 can generate a plurality of ramp signals that decrease or increase in slope determined according to the magnitude of the current of the variable current source or the resistance value of the variable resistor by adjusting the magnitude of the current of the variable current source or the resistance value of the variable resistor to adjust the ramp voltage that is the voltage across the variable resistor.

[0051] The data buffer 170 can store the pixel values of a plurality of pixels PX connected to the selected column line LL transmitted from the readout circuit 150, and output the stored pixel values in response to an enable signal from the controller 110.

[0052] The image signal processor 180 can perform image signal processing on the image signals received from the data buffer 170. For example, the image signal processor 180 can receive a plurality of image signals from the data buffer 170, and synthesize the received image signals to generate a single image.

[0053] In an exemplary embodiment, a plurality of pixels can be grouped together in the form of M×N (M and N are integers greater than or equal to 2) to form a unit pixel group. The form of M×N can be a form in which M are arranged in the arrangement direction of the column line LL and N are arranged in the arrangement direction of the row line RL. For example, a unit pixel group can include a plurality of pixels arranged in the form of 2×6, and a unit pixel group can output one analog pixel signal. The following configuration is not limited to one pixel, but can also be applied to the unit pixel group.

[0054] Figure 2 is a plan view of an image sensor according to an exemplary embodiment of the present disclosure. Figure 3 is along Figure 2 a cross-sectional view taken along line A-A' of Figure 4 is Figure 3 an enlarged view of the portion marked B in

[0055] Referring to Figures 2 to 4 According to an exemplary embodiment, the image sensor may include a first chip 1000 and a third chip 3000. The first chip 1000 may include a photoelectric conversion layer 10, a first wiring area 20, and a light transmission layer 30. The photoelectric conversion layer 10 may include a first substrate 400, a pixel separation pattern 450, and a photoelectric conversion region 410 provided in the first substrate 400. Light incident from the outside can be converted into an electrical signal in the photoelectric conversion region 410.

[0056] Referring to Figure 2, the first substrate 400 may include a pixel array region AR, an optical black region OB, and a pad region PAD on a plane. The pixel array region AR may be disposed in a central region of the first substrate 400 on the plane. The pixel array region AR may include a plurality of pixels PX. The pixels PX may output photoelectric signals according to incident light. The pixels PX may be arranged in rows parallel to the first direction X and columns parallel to the second direction Y.

[0057] The pad region PAD may be disposed at an edge portion of the first substrate 400 and may surround the pixel array region AR. A plurality of pad terminals 83 may be disposed in the pad region PAD. The pad terminals 83 may supply the electrical signals generated in the pixels PX to the outside. Alternatively, an external electrical signal or voltage may be transmitted to the pixels PX through the pad terminals 83. Since the pad region PAD is disposed at the edge portion of the first substrate 400, the pad terminals 83 can be easily connected to the outside.

[0058] The optical black region OB may be disposed between the pixel array region AR and the pad region PAD of the first substrate 400. The optical black region OB may surround the pixel array region AR. The optical black region OB may include a plurality of dummy regions 411. The signals generated in the dummy regions 411 may be used as information for removing processing noise.

[0059] Referring to Figures 3 to 4 , the image sensor may include a photoelectric conversion layer 10, a gate electrode TG of a transfer transistor, a first wiring region 20, and a light transmission layer 30. The photoelectric conversion layer 10 may include a first substrate 400 and a pixel isolation pattern 450. One or more gate electrodes of a plurality of other transistors such as a conversion transistor, a source follower transistor, and a selection transistor may be disposed on the same layer as the gate electrode TG of the transfer transistor. However, this is an example, and according to the exemplary embodiment, one or more gate electrodes of the conversion transistor, the source follower transistor, and the selection transistor may be disposed on a substrate different from the gate electrode TG of the transfer transistor and may be electrically connected to each other. This will be described later with reference to Figure 26 described separately.

[0060] In Figure 3 , the pixel array region AR may include a plurality of pixels PX. The description of the pixel array region AR will be referred to later with reference to Figure 4 described, and hereinafter, the optical black region OB and the pad region PAD will be referred to with reference to Figure 3 described.

[0061] The first connection structure 50, the first pad terminal 81 and the block color filter 90 may be arranged on the first substrate 400 in the optical black area OB. The first connection structure 50 may include a first light blocking pattern 51, a first insulating pattern 53 and a first capping pattern 55. The first light blocking pattern 51 may be arranged on the second surface 400b of the first substrate 400. The first light blocking pattern 51 may cover the inner wall of the third trench TR3 and the fourth trench TR4. The first light blocking pattern 51 may penetrate the photoelectric conversion layer 10 and the first wiring area 20 to electrically connect the photoelectric conversion layer 10 and the first wiring area 20. More specifically, the first light blocking pattern 51 may contact the wiring in the first wiring area 20 and the pixel separation pattern 450 in the photoelectric conversion layer 10. Therefore, the first connection structure 50 may be electrically connected to the wiring in the first wiring area 20. The first light blocking pattern 51 may include a metal material, such as tungsten. The first light blocking pattern 51 may block light incident into the optical black area OB.

[0062] The first pad terminal 81 may be disposed in the third trench TR3 to fill the remaining portion of the third trench TR3. The first pad terminal 81 may include a metal material, such as aluminum. The first pad terminal 81 may be connected to the pixel separation pattern 450. Therefore, a negative voltage may be applied to the pixel separation pattern 450 through the first pad terminal 81.

[0063] The first insulating pattern 53 may be disposed on the first light blocking pattern 51 to fill the remaining portion of the fourth trench TR4 . The first insulating pattern 53 may penetrate the photoelectric conversion layer 10 and the first wiring region 20 . The first capping pattern 55 may be disposed on the first insulating pattern 53 .

[0064] The block color filter 90 may be disposed on the first pad terminal 81, the first light blocking pattern 51, and the first capping pattern 55. The block color filter 90 may cover the first pad terminal 81, the first light blocking pattern 51, and the first capping pattern 55. The first passivation layer 71 may be disposed on the block color filter 90 to cover the block color filter 90.

[0065] The photoelectric conversion region 410' and the dummy region 411 may be disposed in the optical black region OB of the first substrate 400. The photoelectric conversion region 410' may be doped with, for example, impurities of a second conductivity type different from the first conductivity type. The second conductivity type may be, for example, an n-type. The photoelectric conversion region 410' has a Figure 4 The structure is similar to the photoelectric conversion region 410 described above, but may not perform the operation of receiving light and generating an electrical signal. The dummy region 411 may be a region that is not doped with impurities. The signals generated in the photoelectric conversion region 410' and the dummy region 411 may be used as information for removing processing noise later.

[0066] In the pad region PAD, the second connection structure 60, the second pad terminal 83, and the second passivation layer 73 may be provided on the first substrate 400. The second connection structure 60 may include a second light-blocking pattern 61, a second insulating pattern 63, and a second capping pattern 65.

[0067] The second light-blocking pattern 61 may be provided on the second surface 400b of the first substrate 400. More specifically, the second light-blocking pattern 61 may cover the inner walls of the fifth trench TR5 and the sixth trench TR6. The second light-blocking pattern 61 may penetrate through parts of the photoelectric conversion layer 10, the first wiring region 20, and the second wiring region 40. More specifically, the second light-blocking pattern 61 may be in contact with wirings 231 and 232 in the second wiring region 40. The second light-blocking pattern 61 may include a metal material such as tungsten.

[0068] The second pad terminal 83 may be provided within the fifth trench TR5. The second pad terminal 83 may be provided on the second light-blocking pattern 61 to fill the remaining portion of the fifth trench TR5. The second pad terminal 83 may include a metal material such as aluminum. The second pad terminal 83 may serve as an electrical connection path between the image sensor element and the outside. The second insulating pattern 63 may fill the remaining portion of the sixth trench TR6. The second insulating pattern 63 may penetrate through the photoelectric conversion layer 10 and the first wiring region 20 completely or partially. The second capping pattern 65 may be provided on the second insulating pattern 63. The second passivation layer 73 may cover a part of the second light-blocking pattern 61 and the second capping pattern 65.

[0069] The current applied through the second pad terminal 83 may flow to the pixel isolation pattern 450 through the second light-blocking pattern 61, the wirings 231 and 232 in the second wiring region 40, and the first light-blocking pattern 51. The electrical signals generated from the photoelectric conversion regions 410 and 410' and the dummy region 411 may be transmitted to the outside through the wirings in the first wiring region 20, the wirings 231 and 232 in the second wiring region 40, the second light-blocking pattern 61, and the second pad terminal 83.

[0070] In Figure 3 a configuration is shown in which the first pad terminal 81 and the second pad terminal 83 are provided on the second surface 400b, but this is merely an example, and the first pad terminal 81 and the second pad terminal 83 may be provided on the opposite surface of the second surface 400b, that is, on the first surface 400a or in a region below the first surface 400b.

[0071] Hereinafter, reference will be made to Figure 4Describe the first chip 1000 of the pixel array region AR. The first chip 1000 includes a first substrate 400. The first substrate 400 may include a first surface 400a and a second surface 400b opposite to each other. Light may be incident on the second surface 400b of the first substrate 400. The first wiring region 20 may be disposed on the first surface 400a of the first substrate 400, and the light-transmissive layer 30 may be disposed on the second surface 400b of the first substrate 400. The first substrate 400 may be a semiconductor substrate or a silicon-on-insulator (SOI) substrate. For example, the semiconductor substrate may include, for example, a silicon substrate, a germanium substrate, or a silicon-germanium substrate. The first substrate 400 may include impurities of a first conductivity type. For example, the impurities of the first conductivity type may be p-type impurities such as aluminum (Al), boron (B), indium (In), or gallium (Ga).

[0072] Referring Figure 2 and Figure 4 , the first substrate 400 may include a plurality of photoelectric conversion elements PD defined by pixel isolation patterns 450. The plurality of photoelectric conversion elements PD may be arranged in a matrix form along a first direction X and a second direction Y intersecting each other. Hereinafter, as will be described in detail, a pixel circuit may be constructed by connecting the floating diffusion regions FD of the plurality of photoelectric conversion elements PD to each other. For example, the floating diffusion regions FD of 12 photoelectric conversion elements PD may be connected to each other, or the floating diffusion regions FD of nine photoelectric conversion elements PD may be connected to each other, and the specific connection will be described later.

[0073] The photoelectric conversion region 410 may generate and accumulate charges according to the amount of received light. The photoelectric conversion region 410 may constitute the photoelectric conversion element PD, and the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 are shown in Figure 4 .

[0074] The photoelectric conversion region 410 may be a region doped with impurities of a second conductivity type in the first substrate 400. The impurities of the second conductivity type may have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type may include n-type impurities such as phosphorus, arsenic, bismuth, or antimony. For example, each photoelectric conversion region 410 may include a first region adjacent to the first surface 400a and a second region adjacent to the second surface 400b. There may be a difference in impurity concentration between the first region and the second region of the photoelectric conversion region 410. Therefore, the photoelectric conversion region 410 may have an electric potential slope between the first surface 400a and the second surface 400b of the first substrate 400. As another example, the photoelectric conversion region 410 may not have an electric potential gradient between the first surface 400a and the second surface 400b of the first substrate 400.

[0075] The first substrate 400 and the photoelectric conversion region 410 can form a photodiode. That is, a photodiode can be constructed by a p-n junction between the first substrate 400 of the first conductivity type and the photoelectric conversion region 410 of the second conductivity type. The photoelectric conversion region 410 that forms the photodiode can generate and accumulate photo charges proportional to the intensity of incident light.

[0076] Referring Figure 3 and Figure 4 , the pixel isolation pattern 450 can be provided in the first substrate 400. When viewed in a plan view, the pixel isolation pattern 450 can have a grid structure in the plan view. As Figure 2 shown, the pixel isolation pattern 450 can be provided in a grid shape in the region between the pixels PX. That is, the pixel isolation pattern 450 can surround each pixel PX. However, the shape of the pixel isolation pattern 450 is an example, but the exemplary embodiments are not limited thereto. Various planar shapes of the pixel isolation pattern 450 will be described in detail later with reference to Figure 10 , Figure 13 , Figure 15 and Figure 22 .

[0077] Referring Figure 3 and Figure 4 , the pixel isolation pattern 450 can be provided in the first trench TR1 and the second trench TR2. Referring Figure 4 , the first trench TR1 and the second trench TR2 can be recessed from the first surface 400a of the first substrate 400. The first trench TR1 can penetrate the first substrate 400, and the second trench TR2 can not penetrate the first substrate 400. That is, the depth of the first trench TR1 can be deeper than the depth of the second trench TR2.

[0078] The pixel isolation pattern 450 can extend from the first surface 400a of the first substrate 400 toward the second surface 400b. The pixel isolation pattern 450 can be a deep trench isolation (DTI) layer. The pixel isolation pattern 450 can penetrate the first substrate 400. The vertical height of the pixel isolation pattern 450 can be substantially the same as the vertical thickness of the first substrate 400. However, this is only an example, and the vertical height of the pixel isolation pattern 450 can be different from the vertical thickness of the first substrate 400. That is, the vertical height of the pixel isolation pattern 450 can be lower than the vertical thickness of the first substrate 400.

[0079] For example, the width of the pixel isolation pattern 450 may gradually decrease from the first surface 400a of the first substrate 400 toward the second surface 400b. The width of the pixel isolation pattern 450 on the first surface 400a may be a first width W1, and the width of the pixel isolation pattern 450 on the second surface 400b may be a second width W2. That is, the first width W1 may be greater than the second width W2.

[0080] The pixel isolation pattern 450 may include a first isolation pattern 451, a second isolation pattern 453, and a capping pattern 455. The first isolation pattern 451 may be disposed along the sidewall of the first trench TR1. The first isolation pattern 451 may include, for example, a silicon-based insulating material (e.g., silicon nitride, silicon oxide, or silicon oxynitride) or a high-k material (e.g., hafnium oxide or aluminum oxide). As another example, the first isolation pattern 451 may include multiple layers, and each layer may include a different material. The first isolation pattern 451 may have a refractive index lower than that of the first substrate 400. Thus, crosstalk phenomena between pixels PX on the first substrate 400 can be prevented or reduced.

[0081] The second isolation pattern 453 may be disposed in the first isolation pattern 451. For example, the sidewall of the second isolation pattern 453 may be surrounded by the first isolation pattern 451. The first isolation pattern 451 may be disposed between the second isolation pattern 453 and the first substrate 400. The second isolation pattern 453 may be spaced apart from the first substrate 400 by the first isolation pattern 451. Thus, during the operation of the image sensor, the second isolation pattern 453 may be electrically isolated from the first substrate 400. The second isolation pattern 453 may include a crystalline semiconductor material such as polysilicon. For example, the second isolation pattern 453 may further include a dopant, and the dopant may include an impurity of a first conduction type or an impurity of a second conduction type.

[0082] For example, the second isolation pattern 453 may include doped polysilicon. Alternatively, the second isolation pattern 453 may include an undoped crystalline semiconductor material. For example, the second isolation pattern 453 may include undoped polysilicon. The term "undoped" may mean that no intentional doping process is performed. The dopant may include an n-type dopant and a p-type dopant.

[0083] A capping pattern 455 may be provided on the lower surface of the second separation pattern 453. The capping pattern 455 may be provided adjacent to the first surface 400a of the first substrate 400. The upper surface of the capping pattern 455 and the lower surface of the second separation pattern 453 may be provided at substantially similar levels. The capping pattern 455 may include a non-conductive material. For example, the capping pattern 455 may include a silicon-based insulating material (e.g., silicon nitride, silicon oxide, or silicon oxynitride) or a high-k material (e.g., hafnium oxide or aluminum oxide). Thus, the pixel separation pattern 450 can prevent photo-charges generated by incident light incident on the pixel PX from randomly drifting into another adjacent pixel PX. That is, the pixel separation pattern 450 can prevent the crosstalk phenomenon between the pixels PX.

[0084] The device separation pattern 403 may be provided in the first substrate 400. For example, the device separation pattern 403 may be provided in the second trench TR2. The second trench TR2 may be recessed from the first surface 400a of the first substrate 400. The device separation pattern 403 may be a shallow trench isolation (STI) layer. The device separation pattern 403 may define an active region. The upper surface of the device separation pattern 403 may be provided in the first substrate 400. The width of the device separation pattern 403 may gradually decrease from the first surface 400a to the second surface 400b of the first substrate 400. The upper surface of the device separation pattern 403 may be vertically spaced apart from the photoelectric conversion region 410. The device separation pattern 403 may include silicon nitride, silicon oxide, or silicon oxynitride. The device separation pattern 403 may include the same material as the first separation pattern 451 of the pixel separation pattern 450, and in this case, the boundary between the device separation pattern 403 and the first separation pattern 451 may not be visually recognizable. However, this is only an example, and the exemplary embodiments are not limited thereto.

[0085] In addition, Figure 4 A configuration is shown in which the device separation pattern 403, the pixel separation pattern 450, and the first surface 400a of the first substrate 400 are provided on the same plane, but this is only an example, and the exemplary embodiments are not limited thereto. For example, the device separation pattern 403, the pixel separation pattern 450, and the first surface 400a of the first substrate 400 may not be coplanar. The device separation pattern 403 and the pixel separation pattern 450 may protrude or be recessed from the first surface 400a of the first substrate 400.

[0086] The transfer transistor TX may be disposed on the active region of each pixel PX. The transfer transistor TX may be electrically connected to the photoelectric conversion region 410. In addition, a transfer gate TG and a floating diffusion region FD on the active region may be included. The transfer gate TG may include a first portion TGa on the first surface 400a of the first substrate 400 and a second portion TGb extending from the first portion TGa into the first substrate 400. The maximum width of the first portion TGa in the second direction D2 may be greater than the maximum width of the second portion TGb in the second direction D2. The floating diffusion region FD may be adjacent to one side of the transfer gate TG. The floating diffusion region FD may be disposed in the active region. The floating diffusion region FD may have a second conductivity type (e.g., n-type) opposite to the conductivity type of the first substrate 400. However, Figure 4 The shapes of the transfer gate TG and the floating diffusion region FD shown in

[0087] are examples, and the exemplary embodiments are not limited thereto.

[0088] A gate dielectric layer GI may be disposed between the transfer gate TG and the first substrate 400. Gate spacers GS may be disposed on the sidewalls of the transfer gate TG. The gate spacers GS may include silicon nitride, silicon carbonitride, or silicon oxynitride. Figure 4 Referring to

[0089] , a first wiring region 20 is disposed on the first surface 400a of the first substrate 400 and may include a plurality of insulating layers IL1, IL2, and IL3, a plurality of wiring layers CL1 and CL2, and vias VIA.

[0090] The insulating layers may include a first insulating layer IL1, a second insulating layer IL2, and a third insulating layer IL3.

[0091] The first insulating layer IL1 may cover the first surface 400a of the first substrate 400. The first insulating layer IL1 may cover the gate electrode TG. The second insulating layer IL2 may be disposed on the first insulating layer IL1. The third insulating layer IL3 may be disposed on the second insulating layer IL2.

[0092] The first insulating layer to the third insulating layer (IL1, IL2, and IL3) may include a non-conductive material. For example, the first insulating layer to the third insulating layer (IL1, IL2, and IL3) may include a silicon-based insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0093] A plurality of vias VIA may be disposed in the first insulating layer IL1, the second insulating layer IL2, and the third insulating layer IL3. The via VIA may connect the floating diffusion region FD, the first wiring layer CL1, and the second wiring layer CL2 to each other.

[0094] The first wiring layer CL1, the second wiring layer CL2, and the via VIA may include a metallic material. For example, the first wiring layer CL1, the second wiring layer CL2, and the via VIA may include copper Cu.

[0095] As Figure 4 shown, the floating diffusion region FD of the first photoelectric conversion element PD1 and the floating diffusion region FD of the second photoelectric conversion element PD2 may be connected to each other. According to an exemplary embodiment, the floating diffusion regions FD of 12 photoelectric conversion elements may be connected to each other. Alternatively, the floating diffusion regions FD of nine photoelectric conversion elements may be connected to each other. When the floating diffusion regions FD of a plurality of photoelectric conversion elements PD are connected to each other in this way, a signal of only one photoelectric conversion element PD may be output, or signals of a plurality of photoelectric conversion elements PD may be output simultaneously, so that various combinations of signals may be output. A detailed description of connecting the photoelectric conversion elements will be referred to later Figures 5 to 16 for a description.

[0096] The light transmissive layer 30 may include an insulating structure 329, a color filter 303, and a microlens unit 306. The light transmissive layer 30 may converge and filter light incident from the outside to provide the light to the photoelectric conversion region 410.

[0097] The color filter 303 may be disposed on the second surface 400b of the first substrate 400. The color filter 303 may be disposed on each of the photoelectric conversion elements PD. For example, the same color filter may be disposed on a plurality of photoelectric conversion elements PD. As will be described separately later, in an image sensor according to an exemplary embodiment, the same color filter may be disposed on 36 photoelectric conversion elements PD. The color filter 303 may include primary color filters. The color filter 303 may include a first color filter, a second color filter, and a third color filter having different colors. For example, the first color filter, the second color filter, and the third color filter may include a green color filter, a red color filter, and a blue color filter, respectively. The first color filter, the second color filter, and the third color filter may be arranged in a Bayer pattern. As another example, the first color filter, the second color filter, and the third color filter may include color filters such as a cyan color filter, a magenta color filter, or a yellow color filter.

[0098] The insulating structure 329 may be disposed between the second surface 400b of the first substrate 400 and the color filter 303. The insulating structure 329 may prevent reflection of light, such that light incident on the second surface 400b of the first substrate 400 may smoothly (i.e., uniformly) reach the photoelectric conversion region 410. The insulating structure 329 may be referred to as an antireflection structure.

[0099] The insulating structure 329 may include a first fixed charge layer 321, a second fixed charge layer 323, and a planarization layer 325 that are sequentially stacked on the second surface 400b of the first substrate 400. Each of the first fixed charge layer 321, the second fixed charge layer 323, and the planarization layer 325 may include a different material. The first fixed charge layer 321 may include any one of aluminum oxide, tantalum oxide, titanium oxide, and hafnium oxide. The second fixed charge layer 323 may include any one of aluminum oxide, tantalum oxide, titanium oxide, and hafnium oxide. For example, the first fixed charge layer 321 may include aluminum oxide, the second fixed charge layer 323 may include hafnium oxide, and the planarization layer 325 may include silicon oxide. In another exemplary embodiment, a silicon antireflection layer may be inserted between the second fixed charge layer 323 and the planarization layer 325. The antireflection layer may include silicon nitride.

[0100] The microlens unit 306 may be disposed on the color filter 303. The microlens unit 306 may include a flat portion 305 in contact with the color filter 303 and microlenses 307 disposed on the portion 305. The flat portion 305 may include, for example, an organic material. As another example, the flat portion 305 may include silicon oxide or silicon oxynitride. The microlenses 307 may have a convex shape to converge light incident on the pixel PX. Each microlens 307 may vertically overlap with the photoelectric conversion region 410. The shape of the lens may vary.

[0101] As Figure 4 shown, one microlens 307 may overlap with a plurality of photoelectric conversion regions 410 (and in this regard, a plurality of pixels PX). However, this is merely an example, and the number of microlenses 307 corresponding to one pixel PX may be changed. The detailed arrangement of the microlenses 307 will be described later with reference to Figures 5 to 9 and Figure 21 to describe the detailed arrangement of the microlenses 307.

[0102] The light transmission layer 30 may further include a Bayer pattern 311 and a passivation layer 316. The Bayer pattern 311 may be disposed between adjacent color filters 303 to separate them from each other. The Bayer pattern 311 may be disposed on the insulating structure 329. For example, the Bayer pattern 311 may have a grid structure. The Bayer pattern 311 may include a material having a refractive index lower than that of the color filter 303. The Bayer pattern 311 may include an organic material. For example, the Bayer pattern 311 may be a polymer layer including silica nanoparticles. Since the Bayer pattern 311 has a low refractive index, the amount of light incident on the photoelectric conversion region 410 can be increased, and crosstalk between pixels PX can be reduced. That is, the light reception efficiency can be improved in each photoelectric conversion region 410, and the signal-to-noise ratio (SNR) characteristics can be improved.

[0103] The passivation layer 316 may cover the surface of the Bayer pattern 311 with a substantially uniform thickness. The passivation layer 316 may include at least one single layer or multiple layers such as an aluminum oxide layer and a silicon oxycarbide layer. The passivation layer 316 may protect the color filter 303 and may be used to absorb moisture.

[0104] However, the plan view and cross-sectional view of the above image sensor are only examples, and the exemplary embodiments are not limited thereto. The image sensor according to the exemplary embodiment is characterized in that a plurality of photoelectric conversion elements PD (for example, 12 photoelectric conversion elements PD, or floating diffusion regions FD of nine photoelectric conversion elements PD) are connected to each other, and the planar structure and cross-sectional structure of the image sensor may vary according to the specific connection type.

[0105] Hereinafter, the detailed structure of the image sensor according to the exemplary embodiment will be described in detail with reference to the accompanying drawings.

[0106] Figure 5 A plurality of photoelectric conversion elements PD and a plurality of microlenses 307 in the image sensor according to the exemplary embodiment are shown. In Figure 5 144 photoelectric conversion elements PD are shown, and the same color filter may be provided on 36 photoelectric conversion elements arranged in 6 columns in the first direction (X direction) and 6 rows in the second direction (Y direction).

[0107] Specifically, in Figure 5 144 photoelectric conversion elements are shown, a green color filter 303G is provided on 36 photoelectric conversion elements to form a green region GA, a red color filter 303R is provided on 36 photoelectric conversion elements to form a red region RA, a blue color filter 303B is provided on 36 photoelectric conversion elements to form a blue region BA, and a green color filter 303G is provided on 36 photoelectric conversion elements to form a green region. That is, referring to Figure 5, an image sensor according to an exemplary embodiment may include two green regions GA, a red region RA, and a blue region BA, and each color region may include 36 photoelectric conversion elements PD.

[0108] Referring to Figure 5 , in an image sensor according to an exemplary embodiment, one microlens 307 may be provided for every four photoelectric conversion elements PD. That is, each color region may include 36 photoelectric conversion elements and nine microlenses 307. However, the number of such microlenses 307 is an example, and the exemplary embodiment is not limited thereto. As Figure 5 shown, when one microlens 307 is disposed on four photoelectric conversion elements, autofocus can be achieved automatically. The photoelectric conversion elements PD sharing one microlens 307 have different light incident angles for each photoelectric conversion element, and thus autofocus can be achieved through this. Regarding Figure 5 , since all the photoelectric conversion elements PD share the microlens 307 with other photoelectric conversion elements PD, autofocus can be performed in all pixels.

[0109] In Figure 5 , 12 photoelectric conversion elements may constitute one pixel circuit. That is, in an image sensor according to an exemplary embodiment, 12 out of 36 photoelectric conversion elements provided with the same color filter constitute one pixel, and may be connected to one analog-to-digital converter ADC. The analog-to-digital converter may receive the signals generated by each photoelectric conversion element and convert the signals into digital values. In this case, as Figure 5 shown, two photoelectric conversion elements in the first direction (X direction) and six photoelectric conversion elements in the second direction (Y direction) may be connected to one analog-to-digital converter (ADC). However, this is an example, and six photoelectric conversion elements in the first direction (X direction) and two photoelectric conversion elements in the second direction (Y direction) may be connected to one analog-to-digital converter (ADC). Therefore, as Figure 5 shown, one in the green region GA may include three analog-to-digital converters. Figure 5 Other color regions of

[0110] may also include 12 photoelectric conversion elements connected to one analog-to-digital converter, and one color region may include three analog-to-digital converters.

[0111] In the following, specific characteristics will be described. The noise of the image sensor includes the following pixel noise (SF noise) and ADC noise (ADC noise).

[0112]

[0113] ADC noise = N ADC

[0114] In this case, the noise of the image sensor (Noise) is composed of the sum of the pixel noise and the ADC noise as described below.

[0115]

[0116] In the pixel noise (SF noise), # refers to the number of analog-to-digital converters (ADCs) provided for one color region sharing the same color filter. In this regard, 36 photoelectric conversion elements are set in one color region, and 12 of these 36 photoelectric conversion elements are connected to one analog-to-digital converter (ADC), and there are three analog-to-digital converters (ADCs) in one color region. Therefore, in this example, # corresponds to 3.

[0117] In addition, the relationship between the number of ADCs (#) and the conversion gain is as follows.

[0118] Conversion gain = CG / #

[0119] The total noise of the image sensor corresponds to the value obtained by dividing the noise by the conversion gain, as described below.

[0120] Total noise = Noise / CG

[0121] As described above, the image sensor can have a shared structure in which one color filter is set on 36 photoelectric conversion elements, and 12 of these 36 photoelectric conversion elements are connected to each other.

[0122] Table 1 below summarizes the relative noise according to the number of ADCs. As shown, if 18 photoelectric conversion elements are connected by one pixel circuit, two ADCs are required and the AVG is 2. In addition, if 12 photoelectric conversion elements are connected by one pixel circuit, three ADCs are required and the AVG is 3. If 36 photoelectric conversion elements are connected to each other, one ADC is required and the AVG is 1.

[0123] In this case, the relative values of the conversion gain, pixel noise, ADC noise, and total noise in each case are as follows.

[0124] Table 1

[0125]

[0126] As shown in Table 1, the noise value of Example Embodiment 2 in which 12 photoelectric conversion elements are connected to each other is lower than that of Example Embodiment 3 in which 36 photoelectric conversion elements are connected to each other. In addition, the overall noise value of Example Embodiment 1 (2AVG) in which 18 photoelectric conversion elements are connected to one pixel circuit seems to be lower than the overall noise value of Example Embodiment 2 (3AVG) in which 12 photoelectric conversion elements are connected to one pixel circuit. However, due to this structure, connecting 18 photoelectric conversion elements to one pixel circuit requires additional design and manufacturing complexity. When 18 photoelectric conversion elements are connected to one pixel circuit, the photoelectric conversion elements sharing the same microlens 307 are connected to different pixel circuits, which may increase noise. In addition, due to the arrangement of the wiring for connecting 18 photoelectric conversion elements to one pixel circuit, the capacitance increases, which may increase noise. Figure 5 A configuration is shown in which two photoelectric conversion elements are connected to each other in a first direction (X direction) and six photoelectric conversion elements are connected to each other in a second direction (Y direction). However, this is an example, and six photoelectric conversion elements may be connected to each other in the first direction (X direction) and two photoelectric conversion elements may be connected to each other in the second direction (Y direction).

[0127] Figure 6 Multiple photoelectric conversion elements PD and multiple microlenses 307 in an image sensor according to an example embodiment are shown. Referring to Figure 6 , except that six photoelectric conversion elements in a first direction (X direction) and two photoelectric conversion elements in a second direction (Y direction) are connected to a single analog-to-digital converter ADC, the image sensor is the same as the image sensor shown in Figure 5 . A detailed description of the same constituent elements is omitted.

[0128] That is, in the image sensor according to the example embodiment, an identical color filter is provided on 36 photoelectric conversion elements, and among these 36 photoelectric conversion elements, the floating diffusion regions FD of the photoelectric conversion elements PD arranged in a 2×6 or 6×2 manner may be connected to each other.

[0129] Although Figure 5 and Figure 6 show a configuration in which the number of microlenses 307 in each of the green region GA, red region RA, and blue region BA is the same, this is only an example, and the example embodiment is not limited thereto. The number of microlenses 307 in each color region may vary.

[0130] Figure 7 Multiple photoelectric conversion elements PD and multiple microlenses 307 in an image sensor according to an example embodiment are shown. Referring to Figure 7, except that a microlens 307 is provided on each photoelectric conversion element PD in the green region GA, the image sensor is the same as the Figure 5 image sensor shown. A detailed description of the same constituent elements is omitted. As Figure 7 shown, when a microlens 307 is provided on one photoelectric conversion element PD in the green region GA, image quality degradation can be prevented. That is, when multiple photoelectric conversion elements PD share one microlens 307, there may be image quality deterioration due to image signal mixing. However, as Figure 7 shown, when a microlens 307 is provided on one photoelectric conversion element PD in the green region GA, color loss can be prevented. Since green is the color that has the greatest impact on visibility and image quality, image quality degradation can be prevented in the green region GA, and autofocus can be achieved in the blue region BA and the red region RA. As Figure 7 shown, 12 photoelectric conversion elements PD are connected to each other to form a pixel circuit, so the noise of the image sensor can be reduced.

[0131] Figure 8 shows multiple photoelectric conversion elements PD and multiple microlenses 307 in the image sensor according to an exemplary embodiment. Referring to Figure 8 , except that a microlens 307 is provided on two photoelectric conversion elements in the red region RA and the blue region BA, the image sensor is the same as the Figure 7 image sensor shown. A detailed description of the same constituent elements is omitted. As Figure 8 shown, 12 photoelectric conversion elements are connected to each other to form a pixel circuit, so the noise can be reduced.

[0132] Figure 9 shows multiple photoelectric conversion elements PD and multiple microlenses 307 in the image sensor according to an exemplary embodiment. Referring to Figure 9 , except that a microlens 307 is provided on one photoelectric conversion element PD in the green region GA, the red region RA, and the blue region BA, the image sensor is the same as the Figure 5 image sensor shown. A detailed description of the same constituent elements is omitted. When a microlens 307 is provided on one photoelectric conversion element PD in all color regions as Figure 9 shown, color degradation can be prevented and image quality can be improved. As Figure 9 shown, 12 photoelectric conversion elements are connected to each other to form a pixel circuit, so the noise can be reduced.

[0133] However, the arrangement of the microlens 307 described with reference to Figures 5 to 9 is only an example, and the exemplary embodiment is not limited thereto. Except Figures 5 to 9Outside the shape shown in [the figure], the microlens 307 can be set in various shapes.

[0134] Hereinafter, a detailed arrangement in which the floating diffusion regions of 12 photoelectric conversion elements in an image sensor are connected to each other will be described. However, the structures and arrangements described below are merely examples, and the connection of the photoelectric conversion elements PD is not limited to the shapes described below.

[0135] Figure 10 Schematically shows the planar shapes of 12 photoelectric conversion elements in an image sensor according to an exemplary embodiment. Figure 11 is a sectional view taken along line A-A' Figure 10 of Figure 12 is a sectional view taken along line B-B' Figure 10 of Figures 10 to 12 For ease of description, only some components of the image sensor are shown in Figure 4 The description of the light transmission layer 30 and the first wiring region 20 is the same as that described above with reference to Figure 4 And, for ease of explanation, Figure 11 and Figure 12 are shown Figure 4 in the opposite and upside-down manner. That is, in

[0136] Referring to Figure 10 the pixel separation pattern 450 can be disposed in a plane around the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4. However, as shown in Figure 10 and Figure 11 the pixel separation pattern 450 may not completely separate the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4. For example, the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 may be connected to each other at the central portion. That is, as shown in Figure 11 the first substrates 400 of the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 may be connected to each other.

[0137] The description of the pixel separation pattern 450 is the same as the above description. That is, the pixel separation pattern 450 may include a first separation pattern 451, a second separation pattern 453, and a capping pattern 455. However, this is an example, and the shape of the pixel separation pattern 450 is not limited thereto.

[0138] The device isolation pattern 403 may be provided in the first substrate 400. As Figure 10 shown, the device isolation pattern 403 may define the active region ACT, and the lower surface of the device isolation pattern 403 may be provided in the first substrate 400. The width of the device isolation pattern 403 may gradually decrease from the first surface 400a to the second surface 400b of the first substrate 400. The lower surface of the device isolation pattern 403 may be vertically spaced apart from the photoelectric conversion region 410. The description of the device isolation pattern 403 is the same as the above description. The detailed description of the same components is omitted.

[0139] The gate electrode TG of the transfer transistor may be provided on the active region ACT. Although for ease of explanation, Figure 12 the structure of the gate electrode (TG) is briefly shown, the same content of the gate electrode TG described in Figure 4 may be applied.

[0140] The description of the photoelectric conversion region 410 is the same as the above description. That is, the photoelectric conversion region 410 may generate and accumulate charges according to the amount of received light. The photoelectric conversion region 410 may constitute the photoelectric conversion element PD.

[0141] The photoelectric conversion region 410 may be a region doped with impurities of the second conductivity type in the first substrate 400. The impurities of the second conductivity type may have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type may include n-type impurities such as phosphorus, arsenic, bismuth, or antimony. For example, each photoelectric conversion region 410 may include a first region adjacent to the first surface 400a and a second region adjacent to the second surface 400b. There may be a difference in impurity concentration between the first region and the second region of the photoelectric conversion region 410. Therefore, the photoelectric conversion region 410 may have a potential ramp between the first surface 400a and the second surface 400b of the first substrate 400. As another example, the photoelectric conversion region 410 may not have a potential ramp between the first surface 400a and the second surface 400b of the first substrate 400.

[0142] The first substrate 400 and the photoelectric conversion region 410 may constitute a photodiode. That is, the photodiode may be formed by a p-n junction between the first substrate 400 of the first conductivity type and the photoelectric conversion region 410 of the second conductivity type. The photoelectric conversion region 410 constituting the photodiode may generate and accumulate photo charges proportional to the intensity of the incident light.

[0143] As Figures 10 to 12 shown, the transistor TR may be provided in the active region ACT. The transistor TR may be at least one of a conversion transistor, a source follower transistor, and a selection transistor for driving the image sensor. For example, Figure 10The transistor TR shown may be a source follower transistor. However, this is an example, and some of the transistors constituting the pixel circuit are provided in the active region ACT, some of the transistors are provided on other substrates, and they can be connected through the floating diffusion region FD. This will be described later with reference to Figure 26 individually.

[0144] Referring to Figures 10 to 12 , the floating diffusion region FD is provided at the position where the four photoelectric conversion elements PD1, PD2, PD3, and PD4 are connected to each other. The floating diffusion region FD may be a region where the first substrate 410 is doped with impurities of a second conductivity type opposite to the impurities of the first conductivity type.

[0145] As Figure 10 shown, one floating diffusion region FD is provided between the four photoelectric conversion elements PD. Therefore, three floating diffusion regions FD can be provided for twelve photoelectric conversion elements PD. The three floating diffusion regions FD can be connected to each other through vias VIA and the first wiring M1. Therefore, the floating diffusion regions FD of the twelve photoelectric conversion elements PD are connected to each other. This has the effect of reducing the noise of the image sensor as described above.

[0146] In addition, referring to Figure 10 and Figure 12 , the ground region GND is provided on the active region ACT. The ground region GND is a region to which a ground voltage is applied, and it may be a region where the first substrate 410 is doped with impurities of the first conductivity type. Since the four photoelectric conversion elements PD share one first substrate 400, one ground region GND can be provided in the four photoelectric conversion elements PD.

[0147] As described above with reference to Figures 10 to 12 , the first substrates 400 constituting the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 are not separated but connected to each other, and have a floating diffusion region FD in the connection region. That is, every four photoelectric conversion elements PD have one floating diffusion region FD, and the twelve photoelectric conversion elements PD are connected to each other through three floating diffusion regions FD. As described above, this has the effect of reducing the noise of the image sensor. Although the four photoelectric conversion elements PD1, PD2, PD3, and PD4 have been described as examples above, the description of the other photoelectric conversion elements PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 is the same.

[0148] However, this configuration is an example, and the first substrate 400 constituting the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 may be separated by the pixel isolation pattern 450. In this case, adjacent first photoelectric conversion elements PD1, second photoelectric conversion elements PD2, third photoelectric conversion elements PD3, and fourth photoelectric conversion elements PD4 may each include a floating diffusion region FD, and each of these floating diffusion regions FD may be connected by a separate pad.

[0149] Figure 13 The planar shape of 12 photoelectric conversion elements in an image sensor according to an exemplary embodiment is shown. Figure 14 is a cross-sectional view taken along line C-C' of Figure 13 . Referring to Figure 13 and Figure 14 , in the image sensor, the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 are separated by the pixel isolation pattern 450. Accordingly, separate connection pads FDP are provided to connect the floating diffusion regions FD in the active regions ACT of each photoelectric conversion element. In addition, separate ground connection pads GNDP are provided to supply a ground voltage to the ground regions GND in each photoelectric conversion element simultaneously.

[0150] Referring to Figure 13 and Figure 14 , connection pads FDP for connecting the floating diffusion regions FD in each photoelectric conversion element PD are provided. Accordingly, the floating diffusion regions FD in each photoelectric conversion element PD can be connected to each other through these pads. As shown in Figure 13 , the connection pads FDP can be connected to each other through the first wirings M1, and the floating diffusion regions FD of 12 photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 can be connected to each other. The connection pads FDP may include polysilicon, but are not limited thereto.

[0151] In addition, as shown in Figure 13 and Figure 14 , ground regions GND can be provided at the corners of each photoelectric conversion element. Accordingly, the ground connection pads GNDP are provided at positions where the ground regions GND are concentrated, and the same ground voltage can be applied to a plurality of photoelectric conversion elements. Descriptions of other components for Figure 13 and Figure 14 are the same as those described in Figures 10 to 12 , and thus will be omitted. The ground connection pads GNDP may also include polysilicon.

[0152] That is to say, in Figures 10 to 12 the first substrates 400 of the four photoelectric conversion elements PD are connected to each other, and a ground voltage can be applied to the four photoelectric conversion elements by using one ground pad. In addition, since the first substrates of the four photoelectric conversion elements PD are connected to each other, the four photoelectric conversion elements PD can share one floating diffusion region FD. Therefore, in order to connect 12 photoelectric conversion elements PD to each other, three floating diffusion regions FD are connected by the first wiring M1 or the like.

[0153] However, in Figure 13 and Figure 14 the first substrates of the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 are separated by the pixel isolation pattern 450. Therefore, separate connection pads FDP are provided to connect the floating diffusion regions FD of each photoelectric conversion element, and 12 photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 can be connected to each other by connecting the connection pads FDP via the first wiring M1. In addition, separate ground connection pads GNDP for connecting the ground regions GND of each photoelectric conversion element PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 can be used to apply a ground voltage to each photoelectric conversion element.

[0154] In addition, Figures 10 to 12 the structure shown in Figure 13 and Figure 14 can be combined (i.e., mixed) with the structure shown in Figure 15 shows the planar shape of 12 photoelectric conversion elements in an image sensor according to an exemplary embodiment. Figure 16 is a cross-sectional view taken along the line D-D' of Figure 15 . Referring to Figure 15 , as in Figure 10 the image sensor has the first substrates of the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 connected to each other. Therefore, the first photoelectric conversion element PD1, the second photoelectric conversion element PD2, the third photoelectric conversion element PD3, and the fourth photoelectric conversion element PD4 share one floating diffusion region FD. Therefore, as shown in Figure 15 and Figure 16 the three floating diffusion regions FD shared by 12 photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 can be connected to each other by connecting the first wiring M1. However, as inFigure 15 As shown, the ground region GND can be supplied with voltage all at once using a ground connection pad GNDP that connects the ground regions provided in each photoelectric conversion element to each other, as Figure 13 and Figure 14 shown. That is to say, Figure 15 and Figure 16 correspond to Figures 10 to 12 and Figure 13 and Figure 14 combination.

[0155] However, this arrangement and connection form are merely examples, and the exemplary embodiments are not limited thereto. The main feature of the present disclosure is that 12 photoelectric conversion elements are connected to each other, and the specific connection method may vary according to the exemplary embodiments.

[0156] Hereinafter, the circuit diagram of an image sensor according to an exemplary embodiment will be described. However, the circuit diagram described below is merely an example, and the exemplary embodiments are not limited thereto. Figure 17 is the circuit diagram of a pixel included in an image sensor according to an exemplary embodiment. Twelve photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 constitute one pixel.

[0157] Referring to Figure 17 , one pixel may include a plurality of photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12. Each of the photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 can perform photoelectric conversion. As Figure 17 shown, the plurality of photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 can be connected to each other.

[0158] Hereinafter, the first photoelectric conversion element PD1 will be mainly described, but the following description also applies to the other photoelectric conversion elements PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12.

[0159] The first photoelectric conversion element PD1 can generate and accumulate charges according to the amount of received light. The first photoelectric conversion element PD1 may include an anode connected to the ground and a cathode connected to one end of the first transfer transistor TG1. The first transfer signal may be supplied to the gate of the first transfer transistor TG1, and one end of the first transfer transistor TG1 may be connected to the floating diffusion region FD. When the first transfer transistor TG1 is turned on by the first transfer signal, the charges stored in the first photoelectric conversion element PD1 may be transferred to the floating diffusion region FD. The floating diffusion region FD can hold the charges transferred from the photoelectric conversion element PD.

[0160] Each of the plurality of transfer transistors TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, and TG12 is connected between one of the plurality of photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12 and the floating diffusion region FD, and may include gate electrodes for receiving a plurality of transfer signals. For example, the first transfer transistor TG1 may include a gate electrode connected between the first photoelectric conversion element PD1 and the floating diffusion region FD and receiving the first transfer signal. The number of the plurality of transfer transistors TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, and TG12 may be equal to the number of the plurality of photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, and PD12.

[0161] A plurality of conversion transistors RG, HDG, and LDG may be connected between the power supply voltage V DD and the floating diffusion region FD.

[0162] The conversion transistors RG, HDG, and LDG can periodically reset the charges accumulated in the floating diffusion region FD. When the conversion transistors RG, HDG, and LDG are turned on, the power supply voltage V connected to the drain electrodes of the conversion transistors RG, HDG, and LDG DD can be applied to the floating diffusion region FD. Therefore, when the conversion transistors RG, HDG, and LDG are turned on, the charges accumulated in the floating diffusion region FD can be discharged, and the floating diffusion region FD can be reset.

[0163] In addition, the image sensor may include a plurality of conversion transistors RG, HDG, and LDG. Accordingly, the capacity of the floating diffusion region may be extended by using some of the plurality of conversion transistors RG, HDG, and LDG. That is, various combinations may be obtained by turning on or off some of the plurality of conversion transistors RG, HDG, and LDG, and the capacity of the floating diffusion region may be extended to various combinations. For example, the conversion transistors RG and HRG may be controlled to be turned off, while the conversion transistor LDG is turned on. For example, the conversion transistor RG may be controlled to be turned off, while the conversion transistors HDG and LDG are turned on.

[0164] Accordingly, signals may be received through combinations of various photoelectric conversion elements among the 12 photoelectric conversion elements connected to each other. All signals of the plurality of transfer transistors TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, and TG12 may be received, or only some signals may be received. The required capacitance varies according to the number of transistors received at this time, and at this time, some of the plurality of conversion transistors RG, HDG, and LDG may be used to extend the capacity of the floating diffusion region, and signals may be received without loss for various combinations.

[0165] The source follower transistor SF may output a pixel signal according to the voltage of the floating diffusion region FD. The gate of the source follower transistor SF may be connected to the floating diffusion region FD, the power supply voltage V DD may be supplied to the drain electrode of the source follower transistor SF, and the source electrode of the source follower transistor SF may be connected to one end of the selection transistor SL. The source follower transistor SF may output a voltage having a level corresponding to the charge accumulated in the floating diffusion region FD as a pixel signal. As Figure 17 shown, the circuit of the image sensor may reduce noise by connecting four source follower transistors SF in parallel. However, this is merely an example, and the image sensor according to the exemplary embodiment may include one source follower transistor SF.

[0166] When the selection transistor SL is turned on by a selection signal, the pixel signal of the source follower transistor SF may be transmitted to the readout circuit. The selection signal may be applied to the gate electrode of the selection transistor SL, and the drain electrode of the selection transistor SL may be connected to the output line that outputs a plurality of pixel signals.

[0167] The operation of the image sensor will be described below with reference to Figure 17 First, when light is blocked (i.e., when the shutter of the camera including the image sensor is closed), the power supply voltage V DDIs applied to the drain electrodes of the conversion transistors (RG, HDG, LDG) and the drain electrode of the source follower transistor SF, and the conversion transistors (RG, HDG, LDG) are turned on to release the remaining charge in the floating diffusion region FD. Then, when the conversion transistors (RG, HDG, LDG) are turned off and light from the outside is incident on the photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12), electron-hole pairs are generated respectively in each of the photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12). The holes move to the p-type impurity regions of the photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12) and accumulate therein, and the electrons move to the n-type impurity regions and accumulate therein. When the transfer transistors (TG1, TG2, TG3, TG4, TG5, TG6, TG7, TG8, TG9, TG10, TG11, TG12) are turned on, charges such as electrons and holes are transferred to the floating diffusion region FD and accumulate in the floating diffusion region FD. The gate bias of the source follower transistor SF changes in proportion to the amount of charge accumulation, resulting in a change in the source potential of the source follower transistor SF. At this time, when the selection transistor SL is turned on, the signal caused by the charge is read through the output line.

[0168] Figure 18 Is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment. Except for Figure 18 Including one source follower transistor SF, Figure 18 Is the same as Figure 17 Of the exemplary embodiment. The detailed description of the same constituent elements is omitted.

[0169] Figure 17 And Figure 18 Shows a circuit diagram including three conversion transistors, one selection transistor, and 12 photoelectric conversion elements, but the image sensor according to the exemplary embodiment is not limited thereto.

[0170] Figure 19 Is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment. Referring to Figure 19 , except that the image sensor includes four conversion transistors RG, HRG, MDG, and LDG, the image sensor is the same as Figure 17 Of the embodiment. The detailed description of the same constituent elements is omitted. Figure 19 Includes four conversion transistors RG, HRG, MDG, and LDG. Therefore, compared with Figure 17, the capacity of the floating diffusion region FD can be extended in various combinations. For example, the switching transistors RG, HRG, and MDG can be controlled to be turned off, while the switching transistor LDG is turned on. For example, the switching transistors RG and HRG can be controlled to be turned off, while the switching transistors MDG and LDG are turned on. For example, the switching transistor RG can be controlled to be turned off, while the switching transistors HRG, MDG, and LDG are turned on.

[0171] In addition, Figure 20 is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment. In addition to including one source follower transistor SF, Figure 20 is the same as Figure 19 . A detailed description of the same components is omitted.

[0172] As described above, an exemplary embodiment in which twelve photoelectric conversion elements form one circuit has been described. However, in another exemplary embodiment, nine photoelectric conversion elements can form one circuit. Hereinafter, another exemplary embodiment will be described.

[0173] Figure 21 Shows a plurality of photoelectric conversion elements PD and a plurality of microlenses 307 in an image sensor according to an exemplary embodiment. Referring to Figure 21 , Figure 21 is different from Figure 5 in that one microlens 307 is provided for every nine photoelectric conversion elements PD. A detailed description of the same components is omitted.

[0174] In Figure 21 , a color filter of green, red, or blue can be provided for each photoelectric conversion element PD. In Figure 5 , 144 photoelectric conversion elements are shown, and one color filter having the same color can be provided on 36 photoelectric conversion elements PD. That is, in the image sensor according to the exemplary embodiment, the same color filter can be provided on 36 photoelectric conversion elements arranged in six columns along the first direction X and six rows along the second direction Y. In Figure 21 , a green color filter 303G is provided on 36 of the 144 photoelectric conversion elements shown to form a green region GA, a red color filter 303R is provided on 36 photoelectric conversion elements to form a red region RA, a blue color filter 303B is provided on 36 photoelectric conversion elements to form a blue region BA, and a green color filter 303G is provided on 36 photoelectric conversion elements to form another green region GA.

[0175] That is, referring to Figure 21, an image sensor according to an exemplary embodiment may include a green region GA, a red region RA, a blue region BA, and another green region GA. Each color region may include 36 photoelectric conversion elements PD and four microlenses 307.

[0176] In Figure 21 , the photoelectric conversion elements constituting a pixel circuit are shown by dotted lines and D. In Figure 21 's exemplary embodiment, nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) arranged in three columns along the first direction X and three rows along the second direction Y may constitute a single pixel circuit. Although only a part of the photoelectric conversion elements shown in Figure 21 is shown, the nine photoelectric conversion elements may constitute a pixel circuit in the same manner as the other photoelectric conversion elements shown in Figure 21 .

[0177] Although Figure 21 shows a configuration in which the number of microlenses 307 provided in each of the green region GA, the red region RA, and the blue region BA is the same, this is only an example, and the exemplary embodiment is not limited thereto. The number of microlenses 307 provided in each color region may vary.

[0178] Figure 22 is a plan view showing nine photoelectric conversion elements in an image sensor according to an exemplary embodiment. Figure 23 is a cross-sectional view showing the Figure 22 taken along line E-E'. Referring to Figure 22 , each of the photoelectric conversion elements PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, and PD9 is separated by a pixel separation pattern 450. The description of the pixel separation pattern 450 is the same as the above description. That is, the pixel separation pattern 450 may include a first separation pattern 451, a second separation pattern 453, and a capping pattern 455. However, this is an example, and the shape of the pixel separation pattern 450 is not limited thereto.

[0179] A device separation pattern 403 may be provided in the first substrate 400. As shown in Figure 22 and Figure 23 , the device separation pattern 403 may define an active region ACT, and the lower surface of the device separation pattern 403 may be provided in the first substrate 400. The width of the device separation pattern 403 may gradually decrease from the first surface 400a to the second surface 400b of the first substrate 400. The lower surface of the device separation pattern 403 may be vertically spaced apart from the photoelectric conversion region 410. The description of the device separation pattern 403 is the same as the above description. A detailed description of the same constituent elements is omitted.

[0180] The gate electrode TG of the transfer transistor can be disposed on the active region ACT.

[0181] The description of the photoelectric conversion region 410 is the same as the above description. That is, the photoelectric conversion region 410 can generate and accumulate charges according to the amount of received light. The photoelectric conversion region 410 can constitute the photoelectric conversion element PD.

[0182] The photoelectric conversion region 410 can be a region doped with impurities of the second conductivity type in the first substrate 400. The impurities of the second conductivity type can have a conductivity type opposite to that of the impurities of the first conductivity type. The impurities of the second conductivity type can include n-type impurities such as phosphorus, arsenic, bismuth, or antimony. For example, each photoelectric conversion region 410 can include a first region adjacent to the first surface 400a and a second region adjacent to the second surface 400b. There can be a difference in impurity concentration between the first region and the second region of the photoelectric conversion region 410. Therefore, the photoelectric conversion region 410 can have a potential ramp between the first surface 400a and the second surface 400b of the first substrate 400. As another example, the photoelectric conversion region 410 may not have a potential ramp between the first surface 400a and the second surface 400b of the first substrate 400.

[0183] The first substrate 400 and the photoelectric conversion region 410 can constitute a photodiode. That is, the photodiode can be constructed by a p-n junction between the first substrate 400 of the first conductivity type and the photoelectric conversion region 410 of the second conductivity type. The photoelectric conversion region 410 constituting the photodiode can generate and accumulate photo charges proportional to the intensity of the incident light.

[0184] As Figure 22 shown, the transistor TR can be disposed in the active region ACT. The transistor TR can be one of a conversion transistor, a source follower transistor, and a selection transistor for driving the image sensor. For example, Figure 22 the transistor TR shown can be a source follower transistor. However, this is an example, and only a part of the transistors for driving the image sensor are disposed in the active region ACT, some transistors are disposed on other substrates, and can be connected through the floating diffusion region FD. This will be described separately later with reference to Figure 26 Separate description.

[0185] As Figure 22 and Figure 23As shown, nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) each include a floating diffusion region FD. The floating diffusion region FD may be a region in the first substrate 410 doped with a second conductive type impurity opposite to the first conductive type impurity. Each floating diffusion region FD can be connected to each other through a connection pad FDP and a first wiring M1. Thus, the nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) are connected as a whole. This has the effect of reducing noise as described above.

[0186] In addition, referring to Figure 22 and Figure 23 , a ground region GND is provided on the active region ACT. The ground region GND is a region to which a ground voltage is applied, and may be a region in the first substrate 410 doped with a first conductive type impurity. The ground regions GND of each photoelectric conversion element PD can be connected to each other.

[0187] Figure 24 is a circuit diagram of a pixel included in an image sensor according to an exemplary embodiment. In the exemplary embodiment, nine photoelectric conversion elements (PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9) constitute one pixel. Except that the circuit diagram according to the Figure 24 exemplary embodiment includes nine photoelectric conversion elements instead of 12 photoelectric conversion elements and includes five source follower transistors SF, the circuit diagram according to the Figure 24 exemplary embodiment is the same as Figure 17 . A detailed description of the same components is omitted.

[0188] Figure 25 is a circuit diagram of a pixel included in an image sensor according to another exemplary embodiment. Except for including one source follower transistor SF, Figure 25 is the same as Figure 24 . A detailed description of the same components is omitted.

[0189] Above, some components of the image sensor (especially the first chip 1000) have been mainly described. Hereinafter, the structure including the second chip 2000 and the third chip 3000 will be described. At least one of a conversion transistor, a source follower transistor, and a selection transistor of the image sensor may be provided in the second chip 2000.

[0190] Figure 26 is a cross-sectional view of an image sensor according to an exemplary embodiment.

[0191] Figure 26An image sensor according to an exemplary embodiment is shown and may include a first chip 1000, a second chip 2000, and a third chip 3000. The first chip 1000 may include a photoelectric conversion layer 10, a first wiring region 20, and a light transmission layer 30. The photoelectric conversion layer 10 may include a first substrate 400, a pixel isolation pattern 450, a device isolation pattern 403, and a photoelectric conversion region 410 disposed in the first substrate 400. Light incident from the outside may be converted into an electrical signal in the photoelectric conversion region 410.

[0192] The first chip 1000 includes the photoelectric conversion layer 10 and is a layer that generates a photoelectric signal. The second chip 2000 may be a layer in which transistors such as conversion transistors RG, HDG, and LDG, a source follower transistor SF, and a selection transistor SL are provided, as well as wirings connected to each transistor. A logic circuit may be provided in the third chip 3000. The description of the first chip 1000 is the same as the description referred to above Figure 3 and Figure 4 the description described, and thus will be omitted.

[0193] Referring to Figure 26 , a fourth insulating layer IL4 may be provided on the third insulating layer IL3. A first floating diffusion region connection node FDCN_1 may be provided in the fourth insulating layer IL4. The first floating diffusion region connection node FDCN_1 may include a main connection portion FDCN_1A and a shielding portion FDCN_1B. The shielding portion FDCN_1B may be provided at an edge of the main connection portion FDCN_1A and may be provided in a region narrower than the region of the main connection portion FDCN_1A. The shielding portion FDCN_1B may prevent interference between the floating diffusion region connection nodes of adjacent pixels PX. The main connection portion FDCN_1A of the first floating diffusion region connection node FDCN_1 is connected to the wirings of the first wiring layer CL1 and the second wiring layer CL2, but the shielding portion FDCN_1B of the first floating diffusion region connection node FDCN_1 may not be connected to the wirings of the first wiring layer CL1 and the second wiring layer CL2. Additionally, the main connection portion FDCN_1A of the first floating diffusion region connection node FDCN_1 is provided as a separate island shape for each pixel, but the shielding portion FDCN_1B may be provided to be connected to adjacent pixels. For example, the shielding portion FDCN_1B may be provided in a linear shape extending in one direction on a plane. A separate voltage may be applied to the shielding portion FDCN_1B. However, the configurations of the main connection portion FDCN_1A and the shielding portion FDCN_1B are merely examples, and the shape of the first floating diffusion region connection node FDCN_1 is not limited thereto. For example, the first floating diffusion region connection node FDCN_1 may only include the main connection portion FDCN_1A.

[0194] As Figure 26As shown, one surface of the first floating diffusion region connection node FDCN_1 is exposed and not covered by the fourth insulating layer IL4. Thus, as will be described later, it can contact the second floating diffusion region connection node FDCN_2 provided in the second chip 2000.

[0195] The second chip 2000 will be described. The second chip 2000 may include a second substrate 500, a second wiring region 40, and a third wiring region 70.

[0196] The second substrate 500 may include a first surface 500a and a second surface 500b that face each other. The second wiring region 40 may be provided on the first surface 500a of the second substrate 500, and the third wiring region 70 may be provided on the second surface 500b of the second substrate 500.

[0197] The second substrate 500 may be a semiconductor substrate or a silicon-on-insulator (SOI) substrate. The semiconductor substrate may include, for example, a silicon substrate, a germanium substrate, or a silicon-germanium substrate. The second substrate 500 may include impurities of a first conductivity type. For example, the impurities of the first conductivity type may include p-type impurities such as aluminum (Al), boron (B), indium (In), or gallium (Ga).

[0198] The first surface 500a of the second substrate 500 may be arranged to face the first surface 400a of the first substrate 400.

[0199] A fifth insulating layer IL5, a sixth insulating layer IL6, a seventh insulating layer IL7, a third wiring layer CL3, a plurality of vias VIA, and a second floating diffusion region connection node FDCN_2 may be provided on the first surface 500a of the second substrate 500.

[0200] The fifth insulating layer IL5, the sixth insulating layer IL6, and the seventh insulating layer IL7 may include non-conductive materials. For example, the fifth insulating layer IL5, the sixth insulating layer IL6, and the seventh insulating layer IL7 may include silicon-based insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride.

[0201] The third wiring layer CL3, the vias VIA, and the second floating diffusion region connection node FDCN_2 may include metal materials. For example, the third wiring layer CL3, the vias VIA, and the second floating diffusion region connection node FDCN_2 may include copper (Cu).

[0202] The third wiring layer CL3 may be provided in the sixth insulating layer IL6. The wiring of the third wiring layer CL3 and the transistor TR may be connected through the vias VIA. In this case, the transistor TR may be at least one of the above-mentioned conversion transistors RG, HDG, and LDG, the source follower transistor SF, and the selection transistor SL.

[0203] The second floating diffusion region connection node FDCN_2 can be disposed in the seventh insulating layer IL7. The second floating diffusion region connection node FDCN_2 can include a main connection portion FDCN_2A and a shielding portion FDCN_2B. The shielding portion FDCN_2B can be disposed at an edge of the main connection portion FDCN_2A and can be disposed in a region narrower than the region of the main connection portion FDCN_2A. The shielding portion FDCN_2B can prevent interference between the floating diffusion region connection nodes of adjacent pixels. The main connection portion FDCN_2A of the second floating diffusion region connection node FDCN_2 is connected to the wiring of the third wiring layer CL3, but the shielding portion FDCN_2B of the second floating diffusion region connection node FDCN_2 may not be connected to the wiring of the third wiring layer CL3. The main connection portion FDCN_2A of the second floating diffusion region connection node FDCN_2 is set as an island shape separated for each pixel, but the shielding portion FDCN_2B can be set to be connected to adjacent pixels. For example, the shielding portion FDCN_2B can be set in a linear shape extending in one direction on a plane. A separate voltage can be applied to the shielding portion FDCN_2B. However, the configurations of the main connection portion FDCN_2A and the shielding portion FDCN_2B are merely examples, and the shape of the second floating diffusion region connection node FDCN_2 is not limited thereto. For example, the second floating diffusion region connection node FDCN_2 may only include the main connection portion FDCN_2A.

[0204] As Figure 26 shown, one surface of the second floating diffusion region connection node FDCN_2 is exposed and not covered by the seventh insulating layer IL7. Thus, as Figure 26 shown, the first floating diffusion region connection node FDCN_1 disposed in the first chip 1000 and the second floating diffusion region connection node FDCN_2 disposed in the second chip 2000 can be in contact with each other.

[0205] Referring to Figure 26 , the second chip 2000 can include a deep node DN penetrating the second substrate 500. The deep node DN can include a metal, for example, copper Cu. However, these materials are merely examples and may also include other metal materials.

[0206] The deep node DN extends through the second substrate 500, and one end of the deep node DN can be disposed on the first surface 500a and the other end can be disposed on the second surface 500b. In this specification, the expression disposed on a certain surface is not limited to being disposed in contact with the surface, but includes being disposed not in contact with the surface or protruding from the surface. That is, as Figure 26 shown, one end of the deep node DN can be disposed to protrude from the first surface 500a, while the other end can be disposed to protrude from the second surface 500b.

[0207] Therefore, as Figure 26 shown, one end of the deep node DN can be in contact with the wiring of the third wiring layer CL3. In addition, the other end of the deep node DN can be in contact with the fourth wiring layer CL4 provided on the second surface 500b of the second substrate 500.

[0208] The eighth insulating layer IL8, the ninth insulating layer IL9, the tenth insulating layer IL10, the fourth wiring layer CL4, the fifth wiring layer CL5, and the via VIA can be provided on the second surface 500b of the second substrate 500.

[0209] The eighth insulating layer IL8, the ninth insulating layer IL9, and the tenth insulating layer IL10 can include non-conductive materials. For example, the eighth insulating layer IL8, the ninth insulating layer IL9, and the tenth insulating layer IL10 can include silicon-based insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride.

[0210] The fourth wiring layer CL4, the fifth wiring layer CL5, and the via VIA can include metallic materials. For example, the fourth wiring layer CL4, the fifth wiring layer CL5, and the via VIA can include copper Cu. However, these materials are only examples, and the exemplary embodiments are not limited thereto.

[0211] The fourth wiring layer CL4 can be provided in the ninth insulating layer IL9. The fifth wiring layer CL5 can be provided in the tenth insulating layer IL10. The fourth wiring layer CL4 and the fifth wiring layer CL5 can be connected by the via VIA.

[0212] The deep node DN can be provided on the fifth insulating layer IL5, the second substrate 500, and the eighth insulating layer IL8. The deep node DN can be provided to penetrate the second substrate 500 and can connect one or more transistors provided on the first surface 500a of the second substrate 500 to the fourth wiring layer CL4 and the fifth wiring layer CL5 provided on the second surface 500b of the second substrate 500.

[0213] The second chip 2000 can be connected to the third chip 3000. The third chip 3000 can include a third substrate 700 and a fourth wiring region 80. Transistors constituting a logic circuit can be provided on the first surface 700a of the third substrate 700, and a plurality of wirings LCL can be provided in the fourth wiring region 80. The fourth wiring region 80 can include an insulating film LIL, and the plurality of wirings LCL can be connected to the wirings of the second chip 2000 through vias.

[0214] In an image sensor, at least one of the conversion transistors RG, HDG, and LDG, the source follower transistor SF, and the selection transistor SL may be disposed on the first surface 500a of the second substrate 500, and at least one of the wirings connected to the conversion transistors RG, HDG, and LDG, the source follower transistor SF, and the selection transistor SL may be disposed on the second surface 500b of the second substrate 500. The conversion transistors RG, HDG, and LDG, the source follower transistor SF, the selection transistor SL, and the wiring may be connected through the deep node DN penetrating the second substrate 500.

[0215] As described above, since each transistor and wiring are disposed on different surfaces, the length of the floating diffusion region connected between the first chip 1000 and the second chip 2000 can be shortened. That is, in Figure 26 , when the fourth wiring layer CL4 and the fifth wiring layer CL5 are disposed on the first surface 500a of the second substrate 500, the distance between the first surface 400a of the first substrate 400 and the first surface 500a of the second substrate 500 increases by the thickness of the fourth wiring layer CL4, the fifth wiring layer CL5, and the insulating layer for insulating them. However, since the fourth wiring layer CL4 and the fifth wiring layer CL5 are disposed on the second surface 500b of the second substrate 500, the image sensor according to the exemplary embodiment can reduce the distance between the first surface 400a of the first substrate 400 and the first surface 500a of the second substrate 500. Accordingly, the length of the floating diffusion region FD connecting the first chip 1000 and the second chip 2000 can be shortened, and the conversion gain CG can be improved.

[0216] However, this is merely an example, and the conversion transistors RG, HDG, and LDG, the source follower transistor SF, and the selection transistor SL may be disposed on the second surface 500b of the second substrate 500. In this case, the deep node DN may not be included.

[0217] In addition, the fourth wiring layer CL4 and the fifth wiring layer CL5 may be disposed on the first surface 500a of the second substrate 500, and in this case, the deep node DN may not be included.

[0218] As described above, in the image sensor according to the exemplary embodiment, one color filter is disposed on 36 photoelectric conversion elements, and the floating diffusion regions connecting 12 photoelectric conversion elements or nine photoelectric conversion elements are formed to form one pixel circuit and one analog-to-digital converter. In this regard, 36 photoelectric conversion elements provided with the same color filter are connected to three analog-to-digital converters or four analog-to-digital converters, which can output various pixel signals and reduce noise.

[0219] In some embodiments, according to the exemplary embodiment, byFigure 1 Each of the components represented by the boxes shown can be implemented as various numbers of hardware and / or firmware structures that perform the respective functions described above. For example, at least one of these components can include various hardware components, including digital circuits, programmable or non-programmable logic devices or arrays, application specific integrated circuits (ASICs), transistors, capacitors, logic gates, or other circuitry using direct circuit structures such as memories, processors, logic circuits, lookup tables, etc., which can perform the corresponding functions by controlling one or more microprocessors or other control devices. Moreover, at least one of these components can also include a processor such as a central processing unit (CPU), microprocessor, etc. that performs the corresponding function or can be implemented by a processor. The functional aspects of the example embodiments can be implemented as algorithms executed on one or more processors. In addition, the components, elements, modules, or units represented by the boxes or processing steps can employ any number of related technologies for electronic construction, signal processing and / or control, data processing, etc.

[0220] Although aspects of the example embodiments have been specifically shown and described, it will be understood that various changes in form and detail can be made therein without departing from the spirit and scope of the appended claims.

Claims

1. An image sensor, comprising: A first substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; as well as a color filter disposed on the second surface of the first substrate and including a first color filter, a second color filter and a third color filter, wherein the first color filter is disposed on 36 photoelectric conversion elements among the plurality of photoelectric conversion elements, The 36 photoelectric conversion elements are arranged in six columns extending along a first direction and six rows extending along a second direction intersecting the first direction, and The floating diffusion regions of 12 of the 36 photoelectric conversion elements are connected to each other.

2. The image sensor according to claim 1, wherein: Each of the second color filter and the third color filter is disposed on 36 photoelectric conversion elements among the plurality of photoelectric conversion elements.

3. The image sensor according to claim 1, wherein: The 12 photoelectric conversion elements are arranged in two columns extending along the first direction and in six rows extending along the second direction.

4. The image sensor according to claim 1, wherein: The 12 photoelectric conversion elements are arranged in six columns extending along the first direction and in two rows extending along the second direction.

5. The image sensor according to claim 1, further comprising a pixel separation pattern, in, The 12 photoelectric conversion elements are separated into groups of four by the pixel separation pattern.

6. The image sensor according to claim 5, wherein: The first substrates of four photoelectric conversion elements among the 12 photoelectric conversion elements are connected to each other.

7. The image sensor according to claim 1, wherein: The 12 photoelectric conversion elements are separated one by one by a pixel separation pattern.

8. The image sensor according to claim 7, wherein: The floating diffusion regions provided in each of the 12 photoelectric conversion elements are connected to each other through a connection pad.

9. The image sensor according to claim 1, wherein: The floating diffusion regions of the 12 photoelectric conversion elements are electrically connected to at least three conversion transistors and one or more source follower transistors. 10 . The image sensor according to claim 1 , further comprising a microlens provided on four photoelectric conversion elements among the 36 photoelectric conversion elements.

11. The image sensor according to claim 1, further comprising a microlens provided on one of the 36 photoelectric conversion elements. 12 . The image sensor according to claim 1 , further comprising a microlens provided on two of the 36 photoelectric conversion elements.

13. The image sensor according to claim 1, further comprising: a second substrate overlapping the first substrate; as well as a transistor disposed on the second substrate, The transistor disposed on the second substrate is electrically connected to the floating diffusion region.

14. An image sensor, comprising: a substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; as well as a color filter disposed on the second surface of the substrate and including a first color filter, a second color filter, a third color filter, and a fourth color filter, the first color filter and the fourth color filter corresponding to a common color, wherein the first color region of the image sensor includes the first color filter, the first color filter is arranged on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements, each of the three groups provided with the first color filter includes 12 photoelectric conversion elements arranged in six columns extending along the first direction and two rows extending along the second direction, wherein for each of the three groups provided with the first color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be connected in common, wherein the second color region of the image sensor includes the second color filter, the second color filter is arranged on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements, each of the three groups provided with the second color filter includes 12 photoelectric conversion elements arranged in six columns extending along the first direction and two rows extending along the second direction, wherein for each of the three groups provided with the second color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be connected in common, wherein the third color region of the image sensor includes the third color filter, the third color filter is disposed on 36 photoelectric conversion elements divided into three groups among the plurality of photoelectric conversion elements, each of the three groups provided with the third color filter includes 12 photoelectric conversion elements arranged in six columns extending along the first direction and two rows extending along the second direction, wherein for each of the three groups provided with the third color filter, the floating diffusion regions of the 12 photoelectric conversion elements are configured to be connected in common, and In which, the fourth color area of ​​the image sensor includes the fourth color filter, and the fourth color filter is arranged on 36 photoelectric conversion elements among the multiple photoelectric conversion elements and is divided into three groups, and each of the three groups provided with the fourth color filter includes 12 photoelectric conversion elements arranged in six columns extending along the first direction and two rows extending along the second direction, wherein, for each of the three groups provided with the fourth color filter, the floating diffusion areas of the 12 photoelectric conversion elements are configured to be connected in common. 15 . The image sensor of claim 14 , further comprising nine microlenses disposed in the first color region, nine microlenses disposed in the second color region, nine microlenses disposed in the third color region, and nine microlenses disposed in the fourth color region.

16. The image sensor according to claim 14, further comprising a plurality of micro lenses, in, The number of microlenses in the first color area and the fourth color area is different from the number of microlenses in the second color area and the third color area.

17. An image sensor comprising: a substrate including a first surface and a second surface opposite to each other, and a plurality of photoelectric conversion elements between the first surface and the second surface; as well as a color filter disposed on the second surface of the substrate and including a first color filter, a second color filter and a third color filter, wherein the first color filter is disposed on 36 photoelectric conversion elements among the plurality of photoelectric conversion elements, The 36 photoelectric conversion elements are arranged in six columns extending along a first direction and six rows extending along a second direction intersecting the first direction, and The floating diffusion regions of nine photoelectric conversion elements among the 36 photoelectric conversion elements are connected to each other.

18. The image sensor according to claim 17, wherein: The nine photoelectric conversion elements are arranged in three columns extending along the first direction and in three rows extending along the second direction.

19. The image sensor according to claim 17, wherein: The floating diffusion regions of the nine photoelectric conversion elements are electrically connected to at least three conversion transistors and one or more source follower transistors.

20. The image sensor according to claim 17, further comprising a microlens disposed on the nine photoelectric conversion elements.

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