Light emitting diode for improving ohmic contact and preparation method thereof
By introducing the InGaN layer into the p-type ohmic contact layer of the deep ultraviolet light emitting diode, Mg atoms are activated and hole concentration is improved, the problem of high contact resistance of the p-type ohmic contact layer is solved, and performance improvement is achieved.
Patent Information
- Application Number
- CN202510174631.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-18
- Publication Date
- 2025-06-24
AI Technical Summary
In deep ultraviolet light emitting diodes, after Mg is doped into AlGaN material as a p-type dopant, it is necessary to overcome higher energy barriers, resulting in lower hole concentration in the p-type ohmic contact layer and higher contact resistance.
By introducing an InGaN layer into the p-type ohmic contact layer, the InGaN layer is used to facilitate the activation of Mg atoms, so that a large number of Mg atoms in the first p-type AlGaN layer migrates to the InGaN surface layer, thereby increasing the hole concentration of the InGaN surface layer and reducing the contact resistance of the p-type ohmic contact layer.
The hole concentration of the p-type ohmic contact layer surface is improved, the contact resistance is reduced, and the performance of the light emitting diode is improved.
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Figure CN120201827A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of optoelectronic manufacturing technologies, and particularly to a light-emitting diode for improving ohmic contact and a preparation method thereof. Background Art
[0002] As a highly influential new product in the optoelectronic industry, a light-emitting diode (abbreviation: LED) has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption, etc., and is widely used in fields such as lighting, display screens, signal lights, backlights, toys, etc.
[0003] In related technologies, a deep ultraviolet light-emitting diode generally includes an n-type layer, a multi-quantum well layer, and a p-type layer stacked in sequence. The p-type layer generally includes multiple film layers, and the film layer farthest from the n-type layer in the p-type layer is a p-type ohmic contact layer. Among them, the p-type ohmic contact layer generally includes an AlGaN layer doped with Mg.
[0004] However, after Mg is doped as a p-type dopant into the AlGaN material, it needs to overcome a relatively high energy barrier to become an effective acceptor impurity, thereby providing holes as carriers. This results in a low hole concentration in the p-type ohmic contact layer, leading to an increase in the contact resistance of the p-type ohmic contact layer. Summary of the Invention
[0005] Embodiments of the present disclosure provide a light-emitting diode for improving ohmic contact and a preparation method thereof, which can improve and increase the hole concentration on the surface layer of the p-type ohmic contact layer and reduce the contact resistance of the p-type ohmic contact layer. The technical solution is as follows:
[0006] On the one hand, embodiments of the present disclosure provide an external light-emitting diode, which includes an n-type layer, a multi-quantum well layer, and a p-type ohmic contact layer stacked in sequence, and the p-type ohmic contact layer includes a first p-type AlGaN layer and an InGaN layer stacked in sequence.
[0007] In an implementation manner of the embodiments of the present disclosure, the p-type ohmic contact layer further includes a second p-type AlGaN layer, and the first p-type AlGaN layer, the second p-type AlGaN layer, and the InGaN layer are stacked in sequence; the first p-type AlGaN layer is a p-type Al x G 1-x N layer, the second p-type AlGaN layer is a p-type Al y G 1-y N layer, where x > y.
[0008] In another implementation manner of the embodiment of the present disclosure, the light-emitting diode further includes a p-type layer, and the p-type layer is located between the multi-quantum well layer and the p-type ohmic contact layer; the p-type layer is a p-type AlGaN layer, and the Al / N component content ratio in the p-type layer is greater than the Al / N component content ratio in the first p-type AlGaN layer.
[0009] In another implementation manner of the embodiment of the present disclosure, the thickness of the first p-type AlGaN layer is 4 nm to 6 nm, and the thickness of the InGaN layer is 2 nm to 3 nm.
[0010] In another implementation manner of the embodiment of the present disclosure, the n-type layer includes a first n-type AlGaN layer and a second n-type AlGaN layer stacked in sequence. Both the first n-type AlGaN layer and the second n-type AlGaN layer are Si-doped, and the Si doping concentration of the first n-type AlGaN layer is higher than the Si doping concentration of the second n-type AlGaN layer.
[0011] On the other hand, the embodiment of the present disclosure provides a method for manufacturing a light-emitting diode. The manufacturing method includes: providing a substrate; forming an n-type layer on the substrate; forming a multi-quantum well layer on the n-type layer; forming a p-type ohmic contact layer on the multi-quantum well layer, and the p-type ohmic contact layer includes a first p-type AlGaN layer and an InGaN layer stacked in sequence.
[0012] In another implementation manner of the embodiment of the present disclosure, forming the p-type ohmic contact layer on the multi-quantum well layer includes: reducing the temperature of the reaction chamber to 840 °C to 870 °C, controlling the growth pressure to be 100 mbar, introducing MgCp2, TMAl, TMGa, NH3 and H2, and growing the first p-type AlGaN layer; stopping introducing H2, and introducing N2 and NH3 into the reaction chamber, and controlling the N2:NH3 gas flow ratio to be 0.6:0.4 to 0.5:0.5, reducing the temperature of the reaction chamber to 795 °C to 800 °C, and annealing for 2 min to 3 min; keeping stopping introducing H2, and introducing N2 and NH3 into the reaction chamber, and controlling the N2:NH3 gas ratio to be 0.6:0.4 to 0.5:0.5, keeping the temperature of the reaction chamber constant at 795 °C to 800 °C, introducing TMIn and TMGa, and growing the InGaN layer; reducing the temperature of the reaction chamber to 750 °C, stopping introducing NH3, and annealing with pure N2 for 5 min to 10 min.
[0013] In another implementation manner of the embodiment of the present disclosure, when growing the first p-type AlGaN layer, controlling the MgCp2:TMAl:TMGa flow ratio to be 0.75:0.05:0.2 to 0.7:0.1:0.2.
[0014] In another implementation manner of the embodiments of the present disclosure, when growing the InGaN layer, the flow ratio of TMIn:TMGa is controlled to be 0.9:0.1 to 0.8:0.2.
[0015] In another implementation manner of the embodiments of the present disclosure, the thickness of the first p-type AlGaN layer is 4 nm to 6 nm, and the thickness of the InGaN layer is 2 nm to 3 nm.
[0016] The beneficial effects brought by the technical solutions provided by the embodiments of the present disclosure at least include:
[0017] The light-emitting diode provided by the embodiments of the present disclosure includes an n-type layer, a multi-quantum well layer, and a p-type ohmic contact layer stacked in sequence. Among them, the p-type ohmic contact layer includes a first p-type AlGaN layer and an InGaN layer stacked in sequence. Compared with the related art that uses a single-layer AlGaN layer as the ohmic contact layer, an InGaN layer is further added on the p-type AlGaN layer in the embodiments of the present disclosure. The InGaN layer is beneficial to the activation of Mg atoms, enabling a large number of Mg atoms in the first p-type AlGaN layer to migrate to the surface layer of the InGaN layer, thereby increasing the hole concentration on the surface layer of the InGaN layer and reducing the contact resistance on the surface layer of the p-type ohmic contact layer. Description of the Drawings
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0019] Figure 1 It is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure;
[0020] Figure 2 It is a schematic structural diagram of another light-emitting diode provided by an embodiment of the present disclosure;
[0021] Figure 3 It is a flowchart of a preparation method of a light-emitting diode provided by an embodiment of the present disclosure;
[0022] Figure 4 It is a test comparison diagram of a light-emitting diode provided by an embodiment of the present disclosure.
[0023] The descriptions of the marks in the figures are as follows:
[0024] 10. Substrate;
[0025] 20. Buffer layer;
[0026] 30. N-type layer;
[0027] 40. Multiple quantum well layer;
[0028] 50. Electron blocking layer;
[0029] 60. p-type layer;
[0030] 70. p-type ohmic contact layer; 71. First p-type AlGaN layer; 72. Second p-type AlGaN layer; 73. InGaN layer. Detailed implementation manners
[0031] To make the objectives, technical solutions and advantages of the present disclosure clearer, the following will further describe the implementation manners of the present disclosure in detail with reference to the accompanying drawings.
[0032] Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meanings as understood by those of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", "third" and similar terms used in the specification and claims of the present patent application do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, the terms such as "a" or "an" do not denote a quantity limitation, but mean that there is at least one. The terms "comprising" or "including" and similar terms mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalents, and do not exclude other elements or items. The terms "connected" or "coupled" and similar terms are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", "top", "bottom", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationships may also change accordingly.
[0033] Figure 1 is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure. As Figure 1 shown, the light-emitting diode includes an n-type layer 30, a multiple quantum well layer 40 and a p-type ohmic contact layer 70 stacked in sequence, and the p-type ohmic contact layer 70 includes a first p-type AlGaN layer 71 and an InGaN layer 73 stacked in sequence.
[0034] The light-emitting diode provided by an embodiment of the present disclosure includes an n-type layer 30, a multi-quantum well layer 40, and a p-type ohmic contact layer 70 stacked in sequence. Among them, the p-type ohmic contact layer 70 includes a first p-type AlGaN layer 71 and an InGaN layer 73 stacked in sequence. Compared with using a single-layer AlGaN layer as the ohmic contact layer in the related art, an InGaN layer 73 is further added on the p-type AlGaN layer in the embodiment of the present disclosure. The InGaN layer 73 is beneficial to the activation of Mg atoms, enabling a large number of Mg atoms in the first p-type AlGaN layer 71 to migrate to the surface layer of the InGaN, thereby increasing the hole concentration on the surface layer of the InGaN and reducing the contact resistance on the surface layer of the p-type ohmic contact layer 70.
[0035] Figure 2 is a schematic structural diagram of another light-emitting diode provided by an embodiment of the present disclosure. As Figure 2 shown, the p-type ohmic contact layer 70 further includes a second p-type AlGaN layer 72, and the first p-type AlGaN layer 71, the second p-type AlGaN layer 72, and the InGaN layer 73 are stacked in sequence.
[0036] Among them, the first p-type AlGaN layer 71 is a p-type Al x G 1-x N layer, and the second p-type AlGaN layer 72 is a p-type Al y G 1-y N layer, where x > y.
[0037] In the above implementation, the Al component content of the first p-type AlGaN layer 71 is higher than that of the second p-type AlGaN layer 72. And the lower the Al component content, the narrower the energy gap of the p-type AlGaN layer, and the narrower the energy gap, the more conducive to accelerating the migration speed of Mg atoms to the InGaN layer 73. Therefore, by adding a second p-type AlGaN layer 72 with a narrower energy gap between the first p-type AlGaN layer 71 and the InGaN layer 73, more Mg atoms can migrate into the InGaN layer 73 faster.
[0038] Optionally, as Figure 1 shown, the light-emitting diode further includes a p-type layer 60, and the p-type layer 60 is located between the multi-quantum well layer 40 and the p-type ohmic contact layer 70.
[0039] Among them, the p-type layer 60 is a p-type AlGaN layer, and the Al / N component content ratio in the p-type layer 60 is greater than the Al / N component content ratio in the first p-type AlGaN layer 71.
[0040] In the p-type AlGaN layer, the larger the Al / N component content ratio, the higher the Al component in the AlGaN layer, and the corresponding increase in the bandgap width of the material, which reduces the hole concentration and mobility. Therefore, reducing the Al component content of the p-type AlGaN layer in the p-type ohmic contact layer 70 facilitates the migration of holes to the surface layer of the p-type ohmic contact layer 70, thereby reducing the contact resistance of the surface layer of the p-type ohmic contact layer 70.
[0041] Optionally, the thickness of the first p-type AlGaN layer 71 is 4 nm to 6 nm. If the thickness of the p-type AlGaN layer is too high, it will increase the path length of holes injected from the electrode to the active region and reduce the effective injection efficiency. Therefore, limiting the thickness of the first p-type AlGaN layer 71 within the above range can ensure the hole injection efficiency.
[0042] At the same time, a thinner p-type AlGaN layer can also reduce the resistance accumulation of the material itself, reducing power consumption and thermal loss.
[0043] Exemplarily, the thickness of the first p-type AlGaN layer 71 is 5 nm.
[0044] Optionally, the thickness of the InGaN layer 73 is 2 nm to 3 nm. By setting a very thin InGaN layer 73, it is easier to achieve a uniform distribution of In, avoid the formation of In-rich clusters, and improve the optical uniformity of the material.
[0045] Exemplarily, the thickness of the InGaN layer 73 is 2 nm.
[0046] Optionally, the n-type layer 30 includes a first n-type AlGaN layer and a second n-type AlGaN layer stacked in sequence. Both the first n-type AlGaN layer and the second n-type AlGaN layer are Si-doped, and the Si doping concentration of the first n-type AlGaN layer is higher than that of the second n-type AlGaN layer.
[0047] In the above implementation, the n-type layer 30 includes a first n-type AlGaN layer with a high doping concentration and a second n-type AlGaN layer with a low doping concentration. The first n-type AlGaN layer is doped with a high concentration of Si to compensate for the lattice mismatch between the AlGaN material and the substrate and reduce the dislocation density; the second n-type AlGaN layer is doped with a low concentration of Si to further suppress the stress accumulation during the growth process. Moderately reducing the doping concentration of the second n-type AlGaN layer can reduce the lattice distortion and interface defects caused by high-concentration Si doping and improve the material quality.
[0048] Exemplarily, the thickness of the first n-type AlGaN layer is 1800 nm to 2500 nm. For example, the thickness of the first n-type AlGaN layer is 2000 nm.
[0049] Exemplarily, the thickness of the second n-type AlGaN layer is 130 nm to 170 nm. For example, the thickness of the second n-type AlGaN layer is 150 nm.
[0050] By defining that the thickness of the first n-type AlGaN layer with a higher doping concentration is greater than the thickness of the second n-type AlGaN layer with a lower doping concentration, the lateral expansion of the current can be promoted, making the lateral current distribution more uniform. Moreover, the first n-type AlGaN layer with a higher doping concentration also has a stress buffering effect. By highly doping Si to compensate for the lattice mismatch between AlGaN and the substrate, the extension of dislocations into the upper layer can be reduced. The thickness of the second n-type AlGaN layer with a lower doping concentration is relatively thin, which can reduce the ionized impurity scattering caused by the high concentration of Si and improve the electron mobility.
[0051] Optionally, as Figure 1 shown, the light-emitting diode further includes a substrate 10, and the n-type layer 30, the multi-quantum well layer 40, the p-type layer 60, and the p-type ohmic contact layer 70 are all stacked on the substrate 10.
[0052] Exemplarily, the substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.
[0053] As an example, in the embodiments of the present disclosure, the substrate is a sapphire substrate. The sapphire substrate is a commonly used substrate with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a sapphire flat substrate.
[0054] Optionally, as Figure 1 shown, the light-emitting diode further includes an electron blocking layer 50, and the electron blocking layer 50 is located between the multi-quantum well layer 40 and the p-type layer 60. Setting the electron blocking layer 50 can inhibit electrons from entering the p-type layer 60, avoid non-radiative recombination, and reduce the leakage current.
[0055] Exemplarily, the electron blocking layer 50 can be an AlN layer, and the thickness of the electron blocking layer 50 is 6 nm to 9 nm. For example, the thickness of the electron blocking layer 50 is 7 nm.
[0056] By setting the thickness of the electron blocking layer 50 within the above range, efficient electron blocking can be achieved, the probability of electrons spilling out of the active region can be reduced, and the radiative recombination efficiency can be improved. Moreover, it can reduce the band tilt, promote the balance of hole injection, and inhibit the efficiency decay.
[0057] Optionally, the multi-quantum well layer 40 includes alternately stacked AlGaN quantum well layers and AlGaN quantum barrier layers.
[0058] Among them, the Ga component content of the AlGaN quantum well layer is higher than the Ga component content in the AlGaN quantum barrier layer.
[0059] The high Ga composition in the AlGaN quantum well layer can offset the strong spontaneous polarization and piezoelectric polarization effects in AlGaN, reduce the built-in electric field strength in the quantum well, and alleviate the problem of spatial separation of electrons and holes. The low Ga composition in the AlGaN quantum barrier layer will form a larger bandgap difference, enhance the quantum confinement effect on electrons and holes, reduce carrier leakage, and increase the probability of radiative recombination.
[0060] Exemplarily, the thickness of the AlGaN quantum well layer is 1 nm to 5 nm. For example, the thickness of the AlGaN quantum well layer is 3 nm.
[0061] Exemplarily, the thickness of the AlGaN quantum barrier layer is 5 nm to 10 nm. For example, the thickness of the AlGaN quantum barrier layer is 8 nm.
[0062] Exemplarily, the multi-quantum well layer 40 includes 5 AlGaN quantum well layers and 5 AlGaN quantum barrier layers stacked alternately.
[0063] Optionally, as Figure 1 shown, a buffer layer 20 is further included between the substrate and the n-type layer 30.
[0064] Among them, an AlN layer and an AlGaN layer are stacked in sequence.
[0065] Exemplarily, the AlN layer may include an AlN low-temperature layer and an AlN high-temperature layer formed on the substrate in sequence.
[0066] Among them, the thickness of the AlN low-temperature layer is 10 nm to 50 nm. If the thickness of the AlN low-temperature layer is set too thin, the effect of reducing the dislocation defects of the subsequent grown n-type AlGaN layer is relatively small, and the improvement effect on the luminous efficiency of the deep ultraviolet light-emitting diode is not obvious. If the thickness of the AlN low-temperature layer is set too thick, it will increase the absorption of light by the AlN low-temperature layer.
[0067] As an example, in the embodiments of the present disclosure, the thickness of the AlN low-temperature layer is 10 nm.
[0068] Among them, the thickness of the AlN high-temperature layer is 3.5 μm to 3.9 μm. The thickness of the AlN high-temperature layer will affect the quality of the light-emitting diode. If the thickness of the AlN high-temperature layer is too thin, the surface of the AlN high-temperature layer will be relatively loose and rough, and it cannot provide a good template for the growth of subsequent structures. In this thickness range, the surface of the AlN high-temperature layer is relatively dense and flat, which is beneficial to the growth of subsequent structures.
[0069] As an example, in the embodiments of the present disclosure, the thickness of the AlN high-temperature layer is 3.5 μm.
[0070] Exemplarily, the AlGaN layer is located between the AlN layer and the n-type layer 30. The AlGaN layer is undoped, and the thickness of the AlGaN layer is 460 nm to 520 nm.
[0071] Figure 3 is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure. This method is used to manufacture Figure 1 or Figure 2 the light-emitting diode shown. As Figure 3 shown, this manufacturing method includes:
[0072] Step S11: Provide a substrate.
[0073] Step S12: Form an n-type layer 30 on the substrate.
[0074] Step S13: Form a multi-quantum well layer 40 on the n-type layer 30.
[0075] Step S14: Form a p-type ohmic contact layer 70 on the multi-quantum well layer 40.
[0076] Among them, the p-type ohmic contact layer 70 includes a first p-type AlGaN layer 71 and an InGaN layer 73 stacked in sequence.
[0077] By designing the p-type ohmic contact layer 70 of the light-emitting diode as a first p-type AlGaN layer 71 and an InGaN layer 73 stacked in sequence. Compared with the related art that uses a single-layer AlGaN layer as the ohmic contact layer, in the embodiment of the present disclosure, an additional InGaN layer 73 is added on the p-type AlGaN layer. The InGaN layer 73 is beneficial to the activation of Mg atoms, enabling a large number of Mg atoms in the first p-type AlGaN layer 71 to migrate to the surface layer of the InGaN, thereby increasing the hole concentration on the surface layer of the InGaN and reducing the contact resistance on the surface layer of the p-type ohmic contact layer 70.
[0078] In step S11, the substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.
[0079] As an example, in the embodiment of the present disclosure, the substrate is a sapphire substrate. The sapphire substrate is a commonly used substrate with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a sapphire flat substrate.
[0080] Optionally, the sapphire substrate can be pre-treated by placing the sapphire substrate in an MOCVD reaction chamber and baking the sapphire substrate for 12 minutes to 18 minutes. As an example, in the embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.
[0081] Specifically, the baking temperature can be 1000°C to 1200°C, and the pressure in the MOCVD reaction chamber during baking can be 100 mbar to 200 mbar.
[0082] Before step S12, it further includes: epitaxially growing an AlN layer and an AlGaN layer on the substrate.
[0083] Among them, the AlN layer includes an AlN low-temperature layer and an AlN high-temperature layer.
[0084] The thickness of the AlN low-temperature layer is 10 nm to 50 nm. If the thickness of the AlN low-temperature layer is set too thin, the effect of reducing the dislocation defects of the subsequently grown n-type AlGaN layer is relatively small, and the effect of improving the luminous efficiency of the deep ultraviolet light-emitting diode is not obvious. If the thickness of the AlN low-temperature layer is set too thick, it will increase the absorption of light by the AlN low-temperature layer.
[0085] As an example, in the embodiments of the present disclosure, the thickness of the AlN low-temperature layer is 10 nm.
[0086] The thickness of the AlN high-temperature layer is 3.5 μm to 3.9 μm. The thickness of the AlN high-temperature layer will affect the quality of the light-emitting diode. If the thickness of the AlN high-temperature layer is too thin, the surface of the AlN high-temperature layer will be relatively loose and rough, and it cannot provide a good template for the growth of subsequent structures. In this thickness range, the surface of the AlN high-temperature layer is relatively dense and flat, which is beneficial to the growth of subsequent structures.
[0087] As an example, in the embodiments of the present disclosure, the thickness of the AlN high-temperature layer is 3.5 μm.
[0088] In the embodiments of the present disclosure, the AlN low-temperature layer is grown by PVD (Physical Vapor Deposition), and the AlN high-temperature layer is grown by MOCVD (Metal Organic Chemical Vapor Deposition).
[0089] Optionally, when forming the AlN low-temperature layer, the growth pressure is 50 mbar to 100 mbar. The growth pressure will affect sputtering, and a better-quality AlN low-temperature layer can be grown in this pressure range.
[0090] Exemplarily, in the embodiments of the present disclosure, the growth pressure of the AlN low-temperature layer is 60 mbar.
[0091] Optionally, when forming the AlN low-temperature layer, the growth temperature is 800°C to 1200°C. Exemplarily, in the embodiments of the present disclosure, the growth temperature of the AlN low-temperature layer is 1100°C.
[0092] Optionally, when forming the low-temperature AlN layer, ammonia gas and trimethylaluminum are used as reactants, and the V / III molar ratio is from 350 to 3500. Exemplarily, in the embodiments of the present disclosure, the V / III molar ratio is 3000.
[0093] Optionally, when growing the low-temperature AlN layer, the growth time is from 800 s to 1200 s. Exemplarily, in the embodiments of the present disclosure, the growth time of the low-temperature AlN layer is 1000 s.
[0094] Optionally, when forming the high-temperature AlN layer, the growth pressure is from 30 mbar to 100 mbar. The growth pressure will affect sputtering, and a high-quality high-temperature AlN layer can be grown within this pressure range.
[0095] Exemplarily, in the embodiments of the present disclosure, the growth pressure of the high-temperature AlN layer is 50 mbar.
[0096] Optionally, when forming the high-temperature AlN layer, the growth temperature is from 1300 °C to 1500 °C. Exemplarily, in the embodiments of the present disclosure, the growth temperature of the high-temperature AlN layer is 1350 °C.
[0097] Optionally, when forming the high-temperature AlN layer, ammonia gas and trimethylaluminum are used as reactants, and the V / III molar ratio is from 200 to 500. Exemplarily, in the embodiments of the present disclosure, the V / III molar ratio is 300.
[0098] Optionally, when growing the high-temperature AlN layer, the growth time is from 3000 s to 6000 s. Exemplarily, in the embodiments of the present disclosure, the growth time of the high-temperature AlN layer is 5000 s.
[0099] Optionally, when growing the AlGaN layer, an undoped AlGaN layer with a thickness of 460 nm to 520 nm is deposited on the AlN layer.
[0100] The process of forming the n-type layer 30 in step S12 may include: epitaxially growing a first n-type AlGaN layer and a second n-type AlGaN layer on the AlGaN layer in sequence.
[0101] Wherein, the Si doping concentration of the first n-type AlGaN layer is higher than that of the second n-type AlGaN layer.
[0102] Optionally, the growth temperature of the first n-type AlGaN layer is from 1000 °C to 1100 °C. As an example, in the embodiments of the present disclosure, the growth temperature of the first n-type AlGaN layer is 1060 °C.
[0103] Optionally, the growth pressure of the first n-type AlGaN layer can be from 80 mbar to 110 mbar. As an example, in the embodiments of the present disclosure, the growth pressure of the first n-type AlGaN layer is 100 mbar.
[0104] Optionally, the growth temperature of the second n-type AlGaN layer is from 1000 °C to 1100 °C. As an example, in the embodiments of the present disclosure, the growth temperature of the second n-type AlGaN layer is 1060 °C.
[0105] Optionally, the growth pressure of the second n-type AlGaN layer can be from 80 mbar to 110 mbar. As an example, in the embodiments of the present disclosure, the growth pressure of the second n-type AlGaN layer is 100 mbar.
[0106] Step S13 may include: growing a multi-quantum well layer 40 on the n-type layer 30.
[0107] In implementation, the multi-quantum well layer 40 may include multiple layers of Al x Ga 1-x N quantum well layers and multiple layers of Al y Ga 1- y N quantum barrier layers, where 0 < x < y < 1.
[0108] Optionally, the number of alternating stacks of the Al x Ga 1-x N quantum well layers and the Al y Ga 1-y N quantum barrier layers can be from 3 to 8. Exemplarily, in the embodiments of the present disclosure, the number of alternating stacks of the Al x Ga 1-x N quantum well layers and the Al y Ga 1-y N quantum barrier layers is 5.
[0109] Optionally, the thickness of the Al x Ga 1-x N quantum well layer can be from 2 nm to 4 nm. The thickness of the Al y Ga 1-y N quantum barrier layer can be from 5 nm to 10 nm.
[0110] Exemplarily, in the embodiments of the present disclosure, the thickness of the Al x Ga 1-x N quantum well layer is 3 nm. The thickness of the Al y Ga 1-y N quantum barrier layer is 8 nm.
[0111] Before step S14, it may further include: growing an electron blocking layer 50 and a p-type layer 60 on the multi-quantum well layer 40.
[0112] Exemplarily, the electron blocking layer 50 may be an AlN layer, and the thickness of the electron blocking layer 50 is 6 nm to 9 nm. For example, the thickness of the electron blocking layer 50 is 7 nm.
[0113] Exemplarily, the p-type layer 60 is a p-type AlGaN layer, and the Al / N component content ratio in the p-type layer 60 is greater than the Al / N component content ratio in the first p-type AlGaN layer 71.
[0114] Exemplarily, the thickness of the p-type layer 60 is 20 nm to 30 nm.
[0115] Step S14 may include the following steps:
[0116] First, lower the temperature of the reaction chamber to 840 °C to 870 °C, control the growth pressure to be 100 mbar, introduce MgCp2, TMAl, TMGa, NH3 and H2, and grow the first p-type AlGaN layer 71.
[0117] Exemplarily, control the MgCp2:TMAl:TMGa flow ratio to be 0.75:0.05:0.2 to 0.7:0.1:0.2.
[0118] In the above implementation, using pure H2 as the carrier gas to grow the first p-type AlGaN layer 71 with a high Mg component can obtain a p-type AlGaN layer with a higher crystal quality and effectively inhibit the self-compensation effect of Mg.
[0119] Exemplarily, the thickness of the first p-type AlGaN layer 71 is 4 nm to 6 nm.
[0120] Then, stop introducing H2, introduce N2 and NH3 into the reaction chamber, and control the N2:NH3 gas flow ratio to be 0.6:0.4 to 0.5:0.5. Lower the temperature of the reaction chamber to 795 °C to 800 °C and anneal for 2 min to 3 min.
[0121] Since Mg atoms are prone to form Mg-H complexes with H radicals in the carrier gas during the growth process, the complexes will passivate the Mg atoms, making it difficult for the Mg atoms to be activated and ionized. Therefore, after the growth of the first p-type AlGaN layer 71 with pure H2 is completed, first close H2, and at the same time introduce N2 and NH3, and control the N2:NH3 gas ratio within the above range; lower the temperature to 795 °C to 800 °C and anneal for 2 min to 3 min, which can break the Mg-H bond.
[0122] Next, stop introducing H2, introduce N2 and NH3 into the reaction chamber, control the N2:NH3 gas ratio within the range of 0.6:0.4 to 0.5:0.5, keep the temperature of the reaction chamber constant at 795°C to 800°C, introduce TMIn and TMGa, and grow the InGaN layer 73.
[0123] Exemplarily, the thickness of the InGaN layer 73 is 2 nm to 3 nm.
[0124] Keep H2 closed; introduce N2 and NH3, control the N2:NH3 gas ratio within the above range; keep the temperature constant at 795°C to 800°C; introduce TMIn and TMGa, and control the TMIn:TMGa flow ratio within the above range, grow the InGaN layer 73 with a high In composition and a thickness of 2 nm to 3 nm; matching with the InGaN thin layer with a high In composition is beneficial to the activation of Mg atoms, enabling a large number of Mg atoms to migrate to the surface layer of InGaN, increasing the hole concentration on the surface layer of InGaN, and thus reducing the contact resistance of the p-type ohmic contact layer 70.
[0125] Finally, lower the temperature of the reaction chamber to 750°C, stop introducing NH3, and anneal with pure N2 for 5 min to 10 min.
[0126] Anneal in a nitrogen atmosphere to complete the growth of the light-emitting diode. Then turn off the heating system and the gas supply system, and wait for the temperature of the reaction chamber to drop to room temperature.
[0127] In specific implementation, the embodiments of the present disclosure can use high-purity H2 or / and N2 as the carrier gas, TEGa or TMGa as the Ga source, TMIn as the In source, SiH4 as the n-type dopant, TMAl as the aluminum source, and Cp2Mg as the p-type dopant.
[0128] Figure 4 It is a test comparison diagram of a light-emitting diode provided by an embodiment of the present disclosure. Figure 4 The upper middle figure is the test diagram of the light-emitting diode in the related art. Figure 4 The lower middle figure is the test diagram of a light-emitting diode provided by an embodiment of the present disclosure.
[0129] As Figure 4 shown, the voltage of the light-emitting diode in the related art is 10.188 V, while the voltage of the light-emitting diode provided by the embodiment of the present disclosure is 9.788 V. It can be seen that compared with the light-emitting diode in the related art, the designed p-type ohmic contact layer 70 in the embodiment of the present disclosure reduces the voltage by 0.389 V. Therefore, the light-emitting diode of the embodiment of the present disclosure can improve the ohmic contact effect of the p-type layer 60 of the deep ultraviolet light-emitting diode.
[0130] The above is not any form of limitation to the present disclosure. Although the present disclosure has been disclosed as above through embodiments, it is not intended to limit the present disclosure. Any person skilled in the art can make some changes or modifications to equivalent embodiments of equivalent changes by using the technical content disclosed above within the scope of the technical solution of the present disclosure. However, as long as it does not depart from the content of the technical solution of the present disclosure, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present disclosure still fall within the scope of the technical solution of the present disclosure.
Claims
1. A light emitting diode, characterized in that: The light emitting diode comprises an n-type layer (30), a multi-quantum well layer (40) and a p-type ohmic contact layer (70) which are stacked in sequence, and the p-type ohmic contact layer (70) comprises a first p-type AlGaN layer (71) and an InGaN layer (73) which are stacked in sequence.
2. The light emitting diode according to claim 1, characterized in that: The p-type ohmic contact layer (70) further comprises a second p-type AlGaN layer (72), wherein the first p-type AlGaN layer (71), the second p-type AlGaN layer (72) and the InGaN layer (73) are stacked in sequence; The first p-type AlGaN layer (71) is a p-type Al x G 1-x N layer, the second p-type AlGaN layer (72) is a p-type Al y G 1-y N layers, x>y.
3. The light emitting diode according to claim 1, characterized in that: The light emitting diode further comprises a p-type layer (60), wherein the p-type layer (60) is located between the multi-quantum well layer (40) and the p-type ohmic contact layer (70); The p-type layer (60) is a p-type AlGaN layer, and the Al / N component content ratio in the p-type layer (60) is greater than the Al / N component content ratio in the first p-type AlGaN layer (71).
4. The light emitting diode according to any one of claims 1 to 3, characterized in that: The thickness of the first p-type AlGaN layer (71) is 4 nm to 6 nm, and the thickness of the InGaN layer (73) is 2 nm to 3 nm.
5. The light emitting diode according to any one of claims 1 to 3, characterized in that: The n-type layer (30) comprises a first n-type AlGaN layer and a second n-type AlGaN layer stacked in sequence, the first n-type AlGaN layer and the second n-type AlGaN layer are both Si-doped, and the Si doping concentration of the first n-type AlGaN layer is higher than the Si doping concentration of the second n-type AlGaN layer.
6. A method for preparing a light emitting diode, characterized in that: The preparation method comprises: providing a substrate; forming an n-type layer on the substrate; forming a multi-quantum well layer on the n-type layer; A p-type ohmic contact layer is formed on the multi-quantum well layer, wherein the p-type ohmic contact layer includes a first p-type AlGaN layer and an InGaN layer stacked in sequence.
7. The preparation method according to claim 6, characterized in that: Forming a p-type ohmic contact layer on the multi-quantum well layer comprises: The temperature of the reaction chamber is lowered to 840° C. to 870° C., the growth pressure is controlled to be 100 mbar, and MgCp2, TMAl, TMGa, NH3 and H2 are introduced to grow the first p-type AlGaN layer; Stop introducing H2, and introduce N2 and NH3 into the reaction chamber, and control the N2:NH3 gas flow ratio to be 0.6:0.4 to 0.5:0.5, lower the temperature of the reaction chamber to 795°C to 800°C, and anneal for 2min to 3min; Keep stopping the introduction of H2, and introduce N2 and NH3 into the reaction chamber, and control the N2:NH3 gas ratio to be 0.6:0.4 to 0.5:0.5, keep the temperature of the reaction chamber constant at 795° C. to 800° C., introduce TMIn and TMGa, and grow an InGaN layer; The temperature of the reaction chamber was lowered to 750°C, the introduction of NH3 was stopped, and annealing was performed with pure N2 for 5 to 10 minutes.
8. The preparation method according to claim 7, characterized in that: When growing the first p-type AlGaN layer, the flow ratio of MgCp2:TMAl:TMGa is controlled to be 0.75:0.05:0.2 to 0.7:0.1:0.
2.
9. The preparation method according to claim 7, characterized in that: When growing the InGaN layer, the TMIn:TMGa flow ratio is controlled to be 0.9:0.1 to 0.8:0.
2.
10. The preparation method according to any one of claims 6 to 9, characterized in that: The thickness of the first p-type AlGaN layer is 4 nm to 6 nm, and the thickness of the InGaN layer is 2 nm to 3 nm.