Method and device for detecting abnormal short circuit between different signals
By using abnormal short-circuit detection methods and devices on the printed circuit board of the switching power supply, abnormal short-circuit signal pins in the device to be tested are identified, which solves the short-circuit problem caused by pin density, and realizes automated detection and improves product pass rate.
Patent Information
- Application Number
- CN202311834387.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-27
- Publication Date
- 2025-06-27
AI Technical Summary
On the printed circuit board of the switching power supply, due to the dense pins, abnormal short connections are prone to occur between the pins, and manual inspections are difficult to fully check, resulting in abnormal products flowing to the client.
A method and device for detecting abnormal shorting between different signals is provided. By initializing the signal pin of the device to be tested into an input mode, using a high level signal to pull up the level, changing a single signal pin to an output mode and setting it to a low level, determining whether other signal pins are pulled down, and identifying an abnormal shorting signal pin based on the judgment result.
It realizes automatic abnormal short-circuit detection of each output signal pin of the device to be tested, improves the product's pass rate and avoids the flow of abnormal products to the client.
Smart Images
Figure CN120214533A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of switching power supply testing, and particularly to a method and device for detecting abnormal short circuits between different signals. Background Art
[0002] Currently, the pins of Dupont strips (pin headers) and connection terminals on printed circuit boards (PCBs) are becoming increasingly dense. Taking a switching power supply as an example, the current functional requirements for switching power supplies are also becoming increasingly complex. The client has more and more requirements for the power output signals. During the process of the signal output from the power supply interior to the output port, different PCBs are mostly connected in the form of Dupont strips (pin headers), and finally docked with the client machine in the form of connection terminals. Due to the large number of signals, the pins of Dupont strips (pin headers) and connection terminals are very dense.
[0003] The above-mentioned increasingly dense pins have high requirements for the production process, and it is easy for the pins to be short-circuited by solder bridging. In addition, due to the dense pins, manual inspection cannot completely detect the above-mentioned solder bridging situation, and some output signals are specified by the client and have no relation to the products themselves such as the power supply. This also results in the inability to detect the signal abnormalities in this part during the normal performance test of products such as the power supply, so that defective products finally flow to the client. Summary of the Invention
[0004] In view of this, this application provides a method and device for detecting abnormal short circuits between different signals to solve at least one of the above-mentioned problems.
[0005] To achieve the above object, this application adopts the following solutions:
[0006] According to the first aspect of this application, a method for detecting abnormal short circuits between different signals is provided. The device under test is connected to the microcontroller unit of the detection device through pin headers. The detection of abnormal short circuits between different signals includes: initializing all signal pins connected to the device under test in the microcontroller unit to the input mode; pulling the levels of all the signal pins to high level with a high-level signal; sequentially changing a single signal pin to the output mode and giving a low level to the signal pin in the output mode, and simultaneously judging whether the signals of other signal pins are pulled low; and identifying the signal pins with abnormal short circuits in the device under test based on the judgment result.
[0007] As an embodiment of this application, sequentially changing a single signal pin to the output mode and giving a low level to the signal pin in the output mode, and simultaneously judging whether the signals of other signal pins are pulled low in the above method includes:
[0008] Step a: Change the first signal pin to the output mode and set the first signal pin to low level;
[0009] Step b: Determine whether the high level on other signal pins is pulled low. If it is pulled low, go to Step c; otherwise, go to Step d.
[0010] Step c: Set the flag bit of the signal pin whose level is pulled low to 1, and at the same time set the flag bits of the first signal pin and the signal pins whose levels are not pulled low to 0; upload the flag bits of all signal pins to the host computer, then restore the first signal pin to the input mode, and then use the second signal pin as the first signal pin and return to Step a until the last detected signal pin is set to the output mode.
[0011] Step d: Set the flag bits of all signal pins to 0 and upload the flag bits of all signal pins to the host computer, then restore the first signal pin to the input mode, and then use the second signal pin as the first signal pin and return to Step a until the last detected signal pin is set to the output mode. As an embodiment of the present application, the method for identifying abnormally short-circuited signal pins based on the judgment result includes: the host computer reads the flag bits of all the signal pins; compares the read flag bits with the flag bits preset in the program; and identifies the abnormally short-circuited signal pins based on the comparison result.
[0012] As an embodiment of the present application, the method for comparing the read flag bits with the flag bits preset in the program and identifying the abnormally short-circuited signal pins in the device under test based on the comparison result includes: comparing the read flag bits with the corresponding flag bits preset in the program bit by bit, where all bits in the flag bits preset in the program are 1; determining whether there are consistent bits during the bit-by-bit comparison. If so, increment the counter by 1; after the bit-by-bit comparison is completed, determine whether the counter is greater than 1. If so, report an error and report all abnormally short-circuited lines at the same time. If not, display a prompt indicating that the device under test is normal.
[0013] As an embodiment of the present application, the method for the host computer to read the flag bits of all the signal pins includes: the host computer sends an instruction to enter the debugging mode to the microcontroller unit of the detection device; if the detection device successfully enters the debugging mode, read the flag bits of all the signal pins through the interface provided by the microcontroller unit using the I2C bus.
[0014] According to the second aspect of the present application, there is provided a device for detecting abnormal short - circuit between different signals. The device under test is connected to the micro - control unit of the device for detecting abnormal short - circuit between different signals through pin headers. The device for detecting abnormal short - circuit between different signals includes: an initialization unit for initializing all signal pins connected to the device under test in the micro - control unit to input mode; a level - raising unit for raising the levels of all the signal pins to high level with high - level signals; a detection unit for sequentially changing a single signal pin to output mode and giving a low level to the signal pin in output mode, and at the same time judging whether the signals of other signal pins are pulled low; and an identification unit for identifying the signal pins with abnormal short - circuit in the device under test based on the judgment result.
[0015] As an embodiment of the present application, the above - mentioned detection unit is specifically used to perform the following steps:
[0016] Step a: Change the first signal pin to output mode and set the first signal pin to low level;
[0017] Step b: Judge whether the high level on other signal pins is pulled low. If it is pulled low, go to step c; otherwise, go to step d;
[0018] Step c: Set the flag bit of the signal pin that is pulled low to 1, and at the same time set the flag bits of the first signal pin and the signal pins that are not pulled low to 0; upload the flag bits of all signal pins to the host computer, then restore the first signal pin to input mode, and then use the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to output mode;
[0019] Step d: Set the flag bits of all signal pins to 0 and upload the flag bits of all signal pins to the host computer, then restore the first signal pin to input mode, and then use the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to output mode.
[0020] As an embodiment of the present application, the above - mentioned identification unit is a host computer, and the host computer includes: a flag - bit reading module for reading the flag bits of all signal pins; a comparison module for comparing the read flag bits with the flag bits preset in the program; and an identification module for identifying the signal pins with abnormal short - circuit in the device under test based on the comparison result.
[0021] As an embodiment of the present application, the above comparison module is specifically configured to: perform bit-by-bit comparison on the read flags corresponding to the flag bits preset in the program, where all bits in the flag bits preset in the program are 1; determine whether there are consistent bits during the bit-by-bit comparison, and if so, increment the counter by 1; the recognition module is specifically configured to: after the bit-by-bit comparison is completed, determine whether the counter is greater than 1. If so, while reporting an error, report all abnormally short-circuited lines, and if not, display a prompt indicating that the device under test is normal.
[0022] As an embodiment of the present application, the above flag bit reading module is specifically configured to: send an instruction to enter the debugging mode to the micro control unit of the detection device; if the device under test successfully enters the debugging mode, read the flag bits of all signal pins through the interface provided by the micro control unit using the I2C bus.
[0023] According to the third aspect of the present application, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method are implemented.
[0024] As can be seen from the above technical solutions, the method and device for detecting abnormal short circuits between different signals provided by the present application initialize all signal pins to the input mode; use a high-level signal to pull the levels of all the signal pins to a high level; sequentially change a single signal pin to the output mode and give a low level to the signal pin in the output mode, and at the same time determine whether the signals of other signal pins are pulled low; based on the judgment results, identify the abnormally short-circuited signal pins. Therefore, the present application can perform abnormal short circuit detection on each output signal pin of the device under test in an efficient and automated manner, thereby ensuring the qualification rate of the final product. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings. In the drawings:
[0026] Figure 1 is a schematic flowchart of a method for detecting abnormal short circuits between different signals provided by an embodiment of the present application;
[0027] Figure 2 is a schematic connection diagram of a device under test and a detection device provided by an embodiment of the present application;
[0028] Figure 3 is a schematic flowchart of a method for detecting abnormal short circuits between different signals provided by another embodiment of the present application;
[0029] Figure 4 is a schematic flow chart of flag bit comparison provided by an embodiment of the present application;
[0030] Figure 5 is a schematic flow chart of a method for detecting abnormal short - circuit between different signals provided by another embodiment of the present application;
[0031] Figure 6 is a schematic structural diagram of a device for detecting abnormal short - circuit between different signals provided by an embodiment of the present application;
[0032] Figure 7 is a schematic structural diagram of a host computer provided by an embodiment of the present application. Detailed implementation manners
[0033] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer and more understandable, the following further describes the embodiments of the present application in detail with reference to the drawings. Herein, the illustrative embodiments of the present application and their descriptions are used to explain the present application, but not to limit the present application.
[0034] At present, since the pins on the PCB board are relatively dense, AI and manual inspections cannot completely detect solder bridging situations. Moreover, some output signals are specified by customers for use and have no association with the product itself such as power supply, which also results in the inability to detect signal abnormalities in this part during the normal performance test of products such as power supply. Therefore, defective products ultimately flow to the client. The purpose of the present application is to provide a method and device for detecting abnormal short - circuit between different signals, which can perform abnormal short - circuit detection on each output signal pin of the device under test in an efficient and automated manner, thereby ensuring the qualification rate of the final product.
[0035] As Figure 1 shown is a schematic flow chart of a method for detecting abnormal short - circuit between different signals provided by an embodiment of the present application, which is used to detect whether there is a short - circuit between different signal pins of the device under test. As Figure 2 can be seen, the present application connects the device under test to the detection device, and the detection device is used to detect whether the signal pins of the device under test are short - circuited. Specifically, the device under test includes a pin header and a microcontroller unit (MCU). After inserting the device under test into the pin header, the signal pins of the device under test are connected to the microcontroller unit. For example, Figure 2 in the signal pins 1, 2, and 3 of the device under test are connected to the 5th, 6th, and 7th pins of the MCU through the pin header. The method includes the following steps:
[0036] Step S101: Initialize all signal pins connected to the device under test in the microcontroller unit to the input mode.
[0037] In this embodiment, all signal pins in the microcontroller unit connected to the device under test can be initialized to the input mode. Initializing the pins to the input mode is to use a high-level signal to pull the levels of all pins to the high level in the subsequent steps.
[0038] Step S102: Use a high-level signal to pull the levels of all the signal pins to the high level.
[0039] For example, a 3.3V signal can be input into the above-mentioned pins in the input mode through a signal source other than the MCU, so as to pull all the signal pins to the high level.
[0040] Step S103: Change a single signal pin to the output mode in sequence and give a low level to the signal pin in the output mode, and at the same time, judge whether the signals of other signal pins are pulled low.
[0041] In this embodiment, first, a signal pin is changed to the output mode, then a low-level signal is given to this signal pin through the MCU, and then it is judged whether the levels of other signal pins are pulled low. If the levels of other signal pins are pulled low, it means that there is an abnormal short circuit between the pulled-low signal pin and the signal pin of the device under test corresponding to the signal pin changed to the output mode, such as a soldering bridge. Of course, the present application is not limited to the soldering bridge short circuit situation, and any other situation that causes a short circuit between pins belongs to an abnormal short circuit, such as pin touch caused by foreign objects. After the detection of one signal pin is completed, the same detection method can be used to detect other signal pins in sequence.
[0042] Step S104: Identify the signal pins with abnormal short circuits in the device under test based on the judgment results.
[0043] As can be seen from the above, the method provided by the present application for detecting abnormal short circuits of signal pins of the device under test has simple steps and can detect abnormal short circuits of each output signal pin of the device under test in an efficient and automated manner, thereby ensuring the qualified rate of the final product.
[0044] As Figure 3 shown in the flowchart of a method for detecting abnormal short circuits between different signals provided by another embodiment of the present application, the method includes the following steps:
[0045] Step S301: Initialize all signal pins in the MCU connected to the device under test to the input mode.
[0046] Step S302: Use a high-level signal to pull the levels of all signal pins to the high level.
[0047] Step S303: Change the first signal pin to output mode and set the first signal pin to low level.
[0048] In this embodiment, the first signal pin does not specifically refer to a certain pin, but refers to the signal pin that needs to be changed to output mode currently. The first signal pin is the pin to be detected currently, and it is a signal pin that actively pulls down the level.
[0049] Step S304: Determine whether the high level on other signal pins is pulled down. If it is pulled down, go to step S305; otherwise, go to step S308.
[0050] That is, determine whether the high-level signal on other signal pins that are still in input mode except the first signal pin is pulled down. These pulled-down signal pins are the signal pins that are passively pulled down by the first signal pin when detecting the first signal pin.
[0051] Step S305: Set the flag bit of the pulled-down signal pin to 1, and set the flag bits of the first signal pin and the non-pulled-down signal pins to 0.
[0052] This step means that in this embodiment, only the signal pins that are passively pulled down are set to 1, while the signal pins that actively pull down and the non-pulled-down signal pins are set to 0.
[0053] Step S306: Upload the flag bits of all signal pins to the host computer.
[0054] Subsequently, the host computer can identify the pins with abnormal short circuits in the device to be tested based on the flag bits of the signal pins, which will be introduced later.
[0055] Step S307: Restore the first signal pin to input mode, and determine whether the first signal pin is the last signal pin to be detected that is set to output mode. If so, go to step S310; if not, use the second signal pin as the first signal pin and return to step S303.
[0056] In this embodiment, since all signal pins are sequentially used as the signal pins to be detected (i.e., the first signal pin), when the first signal pin is the last signal pin to be detected that is set to output mode, the detection ends and the subsequent judgment step of the host computer can be entered.
[0057] Similarly, the second signal pin here does not specifically refer to a certain pin, but refers to the next signal pin that needs to be changed to output mode. The next signal pin to be changed can be selected sequentially according to the pin sorting or according to a preset rule. This application does not limit this.
[0058] Step S308: Set the flag bits of all signal pins to 0.
[0059] Step S309: Upload the flag bits of all signal pins to the host computer.
[0060] Step S310: Restore the first signal pin to the input mode, and determine whether the first signal pin is the last signal pin to be set to the output mode among the signal pins to be detected. If so, proceed to Step S311; if not, use the second signal pin as the first signal pin and return to Step S303.
[0061] Step S311: The host computer reads the flag bits of all the signal pins.
[0062] The host computer is a device that communicates with the detection device to judge the abnormal short circuit of pins. It can judge whether there is an abnormal short circuit between pins and specifically which pins the abnormal short circuit appears on according to the pin flag bits formed after the above steps. Since there is a corresponding relationship between the MCU pins and the pins of the device under test, it can further judge which pins of the device under test the abnormal short circuit exists on.
[0063] Preferably, the host computer can send an instruction to enter the debugging mode to the MCU of the detection device. If the detection device successfully enters the debugging mode, read the flag bits of all signal pins through the interface provided by the MCU using the I2C bus.
[0064] Step S312: Compare the read flag bits with the flag bits preset in the program.
[0065] As can be seen from the above, when the data of the signal pin under test is M, the host computer will also obtain M groups of flag bit data, and then compare each of the M groups of flag bits with the flag bits preset in the program.
[0066] Step S313: Identify the signal pins with abnormal short circuits based on the comparison results.
[0067] Preferably, as Figure 4 shown, the above Step S312 and Step S313 can specifically include the following sub-steps:
[0068] Step S401: Compare the read flag bits bit by bit with the flag bits preset in the program, and all bits in the flag bits preset in the program are 1.
[0069] Step S402: Determine whether there are consistent bits during the bit-by-bit comparison. If so, increment the counter by 1;
[0070] Step S403: After the bit-by-bit comparison is completed, determine whether the counter is greater than 1. If so, while reporting an error, report all abnormally short-circuited lines. If not, display a prompt indicating that the device under test is normal.
[0071] To facilitate the understanding of the above steps S401 - S403, assume that a detection device needs to detect 8 signal pins. When detecting the first signal pin, if the 5th and 6th signal pins are abnormally short-circuited with the first signal pin, the flag bit obtained by the host computer from the MCU should be binary (00001100b). At the same time, the host computer program will also preset a flag bit assuming all soldering bridges (11111111b). Then, each bit of the two flag bits will be compared. As long as the bits at the same position of the two flag bits are both 1, the soldering bridge information of the corresponding pin will be reported until all bits are compared. Since each pin corresponds to a specific function, relevant personnel can find the corresponding pin for detection and repair based on this error message.
[0072] The above Figure 3 The corresponding embodiment is an embodiment in which the host computer performs abnormal short-circuit judgment based on the M group of flag bit data after all pins are detected. This application can also perform an abnormal short-circuit judgment immediately after detecting one signal pin. For specific details, please refer to Figure 5 the corresponding description.
[0073] Such as Figure 5 shown in the flowchart of a method for detecting abnormal short-circuits between different signals provided by another embodiment of the present application. The method includes the following steps:
[0074] Step S501: Initialize all signal pins connected to the device under test in the MCU to input mode.
[0075] Step S502: Use a high-level signal to pull the levels of all signal pins to high level.
[0076] Step S503: Change the first signal pin to output mode and set the first signal pin to low level.
[0077] Step S504: Determine whether the high level on other signal pins is pulled low. If it is pulled low, go to step S505; otherwise, go to step S507.
[0078] Step S505: Set the flag bit of the signal pin that is pulled low to 1, and set the flag bits of the first signal pin and the signal pins that are not pulled low to 0.
[0079] Step S506: Upload the flag bits of all signal pins to the host computer and enter step S409.
[0080] Step S507: Set the flag bits of all signal pins to 0.
[0081] Step S508: Upload the flag bits of all signal pins to the host computer.
[0082] Step S509: The host computer reads the flag bits of the signal pins.
[0083] Step S510: Compare the read flag bits with the flag bits preset in the program.
[0084] Step S511: Identify the signal pins with abnormal short circuits in the device under test based on the comparison result.
[0085] Step S512: Determine whether the first signal pin is the last signal pin to be set to the output mode among the signal pins to be detected. If so, end the detection. If not, use the second signal pin as the first signal pin and return to Step S503.
[0086] As can be seen from the above, the method for detecting abnormal short circuits between different signals provided by this application can be used to detect abnormal short circuits of the signal pins of the device under test. The method steps are simple, and the abnormal short circuits of each output signal pin of the device under test can be detected in an efficient and automated manner, thereby ensuring the qualification rate of the final product.
[0087] As Figure 6 shown in the structural schematic diagram of a device for detecting abnormal short circuits between different signals provided by an embodiment of this application, the device under test is connected to the micro-control unit of the device for detecting abnormal short circuits between different signals through a pin header. The device for detecting abnormal short circuits between different signals includes: an initialization unit 610, a level pulling-up unit 620, a detection unit 630, and an identification unit 640, which are connected in sequence. Among them:
[0088] The initialization unit 610 is configured to initialize all signal pins connected to the device under test in the micro-control unit to the input mode;
[0089] The level pulling-up unit 620 is configured to pull up the levels of all signal pins to a high level with a high-level signal;
[0090] The detection unit 630 is configured to sequentially change a single signal pin to the output mode and give a low level to the signal pin in the output mode, and at the same time determine whether the signals of other signal pins are pulled low;
[0091] The identification unit 640 is configured to identify the signal pins with abnormal short circuits in the device under test based on the judgment result.
[0092] Preferably, the above detection unit 630 is specifically configured to perform the following steps:
[0093] Step a: Change the first signal pin to output mode and set the first signal pin to low level;
[0094] Step b: Determine whether the high level on other signal pins is pulled low. If it is pulled low, go to step c; otherwise, go to step d;
[0095] Step c: Set the flag bit of the signal pin whose level is pulled low to 1, and at the same time set the flag bits of the first signal pin and the signal pins whose levels are not pulled low to 0; upload the flag bits of all signal pins to the host computer, then restore the first signal pin to input mode, and then use the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to output mode;
[0096] Step d: Set the flag bits of all signal pins to 0 and upload the flag bits of all signal pins to the host computer, then restore the first signal pin to input mode, and then use the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to output mode. Preferably, the above-mentioned identification unit 640 is a host computer, such as Figure 7 As shown, the host computer includes: a flag bit reading module 641, a comparison module 642, and an identification module 643, which are connected in sequence.
[0097] The flag bit reading module 641 is used to read the flag bits of all the signal pins.
[0098] The comparison module 642 is used to compare the read flag bits with the flag bits preset in the program.
[0099] The identification module 643 is used to identify the abnormally short-circuited signal pins based on the comparison result.
[0100] Preferably, the above-mentioned comparison module 642 is specifically used for: comparing the read flag bits with the corresponding flag bits preset in the program bit by bit, and all bits in the flag bits preset in the program are 1; determining whether there are consistent bits during the bit-by-bit comparison. If there are, increment the counter by 1;
[0101] Preferably, the above-mentioned identification module 643 is specifically used for: after the bit-by-bit comparison is completed, determine whether the counter is greater than 1. If it is, report all the abnormally short-circuited lines while reporting an error. If not, display a prompt indicating that the device under test is normal.
[0102] Preferably, the above-mentioned flag bit reading module 641 is specifically used for: sending an instruction to enter the debugging mode to the micro control unit of the detection device; if the device under test successfully enters the debugging mode, read the flag bits of all signal pins through the interface provided by the micro control unit using the I2C bus.
[0103] As can be seen from the above, the abnormal short - circuit detection device for different signals provided by this application can be used to detect abnormal short - circuits of the signal pins of the device under test. The method steps are simple, and the abnormal short - circuits of each output signal pin of the device under test can be detected in an efficient and automated manner, thereby ensuring the qualified rate of the final product.
[0104] The embodiment of this application also provides a computer - readable storage medium, and the computer - readable storage medium stores a computer program for executing the above - mentioned method.
[0105] Those skilled in the art should understand that the embodiments of this application can be provided as a method, a system, or a computer program product. Therefore, this application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, this application can take the form of a computer program product implemented on one or more computer - usable storage media (including but not limited to disk storage, CD - ROM, optical storage, etc.) containing computer - usable program code.
[0106] This application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of this application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general - purpose computer, a special - purpose computer, an embedded processor, or other programmable data - processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data - processing devices generate means for implementing the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.
[0107] These computer program instructions can also be stored in a computer - readable memory that can direct a computer or other programmable data - processing device to work in a specific manner, so that the instructions stored in the computer - readable memory generate a manufactured product including an instruction device, and the instruction device implements the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.
[0108] These computer program instructions can also be loaded onto a computer or other programmable data - processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer - implemented process. Thus, the instructions executed on the computer or other programmable device provide means for implementing the specified functions in Figure 1 one process or multiple processes and / or blocks Figure 1Steps of the functions specified in one or more boxes.
[0109] In this application, specific embodiments are used to elaborate on the principles and implementation manners of the application. The description of the above embodiments is only used to help understand the method and its core idea of the application; at the same time, for those of ordinary skill in the art, according to the idea of the application, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation to the application.
Claims
1. A method for detecting abnormal short circuits between different signals, characterized in that, Connect the device under test to the microcontroller unit of the detection device through pin headers. The method for detecting abnormal short - circuits between different signals includes: Initialize all signal pins connected to the device under test in the microcontroller unit to input mode; Pull the levels of all the signal pins to high level with a high - level signal; Successively change a single signal pin to output mode and give a low level to the signal pin in output mode, and at the same time, judge whether the signals of other signal pins are pulled low; Based on the judgment result, identify the signal pins with abnormal short - circuits in the device under test.
2. The abnormal short-circuit detection method between different signals according to claim 1, characterized in that The step of successively changing a single signal pin to output mode and giving a low level to the signal pin in output mode, and at the same time, judging whether the signals of other signal pins are pulled low includes: Step a: Change the first signal pin to output mode and set the first signal pin to low level; Step b: Judge whether the high level on other signal pins is pulled low. If it is pulled low, go to step c; otherwise, go to step d; Step c: Set the flag bit of the pulled - low signal pin to 1, and at the same time, set the flag bits of the first signal pin and the non - pulled - low signal pins to 0; upload the flag bits of all signal pins to the host computer, then restore the first signal pin to input mode, and then take the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to output mode; Step d: Set the flag bits of all signal pins to 0 and upload the flag bits of all signal pins to the host computer, then restore the first signal pin to input mode, and then take the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to output mode.
3. The abnormal short - circuit detection method between different signals according to claim 2, wherein, The step of identifying the signal pins with abnormal short - circuits in the device under test based on the judgment result includes: The host computer reads the flag bits of all signal pins; Compare the read flag bits with the flag bits preset in the program; Based on the comparison result, identify the signal pins with abnormal short - circuits in the device under test.
4. The abnormal short - circuit detection method between different signals according to claim 3, wherein, The step of comparing the read flag bits with the flag bits preset in the program and identifying the signal pins with abnormal short - circuits in the device under test based on the comparison result includes: Perform a bit - by - bit comparison between the read flag bits and the corresponding flag bits preset in the program, and all bits in the flag bits preset in the program are 1; Judge whether there are consistent bits during the bit - by - bit comparison. If there are, increment the counter by 1; After the bit - by - bit comparison is completed, judge whether the counter is greater than 1. If it is, report an error and report all the abnormal short - circuited lines at the same time. If not, display a prompt indicating that the device under test is normal.
5. The abnormal short-circuit detection method between different signals according to claim 3, wherein, The step of the host computer reading the flag bits of all signal pins includes: The host computer sends an instruction to enter the debugging mode to the microcontroller unit of the detection device; If the detection device successfully enters the debugging mode, read the flag bits of all signal pins through the interface provided by the microcontroller unit using the I2C bus.
6. An abnormal short - circuit detection device between different signals, characterized in that, The device under test is connected to the microcontroller unit of the detection device for abnormal short - circuits between different signals. The detection device for abnormal short - circuits between different signals includes: An initialization unit for initializing all signal pins connected to the device under test in the microcontroller unit to an input mode; A level pulling-up unit for pulling up the levels of all the signal pins to a high level with a high-level signal; A detection unit for sequentially changing a single signal pin to an output mode and giving a low level to the signal pin in the output mode, and at the same time determining whether the signals of other signal pins are pulled low; An identification unit for identifying the abnormally short-circuited signal pins in the device under test based on the determination result; 7. The abnormal short - circuit detection device between different signals according to claim 6, characterized in that The detection unit is specifically used to perform the following steps: Step a: Change the first signal pin to an output mode and set the first signal pin to a low level; Step b: Determine whether the high level on other signal pins is pulled low. If it is pulled low, go to step c; otherwise, go to step d; Step c: Set the flag bit of the pulled-low signal pin to 1, and at the same time set the flag bits of the first signal pin and the non-pulled-low signal pins to 0; upload the flag bits of all signal pins to the host computer, then restore the first signal pin to the input mode, and then use the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to the output mode; Step d: Set the flag bits of all signal pins to 0 and upload the flag bits of all signal pins to the host computer, then restore the first signal pin to the input mode, and then use the second signal pin as the first signal pin and return to step a until the last signal pin to be detected is set to the output mode.
8. The abnormal short-circuit detection device between different signals according to claim 7, characterized in that, The identification unit is a host computer, and the host computer includes: A flag bit reading module for reading the flag bits of all the signal pins; A comparison module for comparing the read flag bits with the flag bits preset in the program; An identification module for identifying the abnormally short-circuited signal pins in the device under test based on the comparison result; 9. The abnormal short - circuit detection device between different signals according to claim 8, wherein, The comparison module is specifically used to: perform a bit-by-bit comparison of the read flag bits with the corresponding flag bits preset in the program, and all bits in the flag bits preset in the program are 1; determine whether there are consistent bits during the bit-by-bit comparison. If there are, increment the counter by 1; The identification module is specifically used to: after the bit-by-bit comparison is completed, determine whether the counter is greater than 1. If it is, report an error and report all the abnormally short-circuited lines at the same time. If not, display a prompt indicating that the device under test is normal.
10. The abnormal short-circuit detection device between different signals according to claim 8, characterized in that, The flag bit reading module is specifically used to: send an instruction to enter the debugging mode to the microcontroller unit of the detection device; if the device under test successfully enters the debugging mode, read the flag bits of all signal pins through the interface provided by the microcontroller unit using the I2C bus.
11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.