A digital detection circuit and energy storage system

Abstract

The present application relates to a number type detection circuit and an energy storage system. The number type detection circuit includes a quantity identification circuit, a type identification circuit and a controller. The quantity identification circuit is connected to the controller. The type identification circuit includes a first reference resistor arranged in the host and i coding resistors assigned to i external battery packs of the same type. The first end of the first reference resistor is connected to a first power supply. When the external battery pack is incorporated into the host, the quantity identification circuit generates a first identification signal. The various coding resistors are connected in parallel to the second end of the first reference resistor to form a voltage divider node. The voltage divider node is also connected to the controller. A first voltage divider signal is generated at the voltage divider node. The controller obtains the number of external battery packs based on the first identification signal and identifies the type parameters of the external battery pack based on the number of external battery packs and the first voltage divider signal, thereby realizing the identification of the number and type of the external battery packs.

Description

Technical Field

[0001] The present application relates to the field of energy storage, and in particular to a digital detection circuit and an energy storage system. Background Art

[0002] With the prevalence of electronic devices, the number of scenarios involving multiple battery packs working together to provide power is increasing. However, existing energy storage systems have the following drawbacks: First, they cannot accurately detect the number of battery packs. When multiple battery packs are connected in parallel, the lack of a detection mechanism can easily lead to misjudgments, affecting power distribution and charge and discharge control. Second, battery packs come in many types, each with different electrical characteristics. For example, lithium-ion and nickel-metal hydride battery packs have different electrical characteristics. If the type of battery pack being incorporated cannot be identified, charging and discharging strategies will be mismatched, shortening battery life and even posing safety risks. Therefore, a digital detection circuit that can identify both the number and type of battery packs is urgently needed. Summary of the Invention

[0003] The embodiments of the present application aim to provide a digital type detection circuit and an energy storage system, which can identify the quantity and type parameters of external battery packs.

[0004] To solve the above technical problems, the embodiments of the present application provide the following technical solutions:

[0005] In a first aspect, an embodiment of the present application provides a number type detection circuit, applied to an energy storage system, the energy storage system including a host and i external battery packs of the same type for connection to the host, the number type detection circuit including: a quantity identification circuit, a type identification circuit, and a controller;

[0006] The quantity identification circuit is connected to the controller, and is configured to generate a first identification signal in response to the external battery pack being incorporated into the host, wherein a level state of the first identification signal is related to the quantity of the external battery packs;

[0007] The type identification circuit includes a first reference resistor disposed within the host and i coding resistors of the same resistance value, each configured for a plurality of external battery packs of the same type. The first end of the first reference resistor is connected to a first power source. When the external battery pack is incorporated into the host, the coding resistors are connected in parallel to the second end of the first reference resistor to form a voltage divider node, which is also connected to the controller.

[0008] The first end of the first reference resistor is connected to a first power source. When the external battery pack is incorporated into the host, the encoding resistors are connected in parallel to the second end of the first reference resistor to form a voltage division node. The voltage division node is also connected to the controller. The type identification circuit is configured to generate a first voltage division signal at the voltage division node in response to the external battery pack being incorporated into the host. The voltage of the first voltage division signal is related to the type of the external battery pack.

[0009] The controller is configured to sample the first identification signal and the first divided voltage signal, obtain the number of the external battery packs based on the first identification signal, and identify a type parameter of the external battery pack based on the number of the external battery packs and the first divided voltage signal.

[0010] In a second aspect, an embodiment of the present application provides an energy storage system, comprising a host, i external battery packs, and a number and type detection circuit as described above, wherein each of the external battery packs is connected in parallel with the host, and the number and type detection circuit is configured to identify the quantity and type parameters of the external battery packs.

[0011] In various embodiments of the present application, the digital type detection circuit includes a quantity identification circuit, a type identification circuit and a controller. The quantity identification circuit is connected to the controller. When the external battery pack is incorporated into the host, the quantity identification circuit generates a first identification signal, wherein the level state of the first identification signal is related to the number of external battery packs. The type identification circuit includes a first reference resistor set in the host and i coding resistors assigned to i external battery packs of the same type, wherein the resistance value of the coding resistor is obtained by resistance coding allocation based on the analog-to-digital sampling range of the controller, and the resistance of the coding resistor corresponding to the external battery packs of the same type is The value is the same, and the resistance values ​​of the coding resistors of different types of external battery packs are different. The first end of the first reference resistor is connected to the first power supply. When the external battery pack is incorporated into the host, the various coding resistors are connected in parallel to the second end of the first reference resistor to form a voltage divider node. The voltage divider node is also connected to the controller. A first voltage divider signal is generated at the voltage divider node, wherein the voltage of the first voltage divider signal is related to the type of the external battery pack. The controller samples the first identification signal and the first voltage divider signal, and obtains the number of external battery packs based on the first identification signal and identifies the type parameters of the external battery pack based on the number of external battery packs and the first voltage divider signal.

[0012] Different numbers of external battery packs incorporated into the host will correspond to different levels of the first identification signal. The controller identifies the number of external battery packs based on the different first identification signals. Furthermore, external battery packs of the same type incorporated into the host will have the same corresponding coding resistors. The controller identifies the type parameters of the corresponding external battery packs based on the first voltage divider signal and the number of external battery packs. However, different types of external battery packs have different corresponding coding resistor values, resulting in a first voltage divider signal that is different from the first voltage divider signals generated when other types of external battery packs are connected. Therefore, the controller can identify the type parameters of the corresponding external battery packs based on the number of external battery packs and the different first voltage divider signals. Thus, the digital type detection circuit can identify the number and type of external battery packs incorporated into the host. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] One or more embodiments are exemplarily illustrated by pictures in the corresponding drawings. These exemplifications do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0014] Figure 1 This is a schematic diagram of the structure of one of the energy storage systems provided in the embodiments of the present application;

[0015] Figure 2 This is a structural diagram of a digital detection circuit provided in an embodiment of the present application;

[0016] Figure 3 This is a structural diagram of a digital detection circuit provided in an embodiment of the present application;

[0017] Figure 4 This is a schematic diagram of the circuit structure of one of the digital detection circuits provided in an embodiment of the present application;

[0018] Figure 5 This is a schematic diagram of the circuit structure of one of the digital detection circuits provided in an embodiment of the present application;

[0019] Figure 6 This is a schematic diagram of the circuit structure of one of the digital detection circuits provided in an embodiment of the present application;

[0020] Figure 7 This is a circuit structure diagram of one of the digital detection circuits provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0022] When the energy storage system is expanded, the external battery pack is connected in parallel with the host in the energy storage system through a connector, such as Figure 1 As shown, the energy storage system includes a host 100 and N external battery packs 200, where N is an integer greater than or equal to 1, which can be three, four or more battery packs. The specific number of battery packs can be set as needed and is not limited here.

[0023] like Figure 1 As shown, when the first external battery pack 200 is incorporated into the host 100, the first external battery pack 200 and the host 100 are connected in parallel via the connector 300. When the second external battery pack 200 is incorporated into the host 100, the second external battery pack 200 is connected in parallel with the first external battery pack 200 via the connector 300. This continues in parallel until the Nth external battery pack 200 is incorporated. After each external battery pack 200 is incorporated into the host 100, the host 100 controls the charging, discharging, or balancing operations of the external battery pack 200.

[0024] The host 100 can be expanded in both the upper and lower directions ( Figure 1 (The example of expanding the capacity at the bottom of the host 100 is shown in the figure), but there is a limit on the number of expandable battery packs. The system needs to identify the number of incorporated expansion devices and operate within the limited number. Therefore, the energy storage system needs to identify the number of external battery packs to control operations such as charging and discharging.

[0025] At the same time, the external battery packs integrated into the host 100 are of the same type, for example, all i battery packs integrated into the host are of the first type, or all i battery packs integrated into the host are of the second type. The energy storage system also needs to identify the type of the external battery pack when controlling charging and discharging operations. This is because different types of external battery packs require different charging voltages or charging currents, and their discharge voltages or discharge currents also differ. Therefore, the energy storage system needs to identify the type of the external battery pack to enable rapid charging and discharging.

[0026] Based on the above problems, an embodiment of the present application provides a digital type detection circuit that can identify the number and type of external battery packs so that the energy storage system can control operations such as fast charging and discharging.

[0027] like Figure 2As shown, the digital type detection circuit includes a quantity recognition circuit 20, a type recognition circuit 10 and a controller 30, wherein the quantity recognition circuit 20 is connected to the controller 30. When the external battery pack is incorporated into the host, the quantity recognition circuit 20 generates a first recognition signal, and the level state of the first recognition signal is related to the number of external battery packs. The controller 30 samples the first recognition signal and determines the number of external battery packs based on the level state of the first recognition signal. The type recognition circuit 10 includes a first reference resistor R 02 and i coding resistors (R 1B 、R 2B ...and R iB ), the first reference resistor R 02 The first end of the first reference resistor R is connected to the first power supply VSS, wherein the first reference resistor R 02 The controller 30 is set in the host, and the coding resistor is set in the external battery pack. When the external battery pack is connected in parallel with the host, each coding resistor is connected in parallel, and each coding resistor is connected to the first reference resistor R 02 The second end of each coding resistor is connected to the first reference resistor R 02 A voltage divider circuit is formed to divide the first power supply VSS and generate a first voltage divider signal at the voltage divider node. The controller 30 is connected to the voltage divider node A. The controller 30 samples the first voltage divider signal at the voltage divider node A and then identifies the type parameters of the external battery pack based on the first voltage divider signal and the number of external battery packs.

[0028] If the i external battery packs incorporated into the host are of the same type, then the resistance value of the coding resistor corresponding to each external battery pack is the same. Based on the first voltage division signal and the number of external battery packs, the resistance value of each coding resistor can be obtained. Based on the resistance value of each coding resistor, the type parameter of the corresponding external battery pack is determined.

[0029] Different types of external battery packs have corresponding coding resistors with different resistance values. For example, if i external battery packs of the first type are incorporated into the host, the resistance value of the coding resistors in the i external battery packs of the first type is a first resistance value, and if i external battery packs of the second type are incorporated into the host, the resistance value of the coding resistors in the i external battery packs of the second type is a second resistance value, then when the i external battery packs of the first type are incorporated into the host, a first voltage-divided signal with a first voltage is generated at the voltage-divided node, and when the i external battery packs of the second type are incorporated into the host, a second voltage-divided signal with a second voltage is generated at the voltage-divided node.

[0030] The controller 30 receives the first voltage division signal of the first voltage and the number of external battery packs, and can infer the resistance value of the corresponding coding resistor, determine that the resistance value of the first coding resistor is the first resistance value, and the type of the external battery pack corresponding to the first resistance value is the first type, thereby identifying that the type of i external battery packs is the first type, and can also obtain type parameters of the first type of external battery packs, such as the type is the first type, the first charging voltage or the first charging current, and parameters such as the device ID.

[0031] The controller 30 receives the first voltage division signal of the second voltage and the number of external battery packs, and can infer the resistance value of the corresponding coding resistor, determine that the resistance value of the second coding resistor is the second resistance value, and the type of the external battery pack corresponding to the second resistance value is the second type, thereby identifying that the type of i external battery packs is the second type, and can also obtain type parameters of the second type external battery pack, such as the type is the second type, the second charging voltage or the second charging current, and parameters such as the device ID.

[0032] Thus, when i external battery packs are incorporated into the host, the quantity identification circuit 20 generates a first identification signal related to the number of external battery packs, the type identification circuit 10 generates a first voltage-divided signal related to the type of the external battery pack, and the controller 30 identifies the number of external battery packs based on the first identification signal, and identifies the type parameters of the i external battery packs based on the voltage of the first voltage-divided signal and the number of external battery packs.

[0033] In some embodiments, before identification, resistance encoding is performed based on the analog-to-digital sampling range of the controller 30, and coded resistors of different resistance values ​​are assigned to different types of external battery packs. When the external battery pack is connected to the host, the controller 30 samples a first voltage-divided signal at a voltage-divided node. Then, based on the voltage-divided principle and the first voltage-divided signal, the controller 30 obtains the total measured value of i coded resistors. Then, based on the total measured value and the number of external battery packs, the controller 30 obtains the measured resistance value corresponding to the coded resistor assigned to the external battery pack. A resistor value search is then performed in a mapping relationship set to obtain a target ideal resistor and type parameter that matches the measured resistance value. The mapping relationship set includes an ideal resistor that matches the coded resistor and a type parameter of the external battery pack that corresponds one-to-one with the ideal resistor.

[0034] For example: Figure 2 As shown, based on the voltage division principle and the voltage of the first voltage division signal, the total measured value of the i coding resistors can be inferred by the following formula:

[0035] R 总 =V0×R 02 / (VSS-V0)(1)

[0036] Among them, R 总is the total value measured, V0 is the voltage of the first divided voltage signal, R 02 The first reference resistor R 02 VSS is the voltage of the first power supply.

[0037] If the resistance values ​​of i coding resistors are the same, the measured resistance value is calculated using the following formula:

[0038] R m =i×R 总 (2)

[0039] Among them, R m is the measured resistance value of the coding resistor, R 总 is the total measurement value, and i is the number of coding resistors.

[0040] Thus, the controller 30 can obtain the measured resistance value of each coding resistor, then obtain a mapping relationship set, search the mapping relationship set to obtain the target ideal resistance corresponding to the measured resistance value, and thus obtain the type parameter of the external battery pack corresponding to the target ideal resistance.

[0041] To enable type identification of different types of external battery packs, resistance coding is performed based on the analog-to-digital sampling range of the controller 30 before identification. Coding resistors of different values ​​are assigned to the multiple external battery packs. Ideal resistors are then assigned to correspond one-to-one with the coding resistors, with each ideal resistor having the same value as the corresponding coding resistor. Different coding resistors are assigned to different external battery packs, and ideal resistors with the same value as the coding resistors are mapped one-to-one to the type parameters of the corresponding external battery packs. A mapping relationship is established to form a set of mapping relationships.

[0042] When performing the resistance coding allocation operation, resistance coding is performed based on the analog-to-digital sampling range of the controller 30 , and coding resistors of different resistance values ​​are allocated to the multiple external battery packs.

[0043] When performing the resistance coding assignment operation, an external battery pack is incorporated into the host to determine the resistance value of the coding resistor in the external battery pack.

[0044] First, the maximum and minimum resistance values ​​of the coding resistor are determined based on the analog-to-digital sampling range of the controller 30. In some embodiments, the controller 30 includes an ADC sampling unit that samples the voltage-dividing signal and performs analog-to-digital conversion on the voltage-dividing signal to obtain the voltage value of the voltage-dividing signal. Therefore, the analog-to-digital sampling range of the controller 30 is the range of the ADC sampling unit.

[0045] The first reference resistor R02 and the coding resistor divide the first power supply VSS. The obtained first divided voltage signal must be within the range of the ADC sampling unit to achieve correct sampling. Based on this principle, the maximum resistance value and the minimum resistance value of the coding resistor can be obtained.

[0046] If the sampling range of the ADC sampling unit is [V1, V2], then in order to ensure correct sampling, the voltage V ADC The following constraints must be met:

[0047] V1<V ADC <V2(3)

[0048] V again ADC =(R m × VSS) / (R 02 +R m ), where R m is the resistance of the coding resistor, R 02 The first reference resistor R 02 The resistance value of , based on formula (3) can be obtained:

[0049] (V1×R 02 ) / (VSS-V1)<R m <(V2×R 02 ) / (VSS-V2)(4)

[0050] Therefore, in order to ensure the accuracy of sampling, the resistance value of the coding resistor R m The range is [R min , R max ], the minimum resistance value is R min , the maximum resistance value is R max , where R min =(V1×R 02 ) / (VSS-V1),R max = (V2 × R 02 ) / (VSS-V2).

[0051] Then based on the minimum resistance value R min With the maximum resistance R max The resistor encoding operation is performed to obtain the resistance values ​​of multiple encoding resistors. When generating the resistance values ​​of each encoding resistor, if the resistance difference between the encoding resistors is small, measurement errors and other reasons may cause mismatching of the external battery pack type, resulting in confusion.

[0052] Based on the above problems, when performing a resistance coding operation to generate the resistance value of the coding resistor, differentiated resistance intervals are designed for the resistance values ​​of the various coding resistors to prevent confusion and reduce the risk of mismatching multiple external battery pack types.

[0053] In the embodiment of the present application, first, based on the analog-to-digital sampling range of the controller 30, the voltage of the first power supply VSS and the first reference resistor R 02 The median resistance value is determined based on the resistance value of the analog-to-digital sampling range, and the minimum allowable interval is then determined based on the median resistance value. Specifically, when the median voltage of the analog-to-digital sampling range is used as the voltage of the first voltage-divided signal, the corresponding resistance value of the coding resistor is determined as the median resistance value. The median voltage is determined based on the analog-to-digital sampling range of the controller 30, where the median voltage is the middle value of the analog-to-digital sampling range.

[0054] The median resistance value is determined by the following formula:

[0055] (5)

[0056] Among them, R base is the median resistance value, V mid is the mid-range voltage, R 02 The first reference resistor R 02 resistance value.

[0057] If the analog-to-digital sampling range is [V1, V2], the median voltage V mid =(V2+V1) / 2, when the resistance of the coding resistor is the middle resistance value, it is equal to the first reference resistor R 02 The voltage of the first voltage-divided signal generated by dividing the first power source VSS is a mid-voltage. Therefore, the corresponding mid-resistance value can be inferred based on the mid-voltage.

[0058] Then, the minimum allowable interval is determined based on the median resistance value. The minimum allowable interval can make the interval between the resistance values ​​of adjacent coding resistors large enough to avoid identification conflicts caused by measurement errors.

[0059] Specifically, first obtain the maximum measurement error, and then determine the minimum allowable interval using the following formula:

[0060] R gap =w×ε×R base (6)

[0061] Among them, R gap is the minimum allowed interval, w is the weight, ε is the maximum measurement error, R base is the median resistance value.

[0062] w can be set as needed. In the embodiment of the present application, w is 2. ε is the maximum measurement error, which refers to the maximum allowable error between the measured resistance value of the coding resistor and the assigned resistance value of the coding resistor. It can be set as needed. In the embodiment of the present application, ε is 5%. That is, if the error between the actual measured value and the assigned resistance value of the coding resistor is less than or equal to ε, it is considered that the actual measured value and the assigned resistance value of the coding resistor meet the error requirement or match.

[0063] In some embodiments, in order to take noise interference into account in the minimum allowable interval and further reduce the measurement error, the minimum allowable interval can also be set at the middle resistance value R gap Add a safety margin δ to the base to get the final minimum allowable interval. gap Multiply by the weight corresponding to the noise interference to obtain the safety margin δ, for example, safety margin δ = 2% × R base .

[0064] Finally, based on the minimum allowable interval, the resistance values ​​from the minimum resistance value to the maximum resistance value are divided to obtain the resistance values ​​of several coding resistors. min ,R max ] is split and the difference between the resistance values ​​obtained by splitting meets the minimum allowable interval. For example, the resistance values ​​of each coding resistor are R min , R min +R gap , R min +2.5×R gap ...and so on, until the resistance value of the last coding resistor is obtained.

[0065] It should be noted that in [R min ,R max ] When the resistance values ​​of the coding resistors are obtained by segmentation, they can be evenly split so that the differences between the resistance values ​​of the coding resistors are equal, or they can be unevenly split so that the differences between the resistance values ​​of the coding resistors are equal or unequal, as long as the difference between the resistance values ​​of two adjacent coding resistors meets the minimum allowable interval.

[0066] After obtaining the resistance value of each coding resistor, assign each coding resistor to different types of external battery packs. Each coding resistor corresponds to each type of external battery pack. For example, assign the resistance value to R min The coding resistor is assigned to the first type of external battery pack, and the resistance is R min +R gap The coding resistor is assigned to the second type of external battery pack, and the resistance is R min +2.5×R gapThe coding resistor is assigned to the third type of external battery pack, and so on, until the last coding resistor is assigned to an external battery pack of a different type from the aforementioned ones.

[0067] Among them, the coding resistor can be a single resistor or multiple resistors connected in parallel. For example, if the coding resistor is a single resistor, the resistance of the single resistor is the resistance of the coding resistor. If the coding resistor is multiple resistors, the resistance of the multiple resistors connected in parallel is the resistance of the coding resistor.

[0068] Then, a mapping relationship set is established, wherein the mapping relationship set includes multiple mapping data units. The multiple mapping data units are constructed as follows: an ideal resistor corresponding to the coding resistor is assigned to each mapping data unit, and the resistance value of each ideal resistor is equal to the resistance value of the corresponding coding resistor. Then, a mapping relationship is established between the ideal resistor of each mapping data unit and the type parameter of the external battery pack of the corresponding coding resistor.

[0069] That is, the coding resistor and the ideal resistor are mapped one by one, and the resistance value of the coding resistor is equal to the resistance value of the ideal resistor. Then, a mapping relationship is established between the ideal resistor and the type parameter of the corresponding external battery pack. For example, the type parameter includes the model and ID number of the external battery pack, as well as the target output voltage and maximum current of the external battery pack. The mapping relationship can be expressed as (M, R m , I DM , V _targetM , I _maxM ), where M is the device model of the external battery pack, R m is the resistance of the ideal resistor, I DM is the ID number of device M, V _targetM is the target output voltage of device M, I _maxM is the maximum current of device M.

[0070] Taking the allocation of coded resistors for two types of external battery packs and the construction of two mapping data units as an example, the process of establishing a set of resistor coding and mapping relationships is described.

[0071] Different resistance values ​​are assigned to the coding resistors in the two types of external battery packs. If the two types of external battery packs are respectively a first external battery pack and a second external battery pack, and the corresponding coding resistors are respectively a first coding resistor and a second coding resistor, then the first coding resistor is assigned to the first external battery pack, and its resistance value is the first resistance value, and the second coding resistor is assigned to the second external battery pack, and its resistance value is the second resistance value, and the first resistance value and the second resistance value are a pair of [R min ,R max ] is obtained by segmentation, and the difference between the first resistance value and the second resistance value meets the minimum allowable interval, for example: the first resistance value and the second resistance value are R min and Rmin +R gap .

[0072] Then, two mapping data units are constructed, and a first ideal resistor corresponding to the first resistance value is assigned to the first mapping data unit. The resistance value of the first ideal resistor is equal to the first resistance value. Then, a mapping relationship is established between the first ideal resistor and the type parameter of the first external battery pack. The mapping relationship is expressed as (M1, R m1 , I DM1 , V _targetM1 , I _maxM1 ), where M1 refers to the device model of the first external battery pack, R M1 Refers to the resistance of the first ideal resistor, I DM1 Refers to the ID number of device M1, V _targetM1 is the target output voltage of device M1, I _maxM1 Refers to the maximum current of the device M1. Assign a second ideal resistor corresponding to the second resistance value to the second mapping data unit. The resistance value of the second ideal resistor is equal to the second resistance value. Then, a mapping relationship is established between the second ideal resistor and the type parameter of the second external battery pack. The mapping relationship is expressed as (M2, R m2 , I DM2 , V _targetM2 , I _maxM2 ), where M2 refers to the device model of the second external battery pack, R M2 Refers to the resistance of the second ideal resistor, I DM2 Refers to the ID number of device M2, V _targetM2 is the target output voltage of device M2, I _maxM2 It refers to the maximum current of the device M2. Finally, the two mapping data units form a mapping relationship set.

[0073] Therefore, the mapping relationship set includes the mapping relationship between the type parameters of each external battery pack and the ideal resistor, and the resistance value of the ideal resistor is equal to the coding resistor of the external battery pack, and they correspond one to one.

[0074] When i external battery packs of the same type are connected to the host, a first voltage division signal is generated at the voltage division node. The controller 30 can determine the total measured value of the i coding resistors through the first voltage division signal, and then calculate the measured resistance value based on the number of external battery packs and the total measured value (as shown in the above formula (1) and formula (2)). Then, the target ideal resistance that matches it is determined from the mapping relationship set through the measured resistance value, and then the type parameter that matches it is determined through the target ideal resistance.

[0075] The controller 30 traverses the ideal resistance in the mapping relationship. If the absolute value of the difference between the ideal resistance and the measured resistance value is less than the preset error, it is determined that the ideal resistance value matches the measured resistance value, and the ideal resistance value is the target ideal resistance value. Then, the type parameter of the external battery pack corresponding to the target ideal resistance is determined from the mapping relationship set.

[0076] In some embodiments, the controller 30 infers the measured resistance value as the original resistance value of the coding resistor based on the voltage value of the first voltage-divided signal. To improve measurement accuracy, the measured resistance value is obtained after temperature compensation is performed on the original resistance value.

[0077] Specifically, the controller 30 first determines the voltage of the first power supply VSS according to the first voltage-divided signal, the voltage of the first reference resistor R 02 The resistance value of the coding resistor is determined, and the original resistance value of the coding resistor is temperature compensated to obtain the measured resistance value.

[0078] If the voltage of the first voltage-divided signal measured by the ADC sampling unit is V ADC , the first reference resistor R 02 The resistance is R 02 , the original resistance value of the coding resistor is obtained by the following formula:

[0079] (7)

[0080] Among them, R mm is the original resistance value of the coding resistor.

[0081] Then perform temperature compensation on the original resistance value and obtain the measured resistance value using the following formula:

[0082] (8)

[0083] Among them, R c is the measured resistance value, a is the resistance temperature coefficient, in the embodiment of the present application, a is 0.00005, and T is the current temperature.

[0084] The measured resistance value after temperature compensation is more accurate and more consistent with the actual resistance value of the coding resistor, thereby improving the resistance measurement accuracy of the coding resistor.

[0085] Due to measurement errors or measurement accuracy issues, the measured resistance value R c The resistance value of the ideal resistor is not necessarily the same as that of the ideal resistor. Therefore, the ideal resistors in the mapping relationship set are traversed to determine the resistance value of each ideal resistor and the measured resistance value R c Is the absolute value of the difference between the ideal resistor and the measured resistance value R less than the preset error? If so, the ideal resistor is confirmed to be the same as the measured resistance value R. cMatches and will be measured with the resistance value R c The matched ideal resistance is determined as the target ideal resistance, and the type parameters of the external battery pack corresponding to the target ideal resistance are then determined.

[0086] The process of obtaining the type parameter is described using the first and second external battery packs as examples. When i first external battery packs of the same type are connected to the host, the first coding resistor and the second reference resistor form a voltage divider circuit to generate a first voltage divider signal. The controller 30 can then infer the first measured resistance value R of the first coding resistor based on the first voltage divider signal. c1 (For example, by using the above formula (1) and formula (2)), then traverse the mapping relationship set to determine the first measured resistance value R c1 The first ideal resistor R m1 , the first ideal resistor R m1 Determine the target ideal resistance and then obtain the first ideal resistance R m1 The associated type parameter is the type parameter of the first external battery pack.

[0087] Similarly, when i second external battery packs of the same type are connected to the host, the second coding resistor and the second reference resistor form a voltage divider circuit to generate a first voltage divider signal. Then, the controller 30 can infer the second measured resistance value R of the second coding resistor based on the first voltage divider signal. c2 (For example, by using the above formula (1) and formula (2)), then traverse the mapping relationship set to determine the second measured resistance value R c2 The second ideal resistor R m2 , the second ideal resistor R m2 Determine the target ideal resistance and then obtain the second ideal resistance R m2 The associated type parameter is the type parameter of the second external battery pack.

[0088] Therefore, when different types of external battery packs are connected to the host, different first voltage division signals are generated. The controller 30 can obtain different measured resistance values ​​according to the different first voltage division signals and the number of external battery packs, and then determine the target ideal resistance that matches the measured resistance value from the mapping relationship set, and then obtain the type parameters associated with the target ideal resistance.

[0089] In some embodiments, as Figure 2 As shown, the type identification circuit 10 further includes a filter circuit, which includes a resistor R 03 With capacitor C1, resistor R 03 Connected between the controller and the voltage divider node A, one end of the capacitor C1 is connected to the controller and the resistor R 03 The first voltage-divided signal is filtered by the filter circuit and then transmitted to the controller 30 .

[0090] See also Figure 3 , Figure 3 This is a schematic diagram of a digital detection circuit provided in an embodiment of the present application. Figure 3 As shown, the quantity recognition circuit 20 includes: i matching resistors (resistance R 1A , resistor R 2A ...resistor R iA ), the second reference resistor R 01 and N comparison circuits 21 , wherein i is a positive integer from 0 to N, and N is a positive integer greater than or equal to 1.

[0091] It is worth noting that when the host and each external battery pack form a stacked structure through the connector 300, the matching resistors in each external battery pack and the second reference resistor R 01 , the second power supply VDD device located in the host can form Figure 3 The connection relationship shown.

[0092] The second reference resistor R 01 The first end of is connected to the second power supply VDD, and the matching resistor is set in the external battery pack and corresponds to the external battery pack one by one. The resistance of the matching resistor is the same. When i external battery packs are incorporated into the host, i matching resistors are connected in parallel to form a parallel voltage divider module. The first end of the parallel voltage divider module is connected to the second reference resistor R 01 The second end of the parallel voltage divider module is connected to the ground GND, and the second reference resistor R 01 The parallel voltage dividing module divides the second power supply VDD to obtain a second voltage dividing signal. Thus, the first end of the parallel voltage dividing module can obtain the second voltage dividing signal about the second power supply.

[0093] For example: If the i matching resistors are resistors R 1A , resistor R 2A ...resistor R iA , when the first external battery pack is connected to the host, the resistor R 1A The first end and the second reference resistor R 01 The second end of the resistor R 1A With the second reference resistor R 01 The second power supply VDD is divided to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin1=VDD×R 1A / (R 01 +R 1A ).

[0094] When the second external battery pack is connected to the host, the resistor R 1A With resistor R 2AConnect in parallel to form a voltage divider resistor module, resistor R 2A The first end and the second reference resistor R 01 The second end of the resistor R 1A , resistor R 2A and the second reference resistor R 01 The second power supply VDD is divided to obtain a second divided voltage signal. The voltage of the second divided voltage signal is Vin2=VDD×(R 1A / / R 2A ) / (R 01 +(R 1A / / R 2A )), where / / represents the parallel symbol, R 1A / / R 2A Represents R 1A With R 2A The total resistance after parallel connection.

[0095] By analogy, when the i-th external battery pack is connected to the host, the resistor R 1A , resistor R 2A Until the resistor R iA are connected in parallel to form a voltage divider resistor module, resistor R iA The first end and the second reference resistor R 01 The second end of the resistor R 1A , resistor R 2A Until the resistor R iA Common with the second reference resistor R 01 The second power supply VDD is divided to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin i =VDD×(R 1A / / R 2A / / ... / / R iA ) / (R 01 +(R 1A / / R 2A / / ... / / R iA )), where / / represents the parallel symbol, R 1A / / R 2A / / ... / / R iA Represents R 1A 、R 2A , ... and R iA The total resistance after parallel connection.

[0096] Therefore, when different numbers of external battery packs are connected to the host, the voltage of the second divided voltage signal is different. The voltage of the second divided voltage signal decreases as the number of external battery packs increases, and is always lower than the voltage of the second power supply VDD.

[0097] The first input terminal of each comparison circuit 21 is connected to the second voltage-divided signal, and the second input terminal of each comparison circuit 21 is connected to a reference voltage. For example, the second input terminal of the first comparison circuit is connected to the first reference voltage Vref1, the second input terminal of the second comparison circuit is connected to the second reference voltage Vref2, and so on. The second input terminal of the Nth comparison circuit is connected to the Nth reference voltage Vref N , wherein the voltages of the reference voltages are different, for example, the voltages of the reference voltages are successively increased or decreased, that is, Vref1 <Vref2<...<Vref N , or, Vref1>Vref2>...>Vref N .

[0098] The voltage of the second power supply VDD is greater than the maximum value of the reference voltages. If the values ​​of the reference voltages increase in sequence, the voltage of the second power supply VDD is greater than Vref N If the values ​​of the reference voltages decrease in sequence, the voltage of the second power supply VDD is greater than Vref1.

[0099] The comparison circuit 21 compares the voltage of the second voltage-divided signal with a corresponding reference voltage and outputs a corresponding comparison signal. The N comparison signals reflect the number of external battery packs.

[0100] For example, if the reference voltage values ​​are increasing in sequence, that is, Vref1<Vref2<...<Vref N , and when the voltage at the first input terminal of the comparison circuit is less than the voltage at the second input terminal thereof, the comparison circuit outputs a high-level comparison signal.

[0101] When no external battery pack is incorporated, the first input terminals of the N comparison circuits are all connected to the second power supply VDD, and the voltage of the second power supply VDD is greater than any reference voltage. Then the N comparison circuits all output low-level comparison signals to determine that no external battery pack is incorporated.

[0102] When an external battery pack is connected, the resistor R 1A With the second reference resistor R 01 The second power supply VDD is divided to obtain a second divided voltage signal, the voltage of the second divided voltage signal is Vin1, wherein Vin1 is transmitted to the first input terminal of the N comparison circuits, and Vref N-1 <Vin1 <Vref N , then the Nth comparison circuit outputs a high-level comparison signal, and the other comparison circuits output low-level comparison signals, and it is determined that the number of external battery packs is one.

[0103] When two external battery packs are connected, the resistor R 1A , resistor R 2AWith the second reference resistor R 01 Divides the second power supply VDD to obtain a second divided voltage signal, the voltage of the second divided voltage signal is Vin2, where Vin2 is transmitted to the first input terminal of N comparison circuits, and Vref N-2 <Vin2<Vref N-1 , then the Nth comparison circuit outputs a comparison signal with a high level, the (N - 1)th comparison circuit outputs a comparison signal with a high level, and other comparison circuits output comparison signals with a low level, then it is determined that the number of externally connected battery packs is two.

[0104] And so on, when N externally connected battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, the voltage of the second divided voltage signal is Vin N , where Vin N is transmitted to the first input terminal of N comparison circuits, and Vin N <Vref1, then the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and so on, the Nth comparison circuit also outputs a comparison signal with a high level, then it is determined that the number of externally connected battery packs is N.

[0105] For another example, if the values of the reference voltages decrease in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is less than the voltage at its second input terminal, the comparison circuit outputs a comparison signal with a high level.

[0106] When no externally connected battery pack is incorporated, the first input terminals of N comparison circuits are all connected to the second power supply VDD, and the voltage of the second power supply VDD is greater than any reference voltage, then N comparison circuits all output comparison signals with a low level, and it is determined that no externally connected battery pack is incorporated.

[0107] When one externally connected battery pack is incorporated, resistor R 1A and the second reference resistor R 01 divide the second power supply VDD to obtain a second divided voltage signal, the voltage of the second divided voltage signal is Vin1, where Vin1 is transmitted to the first input terminal of N comparison circuits, and Vref2<Vin1<Vref1, then the first comparison circuit outputs a comparison signal with a high level, and other comparison circuits output comparison signals with a low level, then it is determined that the number of externally connected battery packs is one.

[0108] When two externally connected battery packs are incorporated, resistor R 1A , resistor R 2A and the second reference resistor R01 The second power supply VDD is divided in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin2. Among them, Vin2 is transmitted to the first input ends of N comparison circuits, and Vref3 < Vin2 < Vref2. Then, the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and the other comparison circuits output comparison signals with a low level. Then, it is determined that the number of externally connected battery packs is two.

[0109] And so on. When N externally connected battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , among which, Vin N is transmitted to the first input ends of N comparison circuits, and Vin N < Vref N . Then, the first comparison circuit outputs a comparison signal with a high level, the second comparison circuit outputs a comparison signal with a high level, and so on. The Nth comparison circuit also outputs a comparison signal with a high level. Then, it is determined that the number of externally connected battery packs is N.

[0110] For another example, if the values of the reference voltages increase in sequence, that is, Vref1 < Vref2 <... < Vref N , and when the voltage at the first input end of the comparison circuit is greater than the voltage at its second input end, the comparison circuit outputs a comparison signal with a high level.

[0111] Then, when no externally connected battery pack is incorporated, the first input ends of N comparison circuits are all incorporated into the second power supply VDD, and the voltage of the second power supply VDD is greater than any one of the reference voltages. Then, N comparison circuits all output comparison signals with a high level, and it is determined that no externally connected battery pack is incorporated.

[0112] When one externally connected battery pack is incorporated, resistor R 1A and the second reference resistor R 01 divide the second power supply VDD in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of N comparison circuits, and Vref N-1 <Vin1 < Vref N . Then, the Nth comparison circuit outputs a comparison signal with a low level, and the other comparison circuits output comparison signals with a high level. Then, it is determined that the number of externally connected battery packs is one.

[0113] And so on. When N externally connected battery packs are incorporated, resistor R 1A to resistor R N and the second reference resistor R01 The second power supply VDD is divided in voltage to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , where Vin N is transmitted to the first input ends of N comparison circuits, and Vin N < Vref1, then the comparison signals output by the first to the Nth comparison circuits are all low-level, and it is determined that the number of externally connected battery packs is N.

[0114] For another example, if the values of the reference voltages decrease in sequence, that is, Vref N < Vref N-1 <... < Vref1, and when the voltage at the first input end of the comparison circuit is greater than the voltage at its second input end, the comparison circuit outputs a high-level comparison signal.

[0115] When no externally connected battery pack is incorporated, the first input ends of the N comparison circuits are all incorporated into the second power supply VDD, and the voltage of the second power supply VDD is greater than any one of the reference voltages, then the N comparison circuits all output high-level comparison signals, and it is determined that no externally connected battery pack is incorporated.

[0116] When one externally connected battery pack is incorporated, the resistor R 1A and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin1. Among them, Vin1 is transmitted to the first input ends of the N comparison circuits, and Vref2 < Vin1 < Vref1, then the first comparison circuit outputs a low-level comparison signal, and the other comparison circuits output high-level comparison signals, and it is determined that the number of externally connected battery packs is one.

[0117] And so on, when N externally connected battery packs are incorporated, the resistors R 1A to the resistor R N and the second reference resistor R 01 divide the voltage of the second power supply VDD to obtain a second divided voltage signal, and the voltage of the second divided voltage signal is Vin N , where Vin N is transmitted to the first input ends of the N comparison circuits, and Vin N < Vref N , then the first to the Nth comparison circuits all output low-level comparison signals, and it is determined that the number of externally connected battery packs is N.

[0118] In some embodiments, the second reference resistor R 01 and the N comparison circuits 21 are all provided in the host. When an externally connected battery pack is incorporated, the externally connected battery pack is connected in parallel with the host through a connector, and the matching resistor in the externally connected battery pack and the second reference resistor R 01When multiple external battery packs are connected, the multiple external battery packs are connected in parallel through the connector, and then connected in parallel with the host through the connector. The matching resistors in each external battery pack form a parallel voltage divider module, which is then connected to the second reference resistor R 01 The second end of the

[0119] In some embodiments, in order to simplify the circuit design, the resistance values ​​of the N matching resistors can be set to the same resistance value, that is, the resistance R 1A To resistor R iA The resistance values ​​are all the same, so that each time an external battery pack is incorporated, the voltage of the second divided voltage signal changes.

[0120] The output ends of the N comparison circuits are respectively connected to the controller 30. For example, the output end of the first comparison circuit is electrically connected to the first pin of the controller 30, the output end of the second comparison circuit is electrically connected to the second pin of the controller 30, and so on. The output end of the Nth comparison circuit is electrically connected to the Nth pin of the controller 30.

[0121] The controller 30 analyzes the N comparison signals to obtain the recognition result. For example, if the reference voltage values ​​are increasing in sequence, that is, Vref1<Vref2<...<Vref N , and when the voltage at the first input terminal of the comparison circuit is less than the voltage at the second input terminal thereof, the comparison circuit outputs a high-level comparison signal.

[0122] If the first to Nth pins of the controller 30 all receive low-level comparison signals, it is determined that no battery pack is incorporated.

[0123] If the Nth pin of the controller 30 receives a high-level comparison signal and the first pin to the N-1th pin of the controller 30 all receive low-level comparison signals, it is determined that the number of the external battery pack is one.

[0124] If the Nth pin of the controller 30 receives a high-level comparison signal, the N-1th pin of the controller 30 receives a high-level comparison signal, and the first pin of the controller 30 to the N-2th pin of the controller 30 all receive low-level comparison signals, it is determined that the number of external battery packs is two.

[0125] If the first pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of external battery packs is N.

[0126] For another example, if the reference voltage value is decreasing in sequence, that is, Vref N <Vref N-1<...<Vref1, and when the voltage at the first input terminal of the comparison circuit is lower than the voltage at the second input terminal thereof, the comparison circuit outputs a high-level comparison signal.

[0127] If the controller 30 receives N low-level comparison signals, it determines that no external battery pack is connected.

[0128] If the first pin of the controller 30 receives a high-level comparison signal, and the second pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of the external battery pack is one.

[0129] If the first pin of the controller 30 receives a high-level comparison signal, the second pin of the controller 30 receives a high-level comparison signal, and the third pin of the controller 30 to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of external battery packs is two.

[0130] If the first pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of external battery packs is N.

[0131] For another example, if the values ​​of the reference voltages are increasing in sequence, that is, Vref1<Vref2<...<Vref N , and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at the second input terminal thereof, the comparison circuit outputs a high-level comparison signal.

[0132] If the controller 30 receives N high-level comparison signals, it determines that no external battery pack is connected.

[0133] If the first pin to the N-1th pin of the controller 30 all receive high-level comparison signals and the Nth pin of the controller 30 receives a low-level comparison signal, it is determined that the number of the external battery pack is one.

[0134] If the first pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of external battery packs is N.

[0135] For another example, if the reference voltage value is decreasing in sequence, that is, Vref N <Vref N-1 <...<Vref1, and when the voltage at the first input terminal of the comparison circuit is greater than the voltage at the second input terminal thereof, the comparison circuit outputs a high-level comparison signal.

[0136] If the controller 30 receives N high-level comparison signals, it determines that no external battery pack is connected.

[0137] If the first pin of the controller 30 receives a low-level comparison signal, and the second pin to the Nth pin of the controller 30 all receive high-level comparison signals, it is determined that the number of the external battery pack is one.

[0138] If the first pin to the Nth pin of the controller 30 all receive low-level comparison signals, it is determined that the number of external battery packs is N.

[0139] In some embodiments, the controller 30 can be a general-purpose controller, a digital signal controller (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a single-chip microcomputer, an ARM (Advanced RISC Machine) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Furthermore, the controller 30 can also be any conventional controller, controller, microcontroller, or state machine. The controller 30 can also be implemented as a combination of computing devices, such as a combination of a DSP and a microcontroller, multiple microcontrollers, one or more microcontrollers in conjunction with a DSP, and / or any other such configuration. The controller 30 can also be a battery management unit for the host computer.

[0140] See also Figure 4 , Figure 4 This is a circuit structure diagram of a quantity recognition circuit provided by an embodiment of the present application, such as Figure 4 As shown, the comparison circuit 21 in the quantity identification circuit 20 includes a comparator, a first voltage-dividing resistor, and a second voltage-dividing resistor, wherein the first end of the first voltage-dividing resistor is electrically connected to the first end of the second voltage-dividing resistor and the second input end of the comparator, respectively, the second end of the first voltage-dividing resistor is used to access the third power supply VCC, and the second end of the second voltage-dividing resistor is grounded GND. The first voltage-dividing resistor and the second voltage-dividing resistor divide the third power supply VCC to obtain a reference voltage, the first input end of the comparator is used to access the second voltage-dividing signal, and the second input end of the comparator is used to access the corresponding reference voltage.

[0141] like Figure 4 As shown, the number of comparison circuits is N, the number of first voltage-dividing resistors is N, the number of second voltage-dividing resistors is N, and the first comparison circuit includes a comparator U1, a first voltage-dividing resistor R 11 And the second voltage divider resistor R 21 The second comparison circuit includes a comparator U2, a first voltage divider resistor R 12 And the second voltage divider resistor R 22 The third comparison circuit includes a comparator U3, a first voltage divider resistor R 13 And the second voltage divider resistor R 23 , and so on, the Nth comparison circuit includes comparator UN , the first voltage divider resistor R 1N And the second voltage divider resistor R 2N .

[0142] Furthermore, the first voltage divider resistor R 11 With the second voltage divider resistor R 21 Divide the third power supply VCC to obtain the first reference voltage Vref1, that is, Vref1=VCC×R 21 / (R 11 +R 21 ), the first voltage divider resistor R 12 With the second voltage divider resistor R 22 Divide the third power supply VCC to obtain the second reference voltage Vref2, that is, Vref2=VCC×R 22 / (R 12 +R 22 ), the first voltage divider resistor R 13 With the second voltage divider resistor R 23 Divide the third power supply VCC to obtain the third reference voltage Vref3, that is, Vref3=VCC×R 23 / (R 13 +R 23 ), and so on, the first voltage divider resistor R 1N With the second voltage divider resistor R 2N Divide the third power supply VCC to obtain a third reference voltage Vref N , that is, Vref N =VCC×R 2N / (R 1N +R 2N ).

[0143] If the reference voltage increases in sequence, that is, Vref1 <Vref2<...<Vref N , Vref1=VCC×R 21 / (R 11 +R 21 ) <Vref2=VCC×R 22 / (R 12 +R 22 )<... <Vref N =VCC×R 2N / (R 1N +R 2N ), then R 21 / (R 11 +R 21 ) <R 22 / (R 12 +R 22 )<... <R 2N / (R1N +R 2N ), at the same time, the second power supply VDD is greater than the maximum value of the reference voltage, then VDD>Vref N =VCC×R 2N / (R 1N +R 2N ), that is, VDD>VCC×R 2N / (R 1N +R 2N ).

[0144] If the reference voltage value is decreasing in sequence, that is, Vref N <Vref N-1 <... <Vref1,Vref N =VCC×R 2N / (R 1N +R 2N ) <Vref N-1 =VCC×R 2(N-1) / (R 1(N-1) +R 2(N-1) )<... <Vref1=VCC×R 21 / (R 11 +R 21 ), then R 2N / (R 1N +R 2N ) <R 2(N-1) / (R 1(N-1) +R 2(N-1) )<... <R 21 / (R 11 +R 21 ), at the same time, the second power supply VDD voltage is greater than the maximum value of the reference voltage, then VDD>Vref1=VCC×R 21 / (R 11 +R 21 ), that is, VDD>VCC×R 21 / (R 11 +R 21 ).

[0145] Therefore, by configuring the ratio of the first voltage-dividing resistor and the second voltage-dividing resistor in each comparison circuit, the voltage of the reference voltage can meet the constraint condition of sequentially increasing or sequentially decreasing.

[0146] When i external battery packs are connected to the host, i matching resistors are connected in parallel and then connected to the second reference resistor R 01 The second end is connected to the second reference resistor R 01 The second end of generates a second voltage-divided signal. The resistance value of each matching resistor is the same. If the resistance value of each matching resistor is R, the voltage of the second voltage-divided signal is:

[0147] Vin i =R / (R + i×R 01 )(9)

[0148] Where, Vin i is the voltage of the second voltage-dividing signal when i external battery packs are incorporated into the host, R is the resistance value of the matching resistor, and R 01 is the resistance value of the second reference resistor R 01 , and i is a positive integer from 0 to N.

[0149] In order to identify the number of external battery packs by comparing the level states of signals, when each external battery pack is connected, the level states of N comparison signals need to change bit by bit. If the voltage of the reference voltage is gradually increasing, the voltage of the second voltage-dividing signal and the voltages of each reference voltage need to satisfy the following first constraint condition:

[0150] When i = 0, Vin0 = VDD > Vref N , when i is a positive integer from 1 to N - 1, Vref N-i <Vin i < Vref N-i+1 , when i = N, Vin N < Vref1. Where, VDD is the voltage of the second power supply, and Vin[[ID=3??]] i is the voltage of the second voltage-dividing signal when i external battery packs are incorporated into the host, and Vref i is the voltage of the i-th reference voltage.

[0151] Correspondingly, the first voltage-dividing resistor and the second voltage-dividing resistor satisfy the third constraint condition:

[0152] When i = 0, Vin0 = VDD > VCC×R 2N / (R 1N + R 2N ), when i is a positive integer from 1 to N - 1, VCC×R 2(N-i) / (R 1(N-i) + R 2(N-i) ) < Vin i < VCC×R 2(N-i+1) / (R 1(N-i+1) + R 2(N-i+1) ), when i = N, Vin N < VCC×R 21 / (R 11 + R 21 ).

[0153] Where, VCC is the voltage of the third power supply, R 1i is the first voltage-dividing resistor in the i-th comparison circuit, and R 2iis the second voltage-dividing resistor in the i-th comparison circuit.

[0154] Similarly, if the reference voltage is gradually decreasing, the voltage of the second divided voltage signal and the voltage of each reference voltage must satisfy the second constraint:

[0155] If i is 0, Vin0=VDD>Vref1, if i is a positive integer from 1 to N-1, Vref i+1 <Vin i <Vref i , if i is N, Vin N <Vref N .

[0156] Correspondingly, the first voltage-dividing resistor and the second voltage-dividing resistor satisfy the fourth constraint:

[0157] If i is 0, Vin0=VDD>VCC×R 21 / (R 11 +R 21 ), if i is a positive integer from 1 to N-1, VCC×R 2(i+1) / (R 1(i+1) +R 2(i+1) )<Vin i <VCC×R 2i / (R 1i +R 2i ), if i is N, Vin N <VCC×R 2N / (R 1N +R 2N ).

[0158] Therefore, by designing the size relationship between the first voltage-dividing resistor and the second voltage-dividing resistor, the voltages of the N reference voltages satisfy a relationship of increasing or decreasing in sequence, and the voltage of each second voltage-dividing signal satisfies the above-mentioned first constraint relationship or third constraint relationship.

[0159] In some embodiments, as Figure 4 As shown, the inverting input terminal of the comparator is the first input terminal of the comparator, and the non-inverting input terminal of the comparator is the second input terminal of the comparator.

[0160] The comparison circuit further includes a pull-up resistor R', which is connected in series between the third power supply VCC and the output terminal of the comparator. The pull-up resistor R' is an open-drain pull-up resistor of the comparator, which enables the comparator to output a high level.

[0161] Taking N as 4 as an example, the working principle of the quantity recognition circuit 20 is described. Figure 5As shown, the inverting input terminal of the comparator is the first input terminal of the comparator, the non-inverting input terminal of the comparator is the second input terminal of the comparator, and the comparison signal output by the first comparator is Vout1, the comparison signal output by the second comparator is Vout2, the comparison signal output by the third comparator is Vout3, and the comparison signal output by the fourth comparator is Vout4.

[0162] If the reference voltage increases gradually, that is, Vref1 < Vref2 < Vref3 < Vref4, and Vref1 = 2.7V, Vref2 = 3.5V, Vref3 = 5.0V, Vref4 = 9.0V, VDD = 12.0V.

[0163] When no external battery pack is connected to the host, i is 0, the voltage of the second divided voltage signal is Vin0=VDD, VDD>Vref4, and the four comparators all output low-level comparison signals.

[0164] When an external battery pack is connected to the host, i is 1, and the voltage of the second divided voltage signal is Vin1=R / (R+1×R 01 )=6.0V, Vref3<Vin1<Vref4, then the comparison signal Vout1 output by the first comparator U1 is a high-level signal, and the other comparators output low-level signals.

[0165] When two external battery packs are connected to the host, i is 2, and the voltage of the second divided voltage signal is Vin2=R / (R+2×R 01 )=4.0V, Vref2<Vin2<Vref3, then the comparison signals Vout1 and Vout2 output by the first comparator U1 and the second comparator U2 are both high-level signals, and the other comparators output low-level signals.

[0166] When three external battery packs are connected to the host, i is 3, and the voltage of the second divided voltage signal is Vin3=R / (R+3×R 01 )=3.0V, Vref1<Vin3<Vref2, then the comparison signals Vout1, Vout2 and Vout3 output by the first comparator U1, the second comparator U2 and the third comparator U3 are all high-level signals, and the fourth comparator outputs a low-level signal.

[0167] When four external battery packs are connected to the host, i is 4, and the voltage of the second divided voltage signal is Vin4=R / (R+4×R 01 )=2.4V, Vin4<Vref1, then the comparison signals Vout1, Vout2, Vout3 and Vout4 output by the four comparators are all high-level signals.

[0168] The determination relationship comparison table of the quantity recognition circuit 20 can be shown in Table 1:

[0169] Table 1 Comparison table of determination relationships of quantity recognition circuit 20

[0170]

[0171] Thus, the controller 30 can identify the number of external battery packs according to the level states of the four comparison signals.

[0172] In some embodiments, if the reference voltage is gradually decreasing, ie, Vref4 < Vref3 < Vref2 < Vref1 , and Vref4 = 2.7V, Vref3 = 3.5V, Vref2 = 5.0V, Vref1 = 9.0V, VDD = 12.0V.

[0173] The working principle of the quantity recognition circuit 20 is similar to that of the above embodiment and will not be described in detail here. The determination relationship comparison table of the quantity recognition circuit 20 can be shown in Table 2:

[0174] Table 2 Comparison table of determination relationships of quantity recognition circuit 20

[0175]

[0176] Thus, the controller 30 can determine the number of external battery packs according to the level status of the four comparison signals. The controller 30 recognizes that the number of external battery packs is 4, and then infers the total measured value of the coding resistance in the external battery pack from the voltage of the first voltage-divided signal, and then calculates the total measured value of the coding resistance in the external battery pack through R m =4×R 总 Get the coding resistance R 1B , coding resistor R 2B , coding resistor R 3B And the coding resistor R 4B The measured resistance value R m , and then determine the measured resistance value R from the mapping relationship set m The target ideal resistance that matches it is obtained, and finally the type parameters of the external battery pack corresponding to the target ideal resistance are obtained.

[0177] See also Figure 6 , Figure 6 : is a circuit structure diagram of a quantity identification circuit 20 provided in an embodiment of the present application, Figure 6 and Figure 4 The difference is that the non-inverting input terminal of the comparator is the first input terminal of the comparator, and the inverting input terminal of the comparator is the second input terminal of the comparator. Figure 6 The constraints that each resistor and reference voltage must satisfy are Figure 4The same, no longer repeated here.

[0178] Taking N as 4 as an example, the working principle of the quantity recognition circuit 20 is described. Figure 7 As shown, the non-inverting input terminal of the comparator is the first input terminal of the comparator, the inverting input terminal of the comparator is the second input terminal of the comparator, and the comparison signal output by the first comparator is Vout1, the comparison signal output by the second comparator is Vout2, the comparison signal output by the third comparator is Vout3, and the comparison signal output by the fourth comparator is Vout4.

[0179] If the reference voltage increases gradually, that is, Vref1 < Vref2 < Vref3 < Vref4, and Vref1 = 2.7V, Vref2 = 3.5V, Vref3 = 5.0V, Vref4 = 9.0V, VDD = 12.0V.

[0180] When no external battery pack is connected to the host, i is 0, the voltage of the second divided voltage signal is Vin0=VDD, VDD>Vref4, and the four comparators all output high-level comparison signals.

[0181] When an external battery pack is connected to the host, i is 1, and the voltage of the second divided voltage signal is Vin1=R / (R+1×R 01 )=6.0V, Vref3<Vin1<Vref4, then the comparison signals Vout1, Vout2 and Vout3 output by the first comparator U1, the second comparator U2 and the third comparator U3 are all high-level signals, and the fourth comparator U4 outputs a low-level signal.

[0182] When two external battery packs are connected to the host, i is 2, and the voltage of the second divided voltage signal is Vin2=R / (R+2×R 01 )=4.0V, Vref2<Vin2<Vref3, then the comparison signals Vout1 and Vout2 output by the first comparator U1 and the second comparator U2 are both high-level signals, and the other comparators output low-level signals.

[0183] When three external battery packs are connected to the host, i is 3, and the voltage of the second divided voltage signal is Vin3=R / (R+3×R 01 )=3.0V, Vref1<Vin3<Vref2, then the comparison signal Vout1 output by the first comparator U1 is a high-level signal, and the other comparators output low-level signals.

[0184] When four external battery packs are connected to the host, i is 4, and the voltage of the second divided voltage signal is Vin4=R / (R+4×R 01)=2.4V, Vin4<Vref1, then the four comparators all output low-level signals.

[0185] Thus, the controller 30 can identify the number of external battery packs according to the level states of the four comparators.

[0186] The determination relationship comparison table of the quantity recognition circuit 20 can be shown in Table 3:

[0187] Table 3 Comparison table of determination relationships of quantity recognition circuit 20

[0188]

[0189] In some embodiments, if the reference voltage is gradually decreasing, ie, Vref4 < Vref3 < Vref2 < Vref1 , and Vref4 = 2.7V, Vref3 = 3.5V, Vref2 = 5.0V, Vref1 = 9.0V, VDD = 12.0V.

[0190] The working principle of the quantity recognition circuit 20 is similar to that of the above embodiment and will not be described in detail here. The determination relationship comparison table of the quantity recognition circuit 20 can be shown in Table 4:

[0191] Table 4 Comparison table of determination relationships of quantity recognition circuit 20

[0192]

[0193] Therefore, the controller 30 can determine the number of external battery packs according to the level states of the four comparison signals.

[0194] The controller 30 recognizes that the number of external battery packs is 4, and then infers the total measured value of the coding resistance in the external battery pack from the voltage of the first voltage-divided signal, and then calculates the total measured value of the coding resistance in the external battery pack through R m =4×R 总 Get the measured resistance value R of the coding resistor m , and then determine the measured resistance value R from the mapping relationship set m The target ideal resistance that matches it is obtained, and finally the type parameters of the external battery pack corresponding to the target ideal resistance are obtained.

[0195] In summary, different numbers of external battery packs incorporated into the host correspond to different levels of the first identification signal. The controller identifies the number of external battery packs based on the different first identification signals. Furthermore, external battery packs of the same type incorporated into the host correspond to the same coding resistor value. The controller identifies the type parameters of the corresponding external battery packs based on the first voltage divider signal and the number of external battery packs. However, different types of external battery packs correspond to different coding resistor values, resulting in a first voltage divider signal that is different from the first voltage divider signals generated when other types of external battery packs are connected. Therefore, the controller can identify the type parameters of the corresponding external battery packs based on the number of external battery packs and the different first voltage divider signals. Thus, the digital type detection circuit can identify the number and type of external battery packs incorporated into the host.

[0196] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Based on the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the present application as described above. For the sake of simplicity, they are not provided in detail. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A digital detection circuit, characterized in that: Applied to an energy storage system, the energy storage system includes a host and i external battery packs of the same type for connection to the host, the number type detection circuit includes: a quantity recognition circuit, a type recognition circuit and a controller; The quantity identification circuit is connected to the controller, and is configured to generate a first identification signal in response to the external battery pack being incorporated into the host, wherein a level state of the first identification signal is related to the quantity of the external battery packs; The type identification circuit includes a first reference resistor disposed within the host and i coding resistors of the same resistance value, each configured for a plurality of external battery packs of the same type. The first end of the first reference resistor is connected to a first power source. When the external battery pack is incorporated into the host, the coding resistors are connected in parallel to the second end of the first reference resistor to form a voltage divider node, which is also connected to the controller. The type identification circuit is configured to generate a first voltage-divided signal at the voltage-divided node in response to the external battery pack being incorporated into the host, wherein a voltage of the first voltage-divided signal is related to a type of the external battery pack; The controller is configured to sample the first identification signal and the first divided voltage signal, obtain the number of the external battery packs based on the first identification signal, and identify a type parameter of the external battery pack based on the number of the external battery packs and the first divided voltage signal.

2. The digital detection circuit according to claim 1, characterized in that: The controller is configured to identify a type parameter of the external battery pack based on the number of the external battery packs and the first voltage division signal, including: Obtaining a total measurement value of the i coding resistors based on a voltage division principle and the first voltage division signal; Obtaining a measured resistance value corresponding to the coding resistor based on the total measured value and the number of the external battery packs; A resistor value search is performed in a mapping relationship set to obtain a target ideal resistor and type parameter that matches the numerical value of the measured resistance value; wherein the mapping relationship set includes an ideal resistor that matches the coded resistor and a type parameter of the external battery pack that corresponds one-to-one to the ideal resistor.

3. The digital detection circuit according to claim 2, characterized in that: The obtaining, based on the total measured value and the number of the external battery packs, a measured resistance value corresponding to the coding resistor includes: The measured resistance value is calculated by the following formula: R m =i×R 总 ; Among them, R m is the measured resistance value, R 总 is the total value of the measurement.

4. The digital detection circuit according to claim 1, characterized in that: The quantity recognition circuit includes: i matching resistors, each of the i matching resistors belongs to one of the i external battery packs and has the same resistance value; a second reference resistor and N comparison circuits, wherein the first end of the second reference resistor is connected to the second power supply. When i external battery packs are incorporated into the host, the i matching resistors are connected in parallel to form a parallel voltage divider module. The first end and the second end of the parallel voltage divider module are respectively connected to the second end of the second reference resistor and the ground. The first end of the parallel voltage divider module obtains a second voltage divided signal related to the second power supply, and the second voltage divided signal is connected to the first input ends of the N comparison circuits. The second input terminal of each comparison circuit is connected to a reference voltage, wherein the values ​​of the N reference voltages are different; The N comparison circuits are configured to output N comparison signals reflecting the number of the external battery packs according to the voltage of the second voltage-divided signal and the N reference voltages, wherein the N comparison signals together constitute the first identification signal; Wherein, i is a positive integer from 0 to N, and N is a positive integer greater than or equal to 1.

5. The digital detection circuit according to claim 4, characterized in that: Each of the comparison circuits includes a first voltage-dividing resistor, a second voltage-dividing resistor, and a comparator; The first end and the second end of the first voltage-dividing resistor are respectively connected to a third power supply and the first end of the second voltage-dividing resistor, the second end of the second voltage-dividing resistor is connected to a ground end, the connection point between the first voltage-dividing resistor and the second voltage-dividing resistor is connected to the second input terminal of the corresponding comparator, the first voltage-dividing resistor and the second voltage-dividing resistor divide the third power supply to obtain the reference voltages, and each of the reference voltages is connected to the second input terminal of the corresponding comparator; The first input terminal of the comparator is used to receive the second voltage-divided signal, and the N comparators are used to output N comparison signals according to the second voltage-divided signal and the N reference voltages.

6. The digital detection circuit according to claim 5, characterized in that: The inverting input terminal of the comparator is the first input terminal of the comparator, and the non-inverting input terminal of the comparator is the second input terminal of the comparator; or, the non-inverting input terminal of the comparator is the first input terminal of the comparator, and the inverting input terminal of the comparator is the second input terminal of the comparator.

7. The digital detection circuit according to any one of claims 4 to 6, characterized in that: The values ​​of the N reference voltages are increased in sequence, and the voltage of the second voltage-divided signal and the N reference voltages satisfy a first constraint condition: If i is 0, Vin0=VDD>Vref N ; If i is a positive integer from 1 to N-1, Vref N-i <Vin i <Vref N-i+1 ; If i is N, Vin N <Vref1; Wherein, VDD is the voltage of the second power supply, Vin i is the voltage of the second divided voltage signal when i external battery packs are incorporated into the host, Vref i is the i-th reference voltage.

8. The digital detection circuit according to any one of claims 4 to 6, characterized in that: The values ​​of the N reference voltages decrease in sequence, and the voltage of the second voltage-divided signal and the N reference voltages satisfy a second constraint condition: If i is 0, Vin0=VDD>Vref1; If i is a positive integer from 1 to N-1, Vref i+1 <Vin i <Vref i ; If i is N, Vin N <Vref N ; Wherein, VDD is the voltage of the second power supply, Vin i is the voltage of the second divided voltage signal when i external battery packs are incorporated into the host, Vref i is the i-th reference voltage.

9. The digital detection circuit according to any one of claims 1 to 6, characterized in that: Different types of external battery packs are assigned coding resistors with different resistance values. The resistance of the coding resistor is obtained by performing resistance coding assignment based on the analog-to-digital sampling range of the controller, including: Determine the maximum resistance value and the minimum resistance value of the coding resistor based on the analog-to-digital sampling range of the controller; Determining a reference resistance value based on an analog-to-digital sampling range of the controller, a voltage of the first power supply, and a resistance value of the first reference resistor; determining a minimum allowable interval based on the reference resistance value; Based on the minimum allowable interval, dividing the resistance values ​​from the minimum resistance value to the maximum resistance value to obtain a plurality of resistance values ​​of the coding resistors, wherein a difference between the resistance values ​​of two adjacent coding resistors is greater than or equal to the minimum allowable interval; Allocating a plurality of the coding resistors to a plurality of different types of the external battery packs; Wherein, one of the coding resistors may be a single resistor or a plurality of resistors connected in parallel.

10. An energy storage system, characterized in that: The energy storage system includes a host, i external battery packs, and a number and type detection circuit as described in any one of claims 1 to 9, wherein each of the external battery packs is connected in parallel with the host, and the number and type detection circuit is configured to identify the number and type parameters of the external battery packs.

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