Wafer classification method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention discloses a wafer classification method and device, electronic equipment and a storage medium, relates to the technical field of integrated circuits, and can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification. The method comprises the following steps: acquiring first test data of a wafer to be classified, wherein the first test data comprises test data of a wafer acceptance test; according to the first test data of the to-be-classified wafer and a wafer classification model, determining a wafer category to which the to-be-classified wafer belongs; wherein the wafer classification model comprises a corresponding relation between a wafer category and wafer test data, the wafer test data comprises the first test data and second test data of the wafer, and the second test data comprises test data after packaging of each crystal grain in the wafer. The method is suitable for chip production and testing.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and in particular, to a wafer classification method and apparatus, an electronic device, and a storage medium. Background Art

[0002] A wafer is a circular thin slice formed of a semiconductor material and is the manufacturing basis of integrated circuits. Thousands of identical integrated circuit dies can be manufactured on each wafer, and individual dies are formed by dicing. In production practice, the dies can be graded according to the data of wafer probe testing (CP, Chip Probing). For example, parameters such as the frequency and static current of each die on the wafer can be tested by a probe station, and each die can be graded according to these parameters. Dies of different grades can be defined as products of different specifications and packaged with different specifications.

[0003] However, with the continuous improvement of chip performance, operating parameters such as chip power consumption and operating voltage have become increasingly important metrics for chip performance. The die grading based on wafer probe testing described above cannot reflect the advantages and disadvantages of operating parameters such as chip power consumption and operating voltage, so the chip grading is not accurate enough. Moreover, since this grading method needs to wait until the wafer probe testing is completed before grading, and it usually takes a long waiting period (for example, two weeks) from the time the wafer is shipped from the factory to the completion of the wafer probe testing. Therefore, once problems are found after the wafer probe testing, such as the discovery of a small number of optimal or good products, since this time point is relatively late, it may affect the subsequent finished product output plan.

[0004] In view of the problems of poor accuracy and timeliness of chip grading, there is no effective solution in the related art. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide a wafer classification method and apparatus, an electronic device, and a storage medium, which can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification.

[0006] In a first aspect, an embodiment of the present invention provides a wafer classification method, including: obtaining first test data of a wafer to be classified, where the first test data includes test data of wafer acceptance test (WAT, wafer acceptance test); determining a wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and a wafer classification model, where the wafer classification model includes a correspondence between wafer categories and wafer test data, the wafer test data includes the first test data of the wafer and second test data, and the second test data includes test data after encapsulation of each die in the wafer.

[0007] In one embodiment, the correspondence between the wafer categories and the wafer test data includes: the correspondence between the wafer categories and the value ranges of the wafer test data of the wafers in each wafer category, and the value ranges of the wafer test data include: the first value range of the first operation data and the second value range of the second test data, where the first operation data is the data obtained by operating on the first test data by a preset algorithm.

[0008] In one embodiment, the number of the wafer categories is multiple, and each of the wafer categories includes at least two quality grades; the correspondence between the wafer categories and the wafer test data includes: the correspondence between each wafer category and the value range of the wafer test data of the wafers in each wafer category, and the correspondence between each quality grade and the value range of the wafer test data of the wafers in each quality grade.

[0009] In one embodiment, the preset algorithm includes any one of the following: remaining unchanged, linear operation, and power operation.

[0010] In one embodiment, determining the wafer category to which the to-be-classified wafer belongs according to the first test data of the to-be-classified wafer and the wafer classification model includes: determining, according to the preset algorithm, the first operation data corresponding to the first test data of the to-be-classified wafer; determining the median of the multiple first operation data of the to-be-classified wafer to obtain a first median; determining, according to the wafer classification model, the first value range in which the first median falls to obtain a target range; and determining, according to the wafer classification model, the wafer category corresponding to the target range to obtain a target category, and using the target category as the wafer category to which the to-be-classified wafer belongs.

[0011] In one embodiment, the number of the wafer categories is multiple, and each of the wafer categories includes at least two quality grades; the correspondence between the wafer categories and the wafer test data includes: the correspondence between each wafer category and the value range of the wafer test data of the wafers in each wafer category, and the correspondence between each quality grade and the value range of the wafer test data of the wafers in each quality grade; determining, according to the wafer classification model, the wafer category corresponding to the target range to obtain a target category, and using the target category as the wafer category to which the to-be-classified wafer belongs includes: determining, according to the wafer classification model, the wafer category and the quality grade corresponding to the target range to obtain a target category and a target grade, and using the target category and the target grade as the wafer category and the quality grade to which the to-be-classified wafer belongs.

[0012] In one embodiment, the first test data includes a first test component corresponding to an N-type transistor and a second test component corresponding to a P-type transistor; the first operation data includes a first operation component and a second operation component, the first operation component is obtained by operating the first test component through the preset algorithm, and the second operation component is obtained by operating the second test component through the preset algorithm; the wafer classification model includes a preset coordinate map, and the preset coordinate map includes a first coordinate map or a second coordinate map; wherein, the first coordinate map is established based on a plane rectangular coordinate system, the plane rectangular coordinate system uses the first operation component and the second operation component as two mutually perpendicular coordinate axes, and the second test data is marked in the plane rectangular coordinate system through a preset manner; the second coordinate map is established based on a space rectangular coordinate system, and the space rectangular coordinate system uses the first operation component, the second operation component, and the second test data as three mutually perpendicular coordinate axes.

[0013] In one embodiment, the correspondence between the wafer category and the wafer test data includes: the correspondence between the wafer category and the value range of the wafer test data of the wafers in this wafer category, and the value range of the wafer test data includes: the first value range of the first operation data and the second value range of the second test data, wherein, the first operation data is the data obtained by operating the first test data through the preset algorithm; the value range of the wafer test data of the wafers in each wafer category is determined based on at least two concentric circles in the first coordinate map, wherein, the value range of the wafer test data of the wafers in each wafer category is the range included by the smallest one of the at least two concentric circles, or the range included by the ring formed by two adjacent concentric circles with different radii; or, the value range of the wafer test data of the wafers in each wafer category is determined based on at least two concentric cylinders in the second coordinate map, wherein, the value range of the wafer test data of the wafers in each wafer category is the range included by the smallest one of the at least two concentric cylinders, or the range included by the ring cylinder formed by two adjacent concentric cylinders with different radii.

[0014] In one embodiment, the first test data includes any one of the following: saturation voltage, drain current in the saturation region.

[0015] In one embodiment, the second test data includes any one of the following: power consumption, operating voltage.

[0016] In one embodiment, after determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model, the method further includes: determining, according to the wafer category to which the wafer to be classified belongs, the die in the wafer to be classified that is intended to be packaged into a chip, where the chip has preset specification parameters, and the specification parameters include the part number of the chip, or the part number of the chip and the quality grade under the part number.

[0017] In one embodiment, before determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model, the method further includes: obtaining sample test data of die samples, where the sample test data includes first sample data and second sample data, the first sample data includes the test data of the wafer acceptance test corresponding to the die samples; the second sample data includes the test data after the die samples are packaged; and constructing the wafer classification model according to the sample test data and a preset classification rule.

[0018] In one embodiment, constructing the wafer classification model according to the sample test data and the preset classification rule includes: establishing a sample coordinate system; plotting sample points corresponding to the die samples in the sample coordinate system according to the first sample data and the second sample data of the die samples; determining a target contour according to the distribution contour formed by the sample points in the sample coordinate system; where, when the distribution contour is a two-dimensional distribution contour, the target contour is the distribution contour; or, when the distribution contour is a three-dimensional distribution contour, the target contour is the projection of the distribution contour along a preset coordinate axis direction of the sample coordinate system; fitting the target contour into a circle to obtain a fitted circle; and constructing the wafer classification model based on the fitted circle and the preset classification rule.

[0019] In one embodiment, the establishment of the sample coordinate system includes: determining first sample operation data according to the first sample data, where the first sample data includes a first sample component corresponding to an N-type transistor and a second sample component corresponding to a P-type transistor; the first sample operation data includes a first sample operation component and a second sample operation component, the first sample operation component is obtained by operating the first sample component through the preset algorithm, and the second sample operation component is obtained by operating the second sample component through the preset algorithm; establishing the sample coordinate system according to the first sample operation data and the second sample data; where the sample coordinate system includes a first sample coordinate system or a second sample coordinate system; the first sample coordinate system uses the first sample operation component and the second sample operation component as two mutually perpendicular coordinate axes, and the second sample data is marked in the first sample coordinate system through a preset manner; the second sample coordinate system uses the first sample operation component, the second sample operation component and the second sample data as pairwise perpendicular coordinate axes.

[0020] In one embodiment, the construction of the wafer classification model based on the fitted circle and the preset classification rule includes: determining a first boundary of the value range of the second sample data corresponding to each wafer category according to the preset classification rule; for each wafer category, based on the first boundary of the value range of the second sample data corresponding to the wafer category and the fitted circle, determining a first boundary of the value range of the first sample operation data corresponding to the wafer category; constructing the wafer classification model according to the first boundaries of the value ranges of the first sample operation data corresponding to each wafer category and the first boundaries of the value ranges of the second sample data corresponding to each wafer category.

[0021] In one embodiment, for each of the wafer categories, determining the first boundary of the value range of the first sample operation data corresponding to the wafer category based on the first boundary of the value range of the second sample data corresponding to the wafer category and the fitting circle includes: for each of the wafer categories, taking the center of the fitting circle as the center, using a preset length as the initial value, and increasing the radius length step by step to obtain at least two stepped circles, where the preset length is less than the radius of the fitting circle, and each of the stepped circles is located within the fitting circle; determining a boundary circle from the at least two stepped circles, and using the coordinates of the points on the boundary circle as the first boundary of the value range of the first sample operation data corresponding to the wafer category; where the boundary circle has a preset association relationship with the first boundary of the value range of the second sample data, and the preset association relationship includes: the median of each of the second sample data of the first type of die samples corresponding to the boundary circle is less than the first boundary of the value range of the second sample data, and the median of each of the second sample data of the second type of die samples corresponding to the boundary circle is greater than or equal to the first boundary of the value range of the second sample data; where, if the boundary circle is the smallest one among the at least two stepped circles, the first type of die samples are the die samples within the preset central angle coverage area in the boundary circle; if the boundary circle is not the smallest one among the at least two stepped circles, the first type of die samples are the die samples within the preset central angle coverage area in the ring sandwiched between the boundary circle and the largest stepped circle smaller than the boundary circle; the second type of die samples are the die samples within the preset central angle coverage area in the ring sandwiched between the boundary circle and the smallest stepped circle larger than the boundary circle.

[0022] In one embodiment, in the fitting circle, the ratio of the number of the third type of die samples within the preset central angle coverage area to the number of all the third type of die samples in the fitting circle is greater than a first threshold, where the third type of die samples are the die samples with the second sample data greater than a second threshold.

[0023] In one embodiment, the preset central angle is from 45 degrees to 180 degrees.

[0024] In one embodiment, constructing the wafer classification model according to the first boundary of the value range of the first sample operation data corresponding to each of the wafer categories and the first boundary of the value range of the second sample data corresponding to each of the wafer categories includes: constructing the wafer classification model according to the boundary circles corresponding to each of the wafer categories.

[0025] In one implementation, constructing the wafer classification model according to the demarcation circles corresponding to the respective wafer categories includes: superposing the demarcation circles corresponding to the respective wafer categories on each other to obtain at least two corresponding demarcation concentric circles; constructing the wafer classification model according to the closed regions divided by the at least two demarcation concentric circles in the sample coordinate system, where the closed regions include the smallest one of the at least two demarcation concentric circles and the circular rings sandwiched between two demarcation concentric circles with adjacent radii.

[0026] In one implementation, constructing the wafer classification model according to the demarcation circles corresponding to the respective wafer categories includes: for the demarcation circle corresponding to each wafer category, dividing the region covered by the demarcation circle into at least two sub-regions according to the standard deviation of the first sample operation data of each die sample in the demarcation circle, and each sub-region represents a different quality level of the wafer; constructing the wafer classification model according to the demarcation circles corresponding to the respective wafer categories and the respective sub-regions in the demarcation circles.

[0027] In one implementation, dividing the region covered by the demarcation circle corresponding to each wafer category into at least two sub-regions according to the standard deviation of the first sample operation data of each die sample in the demarcation circle includes: for the demarcation circle corresponding to each wafer category, taking the center of the demarcation circle as the center and taking the product of the standard deviation of the first sample operation data and a preset coefficient as the radius, drawing at least one concentric circle of the demarcation circle to obtain a corresponding grading circle; dividing the demarcation circle into at least two sub-regions according to the respective grading circles; constructing the wafer classification model according to the demarcation circles corresponding to the respective wafer categories and the respective sub-regions in the demarcation circles includes: superposing the demarcation circles corresponding to the respective wafer categories and the respective grading circles in the demarcation circles on each other to obtain a corresponding plurality of mixed concentric circles; constructing the wafer classification model according to the closed regions divided by the plurality of mixed concentric circles in the sample coordinate system, where the closed regions include the smallest one of the at least two mixed concentric circles and the circular rings sandwiched between two mixed concentric circles with adjacent radii.

[0028] Second aspect, an embodiment of the present invention further provides a wafer classification device, including: a first acquisition unit, configured to acquire first test data of a wafer to be classified, where the first test data includes test data of wafer acceptance test; a first determination unit, configured to determine a wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and a wafer classification model; where the wafer classification model includes a correspondence relationship between a wafer category and wafer test data, and the wafer test data includes the first test data and second test data of the wafer, and the second test data includes test data after encapsulation of each die in the wafer.

[0029] In an implementation manner, the correspondence relationship between the wafer category and the wafer test data includes: a correspondence relationship between the wafer category and a value range of the wafer test data of the wafer in this wafer category, and the value range of the wafer test data includes: a first value range of first operation data and a second value range of the second test data, where the first operation data is data obtained by performing a preset algorithm operation on the first test data.

[0030] In an implementation manner, the number of the wafer categories is multiple, and each of the wafer categories includes at least two quality grades; the correspondence relationship between the wafer category and the wafer test data includes: a correspondence relationship between each wafer category and a value range of the wafer test data of the wafer in this wafer category, and a correspondence relationship between each quality grade and a value range of the wafer test data of the wafer in this quality grade.

[0031] In an implementation manner, the preset algorithm includes any one of the following: remain unchanged, linear operation, power operation.

[0032] In an implementation manner, the first determination unit includes: a first determination module, configured to determine the first operation data corresponding to the first test data of the wafer to be classified according to the preset algorithm; a second determination module, configured to determine a median of multiple pieces of the first operation data of the wafer to be classified to obtain a first median; a third determination module, configured to determine, according to the wafer classification model, a first value range in which the first median falls to obtain a target range; a fourth determination module, configured to determine, according to the wafer classification model, a wafer category corresponding to the target range to obtain a target category, and use the target category as the wafer category to which the wafer to be classified belongs.

[0033] In one implementation, the number of the wafer categories is multiple, and each of the wafer categories includes at least two quality levels; the correspondence between the wafer categories and the wafer test data includes: the correspondence between each of the wafer categories and the value range of the wafer test data of the wafers in this wafer category, and the correspondence between each of the quality levels and the value range of the wafer test data of the wafers in this quality level; the fourth determination module is specifically configured to: according to the wafer classification model, determine the wafer category and the quality level corresponding to the target range, obtain the target category and the target level, and use the target category and the target level as the wafer category and the quality level to which the wafer to be classified belongs.

[0034] In one implementation, the first test data includes a first test component corresponding to an N-type transistor and a second test component corresponding to a P-type transistor; the first operation data includes a first operation component and a second operation component, the first operation component is obtained by operating the first test component through the preset algorithm, and the second operation component is obtained by operating the second test component through the preset algorithm; the wafer classification model includes a preset coordinate map, and the preset coordinate map includes a first coordinate map or a second coordinate map; wherein, the first coordinate map is established based on a plane rectangular coordinate system, the plane rectangular coordinate system uses the first operation component and the second operation component as two mutually perpendicular coordinate axes, and the second test data is marked in the plane rectangular coordinate system through a preset manner; the second coordinate map is established based on a space rectangular coordinate system, and the space rectangular coordinate system uses the first operation component, the second operation component, and the second test data as three mutually perpendicular coordinate axes.

[0035] In one embodiment, the correspondence between the wafer categories and the wafer test data includes: the correspondence between the wafer categories and the value ranges of the wafer test data of the wafers in the wafer categories, where the value ranges of the wafer test data include: the first value range of the first operation data and the second value range of the second test data, and the first operation data is the data obtained by performing a preset algorithm operation on the first test data; the value ranges of the wafer test data of the wafers in each of the wafer categories are determined based on at least two concentric circles in the first coordinate diagram, where the value range of the wafer test data of the wafers in each of the wafer categories is the range included in the smallest one of the at least two concentric circles, or the range included in the ring formed by two adjacent concentric circles with adjacent radii; or, the value ranges of the wafer test data of the wafers in each of the wafer categories are determined based on at least two coaxial cylinders in the second coordinate diagram, where the value range of the wafer test data of the wafers in each of the wafer categories is the range included in the smallest one of the at least two coaxial cylinders, or the range included in the ring cylinder formed by two adjacent coaxial cylinders with adjacent radii.

[0036] In one embodiment, the first test data includes any one of the following: saturation voltage, drain current in the saturation region.

[0037] In one embodiment, the second test data includes any one of the following: power consumption, operating voltage.

[0038] In one embodiment, the device further includes: a second determination unit, configured to, after determining the wafer category to which the to-be-classified wafer belongs according to the first test data of the to-be-classified wafer and the wafer classification model, determine the die in the to-be-classified wafer to be used for packaging into a chip according to the wafer category to which the to-be-classified wafer belongs, where the chip has preset specification parameters, and the specification parameters include the part number of the chip, or the part number of the chip and the quality grade under the part number.

[0039] In one embodiment, the device further includes: a second acquisition unit, configured to acquire sample test data of die samples before determining the wafer category to which the to-be-classified wafer belongs according to the first test data of the to-be-classified wafer and the wafer classification model, where the sample test data includes first sample data and second sample data, and the first sample data includes the test data of the wafer acceptance test corresponding to the die samples; the second sample data includes the test data after the die samples are packaged; and a construction unit, configured to construct the wafer classification model according to the sample test data and a preset classification rule.

[0040] In one embodiment, the building unit includes: an establishing module configured to establish a sample coordinate system; a drawing module configured to draw sample points corresponding to each of the grain samples in the sample coordinate system according to the first sample data and the second sample data of each of the grain samples; a fifth determining module configured to determine a target contour according to a distribution contour formed by the sample points in the sample coordinate system; wherein, when the distribution contour is a two-dimensional distribution contour, the target contour is the distribution contour; or, when the distribution contour is a three-dimensional distribution contour, the target contour is a projection of the distribution contour along a preset coordinate axis direction of the sample coordinate system; a fitting module configured to fit the target contour into a circle to obtain a fitted circle; a building module configured to build the wafer classification model based on the fitted circle and the preset classification rule.

[0041] In one embodiment, the establishing module is specifically configured to: determine first sample operation data according to the first sample data, wherein the first sample data includes a first sample component corresponding to an N-type transistor and a second sample component corresponding to a P-type transistor; the first sample operation data includes a first sample operation component and a second sample operation component, the first sample operation component is obtained by operating the first sample component through the preset algorithm, and the second sample operation component is obtained by operating the second sample component through the preset algorithm; establish the sample coordinate system according to the first sample operation data and the second sample data; wherein the sample coordinate system includes a first sample coordinate system or a second sample coordinate system; the first sample coordinate system takes the first sample operation component and the second sample operation component as two mutually perpendicular coordinate axes, and the second sample data is marked in the first sample coordinate system in a preset manner; the second sample coordinate system takes the first sample operation component, the second sample operation component and the second sample data as three mutually perpendicular coordinate axes.

[0042] In one embodiment, the building module includes: a first determining sub-module configured to determine a first boundary of a value range of the second sample data corresponding to each wafer category according to the preset classification rule; a second determining sub-module configured to, for each wafer category, determine a first boundary of a value range of the first sample operation data corresponding to the wafer category based on the first boundary of the value range of the second sample data corresponding to the wafer category and the fitted circle; a building sub-module configured to build the wafer classification model according to the first boundary of the value range of the first sample operation data corresponding to each wafer category and the first boundary of the value range of the second sample data corresponding to each wafer category.

[0043] In one embodiment, the second determination sub-module is specifically configured to: for each of the wafer categories, with the center of the fitted circle as the center, and with a preset length as the initial value, stepwise increase the radius length to obtain at least two stepped circles, where the preset length is less than the radius of the fitted circle, and each of the stepped circles is located within the fitted circle; determine a boundary circle from the at least two stepped circles, and use the coordinates of the points on the boundary circle as the first boundary of the value range of the first sample operation data corresponding to the wafer category; where the boundary circle has a preset association relationship with the first boundary of the value range of the second sample data, and the preset association relationship includes: the median of each of the second sample data of the first type of grain samples corresponding to the boundary circle is less than the first boundary of the value range of the second sample data, and the median of each of the second sample data of the second type of grain samples corresponding to the boundary circle is greater than or equal to the first boundary of the value range of the second sample data; where, if the boundary circle is the smallest one of the at least two stepped circles, the first type of grain samples are the grain samples within the preset central angle coverage area in the boundary circle; if the boundary circle is not the smallest one of the at least two stepped circles, the first type of grain samples are the grain samples within the preset central angle coverage area in the ring sandwiched between the boundary circle and the largest stepped circle smaller than the boundary circle; the second type of grain samples are the grain samples within the preset central angle coverage area in the ring sandwiched between the boundary circle and the smallest stepped circle larger than the boundary circle.

[0044] In one embodiment, in the fitted circle, the ratio of the number of the third type of grain samples within the preset central angle coverage area to the number of all the third type of grain samples in the fitted circle is greater than a first threshold, where the third type of grain samples are the grain samples with the second sample data greater than a second threshold.

[0045] In one embodiment, the preset central angle is from 45 degrees to 180 degrees.

[0046] In one embodiment, the construction sub-module is specifically configured to: construct the wafer classification model according to the boundary circles corresponding to the respective wafer categories.

[0047] In one embodiment, the construction sub-module is specifically configured to: superimpose the boundary circles corresponding to the respective wafer categories on each other to obtain at least two corresponding concentric boundary circles; construct the wafer classification model according to the closed regions divided by the at least two concentric boundary circles in the sample coordinate system, where the closed regions include the smallest one of the at least two concentric boundary circles and the rings sandwiched between two adjacent concentric boundary circles with adjacent radius sizes.

[0048] In one embodiment, the construction sub-module includes: a division second-level sub-module, configured to divide, for each of the demarcation circles corresponding to each of the wafer categories, the area covered by the demarcation circle into at least two sub-areas according to the standard deviation of the first sample operation data of each of the die samples in the demarcation circle, where each of the sub-areas represents a different quality level of the wafers; a construction second-level sub-module, configured to construct the wafer classification model according to the demarcation circles corresponding to each of the wafer categories and each of the sub-areas in the demarcation circles.

[0049] In one embodiment, the division second-level sub-module is specifically configured to: for each of the demarcation circles corresponding to each of the wafer categories, draw at least one concentric circle of the demarcation circle with the center of the demarcation circle as the center and the product of the standard deviation of the first sample operation data and a preset coefficient as the radius, to obtain a corresponding grading circle; divide the demarcation circle into at least two of the sub-areas according to the grading circles; the construction second-level sub-module is specifically configured to: superimpose the demarcation circles corresponding to each of the wafer categories and each of the grading circles in the demarcation circles on each other, to obtain corresponding multiple mixed concentric circles; construct the wafer classification model according to the closed areas divided by the multiple mixed concentric circles in the sample coordinate system, where the closed areas include the smallest one of the at least two mixed concentric circles and the ring sandwiched between two adjacent mixed concentric circles with adjacent radius sizes.

[0050] In a third aspect, an embodiment of the present invention further provides an electronic device, where the electronic device includes: a housing, a processor, a memory, a circuit board, and a power supply circuit. Among them, the circuit board is arranged inside the space surrounded by the housing, and the processor and the memory are arranged on the circuit board; the power supply circuit is configured to supply power to each circuit or device of the above electronic device; the memory is used to store executable program codes; the processor runs a program corresponding to the executable program codes by reading the executable program codes stored in the memory, and is configured to execute the wafer classification method provided in any embodiment of the present invention.

[0051] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, where the computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the wafer classification method provided in any embodiment of the present invention.

[0052] The wafer classification method, device, electronic device, and storage medium provided by the embodiments of the present invention can obtain the first test data of the wafer to be classified, where the first test data includes the test data of the wafer acceptance test. According to the first test data of the wafer to be classified and the wafer classification model, the wafer category to which the wafer to be classified belongs is determined. Among them, the wafer classification model includes the correspondence between the wafer category and the wafer test data, and the wafer test data includes the first test data and the second test data of the wafer, and the second test data includes the test data after encapsulation of each die in the wafer. In this way, the division of the wafer category in the wafer classification model is related to both the first test data and the second test data. Since the second test data is the test data after encapsulation of the die in the wafer, it can reflect the performance during chip operation. Therefore, the wafer category divided according to the wafer classification model will be more accurate. Based on this wafer classification model, after the wafer acceptance test before the wafer to be classified leaves the factory, the wafer category to which the wafer to be classified belongs can be predicted according to the first test data of the wafer to be classified, so that at an earlier time point, the corresponding chip packaging and wafer replenishment production plan can be arranged according to the wafer category to which the wafer to be classified belongs, without waiting until problems are found after the wafer probe test (CP, Chip Probing). Therefore, the timeliness of classification can be effectively improved. Therefore, the wafer classification method provided by the embodiments of the present invention can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0054] Figure 1 It is a flowchart of a wafer classification method provided by an embodiment of the present invention; Figure 2 It is a coordinate diagram in an embodiment of the present invention; Figure 3 It is another coordinate diagram in an embodiment of the present invention; Figure 4 It is a schematic structural diagram of a fitting circle in an embodiment of the present invention; Figure 5 It is a schematic structural diagram of a step circle and a boundary circle in an embodiment of the present invention; Figure 6 It is a schematic diagram of the superposition of each boundary circle in an embodiment of the present invention; Figure 7A schematic structural diagram of a grading circle and a demarcation circle in an embodiment of the present invention; Figure 8 A schematic diagram of multiple grading circles and demarcation circles stacked in an embodiment of the present invention; Figure 9 A detailed flowchart of a wafer classification method provided by an embodiment of the present invention; Figure 10 A schematic structural diagram of a wafer classification device provided by an embodiment of the present invention; Figure 11 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0055] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0056] It should be clear that the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the protection scope of the present invention.

[0057] In a first aspect, an embodiment of the present invention provides a wafer classification method, which can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification.

[0058] As Figure 1 shown, an embodiment of the present invention provides a wafer classification method, including: S11, obtaining first test data of a wafer to be classified, where the first test data includes test data of a wafer acceptance test; In an embodiment of the present invention, a wafer to be classified may refer to a wafer that needs to be classified according to the wafer classification method provided by the embodiment of the present invention. The wafer to be classified has been processed in a wafer factory, forming corresponding process patterns, and has undergone a wafer acceptance test. In this step, first test data of the wafer to be classified can be obtained, and the first test data may include test data of the wafer acceptance test. The wafer acceptance test is an electrical test performed on test structures provided in the scribe lines of the wafer. A plurality of test structures may be provided on one wafer, and each test structure may have a corresponding set of first test data. The first test data corresponding to each test structure in the wafer may represent the first test data corresponding to the dies within a certain area range near the test structure.

[0059] S12. Determine the wafer category to which the to-be-classified wafer belongs according to the first test data of the to-be-classified wafer and the wafer classification model. Wherein, the wafer classification model includes the correspondence between wafer categories and wafer test data, and the wafer test data includes the first test data and the second test data of the wafer, and the second test data includes the test data after encapsulation of each die in the wafer.

[0060] After obtaining the first test data of the to-be-classified wafer, in this step, the wafer category to which the to-be-classified wafer belongs can be determined according to the first test data and the wafer classification model. In an embodiment of the present invention, the wafer classification model is a preset model, and this model can be established based on relevant historical data in the chip manufacturing process. The specific manifestation form of the wafer classification model is not limited. For example, in one example, the wafer classification model can be a mathematical expression, and in another example, the wafer classification model can also be a chart.

[0061] In an embodiment of the present invention, the wafer classification model can include the correspondence between wafer categories and wafer test data. Wherein, the wafer category can reflect the overall quality level of the dies in the wafer. The wafer category to which the wafer belongs is related to the wafer test data of the wafer. If the wafer categories to which the wafers belong are different, the corresponding wafer test data of the wafers are not exactly the same. In an embodiment of the present invention, the wafer test data can include the first test data and the second test data of the wafer. Among them, the first test data can include the test data of the wafer acceptance test, and the second test data can include the test data after encapsulation of each die in the wafer, such as the test data of FT (final test).

[0062] The wafer classification method provided by the embodiments of the present invention can obtain the first test data of the wafer to be classified, where the first test data includes the test data of the wafer acceptance test. According to the first test data of the wafer to be classified and the wafer classification model, the wafer category to which the wafer to be classified belongs is determined. Among them, the wafer classification model includes the correspondence between the wafer category and the wafer test data, and the wafer test data includes the first test data and the second test data of the wafer, and the second test data includes the test data after encapsulating each die in the wafer. In this way, the division of the wafer category in the wafer classification model is related to both the first test data and the second test data. Since the second test data is the test data after encapsulating the die in the wafer, it can reflect the performance during chip operation. Therefore, the wafer category divided according to the wafer classification model will be more accurate. Based on this wafer classification model, after the wafer acceptance test before the wafer to be classified leaves the factory, the wafer category to which the wafer to be classified belongs can be predicted according to the first test data of the wafer to be classified, so that at an earlier time point, the corresponding chip packaging and wafer replenishment production plans can be arranged according to the wafer category to which the wafer to be classified belongs, without waiting until problems are found after the wafer probe test. Therefore, the timeliness of classification can be effectively improved. Therefore, the wafer classification method provided by the embodiments of the present invention can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification.

[0063] Specifically, the first test data of the wafer to be classified obtained in step S11 may include various test data of the wafer acceptance test, such as saturation voltage and / or drain current in the saturation region, etc. Since the wafer acceptance test is generally completed before the wafer leaves the factory, the first test data can be obtained earlier to improve the timeliness of wafer classification.

[0064] After obtaining the first test data of the wafer to be classified, in step S12, according to the first test data of the wafer to be classified and the wafer classification model, the wafer category to which the wafer to be classified belongs is determined.

[0065] In the embodiments of the present invention, the wafer classification model may include the correspondence between the wafer category and the wafer test data. Specifically, in one implementation manner, the correspondence between the wafer category and the wafer test data may include: the correspondence between the wafer category and the value range of the wafer test data of the wafers in this wafer category. For example, the value range of the wafer test data of type A wafers is from L1 to L2, the value range of the wafer test data of type B wafers is from L2 to L3, the value range of the wafer test data of type C wafers is from L3 to L4, etc. The value ranges of the wafer test data corresponding to different wafer categories do not overlap.

[0066] In the foregoing embodiments, the correspondence relationship between the wafer categories and the wafer test data may include the correspondence relationship between the wafer categories and the value ranges of the wafer test data of the wafers in the wafer categories. However, the embodiments of the present invention are not limited thereto. In other embodiments of the present invention, the correspondence relationship between the wafer categories and the wafer test data may also include other ways. For example, in an embodiment of the present invention, the number of wafer categories included in the wafer classification model may be multiple, and each wafer category may include at least two quality grades. Based on this, the correspondence relationship between the wafer categories and the wafer test data may include: the correspondence relationship between each wafer category and the value range of the wafer test data of the wafers in the wafer category, and the correspondence relationship between each quality grade and the value range of the wafer test data of the wafers in the quality grade. Here, the wafer category may be a rough classification of the overall quality of the die in the wafer, and the quality grade may be a more detailed classification of each wafer category according to a more detailed standard.

[0067] In the embodiments of the present invention, the wafer test data may include first test data and second test data. Among them, the first test data may include the test data of the wafer acceptance test, and the second test data may include the test data obtained after the die in the wafer is packaged and tested. Since the second test data is the data obtained after the die is packaged and tested, it can more comprehensively and accurately reflect the chip performance. In an example, the second test data may include, for example, any one of the following: power consumption, operating voltage, etc. Based on this, the value range of the wafer test data may include the first value range of the first operation data and the second value range of the second test data, where the first operation data is the data obtained by operating the first test data through a preset algorithm.

[0068] Exemplarily, in an example, the preset algorithm may include, for example, any one of the following: remain unchanged, linear operation, power operation. Here, remaining unchanged means that the first test data is the same as the corresponding first operation data, and the mathematical expression is y1 = x1. Linear operation means that the first test data is linearly operated to obtain the first operation data, and the mathematical expression is y2 = kx2 + b. Power operation means that the first test data is powered to obtain the first operation data, and the mathematical expression is y3 = x3 n + b, where x1, x2, x3 are the first test data, y1, y2, y3 are the first operation data, k and b are real numbers, and n is a positive integer. In an example, n may be 2.

[0069] Based on this, after obtaining the first test data of the wafer to be classified in step S11, in step S12, determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model may specifically include: determining the first operation data corresponding to the first test data of the wafer to be classified according to the preset algorithm; determining the median of the multiple first operation data of the wafer to be classified to obtain the first median; determining the first value range in which the first median falls according to the wafer classification model to obtain the target range; determining the wafer category corresponding to the target range according to the wafer classification model to obtain the target category, and taking the target category as the wafer category to which the wafer to be classified belongs.

[0070] In this embodiment, the wafer to be classified may have multiple first test data, and these first test data may be obtained, for example, by testing test structures at different positions in the wafer to be classified. Each first test data can obtain the corresponding first operation data through the above preset algorithm. Each first operation data may have a certain degree of volatility. Therefore, the first operation data can be arranged in descending or ascending order, and the first operation data in the middle position is the median of the first operation data, that is, the first median. Based on this, when determining the wafer category to which the wafer to be classified belongs, it can be determined which first value range of the first operation data in the wafer classification model the first median of the wafer to be classified falls into to obtain the target range, and the wafer category corresponding to the target range is determined as the wafer category to which the wafer to be classified belongs, that is, the target category.

[0071] For example, in an embodiment of the present invention, the median of the first operation data of the wafer to be classified (i.e., the first median) is 7, the first value range of the first operation data corresponding to the wafer category a1 in the wafer classification model is 2 to 5, and the first value range of the first operation data corresponding to the wafer category a2 is 5 to 10. Then it can be determined that the first median 7 of the wafer to be classified falls into the first value range of 5 to 10, and the wafer category a2 is the target category of the wafer to be classified.

[0072] Similarly, in another embodiment of the present invention, the number of wafer categories is multiple, and each wafer category may include at least two quality grades; the correspondence between the wafer categories and the wafer test data includes: the correspondence between each wafer category and the value range of the wafer test data of the wafers in that wafer category, and the correspondence between each quality grade and the value range of the wafer test data of the wafers in that quality grade; based on this, the wafer category and the quality grade corresponding to the target range can be determined according to the wafer classification model, obtaining the target category and the target grade, and using the target category and the target grade as the wafer category and quality grade to which the wafer to be classified belongs.

[0073] The above embodiments describe the wafer classification model in the form of text and mathematical expressions, but the embodiments of the present invention are not limited thereto. In other embodiments of the present invention, the wafer classification model can also be described in other forms. For example, in one embodiment of the present invention, the wafer classification model can also be identified by a graph. Specifically, in one implementation, the first test data of the wafer to be classified may include a first test component corresponding to an N-type transistor and a second test component corresponding to a P-type transistor; wherein, both the N-type transistor and the P-type transistor are transistors in the wafer to be classified. Correspondingly, the first operation data may include a first operation component and a second operation component, wherein the first operation component is obtained by operating the first test component through a preset algorithm, and the second operation component is obtained by operating the second test component through a preset algorithm.

[0074] Based on this, in one embodiment of the present invention, the wafer classification model may include a preset coordinate graph, and the preset coordinate graph may include a first coordinate graph. The first coordinate graph can be established based on a plane rectangular coordinate system, and the plane rectangular coordinate system takes the first operation component and the second operation component as two mutually perpendicular coordinate axes, and the second test data can be marked in the plane rectangular coordinate system in a preset manner. Exemplarily, as Figure 2 shown, in an example, the plane rectangular coordinate system can take the first operation component as the x-axis and the second operation component as the y-axis, and the second test data can be plotted in the plane rectangular coordinate system with different colors or different identifiers. For example, use " " to represent the die with the second test data of e1, use "&" to represent the die with the second test data of e2, use " " to represent the die with the second test data of e3, etc.

[0075] The value range of the wafer test data of the wafers in each wafer category can be determined based on at least two concentric circles in the first coordinate diagram. Among them, the value range of the wafer test data of the wafers in each said wafer category can be the range F1 included by the smallest one of the at least two concentric circles, or the range F2 included by the ring sandwiched by two adjacent concentric circles in terms of radius size. It can be seen that Figure 2 the value ranges of the wafer test data of the wafers in each wafer category are adjacent to each other and connected to each other in the form of concentric circles.

[0076] In another implementation manner, the preset coordinate diagram can include a second coordinate diagram, and the second coordinate diagram can be established based on a space rectangular coordinate system, and the space rectangular coordinate system takes the first operation component, the second operation component, and the second test data as pairwise perpendicular coordinate axes. For example, as Figure 3 shown, in an example, the second coordinate diagram can take the first operation component as the x-axis, the second operation component as the y-axis, and the second test data as the z-axis.

[0077] Correspondingly, the value range of the wafer test data of the wafers in each said wafer category can be determined based on at least two concentric cylinders in the second coordinate diagram. Among them, the value range of the wafer test data of the wafers in each wafer category can be the range (not shown) included by the smallest one of the at least two concentric cylinders, or the range (not shown) included by the ring cylinder sandwiched by two adjacent concentric cylinders in terms of radius size. Similar to Figure 2 that, Figure 3 the value ranges of the wafer test data of the wafers in each wafer category are adjacent to each other and connected to each other in the form of concentric circles.

[0078] Based on this, when determining the wafer category to which the wafer to be classified belongs in step S12, it is possible to find in the preset coordinate diagram which circle (cylinder) or ring (ring cylinder) the first median of the first operation data of the wafer to be classified falls into, so as to obtain the target range, and use the wafer category corresponding to the target range as the wafer category to which the wafer to be classified belongs.

[0079] Further, after determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model in step S12, the wafer classification method provided by the embodiment of the present invention may further include: determining the die in the wafer to be classified that is intended to be packaged into a chip according to the wafer category to which the wafer to be classified belongs, where the chip has preset specification parameters, and the specification parameters may include the order part number (OPN) of the chip, or the order part number of the chip and the quality grade under the order part number. That is to say, in this embodiment, the wafer category corresponds to the specification parameters of the chip. When the wafer category to which the wafer to be classified belongs is determined, it is also determined what specification parameters the die in the wafer to be classified can be packaged into. For example, in one example, the wafer category is not further divided into different quality grades, and the wafer category can correspond to the order part number of the chip. For example, if the wafer category of the wafer to be classified is category H, then the die in the wafer to be classified can be used to package a chip with the order part number sh. Another example is that in another example, the wafer category is further divided into different quality grades, the wafer category can correspond to the order part number of the chip, and the quality grade of the wafer can correspond to the quality grade of the chip. For example, if the wafer category of the wafer to be classified is first-class category Q, then the die in the wafer to be classified can be used to package a first-class chip with the order part number sq.

[0080] It should be noted that in the embodiment of the present invention, even if two chips have the same structure and function, but different order part numbers, or the same order part number but different quality grades, the chip performance, packaging method, market pricing, etc. corresponding to these two chips will also be different. The wafer classification method provided by the embodiment of the present invention can predict the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model, so as to be able to accurately determine at an earlier stage what specification parameters the die in the wafer to be classified should be packaged into, thereby improving the accuracy of wafer classification and effectively improving the timeliness of wafer classification.

[0081] Further, in order to be able to use the wafer classification model to determine the wafer category to which the wafer to be classified belongs, in an embodiment of the present invention, before determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model in step S12, the wafer classification method provided by the embodiment of the present invention may further include: obtaining sample test data of die samples, where the sample test data includes first sample data and second sample data, the first sample data includes the test data of the wafer acceptance test corresponding to the die sample; the second sample data includes the test data after the die sample is packaged; and constructing the wafer classification model according to the sample test data and preset classification rules.

[0082] In an embodiment of the present invention, the grain sample may be a grain fabricated in the past. During the fabrication process of the grain sample, relevant tests may be conducted to obtain the sample test data of the grain sample, and the sample test data may include first sample data and second sample data. Among them, the first sample data may include the test data of the wafer acceptance test corresponding to the grain sample; the second sample data may include the test data after the grain sample is packaged.

[0083] After obtaining the sample test data of the grain sample, the wafer classification model may be constructed according to the sample test data and a preset classification rule. Specifically, in an embodiment of the present invention, constructing the wafer classification model according to the sample test data and the preset classification rule may include: establishing a sample coordinate system; plotting sample points corresponding to each grain sample in the sample coordinate system according to the first sample data and the second sample data of each grain sample; determining a target contour according to the distribution contour formed by each sample point in the sample coordinate system; wherein, when the distribution contour is a two-dimensional distribution contour, the target contour is the distribution contour; or, when the distribution contour is a three-dimensional distribution contour, the target contour is the projection of the distribution contour along the preset coordinate axis direction of the sample coordinate system; fitting the target contour into a circle to obtain a fitted circle; and constructing the wafer classification model based on the fitted circle and the preset classification rule.

[0084] In specific implementation, establishing the sample coordinate system may include: Determining first sample operation data according to the first sample data, where the first sample data includes a first sample component corresponding to an N-type transistor and a second sample component corresponding to a P-type transistor; the first sample operation data includes a first sample operation component and a second sample operation component, the first sample operation component is obtained by operating the first sample component through the preset algorithm, and the second sample operation component is obtained by operating the second sample component through the preset algorithm; Establishing the sample coordinate system according to the first sample operation data and the second sample data; wherein, the sample coordinate system includes a first sample coordinate system or a second sample coordinate system; the first sample coordinate system uses the first sample operation component and the second sample operation component as two mutually perpendicular coordinate axes, and the second sample data is marked in the first sample coordinate system through a preset method; the second sample coordinate system uses the first sample operation component, the second sample operation component, and the second sample data as three mutually perpendicular coordinate axes.

[0085] After obtaining the first sample coordinate system or the second sample coordinate system, the sample points corresponding to each grain sample can be plotted in the first sample coordinate system or the second sample coordinate system. The target contour is determined according to the distribution contour formed by each of the sample points in the first sample coordinate system or the second sample coordinate system, and the target contour is fitted to a circle to obtain a fitted circle. Among them, if the sample coordinate system is the first sample coordinate system, since the first sample coordinate system is a two-dimensional coordinate system, the distribution contour is also a two-dimensional distribution contour, and the target contour is the distribution contour; or, if the sample coordinate system is the second sample coordinate system, the distribution contour is also a three-dimensional distribution contour, and the target contour is the projection of the distribution contour along the preset coordinate axis direction of the sample coordinate system. Here, the preset coordinate axis can be, for example, the coordinate axis corresponding to the second sample data. When fitting the target contour to a circle, it can be fitted by various methods such as the least squares method to obtain a fitted circle. Exemplarily, as Figure 4 shown, in an embodiment of the present invention, the sample points corresponding to each grain sample are distributed in the first sample coordinate system to form a target contour g1, and the target contour g1 can be fitted to a circle to obtain a fitted circle g2.

[0086] After obtaining the fitted circle, the wafer classification model can be constructed based on the fitted circle and the preset classification rule. In an embodiment of the present invention, constructing the wafer classification model based on the fitted circle and the preset classification rule may include: determining a first boundary of the value range of the second sample data corresponding to each wafer category according to the preset classification rule; for each wafer category, based on the first boundary of the value range of the second sample data corresponding to this wafer category and the fitted circle, determining a first boundary of the value range of the first sample operation data corresponding to this wafer category; constructing the wafer classification model according to the first boundaries of the value ranges of the first sample operation data corresponding to each wafer category and the first boundaries of the value ranges of the second sample data corresponding to each wafer category.

[0087] In the embodiment of the present invention, the preset classification rule may stipulate what the first boundary of the value range of the second sample data corresponding to each wafer category is. For each wafer category, the first boundary of the value range of the first sample operation data corresponding to this wafer category can be determined according to the above-mentioned fitted circle and the first boundary of the value range of the second sample data corresponding to this wafer category. Then, the wafer classification model can be constructed according to the first boundaries of the value ranges of the first sample operation data corresponding to each wafer category and the first boundaries of the value ranges of the second sample operation data corresponding to each wafer category. Among them, the first boundary can be a boundary of the value range, such as the maximum value, etc.

[0088] Such as Figure 5As shown, in an embodiment of the present invention, for each of the wafer categories, determining the first boundary of the value range of the first sample operation data corresponding to the wafer category based on the first boundary of the value range of the second sample data corresponding to the wafer category and the fitting circle may specifically include: for each of the wafer categories, taking the center of the fitting circle Cm as the center, and using a preset length as the initial value, increasing the radius length step by step to obtain at least two step circles Cstep1, Cstep2, Cstep3... where the preset length is less than the radius of the fitting circle, and each of the step circles is located within the fitting circle; determining the boundary circle Cd (for example, the boundary circle Cd is Cstep2) from the at least two step circles Cstep1, Cstep2, Cstep3, and using the coordinates of the points on the boundary circle Cd as the first boundary of the value range of the first sample operation data corresponding to the wafer category; where there is a preset association relationship between the boundary circle Cd and the first boundary of the value range of the second sample data, and the preset association relationship includes: the median of each of the second sample data of the first type of grain samples corresponding to the boundary circle Cd is less than the first boundary of the value range of the second sample data, and the median of each of the second sample data of the second type of grain samples corresponding to the boundary circle Cd is greater than or equal to the first boundary of the value range of the second sample data.

[0089] Optionally, in an embodiment of the present invention, the first type of grain samples and the second type of grain samples may be defined in the following manner: If the boundary circle Cd is the smallest one among the at least two step circles Cstep, then the first type of grain samples may be each of the grain samples within the area covered by the preset central angle in the boundary circle Cd. As Figure 5 shown, if the boundary circle Cd is not the smallest one among the at least two step circles, then the first type of grain samples (represented by " ") may be each of the grain samples within the area covered by the preset central angle in the ring formed by the boundary circle Cd and the largest step circle Cstep1 smaller than the boundary circle; the second type of grain samples (represented by "&") may be each of the grain samples within the area covered by the preset central angle in the ring formed by the boundary circle Cd and the smallest step circle Cstep3 larger than the boundary circle. Wherein, the included angle α between the two dashed lines is the preset central angle. In the embodiments of the present invention, the preset initial length and the step unit can both be set and adjusted as needed, and the embodiments of the present invention do not limit this.

[0090] For example, in one embodiment, a first stepped circle can be drawn with the center of the fitted circle as the center and a radius of r. The second sample data of the grain samples within the 180-degree central angle coverage area of the left half of the first stepped circle is counted. If the median of the second sample data is less than the first limit (such as the upper limit) of the value range of the second sample data corresponding to the wafer category, then a second stepped circle is drawn with the center of the fitted circle as the center and a radius of 2r. The second sample data of the grain samples within the 180-degree central angle coverage area of the left half of the ring formed by the first stepped circle and the second stepped circle is counted. If the median of the second sample data is still less than the first limit of the value range of the second sample data corresponding to the wafer category, then a third stepped circle is continued to be drawn with a radius of 3r, and so on. If the median of the second sample data is greater than or equal to the first limit of the value range of the second sample data corresponding to the wafer category, then it can be determined that the second stepped circle is the demarcation circle.

[0091] In one embodiment of the present invention, in the fitted circle, the ratio of the number of the third type of grain samples within the preset central angle coverage area to the number of all the third type of grain samples in the fitted circle is greater than the first threshold, where the third type of grain samples are the grain samples whose second sample data is greater than the second threshold. That is to say, in the embodiments of the present invention, the grain samples with larger second sample data are mostly distributed within the preset central angle coverage area. In this way, by statistically analyzing the grain samples within the preset central angle coverage area to determine the demarcation circle, the grains with larger second sample data can be focused on, thereby making the determination of the demarcation circle more accurate.

[0092] Optionally, the preset central angle can be different according to the distribution of the grain samples with larger second sample data. Exemplarily, in one embodiment of the present invention, the preset central angle can be from 45 degrees to 180 degrees.

[0093] As mentioned in the foregoing embodiments, the coordinates of the points on the demarcation circle are used as the first limit of the value range of the first sample operation data corresponding to the wafer category. At the same time, there is a preset correlation between the demarcation circle and the first limit of the value range of the second sample data. That is to say, the demarcation circle is related to both the value range of the first sample operation data and the value range of the second sample data. Therefore, in one embodiment of the present invention, constructing the wafer classification model according to the first limit of the value range of the first sample operation data corresponding to each wafer category and the first limit of the value range of the second sample data corresponding to each wafer category may specifically include: constructing the wafer classification model according to the demarcation circle corresponding to each wafer category.

[0094] Specifically, as Figure 6As shown, in one embodiment of the present invention, constructing the wafer classification model according to the demarcation circles corresponding to each of the wafer categories may include: superposing the demarcation circles corresponding to each of the wafer categories on each other to obtain at least two corresponding demarcation concentric circles; constructing the wafer classification model according to the closed regions divided by the at least two demarcation concentric circles in the sample coordinate system, wherein the closed regions include the smallest one of the at least two demarcation concentric circles and the ring formed by two adjacent demarcation concentric circles with adjacent radii.

[0095] It can be understood that when determining the demarcation circle corresponding to each wafer category, the demarcation circles are determined separately for each wafer category. Among them, the demarcation circle represents the first boundary (such as the upper limit) of the value range of the second sample data of the die samples in each wafer category. To determine the second boundary (such as the lower limit) of the value range of the second sample data of the die samples in each wafer category, the demarcation circles corresponding to each wafer category can be superposed to obtain a series of demarcation concentric circles. The first boundary and the second boundary of the value range of the second sample data of the die samples in the corresponding wafer category are respectively determined by two adjacent demarcation concentric circles with adjacent radii. At the same time, the coordinates of the points on two adjacent demarcation concentric circles can also be used as the first boundary and the second boundary of the value range of the first sample operation data corresponding to the wafer category. That is to say, in this embodiment, these demarcation concentric circles can divide multiple closed regions in the sample coordinate system, and each closed region can correspond to a wafer category in the wafer classification model.

[0096] The above embodiment constructs the wafer classification model according to the demarcation circles corresponding to each of the wafer categories, but the embodiments of the present invention are not limited thereto. In other embodiments of the present invention, the wafer classification model can also be constructed by other means.

[0097] For example, in one embodiment of the present invention, constructing the wafer classification model according to the demarcation circles corresponding to each of the wafer categories may include: for the demarcation circle corresponding to each wafer category, dividing the area covered by the demarcation circle into at least two sub-regions according to the standard deviation of the first sample operation data of each die sample in the demarcation circle, and each sub-region represents a different quality grade of the wafer; constructing the wafer classification model according to the demarcation circles corresponding to each of the wafer categories and each sub-region in the demarcation circle.

[0098] That is to say, in the embodiments of the present invention, for different wafers belonging to the same wafer category, further wafer quality grading can be performed according to the magnitude of the process deviation of the first sample operation data of each wafer. For example, wafers with smaller process deviations of the first sample operation data can be determined as wafers with higher quality grading in this wafer category, and wafers with larger process deviations of the first sample operation data can be determined as wafers with lower quality grading in this wafer category.

[0099] Specifically, as Figure 7 shown, in an embodiment of the present invention, for the demarcation circle corresponding to each wafer category, dividing the area covered by the demarcation circle into at least two sub-regions according to the standard deviation of the first sample operation data of each die sample in the demarcation circle may include: for the demarcation circle corresponding to each wafer category, taking the center of the demarcation circle as the center and multiplying the standard deviation of the first sample operation data by a preset coefficient as the radius, drawing at least one concentric circle of the demarcation circle to obtain a corresponding grading circle; dividing the demarcation circle into at least two sub-regions according to the grading circles.

[0100] Optionally, in the embodiments of the present invention, the magnitude and number of the above preset coefficients can be set and adjusted as needed. For example, in one example, the preset coefficients may include 1, 2, and 3. That is, in the demarcation circle corresponding to a wafer category, three smaller concentric circles may be included, and the radii of these three smaller concentric circles are successively the standard deviation (σ), twice the standard deviation (2σ), and three times the standard deviation (3σ) from the inside to the outside.

[0101] Based on the above demarcation circle and grading circle, as Figure 8 shown, in an embodiment of the present invention, constructing the wafer classification model according to the demarcation circle corresponding to each wafer category and each sub-region in the demarcation circle may specifically include: superimposing the demarcation circle corresponding to each wafer category and each grading circle in the demarcation circle on each other to obtain corresponding multiple mixed concentric circles (including the demarcation circle and grading circles); constructing the wafer classification model according to the closed regions divided by the multiple mixed concentric circles in the sample coordinate system, where the closed regions include the smallest one of the at least two mixed concentric circles and the ring sandwiched by two adjacent mixed concentric circles with adjacent radii.

[0102] The wafer classification method provided by the embodiments of the present invention will be described in detail below through a specific embodiment.

[0103] As Figure 9 shown, the wafer classification method provided by the embodiments of the present invention may include: S201. Obtain the sample test data of the die samples.

[0104] The sample test data includes first sample data and second sample data. The first sample data includes the test data of the wafer acceptance test corresponding to the die sample; the second sample data includes the test data after the die sample is packaged.

[0105] S202. Determine first sample operation data according to the first sample data.

[0106] Among them, the first sample data includes a first sample component corresponding to an N-type transistor and a second sample component corresponding to a P-type transistor; the first sample operation data includes a first sample operation component and a second sample operation component. The first sample operation component is obtained by operating the first sample component through the preset algorithm, and the second sample operation component is obtained by operating the second sample component through the preset algorithm.

[0107] S203. Establish a sample coordinate system according to the first sample operation data and the second sample data.

[0108] Among them, the sample coordinate system may include a first sample coordinate system or a second sample coordinate system; the first sample coordinate system takes the first sample operation component and the second sample operation component as two mutually perpendicular coordinate axes, and the second sample data is marked in the first sample coordinate system through a preset method; the second sample coordinate system takes the first sample operation component, the second sample operation component and the second sample data as three mutually perpendicular coordinate axes.

[0109] S204. Draw sample points corresponding to each die sample in the sample coordinate system according to the first sample data and the second sample data of each die sample; S205. Determine a target contour according to the distribution contour formed by each sample point in the sample coordinate system.

[0110] Among them, when the distribution contour is a two-dimensional distribution contour, the target contour is the distribution contour; or, when the distribution contour is a three-dimensional distribution contour, the target contour is the projection of the distribution contour along the preset coordinate axis direction of the sample coordinate system; S206. Fit the target contour into a circle to obtain a fitted circle.

[0111] S207. Determine the first boundary of the value range of the second sample data corresponding to each wafer category according to the preset classification rules.

[0112] S208. For each wafer category, with the center of the fitted circle as the center and a preset length as the initial value, step by step increase the radius length to obtain at least two stepped circles.

[0113] Among them, the preset length is less than the radius of the fitting circle, and each of the step circles is located inside the fitting circle.

[0114] S209. Determine a boundary circle from the at least two step circles, and use the coordinates of the points on the boundary circle as the first limit of the value range of the first sample operation data corresponding to the wafer category.

[0115] Among them, the boundary circle has a preset association relationship with the first limit of the value range of the second sample data. The preset association relationship includes: the median of each piece of the second sample data of the first type of grain sample corresponding to the boundary circle is less than the first limit of the value range of the second sample data, and the median of each piece of the second sample data of the second type of grain sample corresponding to the boundary circle is greater than or equal to the first limit of the value range of the second sample data.

[0116] S210. For the boundary circle corresponding to each wafer category, divide the area covered by the boundary circle into at least two sub-regions according to the standard deviation of the first sample operation data of each grain sample in the boundary circle. Each sub-region represents a different quality grade of the wafer.

[0117] S211. Construct a wafer classification model according to the boundary circle corresponding to each wafer category and each sub-region in the boundary circle.

[0118] S212. Obtain the first test data of the wafer to be classified. The first test data includes the test data of the wafer acceptance test.

[0119] S213. According to the preset algorithm, determine the first operation data corresponding to the first test data of the wafer to be classified; S214. Determine the median of the multiple pieces of the first operation data of the wafer to be classified to obtain a first median.

[0120] S215. According to the wafer classification model, determine the first value range into which the first median falls to obtain a target range.

[0121] S216. According to the wafer classification model, determine the wafer category corresponding to the target range to obtain a target category, and use the target category as the wafer category to which the wafer to be classified belongs.

[0122] In a second aspect, an embodiment of the present invention further provides a wafer classification device, which can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification.

[0123] As Figure 10 shown, the wafer classification device provided by the embodiment of the present invention may include: The first acquisition unit 31 is configured to acquire first test data of a wafer to be classified, where the first test data includes test data of wafer acceptance test. The first determination unit 32 is configured to determine a wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and a wafer classification model; where the wafer classification model includes a correspondence between wafer categories and wafer test data, the wafer test data includes the first test data and second test data of the wafer, and the second test data includes test data after encapsulation of each die in the wafer.

[0124] The wafer classification device provided by the embodiments of the present invention can acquire first test data of a wafer to be classified, where the first test data includes test data of wafer acceptance test, and determine a wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and a wafer classification model; where the wafer classification model includes a correspondence between wafer categories and wafer test data, the wafer test data includes the first test data and second test data of the wafer, and the second test data includes test data after encapsulation of each die in the wafer. In this way, the division of wafer categories in the wafer classification model is related to both the first test data and the second test data. Since the second test data is the test data after encapsulation of the die in the wafer, it can reflect the performance during chip operation. Therefore, the wafer categories divided according to the wafer classification model will be more accurate. Based on this wafer classification model, after the wafer acceptance test of the wafer to be classified before leaving the factory, the wafer category to which the wafer to be classified belongs can be predicted according to the first test data of the wafer to be classified, so that corresponding chip packaging and wafer replenishment production plans can be arranged according to the wafer category to which the wafer to be classified belongs at an earlier time point, without waiting until problems are found after the wafer probe test. Therefore, the timeliness of classification can be effectively improved. Therefore, the wafer classification method provided by the embodiments of the present invention can effectively improve the timeliness of wafer classification while improving the accuracy of wafer classification.

[0125] In an implementation manner, the correspondence between the wafer category and the wafer test data includes: the correspondence between the wafer category and the value range of the wafer test data of the wafer in the wafer category, and the value range of the wafer test data includes: the first value range of the first operation data and the second value range of the second test data, where the first operation data is data obtained by performing a preset algorithm operation on the first test data.

[0126] In one embodiment, the number of wafer categories is multiple, where each wafer category includes at least two quality grades; the correspondence between the wafer categories and the wafer test data includes: the correspondence between each wafer category and the value range of the wafer test data of the wafers in that wafer category, and the correspondence between each quality grade and the value range of the wafer test data of the wafers in that quality grade.

[0127] In one embodiment, the preset algorithm includes any one of the following: remain unchanged, linear operation, power operation.

[0128] In one embodiment, the first determination unit 32 includes: a first determination module, configured to determine the first operation data corresponding to the first test data of the wafer to be classified according to the preset algorithm; a second determination module, configured to determine the median of the multiple first operation data of the wafer to be classified to obtain a first median; a third determination module, configured to determine the first value range in which the first median falls according to the wafer classification model to obtain a target range; a fourth determination module, configured to determine the wafer category corresponding to the target range according to the wafer classification model to obtain a target category, and use the target category as the wafer category to which the wafer to be classified belongs.

[0129] In one embodiment, the number of wafer categories is multiple, where each wafer category includes at least two quality grades; the correspondence between the wafer categories and the wafer test data includes: the correspondence between each wafer category and the value range of the wafer test data of the wafers in that wafer category, and the correspondence between each quality grade and the value range of the wafer test data of the wafers in that quality grade; the fourth determination module is specifically configured to: determine the wafer category and the quality grade corresponding to the target range according to the wafer classification model to obtain a target category and a target grade, and use the target category and the target grade as the wafer category and quality grade to which the wafer to be classified belongs.

[0130] In one embodiment, the first test data includes a first test component corresponding to an N-type transistor and a second test component corresponding to a P-type transistor; the first operation data includes a first operation component and a second operation component, the first operation component is obtained by operating the first test component through the preset algorithm, and the second operation component is obtained by operating the second test component through the preset algorithm; the wafer classification model includes a preset coordinate map, and the preset coordinate map includes a first coordinate map or a second coordinate map; wherein, the first coordinate map is established based on a plane rectangular coordinate system, the plane rectangular coordinate system takes the first operation component and the second operation component as two mutually perpendicular coordinate axes, and the second test data is marked in the plane rectangular coordinate system through a preset manner; the second coordinate map is established based on a space rectangular coordinate system, and the space rectangular coordinate system takes the first operation component, the second operation component and the second test data as three mutually perpendicular coordinate axes.

[0131] In one embodiment, the correspondence between the wafer category and the wafer test data includes: the correspondence between the wafer category and the value range of the wafer test data of the wafers in this wafer category, and the value range of the wafer test data includes: the first value range of the first operation data and the second value range of the second test data, wherein, the first operation data is the data obtained by operating the first test data through the preset algorithm; The value range of the wafer test data of the wafers in each wafer category is determined based on at least two concentric circles in the first coordinate map, wherein, the value range of the wafer test data of the wafers in each wafer category is the range included by the smallest one of the at least two concentric circles, or the range included by the ring formed by two adjacent concentric circles with adjacent radii; Or, The value range of the wafer test data of the wafers in each wafer category is determined based on at least two concentric cylinders in the second coordinate map, wherein, the value range of the wafer test data of the wafers in each wafer category is the range included by the smallest one of the at least two concentric cylinders, or the range included by the ring cylinder formed by two adjacent concentric cylinders with adjacent radii.

[0132] In one embodiment, the first test data includes any one of the following: saturation voltage, drain current in the saturation region.

[0133] In one embodiment, the second test data includes any one of the following: power consumption, operating voltage.

[0134] In one embodiment, the wafer classification device further includes: A second determination unit, configured to, after determining the wafer category to which the to-be-classified wafer belongs according to the first test data of the to-be-classified wafer and a wafer classification model, determine the chips that the die in the to-be-classified wafer are intended to be packaged into according to the wafer category to which the to-be-classified wafer belongs, where the chips have preset specification parameters, and the specification parameters include the part number of the chips, or the part number of the chips and the quality grade under the part number.

[0135] In one implementation manner, the wafer classification device further includes: A second acquisition unit, configured to acquire sample test data of die samples before determining the wafer category to which the to-be-classified wafer belongs according to the first test data of the to-be-classified wafer and a wafer classification model, where the sample test data includes first sample data and second sample data, the first sample data includes the test data of the wafer acceptance test corresponding to the die samples; the second sample data includes the test data after the die samples are packaged; A construction unit, configured to construct the wafer classification model according to the sample test data and a preset classification rule.

[0136] In one implementation manner, the construction unit includes: An establishment module, configured to establish a sample coordinate system; A plotting module, configured to plot sample points corresponding to the die samples in the sample coordinate system according to the first sample data and the second sample data of the die samples; A fifth determination module, configured to determine a target contour according to the distribution contour formed by the sample points in the sample coordinate system; where, when the distribution contour is a two-dimensional distribution contour, the target contour is the distribution contour; or, when the distribution contour is a three-dimensional distribution contour, the target contour is the projection of the distribution contour along a preset coordinate axis direction of the sample coordinate system; A fitting module, configured to fit the target contour into a circle to obtain a fitted circle; A construction module, configured to construct the wafer classification model based on the fitted circle and the preset classification rule.

[0137] In one implementation manner, the establishment module is specifically configured to: Determine first sample operation data according to the first sample data, where the first sample data includes a first sample component corresponding to an N-type transistor and a second sample component corresponding to a P-type transistor; the first sample operation data includes a first sample operation component and a second sample operation component, the first sample operation component is obtained by performing the preset algorithm operation on the first sample component, and the second sample operation component is obtained by performing the preset algorithm operation on the second sample component; Establish the sample coordinate system based on the first sample operation data and the second sample data; wherein, the sample coordinate system includes a first sample coordinate system or a second sample coordinate system; the first sample coordinate system uses the first sample operation component and the second sample operation component as two mutually perpendicular coordinate axes, and the second sample data is marked in the first sample coordinate system by a preset method; the second sample coordinate system uses the first sample operation component, the second sample operation component and the second sample data as pairwise perpendicular coordinate axes.

[0138] In one implementation manner, the construction module includes: A first determination sub-module, configured to determine, according to the preset classification rule, a first boundary of the value range of the second sample data corresponding to each wafer category; A second determination sub-module, configured to, for each wafer category, based on the first boundary of the value range of the second sample data corresponding to the wafer category and the fitting circle, determine a first boundary of the value range of the first sample operation data corresponding to the wafer category; A construction sub-module, configured to construct the wafer classification model according to the first boundary of the value range of the first sample operation data corresponding to each wafer category and the first boundary of the value range of the second sample data corresponding to each wafer category.

[0139] In one implementation manner, the second determination sub-module is specifically configured to: For each wafer category, with the center of the fitting circle as the center and a preset length as the initial value, stepwise increase the radius length to obtain at least two stepped circles, wherein the preset length is less than the radius of the fitting circle, and each stepped circle is located inside the fitting circle; Determine a boundary circle from the at least two stepped circles, and use the coordinates of the points on the boundary circle as the first boundary of the value range of the first sample operation data corresponding to the wafer category; wherein, the boundary circle has a preset association relationship with the first boundary of the value range of the second sample data, and the preset association relationship includes: the median of the second sample data of each first type of grain sample corresponding to the boundary circle is less than the first boundary of the value range of the second sample data, and the median of the second sample data of each second type of grain sample corresponding to the boundary circle is greater than or equal to the first boundary of the value range of the second sample data; Wherein, if the dividing circle is the smallest one among the at least two step circles, the first type of grain samples are the grain samples within the area covered by the preset central angle in the dividing circle; if the dividing circle is not the smallest one among the at least two step circles, the first type of grain samples are the grain samples within the area covered by the preset central angle in the ring formed between the dividing circle and the largest step circle smaller than the dividing circle; the second type of grain samples are the grain samples within the area covered by the preset central angle in the ring formed between the dividing circle and the smallest step circle larger than the dividing circle.

[0140] In one embodiment, among the fitting circles, the ratio of the number of the third type of grain samples within the area covered by the preset central angle to the number of all the third type of grain samples in the fitting circle is greater than a first threshold, wherein the third type of grain samples are the grain samples with the second sample data greater than a second threshold.

[0141] In one embodiment, the preset central angle is from 45 degrees to 180 degrees.

[0142] In one embodiment, the building sub-module is specifically configured to: build the wafer classification model according to the dividing circles corresponding to the respective wafer categories.

[0143] In one embodiment, the building sub-module is specifically configured to: Superimpose the dividing circles corresponding to the respective wafer categories on each other to obtain at least two corresponding concentric dividing circles; Build the wafer classification model according to the closed areas divided by the at least two concentric dividing circles in the sample coordinate system, wherein the closed areas include the smallest one of the at least two concentric dividing circles and the rings formed between two adjacent concentric dividing circles with adjacent radius sizes.

[0144] In one embodiment, the building sub-module includes: A dividing second-level sub-module, configured to divide the area covered by the dividing circle corresponding to each wafer category into at least two sub-areas according to the standard deviation of the first sample operation data of the grain samples in the dividing circle, and each sub-area represents a different quality level of the wafer; A building second-level sub-module, configured to build the wafer classification model according to the dividing circles corresponding to the respective wafer categories and the respective sub-areas in the dividing circles.

[0145] In one embodiment, the dividing second-level sub-module is specifically configured to: For each of the demarcation circles corresponding to the wafer categories, with the center of the demarcation circle as the center and the product of the standard deviation of the first sample operation data and a preset coefficient as the radius, at least one concentric circle of the demarcation circle is drawn to obtain a corresponding grading circle; According to each of the grading circles, the demarcation circle is divided into at least two of the sub-regions; The constructing the secondary sub-module is specifically configured to: Superimpose each of the demarcation circles corresponding to the wafer categories and each of the grading circles in the demarcation circle on each other to obtain corresponding multiple mixed concentric circles; According to the closed regions divided by the multiple mixed concentric circles in the sample coordinate system, construct the wafer classification model, wherein the closed region includes the smallest one of the at least two mixed concentric circles and the ring sandwiched by two adjacent mixed concentric circles in terms of radius size.

[0146] In a third aspect, an embodiment of the present invention further provides an electronic device, which can effectively improve the classification efficiency of wafer maps while making the classification results more accurate and objective.

[0147] As Figure 11 shown, the electronic device provided by the embodiment of the present invention may include: a housing 51, a processor 52, a memory 53, a circuit board 54, and a power supply circuit 55. Among them, the circuit board 54 is arranged inside the space surrounded by the housing 51, and the processor 52 and the memory 53 are arranged on the circuit board 54; the power supply circuit 55 is used to supply power to each circuit or device of the above-mentioned electronic device; the memory 53 is used to store executable program codes; the processor 52 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 53, and is used to execute the wafer classification method provided in any of the foregoing embodiments.

[0148] The specific execution process of the above steps by the processor 52 and the further steps executed by the processor 52 by running the executable program code may refer to the description of the foregoing embodiments and will not be elaborated herein.

[0149] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, where the computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement any of the wafer classification methods provided in the foregoing embodiments, and thus can also achieve corresponding technical effects, which have been described in detail above and will not be elaborated herein.

[0150] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0151] Each embodiment in this specification is described in a related manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments.

[0152] In particular, for the device embodiments, since they are basically similar to the method embodiments, they are described relatively simply. For the relevant parts, reference can be made to the partial description of the method embodiments.

[0153] For the convenience of description, the above device is described by dividing it into various units / modules according to functions. Of course, when implementing the present invention, the functions of each unit / module can be realized in the same or multiple software and / or hardware.

[0154] Those of ordinary skill in the art can understand that all or part of the processes of the methods in the above embodiments can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the above method embodiments. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0155] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A wafer sorting method, characterized in that: include: Acquire first test data of the wafer to be classified, wherein the first test data includes test data of a wafer acceptance test; Determine the wafer category to which the wafer to be classified belongs based on the first test data of the wafer to be classified and a wafer classification model; wherein the wafer classification model includes a correspondence between wafer categories and wafer test data, the wafer test data includes the first test data and second test data of the wafer, and the second test data includes test data of each die in the wafer after packaging.

2. The method according to claim 1, characterized in that The correspondence between the wafer category and the wafer test data includes: the correspondence between the wafer category and the value range of the wafer test data of the wafer in the wafer category, the value range of the wafer test data includes: the first value range of the first operation data and the second value range of the second test data, wherein the first operation data is the data obtained by calculating the first test data through a preset algorithm.

3. The method according to claim 2, characterized in that There are multiple wafer categories, each of which includes at least two quality levels; The correspondence between the wafer category and the wafer test data includes: the correspondence between each of the wafer categories and the value range of the wafer test data of the wafers in the wafer category, and the correspondence between each of the quality grades and the value range of the wafer test data of the wafers in the quality grade.

4. The method according to claim 2, characterized in that: The preset algorithm includes any one of the following: remain unchanged, linear operation, power operation.

5. The method according to claim 2, characterized in that: Determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and a wafer classification model comprises: Determine, according to the preset algorithm, the first operation data corresponding to the first test data of the wafer to be classified; Determine the median of the plurality of the first operation data of the wafers to be classified to obtain a first median; According to the wafer classification model, determining the first value range into which the first median falls, and obtaining a target range; According to the wafer classification model, the wafer category corresponding to the target range is determined to obtain a target category, and the target category is taken as the wafer category to which the wafer to be classified belongs.

6. The method according to claim 5, characterized in that There are multiple wafer categories, each of which includes at least two quality levels; The correspondence between the wafer categories and the wafer test data includes: a correspondence between each of the wafer categories and a value range of the wafer test data of the wafers in the wafer category, and a correspondence between each of the quality grades and a value range of the wafer test data of the wafers in the quality grade; Determining the wafer category corresponding to the target range according to the wafer classification model to obtain the target category, and taking the target category as the wafer category to which the wafer to be classified belongs includes: According to the wafer classification model, the wafer category and the quality grade corresponding to the target range are determined to obtain the target category and the target grade, and the target category and the target grade are used as the wafer category and the quality grade to which the wafer to be classified belongs.

7. The method according to any one of claims 2 to 6, characterized in that The first test data includes a first test component corresponding to an N-type transistor and a second test component corresponding to a P-type transistor; the first operation data includes a first operation component and a second operation component, the first operation component is obtained by operating the first test component through the preset algorithm, and the second operation component is obtained by operating the second test component through the preset algorithm; The wafer classification model includes a preset coordinate diagram, and the preset coordinate diagram includes a first coordinate diagram or a second coordinate diagram; Wherein, the first coordinate graph is established based on a plane rectangular coordinate system, the plane rectangular coordinate system uses the first operation component and the second operation component as two mutually perpendicular coordinate axes, and the second test data is marked in the plane rectangular coordinate system in a preset manner; The second coordinate graph is established based on a spatial rectangular coordinate system, and the spatial rectangular coordinate system uses the first operation component, the second operation component and the second test data as coordinate axes that are perpendicular to each other.

8. The method according to claim 7, characterized in that The correspondence between the wafer category and the wafer test data includes: the correspondence between the wafer category and the value range of the wafer test data of the wafers in the wafer category, the value range of the wafer test data includes: a first value range of the first operation data and a second value range of the second test data, wherein the first operation data is data obtained by operating the first test data through a preset algorithm; The value range of the wafer test data of the wafers in each of the wafer categories is determined based on at least two concentric circles in the first coordinate diagram, wherein the value range of the wafer test data of the wafers in each of the wafer categories is a range included by the smallest circle of the at least two concentric circles, or a range included by a ring sandwiched by two concentric circles with adjacent radii; or, The value range of the wafer test data of the wafers in each of the wafer categories is determined based on at least two concentric cylinders in the second coordinate diagram, wherein the value range of the wafer test data of the wafers in each of the wafer categories is the range included by the smallest cylinder of the at least two concentric cylinders, or the range included by the annular cylinder sandwiched by two concentric cylinders with adjacent radii.

9. The method according to any one of claims 1 to 6, characterized in that The first test data includes any one of the following: saturation voltage, saturation region drain current.

10. The method according to any one of claims 1 to 6, characterized in that The second test data includes any one of the following: power consumption and operating voltage.

11. The method according to any one of claims 1 to 6, characterized in that After determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and the wafer classification model, the method further includes: According to the wafer category to which the wafer to be classified belongs, it is determined that the grains in the wafer to be classified are intended to be packaged into chips, and the chip has preset specification parameters, and the specification parameters include the material number of the chip, or the material number of the chip and the quality grade under the material number.

12. The method according to any one of claims 1 to 6, characterized in that Before determining the wafer category to which the wafer to be classified belongs according to the first test data of the wafer to be classified and a wafer classification model, the method further includes: Acquire sample test data of a die sample, the sample test data comprising first sample data and second sample data, the first sample data comprising test data of a wafer acceptance test corresponding to the die sample; the second sample data comprising test data of the die sample after packaging; The wafer classification model is constructed according to the sample test data and preset classification rules.

13. The method according to claim 12, characterized in that The step of constructing the wafer classification model according to the sample test data and the preset classification rules includes: Establish sample coordinate system; According to the first sample data and the second sample data of each of the grain samples, drawing a sample point corresponding to each of the grain samples in the sample coordinate system; Determine a target profile according to a distribution profile formed by each of the sample points in the sample coordinate system; wherein, when the distribution profile is a two-dimensional distribution profile, the target profile is the distribution profile; or, when the distribution profile is a three-dimensional distribution profile, the target profile is a projection of the distribution profile along a preset coordinate axis direction of the sample coordinate system; Fitting the target contour into a circle to obtain a fitting circle; Based on the fitting circle and the preset classification rule, the wafer classification model is constructed.

14. The method according to claim 13, characterized in that The establishing of the sample coordinate system comprises: Determine first sample operation data according to the first sample data, wherein the first sample data includes a first sample component corresponding to an N-type transistor and a second sample component corresponding to a P-type transistor; the first sample operation data includes a first sample operation component and a second sample operation component, the first sample operation component is obtained by operating the first sample component through the preset algorithm, and the second sample operation component is obtained by operating the second sample component through the preset algorithm; The sample coordinate system is established according to the first sample operation data and the second sample data; wherein the sample coordinate system includes the first sample coordinate system or the second sample coordinate system; the first sample coordinate system uses the first sample operation component and the second sample operation component as two mutually perpendicular coordinate axes, and the second sample data is identified in the first sample coordinate system in a preset manner; the second sample coordinate system uses the first sample operation component, the second sample operation component and the second sample data as two mutually perpendicular coordinate axes.

15. The method according to claim 14, characterized in that The step of constructing the wafer classification model based on the fitting circle and the preset classification rule includes: Determine, according to the preset classification rule, a first limit of a value range of the second sample data corresponding to each of the wafer categories; For each of the wafer categories, based on the first limit of the value range of the second sample data corresponding to the wafer category and the fitting circle, determine the first limit of the value range of the first sample operation data corresponding to the wafer category; The wafer classification model is constructed according to the first limit of the value range of the first sample operation data corresponding to each of the wafer categories and the first limit of the value range of the second sample data corresponding to each of the wafer categories.

16. The method according to claim 15, characterized in that For each of the wafer categories, based on the first limit of the value range of the second sample data corresponding to the wafer category and the fitting circle, determining the first limit of the value range of the first sample operation data corresponding to the wafer category includes: For each of the wafer categories, taking the center of the fitting circle as the center and the preset length as the initial value, the radius length is increased stepwise to obtain at least two step circles, wherein the preset length is smaller than the radius of the fitting circle, and each of the step circles is located within the fitting circle; Determine a dividing circle from the at least two step circles, and use the coordinates of a point on the dividing circle as a first limit of a value range of the first sample operation data corresponding to the wafer category; wherein the dividing circle has a preset association relationship with the first limit of a value range of the second sample data, and the preset association relationship includes: the median of each of the second sample data of the first type of grain samples corresponding to the dividing circle is less than the first limit of the value range of the second sample data, and the median of each of the second sample data of the second type of grain samples corresponding to the dividing circle is greater than or equal to the first limit of the value range of the second sample data; Among them, if the dividing circle is the smallest one of the at least two step circles, then the first type of grain samples are the grain samples within the preset center angle coverage area of ​​the dividing circle; if the dividing circle is not the smallest one of the at least two step circles, then the first type of grain samples are the grain samples within the preset center angle coverage area in the ring sandwiched by the dividing circle and the largest step circle smaller than the dividing circle; the second type of grain samples are the grain samples within the preset center angle coverage area in the ring sandwiched by the dividing circle and the smallest step circle larger than the dividing circle.

17. The method according to claim 16, characterized in that In the fitting circle, the ratio of the number of the third type of grain samples within the area covered by the preset central angle to the number of all the third type of grain samples in the fitting circle is greater than a first threshold, wherein the third type of grain samples are the grain samples whose second sample data is greater than the second threshold.

18. The method according to claim 17, characterized in that The preset center angle is 45 degrees to 180 degrees.

19. The method according to claim 16, characterized in that The constructing of the wafer classification model according to the first limit of the value range of the first sample operation data corresponding to each of the wafer categories and the first limit of the value range of the second sample data corresponding to each of the wafer categories comprises: The wafer classification model is constructed according to the dividing circles corresponding to each of the wafer categories.

20. The method according to claim 19, characterized in that The step of constructing the wafer classification model according to the boundary circles corresponding to the wafer categories comprises: Superimposing the boundary circles corresponding to the wafer categories to obtain at least two corresponding boundary concentric circles; The wafer classification model is constructed according to the closed area divided by the at least two boundary concentric circles in the sample coordinate system, wherein the closed area includes the smallest circle of the at least two boundary concentric circles and the ring sandwiched by two boundary concentric circles with adjacent radii.

21. The method according to claim 19, characterized in that The step of constructing the wafer classification model according to the boundary circles corresponding to the wafer categories comprises: For each of the boundary circles corresponding to the wafer categories, according to the standard deviation of the first sample operation data of each of the grain samples in the boundary circle, the area covered by the boundary circle is divided into at least two sub-areas, each of the sub-areas represents a different quality grade of the wafer; The wafer classification model is constructed according to the dividing circles corresponding to each of the wafer categories and the sub-regions in the dividing circles.

22. The method according to claim 21, characterized in that For each of the boundary circles corresponding to the wafer categories, dividing the area covered by the boundary circle into at least two sub-areas according to the standard deviation of the first sample operation data of each of the die samples in the boundary circle comprises: For each of the dividing circles corresponding to the wafer categories, at least one concentric circle of the dividing circle is drawn with the center of the dividing circle as the center and the product of the standard deviation of the first sample operation data and a preset coefficient as the radius to obtain a corresponding classification circle; According to each of the grading circles, the boundary circle is divided into at least two sub-areas; The step of constructing the wafer classification model according to the boundary circles corresponding to the wafer categories and the sub-regions in the boundary circles comprises: Superimposing the boundary circles corresponding to the wafer categories and the classification circles in the boundary circles to obtain a corresponding plurality of mixed concentric circles; The wafer classification model is constructed according to the closed area divided by the multiple mixed concentric circles in the sample coordinate system, wherein the closed area includes the smallest circle of the at least two mixed concentric circles and the ring sandwiched by two of the mixed concentric circles with adjacent radii.

23. A wafer sorting device, characterized in that: include: A first acquisition unit, configured to acquire first test data of the wafer to be classified, wherein the first test data includes test data of a wafer acceptance test; A first determination unit is used to determine the wafer category to which the wafer to be classified belongs based on the first test data of the wafer to be classified and a wafer classification model; wherein the wafer classification model includes a correspondence between wafer categories and wafer test data, the wafer test data includes the first test data and second test data of the wafer, and the second test data includes test data of each die in the wafer after packaging.

24. The device according to claim 23, characterized in that The correspondence between the wafer category and the wafer test data includes: the correspondence between the wafer category and the value range of the wafer test data of the wafer in the wafer category, the value range of the wafer test data includes: the first value range of the first operation data and the second value range of the second test data, wherein the first operation data is the data obtained by calculating the first test data through a preset algorithm.

25. The device according to claim 24, characterized in that There are multiple wafer categories, each of which includes at least two quality levels; The correspondence between the wafer category and the wafer test data includes: the correspondence between each of the wafer categories and the value range of the wafer test data of the wafers in the wafer category, and the correspondence between each of the quality grades and the value range of the wafer test data of the wafers in the quality grade.

26. The device according to claim 24, characterized in that The first determining unit includes: A first determination module, configured to determine, according to the preset algorithm, the first operation data corresponding to the first test data of the wafer to be classified; A second determination module is used to determine the median of the plurality of the first operation data of the wafers to be classified to obtain a first median; A third determination module is used to determine the first value range into which the first median falls according to the wafer classification model, and obtain a target range; The fourth determination module is used to determine the wafer category corresponding to the target range according to the wafer classification model, obtain the target category, and take the target category as the wafer category to which the wafer to be classified belongs.

27. The device according to claim 26, characterized in that There are multiple wafer categories, each of which includes at least two quality levels; The correspondence between the wafer categories and the wafer test data includes: a correspondence between each of the wafer categories and a value range of the wafer test data of the wafers in the wafer category, and a correspondence between each of the quality grades and a value range of the wafer test data of the wafers in the quality grade; The fourth determination module is specifically used to: determine the wafer category and the quality grade corresponding to the target range according to the wafer classification model, obtain the target category and target grade, and use the target category and target grade as the wafer category and quality grade to which the wafer to be classified belongs.

28. The device according to any one of claims 24 to 27, characterized in that The first test data includes a first test component corresponding to an N-type transistor and a second test component corresponding to a P-type transistor; the first operation data includes a first operation component and a second operation component, the first operation component is obtained by operating the first test component through the preset algorithm, and the second operation component is obtained by operating the second test component through the preset algorithm; The wafer classification model includes a preset coordinate diagram, and the preset coordinate diagram includes a first coordinate diagram or a second coordinate diagram; Wherein, the first coordinate graph is established based on a plane rectangular coordinate system, the plane rectangular coordinate system uses the first operation component and the second operation component as two mutually perpendicular coordinate axes, and the second test data is marked in the plane rectangular coordinate system in a preset manner; The second coordinate graph is established based on a spatial rectangular coordinate system, and the spatial rectangular coordinate system uses the first operation component, the second operation component and the second test data as coordinate axes that are perpendicular to each other.

29. An electronic device, characterized in that: The electronic device comprises: a shell, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is placed inside the space enclosed by the shell, and the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to various circuits or devices of the above-mentioned electronic device; the memory is used to store executable program codes; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the wafer classification method described in any one of claims 1 to 22.

30. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the wafer sorting method according to any one of claims 1 to 22.

Images