POE power supply energy efficiency optimization method and device

Abstract

The invention discloses a POE power supply energy efficiency optimization method and a POE power supply energy efficiency optimization device. The POE power supply energy efficiency optimization method comprises the following steps: S1, voltage signal acquisition; s2, multi-stage condition judgment; s3, dynamic power supply control; and S4, performing periodic wake-up detection. A POE network port voltage signal is collected in real time through the MCU, voltage division filtering processing is carried out, effective range judgment and duration threshold verification of detection voltage are executed, on-off of an MOS tube is dynamically controlled to activate / close power supply of the protocol processing module, and complete power failure of the protocol processing module in an invalid state is achieved in combination with a periodic wake-up detection mechanism. Standby power consumption is reduced to 0.3 W or below, the false triggering rate is remarkably reduced, and the six-level energy efficiency standard of POE equipment is met.

Description

Technical Field

[0001] The present invention belongs to the technical field of energy efficiency optimization, and relates to a method and device for optimizing the energy efficiency of Power over Ethernet (POE) power supply. Background Art

[0002] Currently, Power over Ethernet (POE) devices generally have the problem of excessive standby power consumption. In traditional solutions, the protocol chip needs to work continuously to maintain device detection and power supply control, resulting in standby power consumption usually exceeding 1W, which is difficult to meet the six-level energy efficiency standard (standby power consumption ≤ 0.5W). In the prior art, POE power supply detection mostly relies on a single voltage threshold judgment, which is easily interfered by environmental noise (such as power supply ripple, high-frequency pulse), and the false triggering rate is as high as more than 5%, affecting the stability of the device. Some improved solutions attempt to reduce power consumption by reducing the working frequency of the protocol chip or simplifying the detection circuit, but there are significant defects: First, the protocol compatibility is limited and cannot adapt to mainstream standards (such as IEEE 802.3af / at); Second, the anti-interference ability is weak, and insufficient filtering design leads to frequent misjudgments; Third, a fixed power output mode is adopted, and the energy efficiency cannot be dynamically adjusted according to the needs of the terminal device, resulting in low energy utilization rate. The above problems seriously restrict the commercial application of high-energy efficiency POE devices, and there is an urgent need for an innovative solution that takes into account low power consumption, high reliability and protocol compatibility. Summary of the Invention

[0003] The present invention provides a method and device for optimizing the energy efficiency of POE power supply. By using an MCU to collect the voltage signal of the POE network interface in real time and perform voltage division and filtering processing, judge the effective range of the detected voltage and verify the duration threshold, dynamically control the on / off of the MOS transistor to activate / turn off the power supply of the protocol processing module, and combine a periodic wake-up detection mechanism to achieve complete power-off of the protocol processing module in the invalid state, reduce the standby power consumption to below 0.3W and significantly reduce the false triggering rate, meeting the six-level energy efficiency standard of POE devices.

[0004] To achieve the above object, the present invention adopts the following technical solutions: A method for optimizing the energy efficiency of POE power supply includes the following steps: S1. Voltage signal acquisition; Collect the voltage signal of the power supply pin of the POE network interface in real time, and perform voltage division processing and filtering processing on the voltage signal to generate a detected voltage; S2. Multi-level condition judgment; Judge whether the detected voltage is within a preset effective range; Judge whether the duration of the detected voltage exceeds a set threshold; S3. Dynamic power supply control; When the detected voltage simultaneously meets the effective range and duration threshold, the MCU drives the MOS transistor to conduct, activates the protocol processing module, and continuously supplies power. When the detected voltage does not meet any of the conditions, the MCU drives the MOS transistor to turn off, stops supplying power to the protocol processing module, and enters the low-power mode. S4. Periodic wake-up detection; In the low-power mode, the MCU wakes up periodically at a first preset time interval, drives the MOS transistor to conduct for a second preset time, and re-executes voltage signal acquisition and multi-level condition judgment.

[0005] Further, the preset effective range is from 2.8V to 10V, and the set threshold is 200ms.

[0006] Further, the first preset time interval is 10 seconds, and the second preset time is 3 seconds.

[0007] Further, the dynamic power supply control further includes: after the protocol processing module is activated, the MCU monitors the power demand of the terminal device in real time and dynamically adjusts the output power from 0.1W to 30W.

[0008] Further, in the low-power mode, the MCU turns off the MOS transistor to completely disconnect the power supply to the protocol processing module.

[0009] A POE power supply energy efficiency optimization device for implementing the POE power supply energy efficiency optimization method includes: A POE input end for receiving power and data from an Ethernet. A voltage signal acquisition module connected to the POE input end for real-time acquisition of the voltage signal of the power supply pin of the POE network port, and processing the voltage signal through a voltage division circuit and a filtering circuit to generate a detected voltage. An MCU control module connected to the voltage signal acquisition module for receiving the detected voltage and performing multi-level condition judgment to determine whether the detected voltage is within a preset effective range and whether the duration of the detected voltage exceeds a set threshold. A MOSFET control module connected to the MCU control module for responding to the MCU control signal and controlling the power supply state of the protocol processing module by switching the MOSFET transistor. A protocol processing module connected to the MOSFET control module for activating or turning off the protocol power supply according to the MCU control signal and performing POE protocol processing.

[0010] Further, the MOSFET control module includes an MOSFET tube. The gate of the MOSFET tube is connected to the MCU control module. The source of the MOSFET tube is connected to the power rail of the POE input end. The drain of the MOSFET tube is connected to the power supply input end of the protocol processing module.

[0011] Further, the voltage signal acquisition module includes a sampling circuit. The output end of the sampling circuit is connected to the MCU control module, and the sampling circuit is connected to the POE input end.

[0012] Beneficial effects of the present invention: The present invention collects the voltage signal of the power supply pin of the POE network port in real time through the MCU. After voltage division and filtering processing, multi-level conditional judgments (verification of voltage effective range and duration threshold) are performed, and the on and off of the MOS tube are dynamically controlled. The power supply of the protocol processing module is activated only when a valid device is detected. In the non-working state, the hardware is powered off, that is, the MOS tube is completely turned off and the periodic wake-up detection mechanism (10 seconds of sleep / 3 seconds of detection) is adopted, which significantly reduces the standby power consumption of traditional POE devices from ≥1W to ≤0.3W, and reduces the false trigger rate from ≥5% to <0.1%. At the same time, it is compatible with the IEEE 802.3af / at protocol standard and supports dynamic power distribution (0.1W - 30W). On the premise of ensuring the fast response of the device, it breaks through the technical bottlenecks of high energy consumption and low reliability caused by the continuous operation of the protocol chip in the traditional solution, meets the six-level energy efficiency standard (standby power consumption ≤0.5W) and the strict requirements of industrial scenarios for stability and energy efficiency adaptability, significantly extends the device life and reduces the operation and maintenance cost. Description of the Drawings

[0013] Figure 1 is a schematic flow chart of the POE power supply energy efficiency optimization method of the present invention.

[0014] Figure 2 is a schematic structural diagram of the POE power supply energy efficiency optimization device of the present invention.

[0015] Figure 3 is a schematic structural diagram of the voltage signal acquisition module of the POE power supply energy efficiency optimization device of the present invention.

[0016] Figure 4 is a schematic structural diagram of the MCU control module of the POE power supply energy efficiency optimization device of the present invention.

[0017] Figure 5 is a schematic structural diagram of the MOSFET control module of the POE power supply energy efficiency optimization device of the present invention. Detailed Embodiments

[0018] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. It should be understood that the present application is not limited by the exemplary embodiments disclosed herein. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the scope of protection of the present application.

[0019] In the description of the present invention, it is to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.

[0020] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more unless otherwise specifically defined.

[0021] In the embodiments of the present invention, unless otherwise clearly defined and limited, the terms "installation", "connection", "connection", "fixation", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0022] The present invention provides an attachment Figures 1 to 5 , in the embodiments of the present invention, a method for optimizing the power supply energy efficiency of POE includes the following steps: S1. Voltage signal acquisition; Real-time collect the voltage signal of the power supply pin of the POE network port, and perform voltage division processing and filtering processing on the voltage signal to generate a detection voltage; Specifically, the power supply pins of the POE network port are connected to the MCU of the MCU control module through a voltage division circuit and a filtering circuit. The voltage division circuit consists of resistors R1 (10 kΩ) and R2 (2 kΩ) connected in series, which divides the high voltage (48 - 57 V) input by POE into a low voltage range within 3.3 V at a ratio of 5:1 to meet the ADC input requirements of the MCU. The voltage signal after voltage division is filtered through a parallel 4.7 nF ceramic capacitor to filter out high-frequency noise (such as power supply ripple and electromagnetic interference), generating a stable detection voltage signal. This detection voltage is input through the ADC pin (such as ADC1) of the MCU and converted into a digital signal for subsequent judgment.

[0023] S2. Multi-level conditional judgment; Judge whether the detected voltage is within a preset valid range; Specifically, judge whether the detected voltage is within a preset valid range (such as 2.8 V - 10 V) to exclude false triggers caused by noise or short-time pulses. For example, when the detected voltage is lower than 2.8 V, it is determined that no device is connected; when it is higher than 10 V, it may be an overvoltage anomaly.

[0024] Judge whether the duration of the detected voltage exceeds a set threshold; Specifically, the internal timer of the MCU is used to record the duration of the voltage signal within the valid range. When the duration ≥ 200 ms, it is determined that a valid device is connected; if the threshold is not reached, it is regarded as an interference signal.

[0025] S3. Dynamic power supply control; When the detected voltage simultaneously meets the valid range and duration threshold, the MCU drives the MOS transistor to conduct, activates the protocol processing module and continuously supplies power; When the detected voltage does not meet any of the conditions, the MCU drives the MOS transistor to turn off, stops supplying power to the protocol processing module and enters the low-power mode; Specifically, when the detected voltage simultaneously meets the voltage range and duration conditions, the MCU outputs a high-level signal through the GPIO pin to drive an N-channel MOS transistor (such as NCE60P12K) to conduct. The source electrode of the MOS transistor is connected to the POE input power supply rail (48 - 57 V), and the drain electrode is connected to the power supply terminal of the protocol processing module. At this time, the protocol processing module is activated, performs a POE protocol handshake and supplies power to the terminal device. If the detected voltage does not meet any of the conditions, the MCU outputs a low-level signal to turn off the MOS transistor, the protocol processing module is completely powered off, and the system enters the low-power mode.

[0026] S4. Periodic wake-up detection; In the low-power mode, the MCU wakes up periodically at the first preset time interval, drives the MOS transistor to conduct for the second preset time, and re-performs voltage signal acquisition and multi-level conditional judgment.

[0027] Specifically, in the low-power mode, the MCU turns off non-essential peripherals (such as communication interfaces and high-speed clocks), and only maintains the operation of the low-speed timer. The timer wakes up the MCU every 10 seconds. The MCU drives the MOS transistor to conduct for 3 seconds, re-acquires the voltage signal, and performs multi-level conditional judgment. If a valid device is detected, the MOS transistor is kept conducting; if it is still invalid, the MOS transistor is turned off again and the MCU enters the low-power state. This periodic detection mechanism controls the standby power consumption below 0.3W, while ensuring that the device response delay does not exceed 10 seconds.

[0028] Through the collaborative design of voltage division filtering, multi-level judgment, dynamic power-off, and periodic wake-up, this solution reduces the standby power consumption of traditional POE devices from ≥1W to ≤0.3W, and reduces the false trigger rate from ≥5% to <0.1%. It is also compatible with the IEEE 802.3af / at protocol and meets the industrial-level anti-interference requirements (such as the IEC 61000-4-5 standard).

[0029] The preset effective range is from 2.8V to 10V, and the set threshold is 200ms.

[0030] Specifically, the ADC module of the MCU continuously samples the detected voltage after voltage division filtering, and configures its effective determination range from 2.8V to 10V through software. This range corresponds to the voltage characteristics of valid devices in the POE protocol (such as the detected voltage of PD devices in the IEEE 802.3af / at standard). For example, when the actual voltage at the POE input is from 14V to 50V, it is converted into a detected voltage from 2.8V to 10V through a voltage division circuit (ratio 5:1). The MCU performs analog-to-digital conversion through an internal reference voltage (such as 3.3V) and determines whether the voltage is within the effective range. If the detected voltage is lower than 2.8V (corresponding to an actual voltage <14V), it is regarded as no device connected or a line short circuit; if it is higher than 10V (corresponding to an actual voltage >50V), it is determined as overvoltage abnormality and the protection mechanism is triggered.

[0031] The MCU accumulates the duration of the effective voltage through the timer: Sampling frequency: The ADC continuously samples the detected voltage at a frequency of 1kHz, and judges whether the voltage is within the effective range after each sampling.

[0032] Cumulative counting: When the voltage is continuously detected as valid, the MCU starts an internal counter, which increments by 1 every 1ms; if the voltage exceeds the effective range midway, the counter is cleared.

[0033] Threshold trigger: When the accumulated value of the counter ≥ 200 (corresponding to 200 ms), it is determined that a valid device is connected, and the MCU drives the MOS transistor to conduct; if the interruption occurs before 200 ms, the low-power mode is maintained.

[0034] In this embodiment, through precise voltage range determination (2.8V - 10V) and strict duration threshold (200 ms), the false trigger rate is reduced from ≥ 5% of the traditional single-stage detection to < 0.1%, while being compatible with the IEEE 802.3af / at standard to ensure the reliability of device connection determination.

[0035] The first preset time interval is 10 seconds, and the second preset time is 3 seconds.

[0036] Specifically, after the system enters the low-power mode, the MCU switches to the low-speed internal clock to reduce power consumption, and at the same time starts the timer module and configures it to trigger a wake-up interrupt at an interval of 10 seconds. When the timer count reaches 10 seconds, the MCU wakes up from the low-power mode, switches to the normal working clock, and drives the MOS transistor to conduct through the GPIO pin to power on the protocol processing module. Subsequently, the MCU starts the ADC module to collect the voltage signal of the power supply pin of the POE network port and performs multi-level conditional judgments (voltage range and duration verification). This detection process lasts for 3 seconds. If it is determined that a valid device is connected within 3 seconds, the MCU keeps the MOS transistor conducting and exits the low-power mode; if no valid signal is detected, the MCU immediately turns off the MOS transistor after 3 seconds, re-enters the low-power mode and resets the timer to start the next 10-second interval sleep cycle.

[0037] Through precise control of the 10-second sleep and 3-second detection cycle, the standby power consumption of the system is reduced from ≥ 1W in the traditional continuous detection mode to below 0.3W, while ensuring that the maximum response delay for device connection does not exceed 10 seconds (measured value 9.8 - 10.2 seconds), meeting the real-time requirements of the POE Class 6 energy efficiency standard and industrial scenarios.

[0038] The dynamic power supply control further includes: after the protocol processing module is activated, the MCU monitors the power demand of the terminal device in real time and dynamically adjusts the output power from 0.1W to 30W.

[0039] Specifically, after the protocol processing module is activated, the MCU reads the power distribution register of the protocol processing module (such as TPS23753A) in real time through the I2C or SPI interface to obtain the power demand parameters of the terminal device (such as Class 0-4 levels in the IEEE 802.3af / at standard). The MCU converts the device category into a target output power value (0.1W - 30W) according to the preset power mapping table, and adjusts the duty cycle of the adjustable DC-DC converter inside the protocol processing module through the PWM signal to dynamically adjust the output voltage and current. For example, when it is detected that the device is Class 0 (default power 15.4W), the MCU controls the DC-DC converter to output 48V / 0.32A; if the device degrades to Class 1 (power 4W), the MCU adjusts the output to 48V / 0.08A. If the terminal device has high power demand (such as 30W), the MCU switches to the full power mode, drives the DC-DC converter to output the maximum current (0.625A@48V), and at the same time monitors the temperature rise of the protocol processing module through the temperature sensor. If it exceeds the safety threshold (such as 85°C), the output power is gradually derated to 20W (48V / 0.42A).

[0040] In this embodiment, through protocol interaction and dynamic power regulation, the POE power supply energy efficiency is increased by more than 30% (compared with the traditional fixed power output scheme), and the output power is strictly limited within the range of 0.1W - 30W to adapt to the load requirements of different terminal devices.

[0041] In the low-power mode, the MCU turns off the MOS transistor to completely disconnect the power supply of the protocol processing module.

[0042] Specifically, when the detected voltage does not meet the effective conditions, the MCU outputs a low-level signal (0V) through the GPIO pin, driving the gate voltage of the N-channel MOS transistor to drop below the turn-off threshold, making the MOS transistor in a completely off state. At this time, the impedance between the source and drain of the MOS transistor is extremely high (>1MΩ), forming a physical isolation between the power supply rail (48 - 57V) at the POE input and the power supply input of the protocol processing module. The power supply voltage of the protocol processing module is completely cut off, and its internal circuit stops working, and the power consumption drops to zero. To ensure the reliability of complete power-off, after turning off the MOS transistor, the MCU switches to the low-power mode (such as the STOP mode), turns off non-essential peripherals (such as ADC, communication interface), and only maintains the operation of the low-speed internal clock to maintain the timer function. At this time, the standby current of the MCU itself ≤0.5mA, and the overall standby power consumption of the system ≤0.3W.

[0043] In this embodiment, through the hardware-level power-off (MOS transistor turn-off) and power supply ground isolation design, zero-power operation of the protocol processing module in the low-power mode is achieved, completely eliminating the energy consumption problem caused by the standby leakage (about 1 mA) of the protocol chip in the traditional solution, ensuring that the standby power consumption is strictly ≤ 0.3 W, and meeting the POE Class 6 energy efficiency standard.

[0044] As Figures 2 to 5 described, a POE power supply energy efficiency optimization device for the POE power supply energy efficiency optimization method as described above includes: A POE input terminal for receiving power and data from the Ethernet. A voltage signal acquisition module connected to the POE input terminal for real-time acquisition of the voltage signal of the power supply pin of the POE network interface, and processing the voltage signal through a voltage division circuit and a filtering circuit to generate a detection voltage. An MCU control module connected to the voltage signal acquisition module for receiving the detection voltage and performing multi-level conditional judgments, judging whether the detection voltage is within a preset effective range, and judging whether the duration of the detection voltage exceeds a set threshold. A MOSFET control module connected to the MCU control module for responding to the MCU control signal and controlling the power supply state of the protocol processing module through a switching MOSFET transistor. A protocol processing module connected to the MOSFET control module for activating or shutting down the protocol power supply according to the MCU control signal and performing POE protocol processing.

[0045] Specifically, the POE input terminal uses a standard RJ45 interface to connect to the Ethernet cable, receives a composite signal integrating power and data, and internally separates the power signal (48 - 57V DC) to the power rail through an isolation transformer, and the data signal is transmitted to the protocol processing module.

[0046] The voltage signal acquisition module consists of a voltage division circuit and a filtering circuit. The voltage division circuit is connected in series with resistors (such as R1 and R2) across the 4 / 5 pins and 7 / 8 pins of the POE network interface to divide the high voltage proportionally to the low voltage range; the filtering circuit uses an RC low-pass filter structure to suppress high-frequency noise interference and outputs a stable detection voltage signal to the ADC input pin of the MCU control module.

[0047] As Figure 4 described, the MCU control module is implemented based on a low-power microcontroller (such as the STM32 series). Its ADC module real-time acquires the voltage signal and performs multi-level conditional judgments through the built-in firmware: first, judging whether the detection voltage is within a preset effective range (such as valid / invalid state), and second, accumulating the duration of the effective voltage through a timer. The GPIO output pin of the MCU is directly connected to the MOSFET control module.

[0048] The MOSFET control module includes an N-channel MOSFET. Its gate is connected to the GPIO pin of the MCU, its source is connected to the power rail of the POE input, and its drain is connected to the power supply input of the protocol processing module. When the MCU determines that the power supply condition is met, the GPIO outputs a high level to drive the MOSFET to conduct, and the protocol processing module powers on and works; conversely, the GPIO outputs a low level to turn off the MOSFET and completely cut off the power supply to the protocol processing module.

[0049] The protocol processing module integrates a POE protocol chip (such as a controller supporting IEEE 802.3af / at). When the MOSFET is conducting, it performs protocol handshake, power distribution, and data communication functions; when the MOSFET is turned off, it is completely powered off to ensure zero standby power consumption.

[0050] This embodiment realizes the dynamic control and protocol processing of POE power supply through modular design. In the invalid state, the power supply to the protocol module is completely disconnected through the MOSFET, and the standby power consumption approaches zero. At the same time, it ensures the rapid response and stable power supply of effective devices.

[0051] As Figure 5 shown, the MOSFET control module includes a MOSFET. The gate of the MOSFET is connected to the MCU control module. The source of the MOSFET is connected to the power rail of the POE input, and the drain of the MOSFET is connected to the power supply input of the protocol processing module.

[0052] Specifically, in the PCB layout, the gate of the N-channel MOSFET (such as NCE60P12K) is connected to the GPIO pin of the MCU control module. The source is directly connected to the power rail (48 - 57V DC) of the POE input through a wide copper foil trace, and the drain is connected to the power supply input of the protocol processing module through a low-impedance path. When the MCU outputs a high level (3.3V), the MOSFET gate voltage exceeds the threshold (Vgs≥4.5V), and a low-impedance channel (Rds_on≤60mΩ) is formed between the source and the drain, and the protocol processing module powers on and works; when the MCU outputs a low level (0V), the gate voltage is forced to zero by the pull-down resistor, and the MOSFET is completely turned off (drain current <1μA), and the protocol processing module is powered off.

[0053] This embodiment realizes the rapid switching of the power supply to the protocol processing module (turn-on delay <1ms, turn-off delay <0.5ms) by optimizing the physical connection and drive design of the MOSFET, and the drain turn-off impedance >1MΩ, completely eliminating the standby energy consumption caused by leakage current in the traditional scheme.

[0054] As Figure 3As shown, the voltage signal acquisition module includes a sampling circuit. The output end of the sampling circuit is connected to the MCU control module, and the sampling circuit is connected to the POE input end.

[0055] Specifically, the sampling circuit is composed of a voltage dividing resistor network (R1 = 10 kΩ, R2 = 2 kΩ) and a filtering capacitor (C1 = 4.7 nF). Its input end is connected across the 4 / 5 pins and 7 / 8 pins of the POE input end to directly obtain the original voltage signal (48 - 57 V) of the POE power supply pins. The voltage dividing resistor network divides the high voltage by a ratio of 5:1 to the range of 9.6 V - 11.4 V, and then filters out high-frequency noise (such as switching power supply ripple and electromagnetic interference) through the filtering capacitor to generate a stable detected voltage signal. The output end of the sampling circuit is connected to the ADC input pin (such as ADC1) of the MCU control module through PCB traces, and the detected voltage is used for multi-level conditional judgment after analog-to-digital conversion inside the MCU.

[0056] It should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0057] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for optimizing the power efficiency of POE power supply, characterized in that It includes the following steps: S1. Voltage signal acquisition; The voltage signal of the power supply pin of the POE network port is acquired in real time, and the voltage signal is subjected to voltage division processing and filtering processing to generate a detection voltage; S2. Multi-level condition judgment; Judge whether the detection voltage is within a preset effective range; Judge whether the duration of the detection voltage exceeds a set threshold; S3. Dynamic power supply control; When the detection voltage meets both the effective range and the duration threshold, the MCU drives the MOS transistor to conduct, activates the protocol processing module and continuously supplies power; When the detection voltage does not meet any of the conditions, the MCU drives the MOS transistor to turn off, stops supplying power to the protocol processing module and enters the low-power mode; S4. Periodic wake-up detection; In the low-power mode, the MCU wakes up periodically at a first preset time interval, drives the MOS transistor to conduct for a second preset time, and re-executes voltage signal acquisition and multi-level condition judgment.

2. The POE power supply energy efficiency optimization method according to claim 1, characterized in that, The preset effective range is 2.8V to 10V, and the set threshold is 200ms.

3. The POE power supply energy efficiency optimization method according to claim 1, wherein, The first preset time interval is 10 seconds, and the second preset time is 3 seconds.

4. The POE power supply energy efficiency optimization method according to claim 1, characterized in that, The dynamic power supply control further includes: after the protocol processing module is activated, the MCU monitors the power demand of the terminal device in real time and dynamically adjusts the output power to 0.1W to 30W.

5. A POE power supply energy efficiency optimization device for implementing the POE power supply energy efficiency optimization method according to claims 1 to 4, characterized in that, It includes: A POE input end for receiving power and data from the Ethernet; A voltage signal acquisition module connected to the POE input end for acquiring the voltage signal of the power supply pin of the POE network port in real time, and processing the voltage signal through a voltage division circuit and a filtering circuit to generate a detection voltage; An MCU control module connected to the voltage signal acquisition module for receiving the detection voltage and performing multi-level condition judgment, judging whether the detection voltage is within a preset effective range, and judging whether the duration of the detection voltage exceeds a set threshold; A MOSFET control module connected to the MCU control module for responding to the MCU control signal and controlling the power supply state of the protocol processing module by switching the MOSFET transistor; A protocol processing module connected to the MOSFET control module for activating or closing the protocol power supply according to the MCU control signal and performing POE protocol processing.

6. The POE power supply energy efficiency optimization device according to claim 5, characterized in that, The MOSFET control module includes a MOSFET transistor, the gate of the MOSFET transistor is connected to the MCU control module, the source of the MOSFET transistor is connected to the power rail of the POE input end, and the drain of the MOSFET transistor is connected to the power supply input end of the protocol processing module.

7. The POE power supply energy efficiency optimization device according to claim 5, characterized in that The voltage signal acquisition module includes a sampling circuit, the output end of the sampling circuit is connected to the MCU control module, and the sampling circuit is connected to the POE input end.

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