Image data acquisition method, image processing chip and terminal equipment

Abstract

The embodiment of the invention discloses an image data acquisition method, an image processing chip and terminal equipment, and relates to the field of image processing. According to the invention, the camera is configured as an effective SPI slave of the image processing chip, a CS pin is omitted, and the image processing chip is only provided with a clock pin and a data pin which are connected with the image processing chip. The camera is set to be in a specific working mode, clock signals are output to the chip through the clock pin and image data are output through the data pin when the camera works, and output is stopped when the camera is idle. The timer starts timing when detecting that the clock signal stops outputting, and stops timing when the clock signal arrives again. Judging according to the timing duration, if the timing duration is greater than or equal to a first duration threshold value and less than a second duration threshold value, taking a current clock signal initial position as a row initial position, and saving HS pin receiving and cutting pixel rows; if the first pixel line is larger than or equal to the second threshold value, the first pixel line serves as a frame starting position, VS pin receiving is omitted, the first pixel line is cut, and efficient communication with low IO pin occupation is achieved.

Description

Technical Field

[0001] The present application relates to the field of image processing, and in particular to an image data acquisition method, an image processing chip and a terminal device. Background Art

[0002] Cameras with SPI (Serial Peripheral Interface) interfaces are widely used in various image acquisition devices, such as security surveillance cameras and smartphone camera modules, due to their simple communication protocols and fast transmission speeds. As the core component of the image acquisition and processing system, the image processing chip is responsible for communicating with the camera to obtain image data and perform subsequent processing.

[0003] However, in the existing technical solutions, when the camera with SPI interface is used as the output source of image data, the communication between the image processing chip and the camera needs to occupy more IO (Input / Output) pins. Specifically, the CS (Chip Select) pin is usually required to select a specific camera device, the SCL (Serial Clock) pin is used to provide a clock signal to synchronize data transmission, the SDA (Serial Data) pin is used to transmit image data, the VS (Vertical Synchronization) pin is used to mark the start and end of a frame of image, the HS (Horizontal Synchronization) pin is used to mark the start and end of a line of image, and the MCLK (Master Clock) pin is used to provide a working clock for the camera.

[0004] Although this multi-pin communication method can realize data transmission and synchronous control between the image processing chip and the camera, it also brings obvious problems. With the continuous increase in the functions of the image acquisition and processing system, the image processing chip needs to connect to more and more external devices, such as memory, display, sensor, etc., while the number of IO pins inside the chip is limited. A large number of IO pins are used for communication with the camera, which will lead to tight use of IO resources, limit the ability of the image processing chip to connect to other external devices, and thus affect the function expansion and performance improvement of the entire system.

[0005] Therefore, how to reduce the number of IO pins occupied by the image processing chip when communicating with the SPI interface camera and improve the utilization of IO resources has become a technical problem that needs to be urgently solved in the current image acquisition and processing field. Summary of the invention

[0006] The embodiments of the present application provide a method for collecting image data, an image processing chip, and a terminal device, which can solve the problem of tight IO resources of the image processing chip in the prior art. The technical solutions are as follows:

[0007] In a first aspect, the embodiments of the present application provide a method for collecting image data, and the method includes:

[0008] Configure the camera as a valid SPI slave of the image processing chip; wherein, the image processing chip is provided with a clock pin and a data pin, and is connected to the camera of the SPI interface through the set clock pin and data pin;

[0009] Configure the camera to a specific working mode, and the specific working mode means that if the camera is in a working state, the camera outputs a clock signal to the image processing chip through the clock pin, and outputs image data to the image processing chip through the data pin; if the camera is in an idle state, stop the output of the clock signal and the image data;

[0010] When it is detected that the clock signal stops outputting, instruct the timer to start timing;

[0011] When it is detected that the clock signal comes again, instruct the timer to stop timing;

[0012] Obtain the timing duration of the timer;

[0013] If the timing duration is greater than or equal to a first duration threshold and less than a second duration threshold, use the starting position of the currently received clock signal as the row starting position, receive the pixel row according to the row starting position, and write the received pixel row after cropping the row head and row tail into the memory according to a preset cropping rule; the second duration threshold is greater than the first duration threshold;

[0014] If the timing duration is greater than or equal to the second threshold, use the starting position of the currently received clock signal as the frame starting position, receive the first pixel row of the image frame according to the frame starting position, and crop the frame head of the first pixel row according to a preset cropping rule, and write the cropped pixel row into the memory.

[0015] In a second aspect, the embodiments of the present application provide an image processing chip, and the device includes:

[0016] A configuration module, configured to configure the camera as a valid SPI slave of the image processing chip; wherein, the image processing chip is provided with a clock pin and a data pin, and is connected to the camera of the SPI interface through the set clock pin and data pin;

[0017] The configuration module is further configured to configure the camera into a specific working mode, where the specific working mode means that if the camera is in the working state, the camera outputs a clock signal to the image processing chip through the clock pin, and outputs image data to the image processing chip through the data pin; if the camera is in the idle state, the output of the clock signal and the image data is stopped;

[0018] The clock signal detection module is configured to indicate the timer to start timing when it detects that the clock signal stops being output;

[0019] The clock signal detection module is further configured to indicate the timer to stop timing when it detects that the clock signal comes again;

[0020] The timer module is configured to obtain the timing duration of the timer;

[0021] The data writing module is configured to, if the timing duration is greater than or equal to the first duration threshold and less than the second duration threshold, use the starting position of the currently received clock signal as the row starting position, receive a pixel row according to the row starting position, and write the received pixel row into the memory after cropping the row head and row tail according to a preset cropping rule; the second duration threshold is greater than the first duration threshold;

[0022] If the timing duration is greater than or equal to the second threshold, use the starting position of the currently received clock signal as the frame starting position, receive the first pixel row of the image frame according to the frame starting position, and crop the frame head of the first pixel row and write the cropped pixel row into the memory according to a preset cropping rule.

[0023] In a third aspect, an embodiment of the present application provides a computer storage medium, which stores multiple instructions, and the instructions are suitable for being loaded and executed by a processor to perform the above method steps.

[0024] In a fourth aspect, an embodiment of the present application provides an image processing chip, which may include: a processor and a memory; wherein, the memory stores a computer program, and the computer program is suitable for being loaded and executed by the processor to perform the above method steps.

[0025] The beneficial effects brought by the technical solutions provided by some embodiments of the present application at least include:

[0026] By configuring the camera as an active SPI slave and omitting the CS pin, based on the characteristics of the camera output clock signal and image data in a specific working mode, timing is performed using the situation of the clock signal stopping and then arriving again. The start position of a row and the start position of a frame are determined according to the timing duration, thereby omitting the HS pin and the VS pin. The image processing chip only needs to use two IO pins, namely the clock pin and the data pin, to complete communication with the camera and related image data processing work, greatly reducing the number of IO pins used, effectively alleviating the problem of tight use of IO resources, providing the possibility for the image processing chip to connect more external devices, and enhancing the functional expandability and overall performance of the system. Brief Description of the Drawings

[0027] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0028] Figure 1 is a schematic diagram of the network architecture provided by the embodiments of the present application;

[0029] Figure 2 is a schematic flowchart of the method for collecting image data provided by the embodiments of the present application;

[0030] Figure 3 is a schematic structural diagram of an image processing chip provided by the present application;

[0031] Figure 4 is another schematic structural diagram of an image processing chip provided by the present application. Detailed Description of the Embodiments

[0032] To make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the drawings.

[0033] As Figure 1 shown, the network architecture may include: a terminal device 101 with an image processing chip built therein and a camera 102. The image processing chip is connected to the camera 102 in a wired manner. Specifically, the image processing chip communicates with the camera 102 of the SPI interface through the set IO pins. The camera 102 generates image data, and the image processing chip collects and processes the image data from the camera. The terminal device may be a smart phone, a tablet computer, a laptop portable computer, a desktop computer, etc.

[0034] It should be understood that Figure 1The number of terminal devices and cameras in it is only illustrative. According to actual needs, it can be any number.

[0035] Please refer to Figure 2 , which is a schematic flowchart of a method for collecting image data provided by an embodiment of the present application. As Figure 2 shown, the method of the embodiment of the present application may include the following steps:

[0036] S201. Configure the camera as an effective SPI slave of the image processing chip.

[0037] Among them, the image processing chip is provided with a clock pin and a data pin, and is connected to the SPI interface camera through the set clock pin and data pin. The image processing chip has the function of an SPI master device, and there is a special configuration module inside it. This module only includes a clock pin (SCK) and a data pin (MISO or MOSI, here the camera outputs data to the master chip as a slave, mainly using MISO) for establishing a connection with the camera, and these are the only IO pins with a connection relationship between the two.

[0038] First, the image processing chip performs a hardware reset operation on the camera through a specific hardware reset mechanism (possibly with the help of other control logics inside the chip or an external reset circuit) to ensure that the camera is in an initial state.

[0039] Then, the SPI controller of the image processing chip sends a configuration command sequence to the camera in a specific format through the data pin according to the timing requirements of the SPI communication protocol. For example, for a common SPI camera module, first send a device selection signal (assumed to be 0x01), then send a register address (such as 0x10, for setting the slave mode), and then send configuration data (such as 0x01, indicating enabling the slave mode).

[0040] After receiving these configuration commands, the internal SPI slave interface circuit of the camera is activated, and an effective SPI communication connection is established with the image processing chip only through the clock pin and the data pin, so that it becomes an effective SPI slave of the image processing chip.

[0041] S202. Configure the camera to a specific working mode, where the specific working mode means: if the camera is in the working state, the camera outputs a clock signal to the image processing chip through the clock pin, and outputs image data to the image processing chip through the data pin; if the camera is in the idle state, the output of the clock signal and image data is stopped.

[0042] Among them, the image processing chip sends specific working mode configuration commands to the camera through the SPI interface (only using the clock pin and the data pin). These commands usually involve register settings inside the camera.

[0043] For example, assume that the camera has a register for controlling the working mode and clock signal output. The image processing chip sends a command to set this register to a specific value, such as 0x02. When the register value is 0x02, the camera enters a specific working mode.

[0044] In the specific working mode, when the camera is in the working state, its internal clock generator generates a clock signal according to its own frame rate setting and outputs it to the image processing chip through the clock pin (SCK). At the same time, the image sensor inside the camera transmits the captured image data bit by bit to the image processing chip through the data pin (MISO) according to the rhythm of the clock signal.

[0045] When the camera is in the idle state, its internal clock generator stops working, stops the output of the clock signal, and at the same time the output of the image data also stops. For example, when the camera is performing autofocus or waiting for an external trigger signal, it may enter the idle state.

[0046] In some embodiments of the present application, configuring the camera to a specific working mode includes:

[0047] The image processing chip displays the configuration interface of the camera on the terminal device;

[0048] Generating a configuration instruction based on the configuration interface; the configuration instruction includes working mode information, and the working mode information is used to instruct the camera to switch to a specific working mode;

[0049] Sending the configuration instruction to the camera through the data pin.

[0050] Among them, the image processing chip itself has certain interactive control capabilities, or has corresponding interfaces with the operating systems of terminal devices (such as the systems of mobile phones, computers, etc.). Through these interfaces, a display instruction is sent to the terminal device. After receiving the instruction, the terminal device calls its own graphic display module to draw the configuration interface of the camera on the screen. This configuration interface is the window for users to interact with the camera configuration process. It usually contains various options and parameter setting controls for allowing users to select the working mode of the camera. For example, there may be a drop-down menu for users to select different working mode options such as "specific working mode", "high-speed continuous shooting mode", "low-light mode", etc., and there may also be some auxiliary parameter settings, such as frame rate, resolution, etc. (although this mainly focuses on the working mode, the interface may have more functions). It is convenient for users to intuitively understand the configurable options of the camera and specify the working mode of the camera through simple operations (such as clicking, swiping, etc.), improving the convenience of configuration and the user experience.

[0051] After the user completes the selection of the working mode on the configuration interface, the terminal device will feedback the user's operation information to the image processing chip. There is a dedicated instruction generation module inside the image processing chip. According to the working mode information selected by the user, this module generates corresponding configuration instructions in accordance with the pre-defined instruction format and protocol.

[0052] The configuration instructions contain working mode information, and this information exists in the instructions in a specific encoding manner. For example, if the user selects a "specific working mode", there may be a specific field (such as a byte or several bits) in the instruction to represent this mode. In addition, the instruction may also contain some check information to ensure the integrity and accuracy of the instruction during transmission. The generated configuration instruction is the key to the communication between the image processing chip and the camera. It accurately conveys the specific working mode that the user hopes the camera to switch to, providing a basis for subsequent configuration operations.

[0053] The image processing chip sends the generated configuration instructions bit by bit to the camera through the data pins (MISO or MOSI) of the SPI interface. Here, mainly the main chip sends instructions to the slave camera. If the camera outputs data as a slave, MISO is mainly used, but when sending instructions, MOSI is used or according to the specific SPI settings. In SPI communication, data transmission is carried out according to the rhythm of the clock signal provided by the clock pin (SCK) to ensure that each bit of the instruction can be accurately received by the camera.

[0054] After the camera receives the configuration instruction, the instruction parsing module inside it will parse the instruction and identify the working mode information in it. Then, the camera adjusts the settings of its internal registers according to the parsing result, so as to switch to a specific working mode.

[0055] Furthermore, the configuration instruction can also include: SPI mode information, and configuration communication parameter information. The SPI mode information indicates whether it is a camera or an SPI host or an SPI slave. The communication parameter information includes: clock frequency, data bit width, etc.

[0056] S203. When it is detected that the clock signal stops outputting, instruct the timer to start timing.

[0057] Among them, there is a clock signal detection module inside the image processing chip, and this module continuously monitors the clock signal input from the camera clock pin (SCK).

[0058] When the detection module does not detect a valid clock signal edge (rising edge or falling edge), it is determined that the clock signal stops outputting.

[0059] Once the clock signal stop output is detected, the image processing chip sends a start timing instruction to the timer module through the internal control logic. After receiving the instruction, the timer module starts timing based on the internal clock source of the chip (such as the system clock). For example, if the system clock frequency is 50MHz, the timer can count at the divided value of this clock frequency to achieve accurate timing.

[0060] S204. When it is detected that the clock signal comes again, it indicates the timer to stop timing.

[0061] Among them, the clock signal detection module continues to monitor the signal of the clock pin (SCK). When an effective clock signal edge (such as the rising edge) is detected, it is determined that the clock signal comes again.

[0062] After it is detected that the clock signal comes again, the image processing chip sends a stop timing instruction to the timer module through the internal control logic. After receiving the instruction, the timer module stops counting and saves the current count value.

[0063] In some embodiments of the present application, the counter is started or stopped in an interrupt manner.

[0064] Among them, in the communication circuit between the image processing chip and the camera and the timing-related circuit, two interrupt sources are set. One interrupt source is used to detect the situation where the clock signal stop output, and the other interrupt source is used to detect the situation where the clock signal comes again. These two interrupt sources are respectively connected to the output of the clock signal detection module.

[0065] There is an interrupt controller inside the image processing chip, which is responsible for managing the requests of each interrupt source. The interrupt controller will sort the interrupt sources by priority and decide whether to respond to the interrupt request according to the current state of the system. When an interrupt source generates an interrupt signal, it will send the interrupt request to the interrupt controller.

[0066] When the clock signal detection module does not detect an effective clock signal edge within a certain period of time and determines that the clock signal stop output, this module will send an interrupt trigger signal to the corresponding interrupt source. This signal is a level signal or a pulse signal, and the specific form depends on the design of the chip.

[0067] After the interrupt controller receives the request of this interrupt source, if the current system allows interrupt response (for example, there is no higher-priority interrupt being processed), the interrupt controller will save the context of the currently executing program (such as the program counter, register status, etc.), and then jump to the pre-set interrupt service routine (ISR) entry address.

[0068] In the interrupt service routine, the image processing chip sends a start timing instruction to the timer module through the internal control logic. After receiving the instruction, the timer module starts timing based on the internal clock source of the chip (such as the system clock). For example, if the system clock frequency is 50 MHz, the timer can count at a divided value of this clock frequency to achieve accurate timing. At the same time, the interrupt service routine clears the interrupt flag so that the same interrupt can be responded to again later.

[0069] When the clock signal detection module detects a valid clock signal edge (such as a rising edge), it determines that the clock signal has arrived again. At this time, the module sends another interrupt trigger signal to the corresponding interrupt source.

[0070] After receiving the request from this interrupt source, the interrupt controller also performs priority judgment and system status check. If the interrupt response condition is met, the interrupt controller saves the context of the current program and jumps to another pre-set interrupt service routine entry address.

[0071] In this interrupt service routine, the image processing chip sends a stop timing instruction to the timer module through the internal control logic. After receiving the instruction, the timer module stops counting and saves the current count value. At the same time, the interrupt service routine also clears the interrupt flag to ensure that the system can normally process subsequent interrupt requests.

[0072] Whether it is an interrupt triggered by the stop of the clock signal or the arrival again, after completing the corresponding processing, the interrupt service routine executes an interrupt return instruction. This instruction will restore the system to the state before the interrupt occurred and continue to execute the interrupted program.

[0073] The interrupt controller restores the program counter to the value at the time of the interrupt according to the previously saved context information, so that the program continues to execute from the interrupted place. In this way, the entire system can respond to the change of the clock signal in time and accurately control the timing operation of the timer without affecting other tasks.

[0074] S205. Obtain the timing duration of the timer.

[0075] Among them, the image processing chip communicates with the timer module through the internal data bus.

[0076] The image processing chip sends a command to read the timing duration to the timer module, and the timer module transmits the saved count value to the image processing chip through the data bus.

[0077] The image processing chip converts the count value into the actual time length according to the operating frequency of the timer (such as the frequency after dividing the previously mentioned 50 MHz), and obtains the timing duration. For example, if the timer counts at a frequency of 1 MHz and the count value is 5000, the timing duration is 5 ms.

[0078] S206. If the timing duration is greater than or equal to the first duration threshold and less than the second duration threshold, use the starting position of the currently received clock signal as the row starting position, receive the pixel row according to the row starting position, and write the received pixel row after cropping the row head and row tail into the memory according to the preset cropping rule; the second duration threshold is greater than the first duration threshold.

[0079] Among them, the first duration threshold and the second duration threshold are stored inside the image processing chip (for example, the first duration threshold is 1 ms and the second duration threshold is 10 ms). After obtaining the timing duration, compare it with these two thresholds.

[0080] If the timing duration is greater than or equal to the first duration threshold and less than the second duration threshold, the image processing chip determines that the currently received is the starting part of a row of image data. At this time, mark the starting position of the currently received clock signal (that is, the position when the clock signal is detected to come again) as the row starting position.

[0081] Starting from the row starting position, the image processing chip receives pixel data bit by bit only through the data pin (MISO) according to the timing sequence of the SPI communication protocol. For example, for 8-bit pixel data, the image processing chip reads one bit of data at the rising edge or falling edge (according to the SPI mode setting) of each clock cycle until a whole row of pixel data is received.

[0082] After receiving a row of pixel data, the image processing chip processes the pixel row according to the preset cropping rule. The cropping rule may include removing a certain number of pixels at the row head and row tail. For example, the preset rule is to remove 20 pixels at the row head and 20 pixels at the row tail. The image processing chip writes the cropped pixel row data to the specified storage area in the memory according to this rule.

[0083] S207. If the timing duration is greater than or equal to the second threshold, use the starting position of the currently received clock signal as the frame starting position, receive the first pixel row of the image frame according to the frame starting position, and crop the frame head of the first pixel row according to the preset cropping rule, and write the cropped pixel row into the memory.

[0084] When the obtained timing duration is greater than or equal to the second duration threshold, the image processing chip determines that the currently received is the starting part of a frame of image data. At this time, mark the starting position of the currently received clock signal as the frame starting position.

[0085] Starting from the frame start position, the image processing chip receives the first pixel row of the image frame only through the data pin (MISO) according to the SPI communication protocol. Similarly, the pixel data is received bit by bit according to the rhythm of the clock signal until the complete data of the first pixel row is received.

[0086] After receiving the first pixel row, the image processing chip processes the first pixel row according to the preset cropping rules. Here, the cropping rules mainly target the frame header part, such as removing 50 pixels of the frame header. The image processing chip writes the cropped first pixel row data into the specified frame storage area in the memory to prepare for receiving and processing the entire frame of image data.

[0087] Furthermore, in some embodiments of the present application, a data reading module dedicated to data frame reading is provided inside the image processing chip. This module is connected to the memory (SRAM) through specific signal lines. When there is a new data frame in the memory ready to be read, the memory sends an interrupt signal or a specific trigger signal to the data reading module of the image processing chip. For example, the memory may set a certain flag bit to a specific value after writing a frame of data, and the data reading module of the image processing chip will continuously monitor this flag bit. Once the flag bit change is detected, it is determined that there is a new data frame to be read.

[0088] After receiving the signal, the data reading module starts an asynchronous reading task. This task will be put into the task queue of the image processing chip and scheduled for execution by the chip's task scheduler according to the current system load and resource situation. The task scheduler will ensure that the reading task is processed at an appropriate time to avoid conflicts with other tasks (such as image acquisition, encoding, etc.).

[0089] In the memory, each data frame has a unique starting address. The image processing chip internally maintains a frame address management module that records the starting address of the currently readable data frame. When starting the reading task, the data reading module obtains the starting address of the current data frame from the frame address management module.

[0090] The data reading module transfers the obtained starting address to the memory through the address bus. The address bus is a set of signal lines used to transmit memory addresses, which can accurately transfer the address information from the image processing chip to the memory.

[0091] After the memory receives the starting address, it begins to transfer the data of the data frame to the image processing chip through the data bus. The data bus is a set of signal lines used to transfer data, and its width is usually related to the pixel bit width of the data frame. For example, if the pixel bit width of the data frame is 8 bits, the width of the data bus may also be 8 bits, so that one pixel of data can be transferred each time.

[0092] To improve the reading efficiency, the image processing chip may read the data frame row by row or block by block. For example, it first reads the data of the first row of the data frame, and then reads the data of the second row, and so on. When reading each row of data, the memory will sequentially transfer the data to the image processing chip through the data bus according to the address order.

[0093] During the reading process, the image processing chip continuously monitors the amount of data read. When the amount of data read reaches the total size of a data frame, it is determined that the reading is completed. The total size of the data frame can be calculated according to the resolution and pixel bit width of the image. For example, for an image with a resolution of 640×480 and a pixel bit width of 8 bits, the total size of its data frame is 640×480×8 bits.

[0094] There is a dedicated decoding module inside the image processing chip. When the reading task is completed and the data frame is completely read into the chip, the data reading module will activate the decoding function and select the corresponding decoding algorithm according to the format of the data frame (such as JPEG, PNG, etc.).

[0095] Before starting the decoding, set the decoding parameters according to the relevant information of the data frame (such as the resolution and color space of the image). These parameters will affect the decoding process and results, ensuring that the decoded image data can be correctly displayed.

[0096] Start to parse the data frame and gradually extract the image data according to the selected decoding algorithm. For example, for a data frame in JPEG format, the decoding module will first parse the JPEG file header to obtain the basic information of the image, such as the size and color mode of the image. Then, according to the JPEG compression algorithm, decompress and restore the compressed data to obtain the original pixel data.

[0097] If the color space of the decoded image data is inconsistent with the color space required by the display screen, the decoding module will also perform color space conversion. For example, convert the RGB color space to the YUV color space, or convert the CMYK color space to the RGB color space to ensure that the image can be correctly displayed on the display screen.

[0098] The image processing chip is connected to the display screen through a specific display interface (such as HDMI, LVDS, etc.). These interfaces have high-speed data transmission capabilities and can quickly transfer the decoded image data to the display screen.

[0099] Before outputting the image data to the display screen, the image processing chip adjusts the data format according to the requirements of the display screen. For example, it adjusts the arrangement order of the data, adds synchronization signals, etc. The synchronization signals include horizontal synchronization signals and vertical synchronization signals, which are used to ensure that the display screen can correctly identify and display the image data.

[0100] The image data after format adjustment is transmitted to the display screen through the display interface. After receiving the data, the display screen displays the image data line by line or frame by frame according to the synchronization signals, thus completing the entire image processing and display process.

[0101] Beneficial effects of the embodiments of the present application:

[0102] By configuring the camera as an effective SPI slave and omitting the CS pin, based on the characteristics of the camera output clock signal and image data in a specific working mode, timing is performed using the situation of the clock signal stopping and coming again, and the start position of the row and the start position of the frame are judged according to the timing duration, thus omitting the HS pin and the VS pin. The image processing chip only needs to use two IO pins, namely the clock pin and the data pin, to complete the communication with the camera and the related image data processing work, greatly reducing the number of used IO pins, effectively alleviating the problem of tight use of IO resources, providing the possibility for the image processing chip to connect more external devices, and enhancing the functional expandability and overall performance of the system.

[0103] The following is an apparatus embodiment of the present application, which can be used to execute the method embodiment of the present application. For details not disclosed in the apparatus embodiment of the present application, please refer to the method embodiment of the present application.

[0104] Please refer to Figure 3 , which shows a schematic structural diagram of an image processing chip provided by an exemplary embodiment of the present application, hereinafter referred to as the image processing chip 3. The image processing chip 3 includes: a configuration module 301, a clock signal detection module 302, a timer module 303, and a data writing module 304.

[0105] The configuration module 301 is used to configure the camera as an effective SPI slave of the image processing chip; wherein, the image processing chip is provided with a clock pin and a data pin, and is connected to the camera of the SPI interface through the set clock pin and data pin;

[0106] The configuration module 301 is further configured to configure the camera into a specific working mode, where the specific working mode means that if the camera is in the working state, the camera outputs a clock signal to the image processing chip through the clock pin and outputs image data to the image processing chip through the data pin; if the camera is in the idle state, the output of the clock signal and the image data is stopped;

[0107] The clock signal detection module 302 is configured to, when detecting that the clock signal stops being output, instruct the timer to start timing;

[0108] The clock signal detection module 302 is further configured to, when detecting that the clock signal comes again, instruct the timer to stop timing;

[0109] The timer module 303 is configured to obtain the timing duration of the timer;

[0110] The data writing module 304 is configured to, if the timing duration is greater than or equal to the first duration threshold and less than the second duration threshold, use the starting position of the currently received clock signal as the row starting position, receive a pixel row according to the row starting position, and write the received pixel row into the memory after cropping the row head and row tail according to a preset cropping rule; the second duration threshold is greater than the first duration threshold;

[0111] If the timing duration is greater than or equal to the second threshold, use the starting position of the currently received clock signal as the frame starting position, receive the first pixel row of the image frame according to the frame starting position, and crop the frame head of the first pixel row and write the cropped pixel row into the memory according to a preset cropping rule.

[0112] In one or more possible embodiments, the configuring the camera into a specific working mode includes:

[0113] The image processing chip displays a configuration interface of the camera on the terminal device;

[0114] Generate a configuration instruction based on the configuration interface; the configuration instruction includes working mode information, and the working mode information is used to instruct the camera to switch to the specific working mode;

[0115] Send the configuration instruction to the camera through the data pin.

[0116] In one or more possible embodiments, the configuration instruction further includes SPI mode information, and the SPI mode information is used to instruct to configure the camera as a valid SPI host of the image processing chip.

[0117] In one or more possible embodiments, it is determined whether the camera outputs a clock signal by detecting an edge on the clock pin.

[0118] In one or more possible embodiments, it further includes:

[0119] A data reading module, configured to read one data frame from the memory each time in an asynchronous manner, and output the decoded read data frame to a display screen.

[0120] In one or more possible embodiments, the memory is an SRAM.

[0121] In one or more possible embodiments, an interrupt mode is adopted to indicate the timer to start timing or stop timing.

[0122] It should be noted that when the image processing chip provided in the above embodiments executes the image data acquisition method, only the division of the above functional modules is used for illustration. In practical applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the above functions. In addition, the image processing chip provided in the above embodiments and the embodiments of the image data acquisition method belong to the same concept. The implementation process is detailed in the method embodiments and will not be elaborated here.

[0123] The serial numbers of the embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

[0124] The embodiments of the present application further provide a computer storage medium, which can store multiple instructions. The instructions are suitable for being loaded and executed by a processor to perform the method steps of the embodiments as described above Figure 2 The specific execution process can refer to Figure 2 the specific description of the embodiments shown, and will not be elaborated here.

[0125] The present application further provides a computer program product, which stores at least one instruction. The at least one instruction is loaded and executed by the processor to implement the image data acquisition method described in each of the above embodiments.

[0126] Please refer to Figure 4 for a schematic structural diagram of a terminal device provided by an embodiment of the present application. As Figure 4 shown, the image processing chip 400 may include: at least one processor 401, at least one IO interface 404, a memory 403, a storage 405, and at least one communication bus 402.

[0127] Among them, the communication bus 402 is used to realize the connection and communication between these components.

[0128] Among them, the memory 403 can be SRAM, which is used to store the acquired image data.

[0129] Among them, the IO interface 404 includes a clock pin and a data pin, and the clock pin and the data pin are connected to the camera.

[0130] Among them, the processor 401 may include one or more processing cores. The processor 401 connects various parts within the entire image processing chip 400 through various interfaces and lines. By running or executing instructions, programs, code sets, or instruction sets stored in the memory 405, and by calling the data stored in the memory 405, the processor 401 executes various functions of the image processing chip 400 and processes data. Optionally, the processor 401 can be implemented in at least one of the following hardware forms: Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA).

[0131] Among them, the memory 405 may include Random Access Memory (RAM), and may also include Read-Only Memory. Optionally, the memory 405 includes a non-transitory computer-readable storage medium. The memory 405 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 405 may include a program storage area and a data storage area. Among them, the program storage area can store instructions for implementing the operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the above-mentioned method embodiments, etc.; the data storage area can store the data involved in the above-mentioned method embodiments. Optionally, the memory 405 can also be at least one storage device located far from the aforementioned processor 401. As Figure 4 shown, the memory 405, as a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application program.

[0132] In Figure 4 the image processing chip 400 shown, the processor 401 can be used to call the application program stored in the memory 405 and specifically execute the method as Figure 2 shown. The specific process can be referred to Figure 2 shown, and will not be elaborated here.

[0133] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above various methods. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory, or a random access memory, etc.

[0134] The above-disclosed are only the preferred embodiments of the present application. Of course, the scope of the rights of the present application cannot be limited thereby. Therefore, equivalent changes made according to the claims of the present application still fall within the scope covered by the present application.

Claims

1. A method for collecting image data, characterized in that: include: The camera is configured as an effective SPI slave of the image processing chip; wherein the image processing chip is provided with a clock pin and a data pin, and is connected to the camera of the SPI interface through the provided clock pin and data pin; The camera is configured to a specific working mode, where the specific working mode means that: if the camera is in a working state, the camera outputs a clock signal to the image processing chip through the clock pin, and outputs image data to the image processing chip through the data pin; if the camera is in an idle state, the output of the clock signal and the image data is stopped; When it is detected that the clock signal stops outputting, the timer is instructed to start timing; When the clock signal is detected to arrive again, instruct the timer to stop timing; Obtaining the timing duration of the timer; If the timing duration is greater than or equal to the first duration threshold and less than the second duration threshold, the starting position of the currently received clock signal is used as the row starting position, a pixel row is received according to the row starting position, and the received pixel row is cropped according to a preset cropping rule to write the row head and the row tail into the memory; the second duration threshold is greater than the first duration threshold; If the timing duration is greater than or equal to a second threshold, the starting position of the currently received clock signal is used as the frame starting position, the first pixel row of the image frame is received according to the frame starting position, and the frame header of the first pixel row is cropped according to a preset cropping rule, and the cropped pixel row is written into the memory.

2. The method according to claim 1, characterized in that: The step of configuring the camera to a specific working mode includes: The image processing chip displays the configuration interface of the camera on the terminal device; Generate a configuration instruction based on the configuration interface; the configuration instruction includes working mode information, and the working mode information is used to instruct the camera to switch to a specific working mode; A configuration instruction is sent to the camera via the data pin.

3. The method according to claim 2, characterized in that The configuration instruction also includes SPI mode information, where the SPI mode information is used to indicate that the camera is configured as a valid SPI host of the image processing chip.

4. The method according to claim 1, 2 or 3, characterized in that: Whether the camera outputs a clock signal is determined by detecting an edge on the clock pin.

5. The method according to claim 4, characterized in that Also includes: Asynchronously reading one data frame from the memory at a time, and decoding the read data frame and outputting it to the display screen.

6. The method according to claim 1 or 2 or 3 or 5, characterized in that: The memory is SRAM.

7. The method according to claim 6, characterized in that An interruption mode is used to instruct the timer to start timing or stop timing.

8. An image processing chip, characterized in that: include: A configuration module, used to configure the camera as a valid SPI slave of the image processing chip; wherein the image processing chip is provided with a clock pin and a data pin, and is connected to the camera of the SPI interface through the provided clock pin and data pin; The configuration module is further used to configure the camera to a specific working mode, where the specific working mode means that: if the camera is in a working state, the camera outputs a clock signal to the image processing chip through the clock pin, and outputs image data to the image processing chip through the data pin; if the camera is in an idle state, the output of the clock signal and image data is stopped; A clock signal detection module, used to instruct the timer to start timing when it detects that the clock signal stops outputting; The clock signal detection module is further used to instruct the timer to stop timing when it detects that the clock signal arrives again; A timer module, used to obtain the timing duration of the timer; A data writing module, configured to, if the timing duration is greater than or equal to a first duration threshold and less than a second duration threshold, use the starting position of the currently received clock signal as the row starting position, receive a pixel row according to the row starting position, and crop the row head and the row tail of the received pixel row according to a preset cropping rule and write them into a memory; the second duration threshold is greater than the first duration threshold; If the timing duration is greater than or equal to a second threshold, the starting position of the currently received clock signal is used as the frame starting position, the first pixel row of the image frame is received according to the frame starting position, and the frame header of the first pixel row is cropped according to a preset cropping rule, and the cropped pixel row is written into the memory.

9. An image processing chip, characterized in that: include: A processor and a memory; wherein the memory stores a computer program, and the computer program is suitable for being loaded by the processor and executing the method steps as claimed in any one of claims 1 to 7.

10. A terminal device, characterized in that: include: The image processing chip as claimed in claim 8 or 9.

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