A power system fault detection device and method based on residual voltage detection

Abstract

The application aims to provide a power system fault detection device and method based on residual voltage detection, which can still detect fault pulses and fault point positions efficiently and quickly in a power-off state. The device comprises a residual voltage detection module, a double flip-flop, a restoration circuit, a microcontroller and a power supply. The method comprises the following steps: when the tie switch between two substations is closed, power is turned on; at this time, the microcontroller reads the level state of the double flip-flop output, and determines whether a residual voltage pulse occurs in the protection switch during power system outage according to the level state; when a residual voltage pulse signal is detected, the double flip-flop determines which side of the protection switch the residual voltage pulse signal comes from, determines which side of the protection switch the residual voltage pulse signal comes from, and determines that the fault point occurs on the side; at the same time, the microcontroller performs reverse locking operation on the protection switch that detects the residual voltage pulse, so as to isolate the fault point. The application is applied to the technical field of power fault detection.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power failure detection, and particularly relates to a power system failure detection device and method based on residual voltage detection. BACKGROUND

[0002] Power system failure positioning and isolation is a complex technical challenge, especially under the condition of ring network cabinet D power-off state. As shown in FIG. 1, when a short-circuit fault occurs on the high-voltage main line C, the substation B end will first open the circuit and cut off the power. The protection switch E in the ring network cabinet on the main line between the substation B and the tie switch F located between the two substations B will automatically lose voltage and open. After a set time (usually 5S), the substation B performs a closing operation. From the substation B, the protection switches in the ring network cabinet will quickly close in turn in a very short time until the short-circuit fault point. Due to the closing of the fault, the substation B end will trip again. At this time, the protection switch of one ring network cabinet located after the fault point will detect a fault pulse signal (i.e. a residual voltage pulse signal, according to the power supply regulations, the peak value of the residual voltage pulse signal can still be detected when it is 25V), and the protection switch will be reverse blocked and notified due to the detection of the fault pulse. At this time, the tie switch (the tie switch is in a normal state of disconnection) between the two substations will close, and the other end of the substation will supply power to the ring network cabinet on the side of the fault point through the tie switch until it reaches the protection switch that has been reverse blocked. Figure 1

[0003] ​In the prior art, a magnetic latching relay is generally used to detect faults, and a residual voltage pulse signal in a main line is detected by the magnetic latching relay to determine the fault. However, this method has the following problems: 1. When the pulse width and voltage value of the detected pulse are too low in a short-circuit fault, the magnetic latching relay cannot be triggered to work, and the traditional method cannot accurately capture and record fault information in the absence of power supply, resulting in inaccurate fault positioning and untimely isolation; 2. The magnetic attraction of the current magnetic latching relay is easily released under the action of external force or vibration, so that the actual working state of the magnetic latching relay cannot be fed back, and thus the system is misjudged. When misjudgment occurs and a reverse lock of a protection switch after the fault point is not realized, the main line on the other side of the tie switch without fault will also be connected to the fault when the tie switch is closed, and thus the main line between the two substations will be tripped, which will cause great economic loss and even personal safety accidents. In addition, long-term monitoring of the fault state requires continuous power supply, but how to ensure the long-term operation of the monitoring equipment in the absence of power supply, especially when the backup power supply also fails, is also a big problem. These problems are interrelated and form a technical contradiction: how to accurately capture transient fault information and safely isolate the fault point in the absence of power supply, and ensure long-term reliable monitoring. This involves the integration of multiple technical fields such as signal acquisition, electrical isolation, and low-power design. In particular, in the complex and variable operating environment of the power system between any two substations on the main line, how to design an intelligent monitoring system that can adapt to various fault types and continuously work in the absence of power supply (and the backup power supply in the ring network cabinet also fails) and effectively isolate the fault point has become a core technical problem that needs to be solved. This not only relates to the rapid positioning and isolation of faults, but also affects the operating efficiency and safety of the entire power system. SUMMARY

[0004] The technical problem to be solved by the present application is to overcome the shortcomings of the prior art and provide a residual voltage detection-based power system fault detection device and method that can still efficiently and quickly detect fault pulses and fault point positions in the absence of power supply.

[0005] The technical solution adopted by the residual voltage detection-based power system fault detection device is a residual voltage detection-based power system fault detection device, which is arranged on each protection switch in all ring network cabinets of a high-voltage main line between any two substations. The device detects the conductors connected to each protection switch on the high-voltage main line. The device includes

[0006] a residual voltage detection module, configured to detect a residual voltage pulse signal of the power system after a primary closing of a substation supplying power to a high-voltage main line where the fault point is located, in the case that the power system is powered off and the backup power supply in the ring main unit fails;

[0007] a dual flip-flop connected with the residual voltage detection module, configured to receive the residual voltage pulse signal and maintain the state;

[0008] a restoration circuit connected with the dual flip-flop, configured to restore the dual flip-flop to an initial state after the power system is powered on;

[0009] a microcontroller connected with the dual flip-flop, configured to determine the state of the dual flip-flop, and determine whether the residual voltage pulse signal is detected during the power system outage, and when the residual voltage pulse signal is detected, determine which side of the two sides of the access conductors the residual voltage pulse signal comes from, and then determine that the fault occurs on the side;

[0010] a power supply, which is a low-power power supply, and supplies power to the power system fault detection device;

[0011] the microcontrollers of the power system fault detection devices in all ring main units are connected in communication with a background of the power system, and when the tie switch between two substations is closed, the power system fault detection device located in the protection switch on one side of the fault point and close to the tie switch sends the residual voltage pulse signal collected during the power outage to the background, and the background confirms the location of the fault point according to the received information.

[0012] The scheme can be seen that the low-power power supply is used to supply power to the whole device, which can ensure that the whole device can work for a long time of 3-5 years, and the fault state can be monitored for a long time. Even if the backup power supply of the high-voltage main line and the ring network cabinet is in an invalid state, the device can record whether the residual voltage pulse signal occurs, and the position of the high-voltage main line fault point can be accurately judged in the case of no power supply, so that the situation that the high-voltage main line of the fault-free side is tripped when the power supply of the transformer substation on the other side fails after the contact switch is closed is avoided, and the safe power supply after the contact switch is closed is ensured. The residual voltage pulse signal after the primary closing of the transformer substation in the power-off state is acquired, and the residual voltage state is recorded by using the bistable trigger. When the residual voltage is detected, the power system fault detection device in the protection switch on one side of the fault point and close to the contact switch sends the residual voltage pulse signal collected during power failure to the background. The background confirms the position of the fault point according to the received information, and the purpose of accurately judging the fault position and type is realized. The CMOS device is innovatively used to construct the bistable trigger, which has the characteristics of ultra-low power consumption, is powered by a low-power power supply, and ensures long-term reliable recording of the residual voltage state. After the contact switch is closed to restore power supply, the protection switch that detects the residual voltage pulse can be reversely locked according to the recorded residual voltage state, so as to realize the isolation of the fault point. At the same time, the reset signal is output to the double trigger by the restoration circuit, and the state of the double trigger is cleared, so as to prepare for the next fault detection. Compared with the prior art, the accuracy of fault positioning and the safety of the system are greatly improved.

[0013] Further, the residual voltage detection module comprises, in sequence, on the wires connected to the two sides of the protection switch:

[0014] a first voltage dividing circuit, a first isolator and a first bridge rectifier,

[0015] a second voltage dividing circuit, a second isolator and a second bridge rectifier,

[0016] a third voltage dividing circuit, a third isolator and a third bridge rectifier,

[0017] a fourth voltage dividing circuit, a fourth isolator and a fourth bridge rectifier, and

[0018] a first RC filter circuit and a second RC filter circuit connected to the output ends of the first bridge rectifier, the second bridge rectifier, the third bridge rectifier and the fourth bridge rectifier, and the output ends of the first RC filter circuit and the second RC filter circuit are connected to the input end of the double trigger.

[0019] It can be seen from the above scheme that, in the residual voltage detection module, the collected voltage signals are divided by the first, second, third and fourth voltage dividing circuits, the divided voltage signals are PT isolated by the first, second, third and fourth isolators, AC to DC conversion is realized by the first, second, third and fourth bridge rectifiers, and then the signals below 8ms are filtered out by the first and second RC filter circuits, and then the signals are input into the dual flip-flop, thereby realizing the residual voltage pulse signals input by the three-phase line and processing the signals, so as to prepare for subsequent level output.

[0020] Further, the first voltage dividing circuit is connected in series by the eighty-first resistor to the eighty-eighth resistor, the second voltage dividing circuit is connected in series by the eighty-ninth resistor to the ninety-sixth resistor, the third voltage dividing circuit is connected in series by the ninety-seventh resistor to the one hundred and fourth resistor, the fourth voltage dividing circuit is connected in series by the one hundred and fifth resistor to the one hundred and twelfth resistor, the first RC filter circuit is composed of the eleventh filter resistor and the eleventh capacitor, and the second RC filter circuit is composed of the twelfth filter resistor and the twelfth capacitor. As can be seen, the voltage dividing circuit divides the voltage by multiple resistors, realizes the conversion from high voltage to low voltage, and can make the input weak signal meet the use of the device, avoiding damage to the subsequent circuit devices caused by the super high pulse signal.

[0021] Further, the dual flip-flop includes a first flip-flop and a second flip-flop, and the dual flip-flop is a C-MOS structure dual stable flip-flop with a model of CD4027BM. As can be seen, the dual flip-flop is designed in a C-MOS structure, which makes the static current of the flip-flop reach the static power consumption of nanampere level, and through the power supply of the button cell, the power consumption can be extremely low, ensuring the long-term monitoring effect of the device.

[0022] Further, the power supply supplies power to the dual flip-flop, the reset circuit includes a fourteenth resistor and a third capacitor connected in parallel to the reset pin of the dual flip-flop, the other end of the fourteenth resistor is connected to the power supply, the other end of the third capacitor is grounded, and the set pin of the dual flip-flop is connected with a seventeenth resistor, and the other end of the seventeenth resistor is grounded. As can be seen, by connecting the fourteenth resistor and the third capacitor to the CY-RST pin of the flip-flop, the combination of the resistor and the capacitor realizes charging, and then realizes reset.

[0023] Further, the power supply comprises a first diode, a second diode, a first resistor and a button cell connected in sequence, the other end of the button cell is grounded, the positive electrode of the first diode is connected with an external power supply VCC, the negative electrode of the first diode and the negative electrode of the second diode are connected, and the connection point between the first diode and the second diode is connected with and supplies power to the first flip-flop. As can be seen, the reverse connection of the first diode and the second diode is arranged and connected to the input pin of the flip-flop, which ensures that only a single power supply input is available. When the external power supply is powered on, the power supply input from the external power supply VCC is provided to the flip-flop, and when the external power supply is powered off, the button cell is used for power supply. Therefore, when the external power supply is powered on, the button cell will not consume power, thereby ensuring the service life of the button cell.

[0024] Further, the first flip-flop and the microcontroller are connected in sequence through a third diode, a second resistor and a fourth diode, the positive electrode of the fourth diode is connected with the external power supply VCC through a third resistor, and the negative electrode is grounded through a tenth resistor; the second flip-flop and the microcontroller are connected in sequence through a fifth diode, an eleventh resistor and a sixth diode, the positive electrode of the sixth diode is connected with the power supply through a twelfth resistor, and the negative electrode is grounded through a nineteenth resistor. As can be seen, the third diode and the fourth diode are reversely connected, and the fifth diode and the sixth diode are reversely connected. When there is no fault, the external power supply VCC is powered on, so that the power of the button cell is not consumed. When there is a fault and there is no backup power supply, the button cell is used for power supply. In addition, after the initial power-on after power failure, the input pin of the single-chip microcomputer detects the residual voltage state. After detecting the residual voltage signal, the input pin sets an open-drain output, restores the 485 serial communication channel, and further realizes the detection of the residual voltage and communication.

[0025] Still further, the microcontroller is a single-chip microcomputer, and the model of the single-chip microcomputer is STM32F103C8T6 or ESP32. As can be seen, the single-chip microcomputer is used as the microcontroller, which ensures the reliability of the device operation while ensuring the cost.

[0026] A method for detecting power system failure by using the above-mentioned power system failure detection device based on residual voltage detection, the power system being in a state of power failure and backup power failure of the ring main unit, the method comprising the following steps:

[0027] a. The power supply supplies power to the power system failure detection device;

[0028] b、When the substation near the fault point recloses and closes to the fault, the residual voltage detection module in the power system fault detection device in the ring net cabinet behind the fault point detects the residual voltage pulse signal of the power system, and carries out voltage division, isolation and rectification on the residual voltage pulse signal to obtain a residual voltage detection signal, and then inputs the residual voltage detection signal to the double trigger;

[0029] c、The double trigger records the residual voltage state, and outputs a low level when detecting the residual voltage, and outputs a high level when there is no residual voltage;

[0030] d、When the tie switch between the two substations is closed, the non-fault side substation supplies power to the high-voltage main line of the fault side. At this time, the microcontroller reads the level state output by the double trigger, determines whether the residual voltage pulse occurs during the power system outage according to the level state, and when the residual voltage pulse signal is detected, the double trigger determines which side of the protection switch the residual voltage pulse signal comes from, determines which side of the protection switch the residual voltage pulse signal comes from, and determines that the fault point occurs on that side. At the same time, the microcontroller performs reverse interlocking operation on the protection switch that detects the residual voltage pulse to isolate the fault point;

[0031] e、The microcontroller sends fault information to the background, and the background arranges to check and repair the fault;

[0032] f、After the repair is completed, the power system is powered on, and the restoration circuit outputs a reset signal to the double trigger to clear the state of the double trigger and prepare for the next fault detection.

[0033] It can be seen from the above scheme that in the method of the present invention, when the power system is in a power-off state and the backup power supply of the ring network cabinet fails, the low-power power supply inside the device supplies power to the entire device, which can work without an external power supply and has a long service life; when the substation close to the fault point is reclosed and closed to the fault, the residual voltage detection module in the power system fault detection device in the ring network cabinet behind the fault point detects the residual voltage pulse signal of the power system, and then inputs it into the dual trigger, which records the residual voltage state, outputs a low level when residual voltage is detected, and outputs a high level when there is no residual voltage; when the connecting switch between the two substations is closed, the substation on the non-fault side supplies power to the high-voltage trunk line on the fault side, at this time, the microcontroller The level status of the dual trigger output is read, and based on the level status, it is determined whether the protection switch has generated a residual voltage pulse during the power system outage. When a residual voltage pulse signal is detected, the dual trigger determines which side of the connecting wires on both sides of the protection switch the residual voltage pulse signal comes from. If the residual voltage pulse signal comes from which side of the protection switch, it is determined that the fault point occurs on that side. At the same time, the microcontroller will reversely lock the protection switch that detects the residual voltage pulse to isolate the fault point; and the restoration circuit outputs a reset signal to the dual trigger to clear the status of the dual trigger to prepare for the next fault detection; thereby achieving accurate monitoring and isolation of the fault, ensuring effective isolation and protection of the high-voltage trunk line. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a simplified structural diagram of the high-voltage trunk line between two substations in the existing power system;

[0035] Figure 2 It is a simplified structural block diagram of the device of the present invention;

[0036] Figure 3 This is a diagram showing an application scenario of the present invention applied to a high-voltage trunk line;

[0037] Figure 4 is a circuit schematic diagram of the residual voltage detection module;

[0038] Figure 5 1 is a circuit schematic diagram of the dual trigger and restoration circuit part. DETAILED DESCRIPTION

[0039] The present invention is a power system fault detection device based on residual voltage detection, such as Figures 2 to 5 As shown, the power system fault detection device A is installed on each protection switch E in all ring network cabinets D of the high-voltage trunk line C between any two substations B. The power system fault detection device A detects the wires U connected to both sides of each protection switch E on the high-voltage trunk line. AB1 、U BC1 and U AB2 、UBC2 The power system fault detection device A comprises

[0040] a residual voltage detection module 1, configured to detect a residual voltage pulse signal of the power system after the primary closing of the substation B supplying power to the high-voltage main line where the fault point G is located, in the case that the power system is powered off and the backup power supply in the ring main unit D fails;

[0041] a dual flip-flop 2 connected with the residual voltage detection module 1, configured to receive the residual voltage pulse signal and maintain the state;

[0042] a restoration circuit 3 connected with the dual flip-flop 2, configured to restore the dual flip-flop 2 to an initial state after the power system is powered on;

[0043] a microcontroller 4 connected with the dual flip-flop 2, configured to judge the state of the dual flip-flop 2, and determine whether the residual voltage pulse signal is detected during the power system outage, and when the residual voltage pulse signal is detected, the dual flip-flop 2 judges which side of the two sides of the access line the residual voltage pulse signal comes from, and then determines that the fault occurs on the side; and

[0044] a power supply 5, which is a low-power power supply, and supplies power to the power system fault detection device;

[0045] The microcontroller 4 of the power system fault detection device in all ring main units D is in communication connection with a background 6 of the power system, and when the tie switch F between the two substations B is closed, the power system fault detection device located in the protection switch on one side of the fault point G and close to the tie switch F sends the residual voltage pulse signal collected during the power outage to the background 6, and the background 6 confirms the location of the fault point G according to the received information.

[0046] Specifically, the microcontroller 4 is a single-chip microcomputer, and the model of the single-chip microcomputer is STM32F103C8T6 or ESP32. The residual voltage detection module 1 comprises, in sequence, a first voltage dividing circuit, a first isolator PT11 and a first bridge rectifier B1,

[0047] a second voltage dividing circuit, a second isolator PT12 and a second bridge rectifier B2,

[0048] a third voltage dividing circuit, a third isolator PT13 and a third bridge rectifier B3,

[0049] a fourth voltage dividing circuit, a fourth isolator PT14 and a fourth bridge rectifier B4, and

[0050] a fourth voltage dividing circuit, a fourth isolator PT14 and a fourth bridge rectifier B4, and

[0051] A first RC filter circuit and a second RC filter circuit connected at the output terminals of the first bridge rectifier B1, the second bridge rectifier B2, the third bridge rectifier B3 and the fourth bridge rectifier B4, the output terminals of the first RC filter circuit and the second RC filter circuit are connected with the output terminal of the dual flip-flop 2. In addition, the secondary of the first isolator PT11, the secondary of the second isolator PT12, the secondary of the third isolator PT13 and the secondary of the fourth isolator PT14 are respectively connected with four resistors RT1, RT2, RT3 and RT4, and the four resistors convert the current signal into a voltage signal.

[0052] The first voltage dividing circuit is connected in series with the eighty-first resistor RL81 to the eighty-eighth resistor RL88, the second voltage dividing circuit is connected in series with the eighty-ninth resistor RL89 to the ninety-sixth resistor RL96, the third voltage dividing circuit is connected in series with the ninety-seventh resistor RL97 to the one hundred and fourth resistor RL104, the fourth voltage dividing circuit is connected in series with the one hundred and fifth resistor RL105 to the one hundred and twelfth resistor RL112, the first RC filter circuit is composed of the eleventh filter resistor RA11 and the eleventh capacitor CA11, and the second RC filter circuit is composed of the twelfth filter resistor RA12 and the twelfth capacitor CA12.

[0053] The dual flip-flop 2 includes a first flip-flop U12A and a second flip-flop U12B, and the dual flip-flop 2 is a C-MOS structure dual stable flip-flop with a model number of CD4027BM.

[0054] The power supply 5 supplies power to the dual flip-flop 2, the reset circuit includes a fourteenth resistor RC14 and a third capacitor CC3 connected in parallel at the reset foot R of the dual flip-flop 2, the other end of the fourteenth resistor RC14 is connected to the power supply 5, the other end of the third capacitor CC3 is grounded, and the set foot S of the dual flip-flop 2 is connected with a seventeenth resistor RC17, and the other end of the seventeenth resistor RC17 is grounded.

[0055] The power supply 5 includes a first diode V1, a second diode V2, a first resistor RC1 and a button cell BT1 connected in sequence, the other end of the button cell is grounded, the positive electrode of the first diode V1 is connected with an external power supply VCC, the negative electrode of the first diode V1 and the negative electrode of the second diode V2 are connected, and the connection point between the first diode V1 and the second diode V2 is connected with and supplies power to the first flip-flop U12A.

[0056] The first flip-flop U12A is connected between the microcontroller 4 in sequence through a third diode V3, a second resistor RC2 and a fourth diode V4, the positive pole of the fourth diode V4 is connected with an external power supply VCC through a third resistor RC3, and the negative pole is grounded through a tenth resistor RC10; the second flip-flop U12B is connected between the microcontroller 4 in sequence through a fifth diode V5, an eleventh resistor RC11 and a sixth diode V6, the positive pole of the sixth diode V6 is connected with the power supply 5 through a twelfth resistor RC12, and the negative pole is grounded through a nineteenth resistor RC19.

[0057] A method for detecting power system failure by using the above-mentioned residual voltage detection-based power system failure detection device, the power system is in a state of power failure and failure of backup power supply of ring network cabinet, the method comprises the following steps:

[0058] a. The power supply 5 supplies power to the power system failure detection device;

[0059] b. When the substation B near the fault point recloses and closes to the fault, the residual voltage detection module 1 in the power system failure detection device located after the fault point detects the residual voltage pulse signal of the power system, and obtains the residual voltage detection signal by voltage division, isolation and rectification of the residual voltage pulse signal, and then inputs the residual voltage detection signal to the dual flip-flop 2;

[0060] c. The dual flip-flop 2 records the residual voltage state, and outputs low level when detecting residual voltage, and outputs high level when there is no residual voltage;

[0061] d. When the tie switch F between the two substations B is closed, the substation B on the non-fault side supplies power to the high-voltage main line on the fault side, at this time, the microcontroller 4 reads the level state output by the dual flip-flop 2, determines whether the residual voltage pulse occurs during the power failure of the power system according to the level state, when the residual voltage pulse signal is detected, the dual flip-flop 2 determines which side of the protection switch the residual voltage pulse signal comes from, determines which side of the protection switch the residual voltage pulse signal comes from, and determines that the fault point occurs on that side, at the same time, the microcontroller 4 performs reverse locking operation on the protection switch where the residual voltage pulse is detected, to realize isolation of the fault point;

[0062] e. The microcontroller 4 sends fault information to the background 6, and the background 6 arranges to check and repair the fault;

[0063] f. After the repair is completed, the power system is powered on, and the reset signal is output to the dual flip-flop 2 by the restoration circuit 3, the state of the dual flip-flop 2 is cleared, and the next fault detection is prepared.

[0064] By acquiring the residual voltage pulse signal in the power-off state, and converting by using the isolation module, combining the bistable trigger to record the residual voltage state, the purpose of accurately judging the fault position and type is realized. The application innovatively uses CMOS devices to build a bistable trigger, which has ultra-low power consumption characteristics, can be powered by a button cell battery, and ensures long-term reliable recording of the residual voltage state. After the system recovers power supply, the application can automatically control the power supply switch action according to the recorded residual voltage state to realize fault isolation. At the same time, by outputting a reset signal to the double trigger 2 through the restoration circuit 3, the state of the double trigger 2 is cleared, and the next fault detection is prepared. The isolation module of the application is designed ingeniously, which can not only reliably isolate high and low voltage signals, but also match the best detection range of the trigger, greatly improving the accuracy of fault positioning and the safety of the system.

[0065] Finally, it needs to be emphasized that the above-mentioned is only the preferred embodiment of the application, and is not used to limit the application. For those skilled in the art, the application can have various changes and modifications, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the application shall be included in the protection scope of the application.

Claims

1. A power system fault detection device based on residual voltage detection, the power system fault detection device (A) is arranged on each protection switch (E) in all looped network cabinets (D) of high-voltage main lines (C) between any two substations (B), the power system fault detection device (A) detects the wires connected to the two sides of each protection switch (E) on the high-voltage main line respectively, characterized in that, The power system fault detection device (A) comprises a residual voltage detection module (1) for detecting a residual voltage pulse signal of the power system after the primary closing of a substation (B) supplying power to a high-voltage main line where the fault point is located after the power system is powered off and the backup power supply in the ring main unit (D) fails; a dual flip-flop (2) connected with the residual voltage detection module (1) for receiving the residual voltage pulse signal and maintaining the state; a restoration circuit (3) connected with the dual flip-flop (2) for restoring the dual flip-flop (2) to an initial state after the power system is powered on; a microcontroller (4) connected with the dual flip-flop (2) for judging the state of the dual flip-flop (2) to determine whether the residual voltage pulse signal is detected during the power system outage, and when the residual voltage pulse signal is detected, the dual flip-flop (2) determines which side of the two sides of the access line the residual voltage pulse signal comes from, and then determines that the fault occurs on the side; and a power supply (5) for supplying power to the power system fault detection device, wherein the power supply (5) is a low-power power supply; the microcontrollers (4) of the power system fault detection devices in all ring main units (D) are in communication connection with a background (6) of the power system, when the tie switch (F) between two substations (B) is closed, after the non-fault side substation (B) supplies power to the high-voltage main line on the fault side, the power system fault detection device located on one side of the fault point and close to the protection switch of the tie switch (F) sends the residual voltage pulse signal collected during the power outage to the background (6), and the background (6) confirms the location of the fault point according to the received information.

2. The residual voltage detection based power system fault detection device according to claim 1, characterized in that, The residual voltage detection module (1) comprises, in sequence, a first voltage dividing circuit, a first isolator (PT11) and a first bridge rectifier (B1) connected to the lines on both sides of the protection switch (E), a second voltage dividing circuit, a second isolator (PT12) and a second bridge rectifier (B2), a third voltage dividing circuit, a third isolator (PT13) and a third bridge rectifier (B3), a fourth voltage dividing circuit, a fourth isolator (PT14) and a fourth bridge rectifier (B4), and a first RC filter circuit and a second RC filter circuit connected to the output ends of the first bridge rectifier (B1), the second bridge rectifier (B2), the third bridge rectifier (B3) and the fourth bridge rectifier (B4), and the output ends of the first RC filter circuit and the second RC filter circuit are connected with the output end of the dual flip-flop (2). ​ 3. The residual voltage detection based power system fault detection device according to claim 2, characterized in that, The first voltage dividing circuit is formed by connecting the eighty-first resistor (RL81) to the eighty-eighth resistor (RL88) in series, the second voltage dividing circuit is formed by connecting the eighty-ninth resistor (RL89) to the ninety-sixth resistor (RL96) in series, the third voltage dividing circuit is formed by connecting the ninety-seventh resistor (RL97) to the one hundred and fourth resistor (RL104) in series, the fourth voltage dividing circuit is formed by connecting the one hundred and fifth resistor (RL105) to the one hundred and twelfth resistor (RL112) in series, the first RC filter circuit is formed by the eleventh filter resistor (RA11) and the eleventh capacitor (CA11), and the second RC filter circuit is formed by the twelfth filter resistor (RA12) and the twelfth capacitor (CA12).

4. The residual voltage detection based power system fault detection device according to claim 1, characterized in that, The dual flip-flop (2) includes a first flip-flop (U12A) and a second flip-flop (U12B), and the dual flip-flop (2) is a C-MOS structure dual stable flip-flop with a model number of CD4027BM.

5. The residual voltage detection based power system fault detection device according to claim 4, characterized in that, The power supply (5) supplies power to the dual flip-flop (2), the reset circuit includes a fourteenth resistor (RC14) and a third capacitor (CC3) connected in parallel to the reset pin (R) of the dual flip-flop (2), the other end of the fourteenth resistor (RC14) is connected to the power supply (5), the other end of the third capacitor (CC3) is grounded, and the set pin (S) of the dual flip-flop (2) is connected to a seventeenth resistor (RC17), and the other end of the seventeenth resistor (RC17) is grounded.

6. The residual voltage detection based power system fault detection device according to claim 5, wherein, The power supply (5) includes a first diode (V1), a second diode (V2), a first resistor (RC1), and a button cell (BT1) connected in sequence, the other end of the button cell is grounded, the positive electrode of the first diode (V1) is connected to an external power supply VCC, the negative electrode of the first diode (V1) is connected to the negative electrode of the second diode (V2), and the connection point between the first diode (V1) and the second diode (V2) is connected to and supplies power to the first flip-flop (U12A).

7. The residual voltage detection based power system fault detection device according to claim 4, wherein, The first flip-flop (U12A) and the microcontroller (4) are connected in sequence through a third diode (V3), a second resistor (RC2), and a fourth diode (V4), the positive electrode of the fourth diode (V4) is connected to an external power supply VCC through a third resistor (RC3), and the negative electrode is grounded through a tenth resistor (RC10); the second flip-flop (U12B) and the microcontroller (4) are connected in sequence through a fifth diode (V5), an eleventh resistor (RC11), and a sixth diode (V6), the positive electrode of the sixth diode (V6) is connected to the power supply (5) through a twelfth resistor (RC12), and the negative electrode is grounded through a nineteenth resistor (RC19).

8. The residual voltage detection based power system fault detection device according to any one of claims 1 to 7, characterized in that, The microcontroller (4) is a single-chip microcomputer, and the model number of the single-chip microcomputer is STM32F103C8T6 or ESP32.

9. A method for detecting a power system fault using the residual voltage detection-based power system fault detection apparatus according to claim 1, the power system being in a state of power outage and failure of backup power supply of a ring main unit, characterized by, The method comprises the following steps: a. The power supply (5) supplies power to the power system fault detection device; b、When the substation (B) near the fault point recloses and closes to the fault, the residual voltage detection module (1) in the power system fault detection device in the ring net cabinet behind the fault point detects the residual voltage pulse signal of the power system, and carries out voltage division, isolation and rectification on the residual voltage pulse signal to obtain a residual voltage detection signal, and then inputs the residual voltage detection signal to the double trigger (2); c、The double trigger (2) records the residual voltage state, and outputs a low level when detecting the residual voltage, and outputs a high level when there is no residual voltage; d、When the tie switch (F) between the two substations (B) is closed, the non-fault side substation (B) supplies power to the fault side high-voltage main line, at this time, the microcontroller (4) reads the level state output by the double trigger (2), and determines whether the residual voltage pulse occurs during the power system outage according to the level state, when the residual voltage pulse signal is detected, the double trigger (2) determines which side of the protection switch the residual voltage pulse signal comes from, determines which side of the protection switch the residual voltage pulse signal comes from, and determines that the fault point occurs on that side, at the same time, the microcontroller (4) carries out reverse locking operation on the protection switch where the residual voltage pulse is detected, to realize isolation of the fault point; e、The microcontroller (4) sends fault information to the background (6), and the background (6) arranges to check and repair the fault; f、After the repair is completed, the power system is powered on, and the reset circuit (3) outputs a reset signal to the double trigger (2), and the state of the double trigger (2) is cleared to zero, so as to prepare for the next fault detection.

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