Control method and power conversion device

Abstract

According to one embodiment, a control method and a power conversion device are provided. The control method includes: in a first state in which a first switching element and a second switching element, which are half-bridge-connected between an input node and an output node, are turned off in a power conversion device that converts an AC voltage to a DC voltage by performing a synchronous rectification operation on the first switching element and the second switching element; one end of the first switching element is pre-charged. The control method includes turning on the second switching element after one end of the first switching element is pre-charged.

Description

[0001] This application is based on Japanese Patent Application No. 2023-222474 (filing date: December 28, 2023), and claims priority therefrom. This application incorporates the entire content of that application by reference. Technical Field

[0002] This embodiment relates to a control method and a power conversion device. Background Art

[0003] A power conversion device sometimes receives an AC voltage, rectifies a current corresponding to the received AC voltage, and generates a DC voltage corresponding to the rectified current. In a power conversion device, it is desirable to suppress noise from the power conversion device from being input into the AC voltage (for example, Japanese Patent Publication No. 6619312). Summary of the Invention

[0004] An object of one embodiment is to provide a control method and a power conversion device capable of suppressing noise from a power conversion device from being input into an AC voltage.

[0005] According to one embodiment, a control method is provided. The control method includes pre-charging one end of the first switching element in a first state in which both the first switching element and the second switching element that connect a half-bridge between an input node and an output node are turned off in a power conversion device that converts an AC voltage into a DC voltage by performing synchronous rectification operation of the first switching element and the second switching element. The control method includes turning on the second switching element after pre-charging one end of the first switching element is completed.

[0006] According to one embodiment, a power conversion device includes: a first switching element connected between a first input node to which an AC voltage is input and a first output node; a second switching element connected between the first input node and a second output node, and performing synchronous rectification operation together with the first switching element; a first pre-charging circuit capable of pre-charging one end of the first switching element; and a second pre-charging circuit capable of pre-charging one end of the second switching element; in a state where both the first switching element and the second switching element are turned off, the first pre-charging circuit pre-charges one end of the first switching element, and after the first pre-charging circuit completes pre-charging, the second switching element is turned on. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a diagram showing the structure of the power conversion device of the embodiment.

[0008] Figure 2 is a waveform diagram showing the general operation of the power conversion device of the embodiment.

[0009] Figure 3 It is a diagram showing the characteristics of the parasitic capacitance of the switching element representing the embodiment.

[0010] Figure 4 It is a diagram showing the structure of the precharge circuit of the embodiment.

[0011] Figure 5 It is a diagram showing the operation and current path of the power conversion device of the embodiment.

[0012] Figure 6 It is a diagram showing the operation and current path of the power conversion device of the embodiment.

[0013] Figure 7 It is a waveform diagram showing the operation of the power conversion device of the embodiment. Detailed Embodiment

[0014] Hereinafter, the power conversion device of the embodiment will be described in detail with reference to the drawings. In addition, the present invention is not limited by this embodiment.

[0015] (Embodiment)

[0016] The power conversion device of the embodiment receives an AC voltage, rectifies the current corresponding to the received AC voltage, generates a DC voltage corresponding to the rectified current, and needs to suppress the noise from the power conversion device from being input into the AC voltage.

[0017] As Figure 1 shown, the power conversion device 1 is connected between the AC power supply PS and the load circuit LD. The power conversion device 1 receives an AC voltage from the AC power supply PS. The AC voltage is converted into a DC voltage and the DC voltage is supplied to the load circuit LD. The AC power supply PS may be a system power supply. The load circuit LD may be a DC motor.

[0018] The power conversion device 1 has input nodes N IN1 , N IN2 , output nodes N OUT1 , N OUT2 . The input node N IN1 is connected to one end of the AC power supply PS, and the input node N IN2 is connected to the other end of the AC power supply PS. The output node N OUT1 is connected to one end of the load circuit LD, and the output node N OUT2 is connected to the other end of the load circuit LD.

[0019] The power conversion device 1 has a switching element SW1, a switching element SW2, and a controller CTR. The switching element SW1 and the switching element SW2 are at the input nodes N IN1Half-bridge connection is made with the output node N OUT1 and N OUT2 The node N between the switching element SW1 and the switching element SW2 M1 is connected to the input node N IN1 .

[0020] One end of the switching element SW1 is connected to the output node N OUT1 , and the other end is connected to the input node N via the node N M1 IN1 , and the control terminal is connected to the controller CTR. The switching element SW1 is, for example, an NMOS transistor, and the source is connected to the input node N via the node N M1 IN1 , the drain is connected to the output node N OUT1 , and the gate is connected to the controller CTR.

[0021] The switching element SW1 receives the control signal φSW1 from the controller CTR with the control terminal (for example, the gate). The switching element SW1 is turned on / off according to the control signal φSW1. The switching element SW1 is turned on when the control signal φSW1 is at an effective level (for example, high level). The switching element SW1 is turned off when the control signal φSW1 is at a non-effective level (for example, low level).

[0022] One end of the switching element SW2 is connected to the input node N via the node N M1 IN1 , and the other end is connected to the output node N OUT2 , and the control terminal is connected to the controller CTR. The switching element SW2 is, for example, an NMOS transistor, the source is connected to the output node N OUT2 , the drain is connected to the input node N via the node N M1 IN1 , and the gate is connected to the controller CTR.

[0023] The switching element SW2 receives the control signal φSW2 from the controller CTR with the control terminal (for example, the gate). The switching element SW2 is turned on / off according to the control signal φSW2. The switching element SW2 is turned on when the control signal φSW2 is at an effective level (for example, high level). The switching element SW2 is turned off when the control signal φSW2 is at a non-effective level (for example, low level).

[0024] The switching element SW1 and the switching element SW2 perform synchronous rectification operation under the control of the controller CTR. For example, for the AC voltage V from the AC power supply PS IN , with the potential of the input node N IN1 as a reference, the amplitude when the potential of the input node N IN2 is higher is set as positive, and the potential of the input node N IN2 ​​​​Set the amplitude in the case where the potential is lower to be negative, then the AC voltage V IN As Figure 2 Shown by the solid line in, it can change in a sine wave shape. Figure 2 Is a waveform diagram showing the operation of the power conversion device 1. Figure 2 In, for reference, the AC current I is shown by a dotted line IN . The AC current I IN Can change in a sine wave shape.

[0025] During the periods TP1 and TP3 when the amplitude of the AC voltage V IN Is positive, the control signal φSW1 is at a non-effective level (e.g., low level), and the control signal φSW2 is at an effective level (e.g., high level). Correspondingly, the switching element SW1 is maintained in the off state, and the switching element SW2 is maintained in the on state. Thus, the current flows in the path of switching element SW2 → node N M1 → input node N IN1 → AC power supply PS → input node N IN2 This path.

[0026] During the periods TP2 and TP4 when the amplitude of the AC voltage V IN Is negative, the control signal φSW1 is at an effective level (e.g., high level), and the control signal φSW2 is at a non-effective level (e.g., low level). Correspondingly, the switching element SW1 is maintained in the on state, and the switching element SW2 is maintained in the off state. Thus, the current flows in the path including the path of input node N IN2 → AC power supply PS → input node N IN1 → node N M1 → switching element SW1.

[0027] Near each zero crossing of the AC voltage V IN , there are dead times DT1, DT2, DT3, DT4 during which both the switching element SW1 and the switching element SW2 are maintained in the off state. During the dead times DT1, DT2, DT3, DT4, the parasitic capacitance C SW1 Of the switching element SW1 and the parasitic capacitance C SW2 Of the switching element SW2 may be in a substantially discharged state respectively. The parasitic capacitance C SW1 Is the output capacitance of the switching element SW1. The parasitic capacitance C SW2 Is the output capacitance of the switching element SW2.

[0028] For example, the dead times DT1 and DT3 start at the moment when the switching element SW2 turns off. After that, the parasitic capacitance C SW2It can become a roughly discharging state. If the switching element SW1 is turned on at the end of the dead times DT1 and DT3, charges will rapidly flow into the parasitic capacitance C of the switching element SW2 in the roughly discharging state. SW2 , output node N OUT1 , N OUT2 between the voltage V OUT may have a rapid potential change. The rapid potential change of the voltage V OUT may cause a spike noise of the current I OUT1 flowing through the output nodes N OUT2 , N OUT , and thus radiate electromagnetic noise exceeding the allowable amount.

[0029] Similarly, the dead times DT2 and DT4 start at the moment when the switching element SW1 is turned off. After that, the parasitic capacitance C of the switching element SW1 SW1 can become a roughly discharging state. If the switching element SW2 is turned on at the end of the dead times DT2 and DT4, charges will rapidly flow into the parasitic capacitance C of the switching element SW1 in the roughly discharging state. SW1 , output node N OUT1 , N OUT2 between the voltage V OUT may have a rapid potential change. The rapid potential change of the voltage V OUT may cause a spike noise of the current I OUT1 flowing through the output nodes N OUT2 , N OUT , and thus radiate electromagnetic noise exceeding the allowable amount.

[0030] As Figure 3 shown, the capacitance value of the parasitic capacitance C of the switching element SW1 SW1 can vary according to the voltage it holds. Figure 3 is a graph showing the characteristics of the parasitic capacitance C of the switching element SW1 SW1 . The parasitic capacitance C SW1 has a tendency that the larger the holding voltage, the smaller the capacitance value. For example, at the holding voltage V1 in the roughly discharging state, the capacitance value is the relatively large C1. When the switching element SW2 is turned on, charges easily flow into the parasitic capacitance C SW1 , and it is easy to cause a rapid potential change of the parasitic capacitance C SW1 . On the other hand, at the holding voltage V2 in the roughly fully charged state, the capacitance value is the relatively small C2. When the switching element SW2 is turned on, charges hardly flow into the parasitic capacitance C SW1 , and it is difficult to cause a rapid potential change of the parasitic capacitance C SW1 . For the parasitic capacitance C of the switching element SW2 SW2The same also applies.

[0031] Therefore, the power conversion device 1 is configured such that the switching element SW1 and the switching element SW2 can be pre-charged respectively. The power conversion device 1 also has a pre-charge circuit PC1 and a pre-charge circuit PC2.

[0032] The pre-charge circuit PC1 corresponds to the switching element SW1. At least one end of the pre-charge circuit PC1 is connected to one end of the switching element SW1. The other end of the pre-charge circuit PC1 can be connected to the other end of the switching element SW1. Thus, the pre-charge circuit PC1 can pre-charge one end of the switching element SW1.

[0033] The pre-charge circuit PC1 can be configured as Figure 4 the structure shown. Figure 4 is a diagram showing the structure of the pre-charge circuit PC1.

[0034] The pre-charge circuit PC1 has a voltage source E1, a switch SW11, and a rectifying element D1. One end of the voltage source E1 is connected to the switch SW11, and the other end is connected to the other end of the switching element SW1. The voltage source E1 can be a terminal with a high-voltage side at one end and a low-voltage side at the other end. The voltage generated by the voltage source E1 can be determined in advance through experiments according to the amount of charge to be pre-charged to one end of the switching element SW1. One end of the switch SW11 is connected to the voltage source E1, the other end is connected to the rectifying element D1, and the control terminal is connected to the controller CTR (refer to Figure 1 ). The switch SW11 is, for example, an NMOS transistor, with the source connected to the rectifying element D1, the drain connected to the voltage source E1, and the gate connected to the controller CTR. One end of the rectifying element D1 is connected to the switch SW11, and the other end is connected to one end of the switching element SW1. The rectifying element D1 is, for example, a diode, with the anode connected to the switch SW11 and the cathode connected to one end of the switching element SW1.

[0035] Figure 1 The pre-charge circuit PC2 shown corresponds to the switching element SW2. At least one end of the pre-charge circuit PC2 is connected to one end of the switching element SW2. The other end of the pre-charge circuit PC2 can be connected to the other end of the switching element SW2. Thus, the pre-charge circuit PC2 can pre-charge one end of the switching element SW2. The structure of the pre-charge circuit PC2 is the same as the structure of the pre-charge circuit PC1 (refer to Figure 4 ).

[0036] For example, in Figure 2In the shown dead times DT1 and DT3, at the start moment, the switching element SW2 is turned off while the switching element SW1 is off. After the switching element SW2 is turned off, the control signal φPC2 becomes the effective level. Correspondingly, the precharge circuit PC2 starts to supply charge to one end of the switching element SW2 and starts precharging one end of the switching element SW2. That is, the parasitic capacitance C SW2 starts to charge. In response to the elapse of time PT1 and PT3 from the start of charge supply, the control signal φPC2 becomes the non-effective level. The times PT1 and PT3 are shorter than the dead times DT1 and DT3. The times PT1 and PT3 are determined in advance through experiments as the time required for precharging. Correspondingly, the supply of charge to one end of the switching element SW2 ends, and the precharging of one end of the switching element SW2 ends. That is, the charging of the parasitic capacitance C SW2 ends.

[0037] Thus, when the switching element SW1 is turned on at the end of the dead times DT1 and DT3, the amount of charge flowing into the parasitic capacitance C SW2 of the switching element SW2 can be suppressed, and the potential change of the parasitic capacitance C SW2 can be suppressed. As a result, the spike noise of the current I OUT1 flowing through the output nodes N OUT2 and N OUT can be suppressed, and thus, electromagnetic noise can be suppressed.

[0038] Similarly, in the dead times DT2 and DT4, at the start moment, the switching element SW1 is turned off while the switching element SW2 is off. After the switching element SW1 is turned off, the control signal φPC1 becomes the effective level. Correspondingly, the precharge circuit PC1 starts to supply charge to one end of the switching element SW1 and starts precharging one end of the switching element SW1. That is, the parasitic capacitance C SW1 starts to charge. In response to the elapse of time PT2 and PT4 from the start of charge supply, the control signal φPC1 becomes the non-effective level. The times PT2 and PT4 are shorter than the dead times DT2 and DT4. The times PT2 and PT4 are determined in advance through experiments as the time required for precharging. Correspondingly, the supply of charge to one end of the switching element SW1 ends, and the precharging of one end of the switching element SW1 ends. That is, the charging of the parasitic capacitance C SW1 ends.

[0039] Thus, when the switching element SW2 is turned on at the end of the dead times DT2 and DT4, the amount of charge flowing into the parasitic capacitance C SW1 of the switching element SW1 can be suppressed, and the potential change of the parasitic capacitance C SW1 can be suppressed. As a result, the spike noise of the current flowing through the output nodes N OUT1 and NOUT2 The current I OUT The spike noise can be reduced, thereby suppressing electromagnetic noise.

[0040] The power conversion device 1 may be configured to improve the power factor. The power conversion device 1 may include the inductive element L1, the switching element SW3, and the switching element SW4 as a configuration for improving the power factor.

[0041] The switch element SW3 and the switch element SW4 are connected to the input node N IN2 With output node N OUT1 、N OUT2 A node N between the switch element SW3 and the switch element SW4 is connected in a half-bridge manner. M2 Through the inductive element L1 and the input node N IN2 connect.

[0042] One end of the switch element SW3 is connected to the output node N OUT1 The other end is connected via node N M2 With input node N IN2 The control terminal is connected to the controller CTR. The switch element SW3 is, for example, an NMOS transistor, and its source is connected via the node N M2 With input node N IN2 Connect the drain to the output node N OUT1 Connected, the gate is connected to the controller CTR.

[0043] The switch element SW3 receives a control signal φSW3 from the controller CTR at a control terminal (e.g., a gate). The switch element SW3 is turned on / off according to the control signal φSW3. The switch element SW3 is turned on when the control signal φSW3 is at an active level (e.g., a high level). The switch element SW3 is turned off when the control signal φSW3 is at an inactive level (e.g., a low level).

[0044] One end of the switch element SW4 is connected to the node N M2 With input node N IN2 Connect the other end to the output node N OUT2 The switch element SW4 is, for example, an NMOS transistor, and its source is connected to the output node N OUT2 connected, the drain via node N M2 With input node N IN2 Connected, the gate is connected to the controller CTR.

[0045] The control terminal (e.g., gate) of the switching element SW4 receives a control signal φSW4 from the controller CTR. The switching element SW4 is turned on / off according to the control signal φSW4. The switching element SW4 is turned on when the control signal φSW4 is at an effective level (e.g., high level). The switching element SW4 is turned off when the control signal φSW4 is at a non-effective level (e.g., low level).

[0046] The switching element SW3 and the switching element SW4 perform a power factor improvement operation under the control of the controller CTR. For example, the switching element SW3 and the switching element SW4 perform switching operations at a faster cycle than the switching element SW1 and the switching element SW2, and alternately repeat the storage of electric energy from the AC power supply PS in the inductive element L1 and the storage of electric energy from the inductive element L1 in the capacitive element C0. Thereby, the phase of the DC voltage and the phase of the DC current are made close, and the improvement of the power factor is achieved.

[0047] During periods TP1 and TP3 when the amplitude of the AC voltage V IN is positive, the operation shown in (a) of Figure 5 and the operation shown in (b) of Figure 5 are alternately repeated. In Figure 5 of (a), the switching elements SW1 and SW3 are maintained in the off state, and the switching elements SW2 and SW4 are maintained in the on state. Current flows in the path of switching element SW2 → node N M1 → input node N IN1 → AC power supply PS → input node N IN2 → inductive element L1 → node N M2 → switching element SW4 → switching element SW2, and electric energy is stored in the inductive element L1.

[0048] In Figure 5 of (b), the switching elements SW1 and SW4 are maintained in the off state, and the switching elements SW2 and SW3 are maintained in the on state. Current flows in the path of switching element SW2 → node N M1 → input node N IN1 → AC power supply PS → input node N IN2 → inductive element L1 → node N M2 → switching element SW3 → output node N OUT1 → capacitive element C0 → output node N OUT2 → switching element SW2, and electric energy is transferred from the inductive element L1 to the capacitive element C0 and stored in the capacitive element C0.

[0049] In the subsequent dead time DT1 and DT3, the operation shown in (c) of Figure 5 and the operation shown in Figure 5The operation shown in (d). In Figure 5 of (c), the switching elements SW1 to SW4 are all maintained in the off state, and the amplitude of the AC voltage V IN is near the zero crossing point, and a state where almost no current flows including the reflux current is formed. At this time, as shown by the dotted arrow, the precharge circuit PC2 supplies charge to one end of the switching element SW2 and precharges one end of the switching element SW2. As a result, the parasitic capacitance C SW2 of the switching element SW2 is charged with charge and the holding voltage increases. In Figure 5 of (d), the precharge circuit PC2 ends the supply of charge to one end of the switching element SW2 and ends the precharge of one end of the switching element SW2. As a result, the parasitic capacitance C SW2 of the switching element SW2 holds the charge and maintains the holding voltage.

[0050] During the periods TP2 and TP4 when the amplitude of the AC voltage V IN is negative, the operations shown in (a) of Figure 6 and the operations shown in (b) of Figure 6 are alternately repeated. In Figure 6 of (a), the switching elements SW2 and SW4 are maintained in the off state, and the switching elements SW1 and SW3 are maintained in the on state. Current flows in the path of switching element SW1 → switching element SW3 → node N M2 → inductive element L1 → input node N IN2 → AC power supply PS → input node N IN1 → node N M1 → switching element SW1, and electric energy is stored in the inductive element L1.

[0051] In Figure 6 of (b), the switching elements SW2 and SW3 are maintained in the off state, and the switching elements SW1 and SW4 are maintained in the on state. Current flows in the path of switching element SW1 → output node N OUT1 → capacitive element C0 → output node N OUT2 → switching element SW4 → node N M2 → inductive element L1 → input node N IN2 → AC power supply PS → input node N IN1 → node N M1 → switching element SW1, and electric energy is transferred from the inductive element L1 to the capacitive element C0 and stored in the capacitive element C0.

[0052] In the subsequent dead times DT2 and DT4, the operations shown in (c) of Figure 6 and the operations shown in (d) of Figure 6 are sequentially performed. In Figure 6In (c), the switching elements SW1 to SW4 are all maintained in the off state, and the amplitude of the AC voltage V IN is near the zero crossing point, and a state is formed in which almost no current flows including the reverse current. At this time, as shown by the dashed arrow, the pre-charge circuit PC1 supplies charge to one end of the switching element SW1 to pre-charge one end of the switching element SW1. As a result, the parasitic capacitance C SW1 of the switching element SW1 is charged with charge, and the holding voltage increases. In Figure 6 (d), the pre-charge circuit PC1 ends the supply of charge to one end of the switching element SW1 and ends the pre-charge of one end of the switching element SW1. As a result, the parasitic capacitance C SW1 of the switching element SW1 holds the charge and maintains the holding voltage.

[0053] Next, Figure 7 is used to explain the detailed operation of the power conversion device. Figure 7 is a waveform diagram showing the operation of the power conversion device 1, mainly illustrating the operation during the dead time DT2. In Figure 7 , for the capacitance value of the parasitic capacitance C SW1 of the switching element SW1, the voltage across the switching element SW1, the pre-charge current supplied from the pre-charge circuit PC1, the current flowing into the parasitic capacitance C SW1 of the switching element SW1, the reverse current flowing through the parasitic diode of the switching element SW1, the current flowing through both ends of the switching element SW1, the current flowing through both ends of the switching element SW2, the control signal φSW1 of the controller CTR for the switching element SW1, and the control signal φSW2 of the controller CTR for the switching element SW2, the changes over time are respectively shown.

[0054] Before time t1, the control signal φSW2 is maintained at the non-effective level, and the switching element SW2 is maintained in the off state.

[0055] At time t1, the control signal φSW1 changes from the effective level to the non-effective level, and the switching element SW1 turns off. Accordingly, the dead time DT2 starts. After that, the switching element SW1 is maintained in the off state.

[0056] At time t2, a control signal φPC1 (not shown) changes from the non-effective level to the effective level, and the pre-charge circuit PC1 starts to supply the pre-charge current. At this time, since the amplitude of the AC voltage V IN is approximately near the zero crossing point (see Figure 2 ), almost no reverse current flows, and the current corresponding to the pre-charge current effectively flows from the pre-charge circuit PC1 into the parasitic capacitance C SW1 of the switching element SW1. Accordingly, the parasitic capacitance C SW1Charging starts. As its holding voltage starts to increase, its capacitance value starts to decrease.

[0057] At time t3, if the parasitic capacitance C SW1 becomes in a substantially fully charged state, its holding voltage starts to be maintained at a substantially constant value, and its capacitance value starts to be maintained at a substantially constant value.

[0058] At time t4 which is the time PT2 after time t2, the control signal φPC1 (not shown) changes from the active level to the non-active level, and the pre-charge circuit PC1 ends the supply of the pre-charge current. At this time, the parasitic capacitance C SW1 is in a substantially fully charged state, its holding voltage is maintained at a substantially constant value, and its capacitance value is maintained at a substantially constant value.

[0059] At time t5, the control signal φSW2 changes from the non-active level to the active level, and the switching element SW2 is turned on. At this time, since the parasitic capacitance C of the switching element SW1 SW1 is in a substantially fully charged state, the amount of charge flowing into the parasitic capacitance C of the switching element SW1 can be suppressed SW1 , and the potential variation of the parasitic capacitance C SW1 can be suppressed. As a result, the spike noise of the current I flowing through the output nodes N OUT1 , N OUT2 can be suppressed, and thus, the electromagnetic noise can be suppressed. OUT

[0060] In addition, for comparison, the case where the parasitic capacitance C of the switching element SW1 is not pre-charged is shown by a dashed line. For example, regarding the current flowing into the parasitic capacitance C of the switching element SW1 SW1 SW1 , when comparing the waveform of the dashed line with the waveform of the solid line, it is confirmed that by performing pre-charging, the amount of charge flowing into the parasitic capacitance C SW1 can be suppressed.

[0061]

[0062] As described above, in the embodiment, in the power conversion device 1, for example, in a state where both the switching element SW1 and the switching element SW2 are off, the pre-charge circuit PC1 pre-charges one end of the switching element SW1, and after the pre-charge circuit PC1 completes the pre-charging, the switching element SW2 is turned on. Thus, the amount of charge flowing into the parasitic capacitance C of the switching element SW1 can be suppressed SW1 , and the potential variation of the parasitic capacitance C SW1 can be suppressed. As a result, the spike noise of the current I flowing through the output nodes N OUT1 , N OUT2 can be suppressed, and thus, the electromagnetic noise can be suppressed. OUT

[0062] ​Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and its equivalents.

Claims

1. A control method, characterized in that: include: In a power conversion device that converts an AC voltage into a DC voltage by causing a first switching element and a second switching element connected between an input node and an output node to perform synchronous rectification, the first switching element and the second switching element are both turned off, and one end of the first switching element is precharged; as well as After precharging of one end of the first switching element is completed, the second switching element is turned on.

2. The control method according to claim 1, characterized in that: Also includes: In a second state where both the first switching element and the second switching element are turned off, precharging one end of the second switching element; as well as After precharging of one end of the second switching element is completed, the first switching element is turned on.

3. The control method according to claim 1, characterized in that: Precharging one end of the first switching element includes: turning off the first switching element when the second switching element is turned off; After the first switching element is turned off, starting to supply charge to one end of the first switching element; and In response to a lapse of a first time from the start of charge supply, supply of charge to one end of the first switching element is terminated.

4. The control method according to claim 2, characterized in that: Precharging one end of the first switching element includes: turning off the first switching element when the second switching element is turned off; After the first switching element is turned off, starting to supply charge to one end of the first switching element; and in response to a first time period having passed since the start of supplying the charge, ending the supply of the charge to one end of the first switching element; Precharging one end of the second switching element includes: turning off the second switching element when the first switching element is turned off; After the second switching element is turned off, starting to supply charge to one end of the second switching element; and In response to a lapse of a second time from the start of charge supply, supply of charge to one end of the second switching element is terminated.

5. The control method according to claim 1, characterized in that: In the power conversion device, in parallel with the synchronous rectification operation, a power factor improvement operation is performed by a third switching element and a fourth switching element connected between the input node and the output node in parallel with the first switching element and the second switching element.

6. A power conversion device, characterized in that: have: a first switching element connected between a first input node to which an AC voltage is input and a first output node; a second switching element connected between the first input node and the second output node and performing a synchronous rectification operation together with the first switching element; a first precharge circuit capable of precharging one end of the first switching element; as well as a second precharge circuit capable of precharging one end of the second switching element; The first precharge circuit precharges one end of the first switching element when both the first switching element and the second switching element are turned off, and turns on the second switching element after the first precharge circuit completes the precharge.

7. The power conversion device according to claim 6, characterized in that: The power conversion device precharges one end of the second switching element in a second state in which both the first switching element and the second switching element are turned off, and turns on the first switching element after the precharging of one end of the second switching element is completed.

8. The power conversion device according to claim 6, characterized in that: In the power conversion device, at a first moment, the first switching element is turned off while the second switching element is turned off, at a second moment later than the first moment, charge is started to be supplied to one end of the first switching element, and in response to a third moment after a first time has passed from the second moment, the supply of charge to one end of the first switching element is stopped.

9. The power conversion device according to claim 7, characterized in that: In the power conversion device: At a first moment, the first switch element is turned off while the second switch element is turned off, at a second moment later than the first moment, charge is started to be supplied to one end of the first switch element, and in response to a third moment after a first time has passed since the second moment, charge supply to one end of the first switch element is stopped, At the 4th moment, the 2nd switch element is turned off while the 1st switch element is turned off, and at the 5th moment later than the 4th moment, charge starts to be supplied to one end of the 2nd switch element, and in response to the 6th moment after the second time has passed from the 5th moment, the supply of charge to one end of the 2nd switch element ends.

10. The power conversion device according to claim 6, characterized in that: Also available: a third switching element connected between a second input node to which an AC voltage is input and the first output node; and a fourth switching element connected between the second input node and the second output node and performing a power factor improvement operation together with the third switching element; The power factor improving operation is performed in parallel with the synchronous rectification operation.

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