Clock synchronization method and related device

By multiplexing the eCPRI interface in a distributed base station and establishing a synchronization link with an external clock synchronization device, the problem that the fronthaul network does not support clock synchronization is solved, and high-precision clock synchronization is achieved, which reduces equipment costs and expands application scenarios.

CN120239036APending Publication Date: 2025-07-01HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202311837237.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-28
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

When the preamble network of distributed base stations does not support the precise time protocol and synchronous Ethernet, the RF unit cannot obtain the clock signal from the processing unit for clock synchronization, resulting in clock synchronization problems.

Method used

By multiplexing the eCPRI interface of the first device, establishing a synchronization link with the external clock synchronization device, obtaining the clock signal for clock synchronization, avoiding the addition of additional Ethernet interfaces.

Benefits of technology

It reduces equipment costs, optimizes equipment size, expands application scenarios, improves business scope, and achieves high-precision time synchronization at longer distances.

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Abstract

The invention provides a clock synchronization method and a related device, the method is applied to a first device, the first device is used for transmitting a radio frequency signal, the method comprises the following steps: receiving a first instruction sent by a second device through a first data link interface, and the first instruction is used for instructing the first device to perform clock synchronization; establishing a synchronization link with the clock synchronization device at the second data link interface according to the first instruction; a clock signal of the clock synchronization device is obtained through a synchronization link of the second data link interface, the first data link interface included by the first device is an enhanced common public radio interface eCPRI, and the second data link interface included by the first device is an eCPRI; and performing clock synchronization according to the clock signal. On the premise that the forward transmission network between the first device and the second device does not support the clock signal, the clock signal can be obtained from the clock synchronization device without adding an additional Ethernet interface on the first device, the equipment cost is reduced, and the equipment size is optimized.
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Description

Technical Field

[0001] This application relates to the field of communication technologies, and in particular, to a clock synchronization method and related devices. Background Art

[0002] A distributed base station is an information unit that separates the processing unit and the radio frequency unit of a traditional base station. The processing unit can be a baseband unit (BBU), and the radio frequency unit can be a radio remote unit (RRU) and an active antenna unit (AAU). Generally, the processing unit and the radio frequency unit are connected by optical fibers. For example, the processing unit is deployed in a computer room, and the processing unit is connected to the radio frequency unit through optical fibers. The processing unit and the radio frequency unit are connected through a fronthaul network, and the interfaces related to this fronthaul network connection are called fronthaul interfaces. The fronthaul network is described with reference to the Enhanced Common Public Radio Interface (eCPRI) based on the Internet Protocol (IP) or Ethernet.

[0003] The clock synchronization of a distributed base station is based on the Precision Time Protocol (PTP) and the Synchronous Ethernet (SyncE) protocol, that is, the radio frequency unit obtains a clock signal from the processing unit through PTP and SyncE for clock synchronization. In one example, when the distributed base station is applied, if the fronthaul network connection between the BBU and the RRU / AAU supports PTP and SyncE, the RRU / AAU can obtain a clock signal from the BBU through the fronthaul network that supports PTP and SyncE for clock synchronization.

[0004] However, when the fronthaul network does not support PTP and SyncE, the radio frequency unit cannot obtain a clock signal from the processing unit through the fronthaul network for clock synchronization. Therefore, there is an urgent need for a clock synchronization method to solve the clock synchronization problem of the radio frequency unit when the fronthaul network does not support clock synchronization. Summary of the Invention

[0005] Embodiments of this application propose a clock synchronization method and related devices. Without adding an extra Ethernet interface to the first device, the eCPRI of the first device is reused to obtain a clock signal from an external clock synchronization device for clock synchronization, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the scope of business applications.

[0006] In a first aspect, an embodiment of the present application provides a clock synchronization method, which is applied to a first device for transmitting radio frequency signals. The first device includes a first data link interface and a second data link interface. The method includes: The first device receives a first instruction sent by the second device through the first data link interface, and the first instruction is used to instruct the first device to perform clock synchronization. Then, the first device establishes a synchronization link with the clock synchronization device through the second data link interface according to the first instruction. Then, the first device obtains the clock signal of the clock synchronization device through the synchronization link of the second data link interface. The first data link interface is an enhanced common public radio interface eCPRI, and the second data link interface is eCPRI. Finally, the first device performs clock synchronization according to the clock signal.

[0007] Optionally, the first instruction may also be used to instruct the first device to obtain the clock signal from the clock synchronization device.

[0008] Optionally, the first instruction may also be used to instruct the first device to obtain the clock signal from the clock synchronization device through the second data link interface.

[0009] In the embodiment of the present application, the first device for transmitting radio frequency signals obtains the clock signal from the clock synchronization device of a third party through the data link interface, and then performs clock synchronization according to the clock signal. It is not necessary to add an additional Ethernet interface to the first device to obtain the clock signal from the clock synchronization device, which reduces the equipment cost, optimizes the equipment size, expands the applicable scenarios, and improves the business application scope.

[0010] In combination with the first aspect, in a possible implementation manner of the first aspect, the first device receives a second instruction sent by the second device through the first data link interface. Then, the first device manages the synchronization link between the first data link interface and the second device according to the second instruction. The data link between the first data link interface and the second device may be a control and management (C&M) link, and the first device may also manage the synchronization link according to the second instruction of the second device. This ensures that the synchronization link can transmit the clock signal smoothly and improves the reliability of clock synchronization.

[0011] In combination with the first aspect, in a possible implementation manner of the first aspect, the second data link interface serves as the Precision Time Protocol (PTP) interface of the synchronization link. Since the clock synchronization device supports providing clock signals through the Precision Time Protocol (PTP) and / or the Synchronous Ethernet (SyncE) protocol, the first device uses the second data link interface connected to the clock synchronization device as the PTP interface, enabling the first device to obtain high-precision clock signals. In addition, the second data link interface supports both the PTP and SyncE protocols, allowing the distance between the clock synchronization device and the first device to be relatively large, further expanding the scope of business applications.

[0012] In combination with the first aspect, in a possible implementation manner of the first aspect, the first device is a Remote Radio Unit (RRU) and / or an Active Antenna Unit (AAU), and the second device is a Baseband Unit (BBU); or, the first device is an eCPRI Radio Unit (eRE), and the second device is an eCPRI Radio Control Unit (eREC); or, the first device is an Open Radio Unit (O-RU), and the second device is an Open Distributed Unit (O-DU).

[0013] In a second aspect, an embodiment of the present application provides a clock synchronization method, which is applied to a second device. The second device is connected to a first device, and the first device is used to transmit radio frequency signals. The method includes: sending a first instruction to a first data link interface of the first device, where the first instruction is used to instruct the first device to obtain a clock signal from a clock synchronization device through a second data link interface for clock synchronization. The first device includes the first data link interface and the second data link interface, the first data link interface is an enhanced Common Public Radio Interface (eCPRI), and the second data link interface is an eCPRI.

[0014] In the embodiment of the present application, the second device can send a first instruction to the first device through the first data link interface of the first device, enabling the first device to obtain the clock signal of the clock synchronization device through the second data link interface for clock synchronization, adapting to clock synchronization in various service scenarios, expanding the applicable scenarios, and enhancing the scope of business applications.

[0015] In combination with the second aspect, in a possible implementation manner of the second aspect, a second instruction is sent to the first data link interface of the first device, where the second instruction is used to instruct the first device to manage the synchronization link between the first data link interface and the second device. The second device can also send a second instruction to the first device, enabling the first device to manage the synchronization link according to the second instruction. This ensures that the synchronization link can successfully transmit clock signals and improves the reliability of clock synchronization.

[0016] In a third aspect, an embodiment of the present application provides a clock signal relay device. The clock signal relay device is connected to a first device, and the first device is connected to a second device. The first device is used to transmit radio frequency signals. The clock signal relay device includes: a first interface group connected to the first device, the first interface group including one or more interfaces; a second interface group connected to the second device, the second interface group including one or more interfaces, where the first interface group and the second interface group are used to transmit data between the first device and the second device; a third interface connected to a clock synchronization device; the third interface is used to receive a clock signal from the clock synchronization device, and the clock signal is used for the first device; the first interface group is used to forward the clock signal to the first device.

[0017] In the embodiment of the present application, on the premise that the first device does not add an additional Ethernet interface and at least two eCPRIs of the first device are connected to the second device, a new clock signal relay device is used to enable the first device to obtain a clock signal from an external clock synchronization device for clock synchronization, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the scope of business applications. Since the first device obtains the clock signal from the external clock synchronization device through eCPRI, and the eCPRI supports transmitting the clock signal through the Precision Time Protocol (PTP) and / or the Synchronous Ethernet (SyncE) protocol, high-precision time synchronization can be achieved between the first device and the external clock synchronization device at a relatively long deployment distance, further increasing the scope of business applications.

[0018] In combination with the third aspect, in a possible implementation manner of the third aspect, the second interface group is used to receive a third instruction sent by the second device, and the third instruction is used to instruct the first device to perform clock synchronization according to the clock signal forwarded by the clock signal relay device; the third interface is used to receive the clock signal from the clock synchronization device according to the third instruction. The clock signal relay device can also obtain the clock signal of the clock synchronization device according to the third instruction of the second device, adapt to clock synchronization in various service scenarios, expand applicable scenarios, and enhance the scope of business applications.

[0019] In combination with the third aspect, in a possible implementation manner of the third aspect, the second interface group is further used to receive a fourth instruction sent by the second device, and the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the second device. The clock signal relay device can also manage the synchronization link according to the fourth instruction of the second device, ensuring that the synchronization link can transmit the clock signal smoothly and enhancing the reliability of clock synchronization.

[0020] In combination with the third aspect, in a possible implementation manner of the third aspect, the interfaces included in the first interface group are enhanced common public radio interfaces eCPRI.

[0021] In a fourth aspect, an embodiment of the present application provides a clock synchronization method. The method is applied to a clock signal relay device and includes: The clock signal relay device receives a third instruction sent by the second device through a second interface group connected to the second device. The third instruction is used to instruct a first device to perform clock synchronization, and the first device is used to transmit radio frequency signals. Then, the clock signal relay device receives a clock signal sent by the clock synchronization device through a third interface connected to the clock synchronization device. According to the received clock signal, the clock signal relay device forwards the clock signal to the first device through a first interface group connected to the first device.

[0022] In the embodiment of the present application, on the premise that the first device does not add additional Ethernet interfaces and at least two eCPRI of the first device are connected to the second device, a clock signal relay device is added to enable the first device to obtain a clock signal from an external clock synchronization device for clock synchronization, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the scope of business applications. Since the first device obtains the clock signal from the external clock synchronization device through eCPRI, and this eCPRI supports transmitting clock signals through the Precision Time Protocol PTP and / or the Synchronous Ethernet SyncE protocol, high-precision time synchronization can be achieved between the first device and the external clock synchronization device at a relatively long deployment distance, further increasing the scope of business applications.

[0023] In combination with the fourth aspect, in a possible implementation manner of the fourth aspect, the clock signal relay device receives a fourth instruction sent by the second device through the second interface group connected to the second device. The fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the clock synchronization device. The clock signal relay device manages the synchronization link between the third interface and the clock synchronization device according to the fourth instruction. The clock signal relay device can also obtain the clock signal of the clock synchronization device according to the third instruction of the second device, adapt to clock synchronization in various service scenarios, expand applicable scenarios, and enhance the scope of business applications.

[0024] In combination with the fourth aspect, in a possible implementation manner of the fourth aspect, the interfaces included in the first interface group are enhanced common public radio interfaces eCPRI.

[0025] Fifth aspect, an embodiment of the present application provides a clock synchronization method, which is applied to a second device. The second device is connected to a first device through a clock signal relay device. The first device is used to transmit radio frequency signals. The method includes: sending a third instruction to the clock signal relay device, where the third instruction is used to instruct the first device to perform clock synchronization according to the clock signal relayed by the clock signal relay device.

[0026] In an embodiment of the present application, the second device can also send a third instruction to the clock signal relay device, so that the clock signal relay device obtains the clock signal of the clock synchronization device according to the third instruction, adapts to clock synchronization in various service scenarios, expands the applicable scenarios, and improves the service applicability range.

[0027] In combination with the fifth aspect, in a possible implementation manner of the fifth aspect, the third instruction is further used to instruct the clock signal relay device to obtain the clock signal sent by the clock synchronization device from a third interface. Specifically, the second device can also specifically instruct the clock signal relay device to obtain the clock signal of the clock synchronization device from which interface, improving the implementation flexibility.

[0028] In combination with the fifth aspect, in a possible implementation manner of the fifth aspect, a fourth instruction is sent to the clock signal relay device, where the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the clock synchronization device. The second device can also send a fourth instruction to the clock signal relay device, so that the clock signal relay device manages the synchronization link according to the fourth instruction, ensuring that the synchronization link can transmit the clock signal smoothly and improving the reliability of clock synchronization.

[0029] Sixth aspect, an embodiment of the present application provides a communication device, which is applied to a first device. The first device is used to transmit radio frequency signals. The first device includes a first data link interface and a second data link interface. The communication device includes:

[0030] A transceiver module, configured to receive a first instruction sent by the second device through the first data link interface, where the first instruction is used to instruct the first device to perform clock synchronization;

[0031] A processing module, configured to establish a synchronization link with a clock synchronization device at the second data link interface according to the first instruction;

[0032] The transceiver module is further configured to obtain the clock signal of the clock synchronization device through the synchronization link of the second data link interface. The first data link interface is an enhanced common public radio interface eCPRI, and the second data link interface is eCPRI;

[0033] The processing module is further configured to perform clock synchronization according to the clock signal.

[0034] In a possible implementation, the transceiver module is further configured to receive a second instruction sent by the second device through the first data link interface;

[0035] The processing module is further configured to manage the synchronization link between the first data link interface and the second device according to the second instruction.

[0036] In a possible implementation, the second data link interface serves as a Precision Time Protocol (PTP) interface of the synchronization link.

[0037] In a possible implementation, the first device is a Radio Remote Unit (RRU) and / or an Active Antenna Unit (AAU), and the second device is a Baseband Unit (BBU);

[0038] Alternatively, the first device is an eCPRI Radio Unit (eRE), and the second device is an eCPRI Radio Control Unit (eREC);

[0039] Alternatively, the first device is an Open Radio Unit (O-RU), and the second device is an Open Distributed Unit (O-DU).

[0040] In a seventh aspect, an embodiment of the present application provides a communication device, which is applied to a second device. The second device is connected to a first device, and the first device is configured to transmit radio frequency signals. The communication device includes:

[0041] A transceiver module, configured to send a first instruction to a first data link interface of the first device. The first instruction is used to instruct the first device to obtain a clock signal from a clock synchronization device through a second data link interface for clock synchronization. The first device includes the first data link interface and the second data link interface. The first data link interface is an enhanced Common Public Radio Interface (eCPRI), and the second data link interface is eCPRI.

[0042] In a possible implementation, the transceiver module is further configured to send a second instruction to the first data link interface of the first device. The second instruction is used to instruct the first device to manage the synchronization link between the first data link interface and the second device.

[0043] In an eighth aspect, an embodiment of the present application provides a communication device, which is applied to a clock signal relay device. The communication device includes:

[0044] A transceiver module, configured to receive a third instruction sent by the second device via a second interface group connected to the second device, where the third instruction is used to instruct the first device to perform clock synchronization, and the first device is used to transmit radio frequency signals;

[0045] The transceiver module is further configured to receive a clock signal sent by the clock synchronization device via a third interface connected to the clock synchronization device

[0046] The transceiver module is further configured to forward the clock signal to the first device via a first interface group connected to the first device.

[0047] In a possible implementation, the transceiver module is further configured to receive a fourth instruction sent by the second device via the second interface group connected to the second device, where the fourth instruction is used to instruct the clock signal relay device to manage a synchronization link between the third interface and the clock synchronization device;

[0048] A processing module, configured to manage a synchronization link between the third interface and the clock synchronization device according to the fourth instruction.

[0049] In a possible implementation, the interfaces included in the first interface group are enhanced common public radio interfaces eCPRI.

[0050] In a ninth aspect, an embodiment of the present application provides a communication device, which is applied to a second device. The second device is connected to a first device through a clock signal relay device, and the first device is used to transmit radio frequency signals. The communication device includes:

[0051] A transceiver module, configured to send a third instruction to the clock signal relay device, where the third instruction is used to instruct the first device to perform clock synchronization according to the clock signal forwarded by the clock signal relay device.

[0052] In a possible implementation, the third instruction is further used to instruct the clock signal relay device to obtain the clock signal sent by the clock synchronization device from the third interface.

[0053] In a tenth aspect of the present application, a communication device is provided. The communication device includes: a processor, a memory, an input / output device, and a bus; computer instructions are stored in the memory; when the processor executes the computer instructions in the memory, computer instructions are stored in the memory; when the processor executes the computer instructions in the memory, it is used to implement any implementation manner in the first aspect, the second aspect, the fourth aspect, or the fifth aspect.

[0054] In a possible implementation of the tenth aspect, the processor, the memory, and the input / output device are respectively connected to the bus.

[0055] A computer program product including instructions is provided in the eleventh aspect of the present application. When it runs on a computer, it causes the computer to execute any implementation manner in the first aspect, the second aspect, the fourth aspect, or the fifth aspect.

[0056] A computer-readable storage medium is provided in the twelfth aspect of the present application. It includes instructions that, when running on a computer, cause the computer to execute any implementation manner in any one of the first aspect, the second aspect, the fourth aspect, or the fifth aspect.

[0057] A chip system is provided in the thirteenth aspect of the present application. The chip system includes a processor that is used to execute a computer program or instructions stored in a memory, so that the processor executes any implementation manner in any one of the above-mentioned first aspect, second aspect, fourth aspect, or fifth aspect.

[0058] In a possible design of the thirteenth aspect, the chip system further includes a memory for storing necessary computer programs or instructions for the computer device. The processor is used to call and run the computer programs or instructions from the memory. The chip system can be composed of chips or can include chips and other discrete devices.

[0059] In a possible design of the thirteenth aspect, the chip system further includes an input port and an output port. The input port and the output port are used to execute the receiving function and the sending function of the terminal device in any implementation manner in the first aspect, the second aspect, the fourth aspect, or the fifth aspect. Among them, the receiving function corresponds to the input port, and the sending function corresponds to the output port.

[0060] A communication system is provided in the fourteenth aspect of the present application. The communication system includes a first device as in the first aspect and a second device as in the second aspect.

[0061] A communication system is provided in the fifteenth aspect of the present application. The communication system includes a clock signal relay device as in the fourth aspect and a second device as in the fifth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 It is a schematic structural diagram of a communication device in an embodiment of the present application;

[0063] Figure 2 It is a schematic diagram of the eCPRI protocol stack in an embodiment of the present application;

[0064] Figure 3 It is a schematic diagram of a clock synchronization scenario based on a fronthaul network;

[0065] Figure 4 It is a schematic diagram of a clock synchronization scenario;

[0066] Figure 5 It is a schematic diagram of a clock synchronization method for a radio frequency unit;

[0067] Figure 6 It is a schematic diagram of a communication system proposed in an embodiment of the present application;

[0068] Figure 7 It is a schematic diagram of the structure of the first device in an embodiment of the present application;

[0069] Figure 8 It is a schematic flowchart of a clock synchronization method proposed in an embodiment of the present application;

[0070] Figure 9 It is a schematic diagram of a communication system proposed in an embodiment of the present application;

[0071] Figure 10 It is a schematic diagram of the structure of a clock signal relay device in an embodiment of the present application;

[0072] Figure 11 It is a schematic flowchart of a clock synchronization method proposed in an embodiment of the present application;

[0073] Figure 12 It is a schematic diagram of a communication device provided in an embodiment of the present application;

[0074] Figure 13 It is another schematic diagram of a communication device provided in an embodiment of the present application;

[0075] Figure 14 It is another schematic diagram of a communication device provided in an embodiment of the present application;

[0076] Figure 15 It is another schematic diagram of a communication device provided in an embodiment of the present application. Detailed implementation manners

[0077] The terms "first", "second", etc. in the description, claims and above-mentioned drawings of the present application are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances, which is only a way of distinction adopted when describing objects with the same attributes in the embodiments of the present application. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, so that a process, method, system, product or device including a series of units does not necessarily have to be limited to those units, but may include other units not clearly listed or inherent to these processes, methods, products or devices.

[0078] The technical solutions in the embodiments of the present application will be clearly described below with reference to the accompanying drawings in the embodiments of the present application. In the description of the present application, unless otherwise specified, " / " means "or". For example, A / B may mean A or B; the "and / or" in the present application is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B may mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the present application, "at least one item" means one or more items, and "multiple items" means two or more items. "At least one (item)" or its similar expression means any combination of these items, including any combination of single (item) or plural items. For example, at least one (item) of a, b, or c may mean: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, c may be single or multiple.

[0079] The technical solutions of the embodiments of the present application can be applied to various communication systems, such as: Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) communication system, 5th generation (5G) system or NR, and future 6th generation communication systems, etc. For another example, the technical solutions of the embodiments of the present application can also be applied to an Open Radio Access Network (openRAN, O - RAN or ORAN), Cloud Radio Access Network (CRAN), or Wireless Fidelity (WiFi) system. The technical solutions of the embodiments of the present application can also be applied to a communication system that integrates two or more of the above systems.

[0080] The part operated by an operator in various communication systems can be referred to as an operator network. The operator network can also be called a PLMN network, which is a network established and operated by a government or an operator approved by the government for the purpose of providing terrestrial mobile communication services to the public. It is mainly a public network where a mobile network operator (MNO) provides mobile broadband access services to users. The operator network or PLMN network described in the embodiments of this application can be a network that meets the requirements of the 3rd generation partnership project (3GPP) standard, simply referred to as a 3GPP network. Usually, the 3GPP network is operated by an operator, including but not limited to the 5th-generation (5G) network (simply referred to as the 5G network), the 4th-generation (4G) network (simply referred to as the 4G network), or the 3rd-generation (3G) network (simply referred to as the 3G network). It also includes the future 6G network. For the convenience of description, the embodiments of this application will be described by taking an operator network (such as a mobile network operator (MNO) network) as an example.

[0081] In the embodiments of the present application, the terminal device may also be referred to as a user equipment (UE). As a device with wireless transceiver functions, the terminal device involved in the embodiments of the present application may communicate with one or more core networks (CNs) via an access network device in the network device. The terminal device may also be referred to as an access terminal, terminal, user unit, user station, mobile station, mobile phone, remote station, remote terminal, mobile device, user terminal, wireless network device, user agent, or user device, etc. The terminal device may be deployed on land, including indoor or outdoor, handheld or vehicle-mounted; it may also be deployed on water (such as a ship, etc.); it may also be deployed in the air (such as an airplane, balloon, satellite, etc.). The terminal device may be a cellular phone, cordless phone, session initiation protocol (SIP) phone, smart phone, mobile phone, wireless local loop (WLL) station, personal digital assistant (PDA), a handheld device with wireless communication functions, a computing device, or other devices connected to a wireless modem, vehicle-mounted device, wearable device, drone device, or a terminal in the Internet of Things, Internet of Vehicles, any form of terminal in the fifth-generation (5G) mobile communication network and future networks, a relay user equipment, or a terminal in a future evolved public land mobile network (PLMN), etc. Among them, the relay user equipment may be, for example, a 5G residential gateway (RG). For example, the terminal device may be a virtual reality (VR) terminal, an augmented reality (AR) terminal, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc. The embodiments of the present application are not limited thereto. The terminal device can be widely applied to various scenarios, such as virtual reality, augmented reality, industrial control, autonomous driving, remote medical, smart grid, smart furniture, smart office, smart wear, smart transportation, smart city, etc.The terminal can be a mobile phone, a tablet computer, a computer with wireless transceiver function, a wearable device, a vehicle, a drone, a helicopter, an airplane, a ship, a robot, a robotic arm, a smart home device, etc. The embodiments of the present application do not limit the device form of the terminal device.

[0082] The network device can be regarded as a sub-network of the operator network and is an implementation system between the service nodes and the terminal devices in the operator network. For a terminal device to access the operator network, it first passes through the network device and then can be connected to the service nodes of the operator network through the network device. The network device in the embodiments of the present application is a device that provides wireless communication functions for the terminal device and can also be referred to as an access network (AN) or a radio access network (RAN) node.

[0083] The RAN node can be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next generation NodeB (gNB), a next generation base station in a 6th generation (6G) mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system, etc. The RAN node can be a macro base station, a micro base station or an indoor station, a relay node or a donor node, or a radio controller in a CRAN scenario. Optionally, the RAN node can also be a server, a wearable device, a vehicle or an in-vehicle device, etc. For example, the access network device in vehicle to everything (V2X) technology can be a road side unit (RSU).

[0084] In another possible scenario, multiple RAN nodes cooperate to assist a terminal in achieving wireless access, and different RAN nodes respectively implement some functions of a base station. For example, the RAN node can be a central unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU), etc. The CU and the DU can be set separately, or can also be included in the same network element, such as a baseband unit (BBU). The RU can be included in a radio frequency device or a radio frequency unit, such as included in a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).

[0085] In different systems, the CU (or CU-CP and CU-UP), DU, or RU may also have different names, but those skilled in the art can understand their meanings. For example, in the ORAN system, the CU can also be called an O-CU (open CU), the DU can also be called an O-DU, the CU-CP can also be called an O-CU-CP, the CU-UP can also be called an O-CU-UP, and the RU can also be called an O-RU. For the convenience of description, the CU, CU-CP, CU-UP, DU, and RU are used as examples in this application. Any one of the CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0086] The method provided in the present application can be applied to various communication systems, for example, it can be the Internet of Things (IoT), narrowband Internet of Things (NB-IoT), long term evolution (LTE), the fifth generation (5G) communication system, the hybrid architecture of LTE and 5G, the 5G new radio (NR) system, and new communication systems that will emerge in the future communication development. The 5G communication system of the present application may include at least one of a non-standalone (NSA) 5G communication system and a standalone (SA) 5G communication system. The communication system may also be a public land mobile network (PLMN) network, a device-to-device (D2D) network, a machine-to-machine (M2M) network, or other networks.

[0087] In addition, the embodiments of the present application may also be applicable to other future-oriented communication technologies, such as 6G, etc. The network architecture and service scenarios described in this application are intended to more clearly illustrate the technical solutions of this application, and do not constitute a limitation on the technical solutions provided by this application. A person of ordinary skill in the art will know that with the evolution of the network architecture and the emergence of new service scenarios, the technical solutions provided by this application are also applicable to similar technical problems.

[0088] Next, some technical concepts involved in the embodiments of the present application are introduced.

[0089] 1. Distributed base stations.

[0090] A distributed base station is a base station that separates the processing unit (such as BBU) and the radio frequency unit (such as RRU or AAU). The processing unit and the radio frequency unit are connected through the front-end transmission network (Fronthaul), which can also be referred to as the fronthaul network or fronthaul network. The radio frequency unit is an active antenna processing unit that integrates radio frequency and antenna functions. The radio frequency unit usually includes 2 fronthaul interfaces to meet scenarios such as increasing transmission bandwidth, cascading, or ring networking.

[0091] For easier understanding, see Figure 1 , Figure 1 It is a structural schematic diagram of a communication device in an embodiment of the present application. Figure 1The illustrated communication device may include one or more first devices and at least one second device. In the embodiment of the present application, the device for transmitting a radio frequency signal is referred to as a first device, the first device is used to transmit a radio frequency signal, the second device is connected to the first device, and the second device is used to control or manage the first device. The first device includes a radio frequency unit, and the second device includes a processing unit.

[0092] In one implementation, the communication device may be a distributed base station, the first device may be a radio frequency unit, and the second device may be a processing unit. For example, the second device in the embodiment of the present application may be a baseband processing unit (BBU), and the first device may be a remote radio unit (RRU), an active antenna unit (AAU) or a remote radio head (RRH). For another example, the second device may be an eCPRI radio equipment control unit (eCPRI radio equipment control, eREC) defined in a distributed base station fronthaul network in an enhanced common public radio interface (eCPRI) system, and the first device may be an eCPRI radio equipment (eCPRI radio equipment, eRE). For another example, the second device may be an open distributed unit (open-distributed unit, O-DU) in an ORAN system, and the first device may be a fronthaul interface between open radio units (open-radio units, O-RU). It can be understood that the first device in the embodiment of the present application may be a radio equipment (radio equipment, RE), and the second device may be a radio equipment control (radio equipment control, REC).

[0093] The fronthaul network between the first device (RF unit) and the second device (processing unit) can be connected by optical fiber. In practical applications, the first device includes an electronic-to-optical (E / O) converter, which is used to convert electrical signals into optical signals, and the second device includes an optical-to-electronic (O / E) converter, which is used to convert optical signals into electrical signals.

[0094] The second device may support simultaneous connection to multiple first devices.

[0095] 2. Enhanced Common Public Radio Interface (eCPRI).

[0096] eCPRI aims to define publicly available specifications for the key internal interfaces of radio base stations. For example, eCPRI that connects radio equipment control (eREC) and radio equipment (eRE) through the fronthaul transport network. eCPRI supports fronthaul networks based on Ethernet or Internet Protocol (IP) switching. For ease of understanding, please refer to Figure 2 , Figure 2 which is the protocol stack schematic diagram of eCPRI in the embodiments of this application. The synchronization function (or clock synchronization function) supported by eCPRI is based on the Precision Time Protocol (PTP) and the Synchronous Ethernet (SyncE) protocol. For example, the Remote Radio Unit (RRU) obtains the clock signal from the Baseband Unit (BBU) through eCPRI in the manner defined by the PTP and SyncE protocols and realizes system synchronization, thereby meeting the requirements of base station synchronization.

[0097] For ease of understanding, a scenario of obtaining the clock signal through the fronthaul network for synchronization is as Figure 3 shown, Figure 3 which is a schematic diagram of a clock synchronization scenario based on the fronthaul network. The first device (radio frequency unit) is directly connected to the second device (processing unit) through the fronthaul network. On the premise that the fronthaul network supports the transmission of clock signals, the second device sends the clock signal to the first device through the fronthaul network. The fronthaul network that supports the transmission of clock signals can also be said to support the PTP and SyncE protocols. The second device can obtain the clock signal from other time synchronization devices or locally. The clock synchronization device includes but is not limited to a Primary Reference Time Clock (PRTC), or an external synchronization device. The clock synchronization device in the embodiments of this application can also be called a clock signal source or a clock reference source.

[0098] However, when the fronthaul network does not support clock signals, the second device (processing unit) cannot send the clock signal to the first device (radio frequency unit) through the fronthaul network. At this time, the first device (radio frequency unit) needs to be connected to an external clock synchronization device to obtain the clock signal for clock synchronization. For example, Figure 4 as shown, Figure 4It is a schematic diagram of a clock synchronization scenario. In the case where the fronthaul network does not support clock signals, the first device (radio frequency unit) can also obtain clock signals through various methods to achieve clock synchronization. For ease of understanding, please refer to Figure 5 , Figure 5 It is a schematic diagram of a clock synchronization method for a radio frequency unit. The first device (radio frequency unit) can specifically obtain clock signals through the following various methods:

[0099] 1. Connect to the global navigation satellite system (GNSS) through the receiver interface of the first device's GNSS, use GNSS as the clock signal source (or clock reference source), and obtain the clock signal from GNSS for clock synchronization.

[0100] 2. When the first device supports 1 Pulse Per Second (1PPS) and Time of Day (ToD), obtain the clock signal from an external clock synchronization device through the 1PPS and ToD interface (1PPS + ToD interface). However, limited by the short transmission distance of the 1PPS and ToD interface, the scenario of connecting to the clock synchronization device through the 1PPS and ToD interface is only applicable to the case where the clock synchronization device is locally deployed for the first device.

[0101] 3. The first device adds an Ethernet interface, and this Ethernet interface supports the Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE) protocols. The first device connects to the clock synchronization device through the Ethernet interface, and the first device obtains the clock signal from the clock synchronization device through this Ethernet interface for clock synchronization. This method supports fiber optic remote extension and is applicable to the scenario where the clock synchronization device and the first device are deployed at a relatively long distance.

[0102] However, obtaining clock signals through GNSS has the problem of relatively high device costs; obtaining clock signals from an external clock synchronization device through the 1PPS and ToD interface is not applicable to scenarios with a relatively long deployment distance; obtaining clock signals from an external clock synchronization device through the Ethernet interface requires the first device to add an Ethernet interface, which also has the problem of relatively high device costs.

[0103] Based on this, an embodiment of the present application proposes a clock synchronization method and related devices: A first device receives a first instruction sent by a second device through a first data link interface, where the first instruction is used to instruct the first device to perform clock synchronization; the first device establishes a synchronization link with a clock synchronization device through a second data link interface according to the first instruction; the first device obtains a clock signal of the clock synchronization device through the synchronization link of the second data link interface, where the first data link interface is an enhanced common public radio interface eCPRI, and the second data link interface is eCPRI; the first device performs clock synchronization according to the clock signal. The first device for transmitting radio frequency signals obtains a clock signal from a clock synchronization device of a third party through a data link interface, and then performs clock synchronization according to the clock signal. It is possible to obtain a clock signal from a clock synchronization device without adding an additional Ethernet interface to the first device, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the scope of business applications. Since the first device obtains a clock signal from an external clock synchronization device through eCPRI, and this eCPRI supports transmitting clock signals through the Precision Time Protocol PTP and / or the Synchronous Ethernet SyncE protocol, therefore, a relatively long deployment distance can be achieved between the first device and the external clock synchronization device, further increasing the scope of business applications.

[0104] Next, the embodiments of the present application will be introduced with reference to the accompanying drawings. First, please refer to Figure 6 , Figure 6 which is a schematic diagram of a communication system proposed by an embodiment of the present application. A communication system proposed by an embodiment of the present application includes: a clock synchronization device, a first device, and a second device. The first device is connected to the clock synchronization device, and the first device obtains a clock signal from the clock synchronization device and performs clock synchronization. The first device is connected to the second device, and the first device obtains a clock signal from the clock synchronization device according to a first instruction sent by the second device. Figure 6 In the schematic communication system, one second device can be connected to one or more first devices, and one first device can also be connected to one or more second devices. The embodiments of the present application do not limit this.

[0105] On the basis of Figure 6 , a possible structure of the first device is as shown in Figure 7 . Figure 7This is a schematic structural diagram of a first device in an embodiment of the present application. The first device includes at least a first data link interface and a second data link interface. The first data link interface is an eCPRI, and the second data link interface is an eCPRI. Among them, the second data link interface is connected to a clock synchronization device, and the first data link interface is connected to a second device. The first device establishes a synchronization link with the clock synchronization device through the second data link interface, and then obtains a clock signal from the clock synchronization device through the synchronization link. The first device obtains an instruction from the second device through the first data link interface. For example, the first device obtains a first instruction from the second device through the first data link interface, and the first instruction is used to instruct the first device to perform clock synchronization.

[0106] In a possible implementation, a data link is established between the first data link interface and the second device. The data link includes, but is not limited to, a control and management (C&M) link or other data links for transmitting data. The first device can obtain an instruction from the second device through the first data link interface, and then perform operations such as establishing a synchronization link, managing the synchronization link, or obtaining a clock signal through the synchronization link according to the instruction from the second device. It should be noted that the link in the embodiment of the present application can be replaced by a path, a channel, a passage, or a connection, which is not limited here.

[0107] A synchronization link is established between the second data link interface and the clock synchronization device. The specific link establishment process can refer to the agreement of the International Telecommunication Union (ITU) protocol, which will not be elaborated here.

[0108] Optionally, after a synchronization link is established between the second data link interface and the clock synchronization device, the synchronization link can be configured to use the clock synchronization function. After using the synchronization function, the second data link interface can be used to obtain the clock signal sent by the clock synchronization device. The synchronization link supports transmitting the clock signal through the Precision Time Protocol (PTP) and / or the Synchronous Ethernet (SyncE) protocol.

[0109] In an example, the first device obtains the clock signal from the clock synchronization device in a manner agreed upon by the 1588 protocol through the second data link interface. The 1588 protocol is a PTP protocol used to synchronize the clocks of different devices in a network.

[0110] Optionally, the first data link section of the first device can be used as a Precision Time Protocol (PTP) interface for the synchronization link, and the clock signal is obtained from the clock synchronization device through the PTP interface.

[0111] Optionally, the first device further includes a clock processing module (not shown in the figure) for processing the clock signal, a clock phase-locked loop circuit, and an intermediate and radio frequency processing module (IRF processing). It can be understood that the first device can also achieve clock synchronization by processing the clock signal through other components, devices, modules, units, or circuits. The embodiments of the present application do not limit this.

[0112] In one example, after the clock processing module of the first device obtains the clock signal sent by the clock synchronization device through the second data link interface, the clock phase-locked loop circuit performs phase-locking processing on the received clock signal (RCLK) recovered from the clock signal to obtain a system clock signal (sysCLK). Then, the system clock signal is output to the intermediate and radio frequency processing module to achieve clock synchronization between the clock of the first device and the clock of the external clock synchronization device. It should be noted that the embodiments of the present application do not limit the method for the first device to perform clock synchronization according to the clock signal.

[0113] It can be understood that the first device may further include multiple first data link interfaces. The first device can be connected to one or more second devices through the multiple first data link interfaces. The first device may further include multiple second data link interfaces, and the first device can be connected to one or more clock synchronization devices through the multiple second data link interfaces.

[0114] In the embodiments of the present application, the first device is connected to the clock synchronization device through the second data link interface, and the first device is connected to the second device through the first data link interface. Without adding additional Ethernet interfaces, clock synchronization is achieved by multiplexing eCPRI to obtain the clock signal from the external clock synchronization device, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the scope of business applications. Since the first device obtains the clock signal from the external clock synchronization device through eCPRI, and this eCPRI supports transmitting the clock signal through the Precision Time Protocol (PTP) and / or the Synchronous Ethernet (SyncE) protocol, high-precision time synchronization can be achieved between the first device and the external clock synchronization device at a relatively long deployment distance, further increasing the scope of business applications. The first device is connected to at least one through at least one first data link interface, ensuring that the first device can communicate with the second device normally.

[0115] Combined with Figure 6 and Figure 7 the first device shown schematically, the following introduces a clock synchronization method proposed by the embodiments of the present application. Please refer to Figure 8 , Figure 8 which is a schematic flowchart of a clock synchronization method proposed by the embodiments of the present application. A clock synchronization method proposed by the embodiments of the present application includes:

[0116] S1. The first device receives a first instruction sent by the second device through the first data link interface. The first instruction is used to instruct the first device to perform clock synchronization.

[0117] In step S1, a data link is established between the first device and the second device through the first data link interface. This data link can be a C&M link. Then, the second device sends a first instruction to the first device through the C&M link. The first instruction is used to instruct the first device to perform clock synchronization. Correspondingly, after receiving the first instruction through the first data link interface, the first device triggers the establishment of a synchronization link with the clock synchronization device through the second data link interface. Or, when the first device has already established a synchronization link with the clock synchronization device through the second data link interface, the first device can send a request to the clock synchronization device according to the first instruction. This request is used to obtain a clock signal.

[0118] Optionally, the first instruction can also be used to instruct the first device to obtain a clock signal from the clock synchronization device through the second data link interface. Or, the first instruction can also be used to instruct the first device to obtain a clock signal from the clock synchronization device through eCPRI. The first device determines, according to the first instruction, that the second data link interface (eCPRI) can be used to obtain a clock signal from the clock synchronization device.

[0119] S2. The first device establishes a synchronization link with the clock synchronization device at the second data link interface according to the first instruction.

[0120] In step S2, the first device determines the second data link interface for establishing a connection with the clock synchronization device according to the first instruction, and then establishes a synchronization link with the clock synchronization device at the second data link interface. For the specific link establishment process, please refer to the description of the foregoing embodiments and will not be elaborated here.

[0121] In other words, the second device controls the first device to obtain a clock signal from the second data link interface through the C&M link between the second device and the first device. There is no connection between the second data link interface of the first device and the second device, and a connection is established between the second data interface of the first device and the clock synchronization device.

[0122] The second data link interface supports or provides a clock synchronization function, enabling the first device to obtain a clock signal through this interface.

[0123] S3. The first device receives the clock signal sent by the clock synchronization device.

[0124] In step S3, after the first device establishes a synchronization link with the clock synchronization device through the second data link interface, the first device receives the clock signal sent by the clock synchronization device through this synchronization link.

[0125] S4. The first device performs clock synchronization according to the clock signal.

[0126] For the method in which the first device performs clock synchronization according to the clock signal in step S4, please refer to the foregoing embodiments and will not be elaborated here. The embodiments of the present application are not limited.

[0127] S5. The first device receives a second instruction sent by the second device through the first data link interface.

[0128] Steps S5 to S6 are optional steps.

[0129] In step S5, the first device can receive the second instruction sent by the second device through the first data link interface and the C&M link connected to the second device. The second instruction is used to manage (or maintain, or control) the synchronization link. Exemplarily, the second instruction can be used to indicate traffic control, link management, and / or abnormal state recovery, etc. of the synchronization link.

[0130] S6. The first device manages the synchronization link according to the second instruction.

[0131] In the embodiments of the present application, on the premise that the first device does not add an additional Ethernet interface, clock synchronization is achieved by multiplexing the eCPRI of the first device to obtain a clock signal from an external clock synchronization device, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the service scope. Since the first device obtains the clock signal from the external clock synchronization device through eCPRI, and the eCPRI supports transmitting clock signals through the Precision Time Protocol (PTP) and / or the Synchronous Ethernet (SyncE) protocol, high-precision time synchronization can be achieved between the first device and the external clock synchronization device at a relatively long deployment distance, further increasing the service scope. On the premise that the fronthaul network between the first device and the second device does not support transmitting clock signals, the first device receives a first instruction sent by the second device through the first data link interface. Then, the first device establishes a synchronization link with the clock synchronization device on the second data link interface connected to the clock synchronization device according to the first instruction. The second data link interface supports clock synchronization functions. One eCPRI (the first data link interface) of the first device is connected to the second device through a fronthaul network that does not support PTP and SyncE; another eCPRI (the second data link interface) of the first device is connected to an external clock synchronization device, and this eCPRI (the second data link interface) supports clock synchronization functions. Therefore, the first device can obtain the clock signal from the clock synchronization device through this eCPRI (the second data link interface) to achieve clock synchronization.

[0132] Based on the foregoing embodiments, another implementation manner is proposed in the embodiments of the present application. By adding a clock signal relay device between the first device and the second device, the first device can obtain a clock signal and achieve clock synchronization without adding an Ethernet interface. This clock signal relay device can be called a Fronthaul Adaptive Unit (FAU) or other names, and the embodiments of the present application do not limit this. Exemplarily, this clock signal relay device can be deployed at any node in the fronthaul network, including but not limited to: switches, routers, or other servers with data relay functions, etc. This clock signal relay device can also be externally attached to the first device or the second device in the form of physical hardware, and the embodiments of the present application do not limit this.

[0133] For ease of understanding, please refer to Figure 9 , Figure 9 which is a schematic diagram of a communication system proposed in the embodiments of the present application. A communication system proposed in the embodiments of the present application includes: a clock synchronization device, a clock signal relay device, a first device, and a second device. The first device is connected to the clock synchronization device, and the first device obtains a clock signal from the clock synchronization device and performs clock synchronization. The first device is connected to the clock signal synchronization device, the second device is connected to the clock signal synchronization device, the clock synchronization device is connected to the clock signal synchronization device, and the first device and the second device are connected through the clock signal synchronization device. The clock signal relay device obtains a clock signal from the clock synchronization device, and then, the clock signal relay device forwards the clock signal to the first device so that the first device achieves clock synchronization according to this clock signal. Figure 9 In the illustrated communication system, a clock signal relay device can be connected to one or more second devices, a clock signal relay device can also be connected to one or more first devices, and a clock signal relay device can be connected to one or more clock synchronization devices. The embodiments of the present application do not limit this.

[0134] On the basis of Figure 9 , a possible structure of the clock signal relay device is as shown in Figure 10 . Figure 10This is a schematic structural diagram of a clock signal relay device in an embodiment of the present application. The clock signal relay device includes: a first interface group, the first interface group is connected to the first device, and the first interface group includes one or more interfaces; a second interface group, the second interface group is connected to the second device, the second interface group includes one or more interfaces, and the first interface group and the second interface group are used to transmit data between the first device and the second device; a third interface, the third interface is connected to a clock synchronization device; the third interface is used to receive a clock signal from the clock synchronization device; the first interface group is used to forward the clock signal to the first device.

[0135] In a possible implementation, the clock signal relay device obtains a clock signal from an external clock synchronization device through the third interface in the manner of PTP and SyncE protocols. For example, a synchronization link is established between the third interface and the clock synchronization device, and this synchronization link is used to transmit the clock signal. The second interface group of the clock signal relay device is connected to the second device through a fronthaul network, the first interface group of the clock signal relay device is connected to the first device, and the first interface group and the second interface group are used to transmit data between the first device and the second device. The first interface group is connected to the first data link interface (eCPRI) and the second data link interface (eCPRI) of the first device. For example, the first interface group includes: port3 and port4, port3 is connected to the first data link interface (eCPRI#0), and port4 is connected to the second data link interface (eCPRI#1). The interfaces included in the first interface group can be eCPRI. The first device only needs a general interface design (eCPRI) to obtain a clock signal through the clock signal relay device and then achieve clock synchronization in a scenario where the fronthaul network does not support the clock signal, improving the applicable scope of this solution.

[0136] Optionally, a data link is established between the clock signal relay device and the second device through the second interface group, and this data link can be a C&M link. The second interface group includes: port0 and port1. The first data link interface of the first device is connected to the second device through port3 of the first interface group and port0 of the second interface group, and the second data link interface of the first device is connected to the second device through port4 of the first interface group and port1 of the second interface group. A data path is established within the clock signal relay device between port3 and port0, and a data path is established within the clock signal relay device between port4 and port1. Through the above connection relationship, the two eCPRIs of the first device are respectively connected to the second device to realize data forwarding between the first device and the second device.

[0137] Optionally, the clock signal relay device establishes a synchronization link with the clock synchronization device through the third interface. The clock signal relay device can establish a synchronization link with the clock synchronization device through the third interface according to the third instruction of the second device (for example, receiving the third instruction of the second device through the second interface group), enabling the third interface to have the clock synchronization function. The third instruction is used to instruct the first device to perform clock synchronization according to the clock signal forwarded by the clock signal relay device from the clock synchronization device.

[0138] Optionally, the clock signal relay device further includes a clock processing module (not shown in the figure) and a clock phase-locked loop circuit for processing the clock signal. It can be understood that the clock signal relay device can also process the clock signal through other components, devices, modules, units or circuits, and the embodiments of the present application do not limit this. In one example, after the clock processing module of the clock signal relay device obtains the clock signal sent by the clock synchronization device through the third interface, the received clock signal (RCLK) recovered from the clock signal is phase-locked by the clock phase-locked loop circuit to obtain the system clock signal (sysCLK). Then the clock signal relay device outputs the system clock signal to the first interface group, and the first interface group forwards the clock signal to the first data link interface and / or the second data link interface of the first device. The first device performs clock synchronization according to the clock signal.

[0139] Optionally, the second interface group is used to receive the third instruction sent by the second device. The third instruction is used to instruct the first device to perform clock synchronization according to the clock signal forwarded by the clock signal relay device. Then, the third interface is used to receive the clock signal from the clock synchronization device according to the third instruction. The clock signal relay device can obtain the clock signal from the clock synchronization device according to the third instruction sent by the second device and forward the clock signal to the first device. Optionally, the clock signal relay device can also forward the third instruction to the first device to trigger the first device to perform clock synchronization according to the clock signal from the clock synchronization device.

[0140] Optionally, the second interface group is further used to receive the fourth instruction sent by the second device. The fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the second device. Then, the clock signal relay device manages (or maintains) the synchronization link between the third interface and the clock synchronization device according to the fourth instruction.

[0141] Optionally, the clock signal relay device receives other instructions of the second device through the second interface group and manages (or maintains) the data link with the first device and / or the data link with the second device according to the instruction.

[0142] In the embodiment of the present application, a clock signal relay device is added between the first device and the second device. Without adding an extra Ethernet interface to the first device, the clock signal relay device enables clock synchronization by obtaining a clock signal from an external clock synchronization device, reducing equipment costs, optimizing equipment size, expanding applicable scenarios, and enhancing the scope of business applications. It realizes clock synchronization of the first device according to an external clock signal on the premise that the fronthaul network does not support the transmission of clock signals. Since the clock signal relay device is added, the general design of the first device and the second device is ensured.

[0143] Combined with Figure 9 and Figure 10 the schematic clock signal relay device shown, the following introduces a clock synchronization method proposed in the embodiment of the present application. Please refer to Figure 11 , Figure 11 which is a flowchart of a clock synchronization method proposed in the embodiment of the present application. A clock synchronization method proposed in the embodiment of the present application includes:

[0144] D1. The clock signal relay device receives a third instruction sent by the second device, and the third instruction is used to instruct the first device to perform clock synchronization.

[0145] In step D1, the second interface group of the clock signal relay device is connected to the second device, and a data link is established between the second interface group of the clock signal relay device and the second device, and the data link may include a C&M link.

[0146] In a possible implementation, the second device sends a third instruction to the clock signal relay device, and the third instruction is used to instruct the first device to perform clock synchronization. In one example, in response to the third instruction, the clock signal relay device requests to obtain a clock signal from the clock synchronization device. In another example, the clock signal relay device forwards the third instruction sent by the second device to the first device, and the first device requests the clock synchronization device to send a clock signal through the clock signal relay device in response to the third instruction.

[0147] In another possible implementation, the first device actively initiates a clock synchronization process, and the first device requests a clock signal from the clock synchronization device through the clock signal relay device.

[0148] D2. The clock signal relay device receives the clock signal sent by the clock synchronization device.

[0149] In step D2, the clock signal relay device receives the clock signal sent by the clock synchronization device through the third interface. In a possible implementation, the clock signal relay device establishes a synchronization link with the clock synchronization device through the third interface. This synchronization link can be triggered by the second device to establish, for example, according to the third instruction of the second device to establish this synchronization link. This synchronization link can also be triggered by the first device to establish, for example, according to the clock signal acquisition request of the first device to trigger the establishment of this synchronization link, and this clock signal acquisition request is used to request the clock synchronization device to send a clock signal. The clock signal relay device receives this clock signal acquisition request sent by the first device through the first interface group.

[0150] D3. The clock signal relay device forwards the clock signal to the first device.

[0151] In step D3, when the clock signal relay device receives the clock signal sent by the clock synchronization device, the clock signal relay device distributes the clock signal to the first device through the first interface group.

[0152] In a possible implementation, the clock signal relay device restores the clock signal received by the third interface to obtain the received clock signal (RCLK). The clock signal relay device performs phase-locked processing on this received clock signal (RCLK) to obtain the system clock signal (sysCLK). Then the clock signal relay device outputs this system clock signal to the first interface group, and the first interface group forwards the clock signal to the first data link interface and / or the second data link interface of the first device.

[0153] D4. The first device performs clock synchronization according to the clock signal.

[0154] In step D4, for the method of the first device performing clock synchronization according to the clock signal, please refer to the foregoing embodiments and will not be elaborated here. The embodiments of the present application are not limited.

[0155] D5. The clock signal relay device receives the fourth instruction sent by the second device.

[0156] Steps D5 to D6 are optional steps.

[0157] In step D5, the clock signal relay device can receive the fourth instruction sent by the second device through the second interface group and the C&M link connected to the second device, and this fourth instruction is used to manage (or maintain, or control) the synchronization link. Exemplarily, the fourth instruction can be used to indicate traffic control, link management, and / or abnormal state recovery, etc. of the synchronization link.

[0158] Optionally, the clock signal relay device can also manage (or maintain, or control) other links of the clock signal relay device according to other instructions of the second device.

[0159] D6. According to the fourth instruction, the clock signal relay device manages the synchronization link between the third interface and the clock synchronization device.

[0160] In the embodiments of the present application, on the premise that the first device does not add an additional Ethernet interface and at least two eCPRIs of the first device are connected to the second device, a new clock signal relay device is used to enable the first device to obtain a clock signal from an external clock synchronization device for clock synchronization, reducing equipment costs, optimizing equipment dimensions, expanding applicable scenarios, and enhancing the scope of business applications. Since the first device obtains the clock signal from the external clock synchronization device through eCPRI, and this eCPRI supports transmitting the clock signal through the Precision Time Protocol (PTP) and / or the Synchronous Ethernet (SyncE) protocol, high-precision time synchronization can be achieved between the first device and the external clock synchronization device at a relatively long deployment distance, further increasing the scope of business applications.

[0161] Referring to the foregoing embodiments, please refer to Figure 12 , which is a schematic diagram of an implementation of the communication device provided in the present application. The communication device 1200 includes a processing module 1201 and a transceiver module 1202. The communication device 1200 can implement the functions of the communication device (including the first device, the second device, and / or the clock signal synchronization device, etc.) in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments. In the embodiments of the present application, the communication device 1200 can be the first device, the second device, and / or the clock signal synchronization device, or an integrated circuit or component inside the first device, the second device, and / or the clock signal synchronization device, such as a chip.

[0162] The transceiver module 1202 can implement corresponding communication functions. The transceiver module 1202 can also be referred to as a communication interface or a communication unit, and is used to implement signal transmission and reception or signal input and output. The processing module 1201 is used to perform processing operations other than signal transmission and reception.

[0163] Optionally, the communication device 1200 may further include a storage module, which can be used to store instructions and / or data. The processing module 1201 can read the instructions and / or data in the storage module to enable the communication device to implement any of the foregoing method embodiments.

[0164] The communication device 1200 can be used to perform the actions executed by the communication device (the first device, the second device, and / or the clock signal synchronization device) in the above method embodiments. The communication device 1200 can be a communication device or a component configurable in a communication device. The transceiver module 1202 is used to perform the transceiver-related operations on the communication device side in the above method embodiments, and the processing module 1201 is used to perform the processing-related operations on the communication device side in the above method embodiments.

[0165] Optionally, the transceiver module 1202 may include a sending module and a receiving module. The sending module is used to perform the sending operation of the communication device in any one of the above method embodiments. The receiving module is used to perform the receiving operation of the communication device in any one of the above method embodiments.

[0166] It should be noted that the communication device 1200 may include a sending module but not a receiving module. Or, the communication device 1200 may include a receiving module but not a sending module. Specifically, it depends on whether the above solution executed by the communication device 1200 includes a sending action and a receiving action.

[0167] Please refer to Figure 13 , which is another schematic structural diagram of the communication device 1300 provided in this application. The communication device 1300 includes at least an input / output interface 1302. Among them, the communication device 1300 can be a chip or an integrated circuit.

[0168] Optionally, the communication device further includes a logic circuit 1301.

[0169] Among them, Figure 12 the shown transceiver module 1202 can be a communication interface, and this communication interface can be Figure 13 the input / output interface 1302 in

[0170] Optionally, when the communication device 1300 is the session management function (or a component in the session management function) in the foregoing embodiment, the input / output interface 1302 is used to input and output information; the logic circuit 1301 is used to execute the method executed by the first device, the second device, and / or the clock signal synchronization device in any one of the foregoing embodiments.

[0171] Among them, the logic circuit 1301 and the input / output interface 1302 can also perform other steps executed by the communication device in any one of the embodiments and achieve the corresponding beneficial effects, which will not be elaborated here.

[0172] In one possible implementation, Figure 12The processing module 1201 shown can be Figure 13 the logic circuit 1301 in

[0173] Optionally, the logic circuit 1301 can be a processing device, and the functions of the processing device can be implemented partially or fully by software. Among them, the functions of the processing device can be implemented partially or fully by software.

[0174] Optionally, the processing device can include a memory and a processor. Among them, the memory is used to store a computer program, and the processor reads and executes the computer program stored in the memory to perform the corresponding processing and / or steps in any one of the method embodiments.

[0175] Optionally, the processing device can only include a processor. The memory for storing the computer program is located outside the processing device, and the processor is connected to the memory through a circuit / wire to read and execute the computer program stored in the memory. Among them, the memory and the processor can be integrated together or physically independent of each other.

[0176] Optionally, the processing device can be one or more chips, or one or more integrated circuits. For example, the processing device can be one or more field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), system on chips (SoCs), central processor units (CPUs), network processors (NPs), digital signal processing circuits (DSPs), microcontroller units (MCUs), programmable logic devices (PLDs), or other integrated chips, or any combination of the above chips or processors, etc.

[0177] Please refer to Figure 14 , the communication device 1400 involved in the above embodiments provided by the embodiments of the present application. The communication device 1400 can specifically be the communication device acting as the first device, the second device, and / or the clock signal synchronization device in the above embodiments.

[0178] Among them, a possible schematic diagram of the logical structure of the communication device 1400. The communication device 1400 can include but is not limited to at least one processor 1401 and a communication port 1402.

[0179] Further optionally, the device may further include at least one of a memory 1403 and a bus 1404. In an embodiment of the present application, the at least one processor 1401 is configured to control and process the operations of the communication device 1400.

[0180] In addition, the processor 1401 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute various exemplary logical blocks, modules, and circuits described in connection with the disclosure of the present application. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, and so on. Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0181] It should be noted that Figure 14 the communication device 1400 shown can specifically be used to implement the steps implemented by the first device, the second device, and / or the clock signal synchronization device in the foregoing method embodiments, and achieve the corresponding technical effects of the first device, the second device, and / or the clock signal synchronization device. Figure 14 For the specific implementation manners of the communication device shown, reference can be made to the descriptions in the foregoing method embodiments, and details will not be repeated here.

[0182] Please refer to Figure 15 , which is a schematic structural diagram of the communication device 1500 involved in the foregoing embodiments provided in the embodiments of the present application. The communication device 1500 can specifically be the communication device that serves as the first device, the second device, and / or the clock signal synchronization device in the foregoing embodiments. Among them, the structure of the communication device can refer to Figure 15 the structure shown.

[0183] The communication device 1500 includes at least one processor 1501 and at least one network interface 1504. Further optionally, the communication device further includes at least one memory 1502, at least one transceiver 1503, and one or more antennas 1505. The processor 1501, the memory 1502, the transceiver 1503, and the network interface 1504 are connected, for example, through a bus. In the embodiments of the present application, this connection may include various interfaces, transmission lines, or buses, etc., and this embodiment does not limit this. The antenna 1505 is connected to the transceiver 1503. The network interface 1504 is used to enable the communication device to communicate with other communication devices through a communication link. For example, the network interface 1504 may include a network interface between the communication device and core network devices, such as an S1 interface, and the network interface may include a network interface between the communication device and other communication devices (such as other radio access networks or core network devices), such as an X2 or Xn interface.

[0184] The processor 1501 is mainly used to process communication protocols and communication data, and to control the entire communication device, execute software programs, and process data of software programs, for example, to support the communication device to perform the actions described in the embodiments. The communication device may include a baseband processor and a central processor. The baseband processor is mainly used to process communication protocols and communication data, and the central processor is mainly used to control the entire communication device, execute software programs, and process data of software programs. Figure 15 The processor 1501 in [description] may integrate the functions of the baseband processor and the central processor. Those skilled in the art can understand that the baseband processor and the central processor may also be independent processors, interconnected through technologies such as a bus. Those skilled in the art can understand that the communication device may include multiple baseband processors to adapt to different network systems, the communication device may include multiple central processors to enhance its processing ability, and various components of the communication device may be connected through various buses. The baseband processor may also be referred to as a baseband processing circuit or a baseband processing chip. The central processor may also be referred to as a central processing circuit or a central processing chip. The function of processing communication protocols and communication data may be built into the processor or stored in the memory in the form of a software program, and the processor executes the software program to implement the baseband processing function.

[0185] The memory is mainly used to store software programs and data. The memory 1502 may exist independently and be connected to the processor 1501. Optionally, the memory 1502 may be integrated with the processor 1501, for example, integrated within a single chip. Among them, the memory 1502 can store program codes for implementing the technical solutions of the embodiments of the present application, and is controlled by the processor 1501 to be executed. Various computer program codes that are executed can also be regarded as driver programs of the processor 1501.

[0186] Figure 15 Only one memory and one processor are shown. In an actual communication device, there may be multiple processors and multiple memories. The memory may also be referred to as a storage medium or a storage device, etc. The memory may be a storage element on the same chip as the processor, i.e., an on-chip storage element, or an independent storage element, which is not limited in the embodiments of the present application.

[0187] The transceiver 1503 may be used to support the reception or transmission of radio frequency signals between the communication device and the terminal. The transceiver 1503 may be connected to the antenna 1505. The transceiver 1503 includes a transmitter Tx and a receiver Rx. Specifically, one or more antennas 1505 may receive radio frequency signals. The receiver Rx of the transceiver 1503 is used to receive the radio frequency signals from the antenna, convert the radio frequency signals into digital baseband signals or digital intermediate frequency signals, and provide the digital baseband signals or digital intermediate frequency signals to the processor 1501 so that the processor 1501 can further process the digital baseband signals or digital intermediate frequency signals, such as demodulation processing and decoding processing. In addition, the transmitter Tx in the transceiver 1503 is also used to receive the modulated digital baseband signals or digital intermediate frequency signals from the processor 1501, convert the modulated digital baseband signals or digital intermediate frequency signals into radio frequency signals, and transmit the radio frequency signals through one or more antennas 1505. Specifically, the receiver Rx may selectively perform one-stage or multi-stage down-conversion processing and analog-to-digital conversion processing on the radio frequency signals to obtain digital baseband signals or digital intermediate frequency signals, and the order of the down-conversion processing and the analog-to-digital conversion processing is adjustable. The transmitter Tx may selectively perform one-stage or multi-stage up-conversion processing and digital-to-analog conversion processing on the modulated digital baseband signals or digital intermediate frequency signals to obtain radio frequency signals, and the order of the up-conversion processing and the digital-to-analog conversion processing is adjustable. The digital baseband signals and the digital intermediate frequency signals may be collectively referred to as digital signals.

[0188] The transceiver 1503 may also be referred to as a transceiver module, a transceiver, a transceiver device, etc. Optionally, the devices in the transceiver module for implementing the reception function may be regarded as a receiving unit, and the devices in the transceiver module for implementing the transmission function may be regarded as a transmitting unit, that is, the transceiver module includes a receiving unit and a transmitting unit. The receiving unit may also be referred to as a receiver, an input port, a receiving circuit, etc., and the transmitting unit may be referred to as a transmitter, a transmitter, or a transmitting circuit, etc.

[0189] In the embodiments of the present application, the antenna and the radio frequency circuit with transceiver functions may be regarded as the transceiver 1503 of the communication device, and the processing unit with processing functions may be regarded as the processor 1501 of the communication device. As Figure 15As shown, the communication device includes a transceiver 1503 and a processor 1501. The transceiver 1503 can also be referred to as a transceiver unit, transceiver, transceiver device, etc. The processor 1501 can also be referred to as a processing unit, processing board, processing module, processing device, etc.

[0190] Optionally, the devices in the transceiver 1503 for implementing the receiving function can be regarded as a receiving unit, and the devices in the transceiver 1503 for implementing the sending function can be regarded as a sending unit, that is, the transceiver 1503 includes a receiving unit and a sending unit. The transceiver unit can sometimes also be referred to as a transceiver or a transceiver circuit, etc. The receiving unit can sometimes also be referred to as a receiver, receiver circuit, etc. The sending unit can sometimes also be referred to as a transmitter, transmitter circuit, etc.

[0191] It should be understood that the transceiver 1503 is used to perform the sending operation and receiving operation of the communication device (the first device, the second device, and / or the clock signal synchronization device) in each of the above method embodiments, and the processor 1501 is used to perform other operations of the communication device (the first device, the second device, and / or the clock signal synchronization device) in each of the above method embodiments except for the sending and receiving operations.

[0192] When the communication device is a chip, the chip includes a transceiver unit and a processing unit. Among them, the transceiver unit can be an input / output circuit or a communication interface; the processing unit is a processor, microprocessor, integrated circuit, or logic circuit integrated on the chip.

[0193] In a possible design, as Figure 15 one or more of the modules in may be implemented by one or more processors, or by one or more processors and a memory; or by one or more processors and a transceiver; or by one or more processors, a memory, and a transceiver. The embodiments of the present application do not make any limitations in this regard. The processor, memory, and transceiver can be provided separately or integrated.

[0194] The device has the functions of implementing the first device, the second device, and / or the clock signal synchronization device described in the embodiments of the present application. For example, the device includes the first device, the second device, and / or the clock signal synchronization device, and executes the modules, units, or means corresponding to the steps involved in the first device, the second device, and / or the clock signal synchronization device described in the embodiments of the present application. The functions, units, or means can be implemented by software, or by hardware, or by hardware executing corresponding software, or by a combination of software and hardware. For details, reference can be further made to the corresponding descriptions in the foregoing corresponding method embodiments.

[0195] It should be noted that Figure 15The illustrated communication device 1500 can specifically be used to implement the steps implemented by the first device, the second device, and / or the clock signal synchronization device in the foregoing method embodiments, and achieve the corresponding technical effects of the first device, the second device, and / or the clock signal synchronization device. Figure 15 For the specific implementation manners of the illustrated communication device 1500, reference can be made to the descriptions in the foregoing method embodiments, and details are not described herein again.

[0196] The embodiments of the present application further provide a computer-readable storage medium storing one or more computer-executable instructions. When the computer-executable instructions are executed by a processor, the processor executes the method in the possible implementation manners of the first device, the second device, and / or the clock signal synchronization device in the foregoing embodiments.

[0197] The embodiments of the present application further provide a computer program product (or computer program) storing one or more computers. When the computer program product is executed by the processor, the processor executes the method in the possible implementation manners of the first device, the second device, and / or the clock signal synchronization device described above.

[0198] The embodiments of the present application further provide a chip system. The chip system includes at least one processor, which is used to support the communication device to implement the functions involved in the possible implementation manners of the communication device described above. Optionally, the chip system further includes an interface circuit, and the interface circuit provides program instructions and / or data for the at least one processor. In a possible design, the chip system may further include a memory, and the memory is used to store the necessary program instructions and data of the communication device. The chip system may be composed of chips or may include chips and other discrete devices. Among them, the communication device may specifically be the first device, the second device, and / or the clock signal synchronization device in the foregoing method embodiments.

[0199] The embodiments of the present application further provide a communication system, which includes the first device, the second device, and / or the clock signal synchronization device in any of the foregoing embodiments.

[0200] In several embodiments provided in the present application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other may be through some interfaces, and the indirect couplings or communication connections of devices or units may be in electrical, mechanical, or other forms.

[0201] The unit described as a separate component may or may not be physically separated. The component shown as a unit may or may not be a physical unit, that is, it may be located in one place or may be distributed over multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0202] In addition, each functional unit in various embodiments of the present application may be integrated into a processing module, may exist separately as individual physical units, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of a software functional unit. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that makes a contribution, or all or part of the technical solution, may be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a radio access network, etc.) to execute all or part of the steps of the method in various embodiments of the present application. The foregoing storage medium includes: various media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disc that can store program codes.

Claims

1. A clock synchronization method, characterized in that, The method is applied to a first device for transmitting radio frequency signals. The first device includes a first data link interface and a second data link interface. The method includes: Receiving, through the first data link interface, a first instruction sent by the second device, where the first instruction is used to instruct the first device to perform clock synchronization; Establishing, according to the first instruction, a synchronization link between the second data link interface and a clock synchronization device; Obtaining, through the synchronization link of the second data link interface, a clock signal of the clock synchronization device. The first data link interface is an enhanced common public radio interface eCPRI, and the second data link interface is eCPRI; Performing clock synchronization according to the clock signal.

2. The method according to claim 1, wherein The method further includes: Receiving, through the first data link interface, a second instruction sent by the second device; Managing, according to the second instruction, the synchronization link between the first data link interface and the second device.

3. The method according to claim 1 or 2, characterized in that The second data link interface serves as a Precision Time Protocol PTP interface of the synchronization link.

4. The method according to any one of claims 1 to 3, characterized in that, The first device is a remote radio unit RRU and / or an active antenna unit AAU, and the second device is a baseband unit BBU; Alternatively, the first device is an eCPRI radio unit eRE, and the second device is an eCPRI radio control unit eREC; Alternatively, the first device is an open radio unit O-RU, and the second device is an open distributed unit O-DU.

5. A clock synchronization method, characterized in that, The method is applied to a second device connected to the first device, where the first device is used to transmit radio frequency signals. The method includes: Sending a first instruction to the first data link interface of the first device, where the first instruction is used to instruct the first device to obtain a clock signal from a clock synchronization device through the second data link interface for clock synchronization. The first device includes the first data link interface and the second data link interface. The first data link interface is an enhanced common public radio interface eCPRI, and the second data link interface is eCPRI.

6. The method according to claim 5, characterized in that The method further includes: Sending a second instruction to the first data link interface of the first device, where the second instruction is used to instruct the first device to manage the synchronization link between the first data link interface and the second device.

7. A clock signal relay device, characterized in that, The clock signal relay device is connected to the first device, and the first device is connected to the second device. The first device is used to transmit radio frequency signals. The clock signal relay device includes: A first interface group connected to the first device, where the first interface group includes one or more interfaces; A second interface group connected to the second device, where the second interface group includes one or more interfaces. The first interface group and the second interface group are used to transmit data between the first device and the second device; A third interface connected to the clock synchronization device; The third interface is used to receive a clock signal from the clock synchronization device, and the clock signal is for the first device; The first interface group is used to forward the clock signal to the first device.

8. The clock signal relay device according to claim 7, wherein the second interface group is used to receive a third instruction sent by the second device, and the third instruction is used to instruct the first device to perform clock synchronization according to the clock signal forwarded by the clock signal relay device; the third interface is used to receive the clock signal from the clock synchronization device according to the third instruction.

9. The clock signal relay device according to claim 7 or 8, wherein the second interface group is further used to receive a fourth instruction sent by the second device, and the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the second device.

10. The clock signal relay device according to any one of claims 7-9, characterized in that The interfaces included in the first interface group are enhanced common public radio interfaces eCPRI.

11. A clock synchronization method, characterized in that, The method is applied to a clock signal relay device, and the method includes: Receiving, through a second interface group connected to a second device, a third instruction sent by the second device, where the third instruction is used to instruct a first device to perform clock synchronization, and the first device is used to transmit radio frequency signals; Receiving, through a third interface connected to the clock synchronization device, a clock signal sent by the clock synchronization device Forwarding the clock signal to the first device through a first interface group connected to the first device.

12. The method according to claim 11, wherein The method further includes: Receiving, through the second interface group connected to the second device, a fourth instruction sent by the second device, where the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the clock synchronization device; Managing the synchronization link between the third interface and the clock synchronization device according to the fourth instruction.

13. The method according to claim 11 or 12, characterized in that, The interfaces included in the first interface group are enhanced common public radio interfaces eCPRI.

14. A clock synchronization method, characterized in that, The method is applied to a second device, the second device is connected to a first device through a clock signal relay device, and the first device is used to transmit radio frequency signals. The method includes: Sending a third instruction to the clock signal relay device, where the third instruction is used to instruct the first device to perform clock synchronization according to the clock signal forwarded by the clock signal relay device.

15. The method according to claim 14, characterized in that, The third instruction is further used to instruct the clock signal relay device to obtain the clock signal sent by the clock synchronization device from the third interface.

16. The method according to claim 14 or 15, characterized in that, The method further includes: Sending a fourth instruction to the clock signal relay device, where the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the clock synchronization device.

17. A communication device, characterized in that, The communication device is applied to a first device, the first device is used to transmit radio frequency signals, the first device includes a first data link interface and a second data link interface, and the communication device includes: a transceiver module, configured to receive, through the first data link interface, a first instruction sent by the second device, where the first instruction is used to instruct the first device to perform clock synchronization; a processing module, configured to establish a synchronization link between the second data link interface and a clock synchronization device according to the first instruction; The transceiver module is further configured to obtain the clock signal of the clock synchronization device through the synchronization link of the second data link interface, where the first data link interface is an enhanced common public radio interface (eCPRI), and the second data link interface is an eCPRI; The processing module is further configured to perform clock synchronization according to the clock signal.

18. The communication device according to claim 17, wherein The transceiver module is further configured to receive a second instruction sent by the second device through the first data link interface; The processing module is further configured to manage the synchronization link between the first data link interface and the second device according to the second instruction.

19. The communication device according to claim 17 or 18, characterized in that, The second data link interface serves as a Precision Time Protocol (PTP) interface of the synchronization link.

20. The communication device according to any one of claims 17-19, characterized in that, The first device is a remote radio unit (RRU) and / or an active antenna processing unit (AAU), and the second device is a baseband unit (BBU); Alternatively, the first device is an eCPRI radio unit (eRE), and the second device is an eCPRI radio control unit (eREC); Alternatively, the first device is an open radio unit (O-RU), and the second device is an open distributed unit (O-DU).

21. A communication device, characterized in that, The communication device is applied to a second device, the second device is connected to a first device, the first device is configured to transmit radio frequency signals, and the communication device includes: A transceiver module, configured to send a first instruction to a first data link interface of the first device, where the first instruction is used to instruct the first device to obtain a clock signal from a clock synchronization device through a second data link interface for clock synchronization. The first device includes the first data link interface and the second data link interface, the first data link interface is an enhanced common public radio interface (eCPRI), and the second data link interface is an eCPRI.

22. The communication device according to claim 21, wherein The transceiver module is further configured to send a second instruction to the first data link interface of the first device, where the second instruction is used to instruct the first device to manage the synchronization link between the first data link interface and the second device.

23. A communication device, characterized in that, The communication device is applied to a clock signal relay device, and the communication device includes: A transceiver module, configured to receive a third instruction sent by the second device through a second interface group connected to the second device, where the third instruction is used to instruct a first device to perform clock synchronization, and the first device is configured to transmit radio frequency signals; The transceiver module is further configured to receive a clock signal sent by the clock synchronization device through a third interface connected to the clock synchronization device; The transceiver module is further configured to forward the clock signal to the first device through a first interface group connected to the first device.

24. The communication device according to claim 23, wherein The transceiver module is further configured to receive a fourth instruction sent by the second device through the second interface group connected to the second device, where the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the clock synchronization device; The processing module is configured to manage the synchronization link between the third interface and the clock synchronization device according to the fourth instruction.

25. The communication device according to claim 23 or 24, characterized in that, The interfaces included in the first interface group are enhanced common public radio interfaces eCPRI.

26. A communication device, characterized in that, The communication device is applied to a second device, the second device is connected to a first device through a clock signal relay device, the first device is configured to transmit radio frequency signals, and the communication device includes: The transceiver module is configured to send a third instruction to the clock signal relay device, where the third instruction is used to instruct the first device to perform clock synchronization according to the clock signal relayed by the clock signal relay device.

27. The communication device according to claim 26, wherein, The third instruction is further used to instruct the clock signal relay device to obtain the clock signal sent by the clock synchronization device from the third interface.

28. The communication device according to claim 26 or 27, wherein The transceiver module is further configured to send a fourth instruction to the clock signal relay device, where the fourth instruction is used to instruct the clock signal relay device to manage the synchronization link between the third interface and the clock synchronization device.

29. A communication device, characterized in that, including a communication interface and a processor: The communication interface is configured to input and / or output signaling or data; The processor is configured to execute a computer-executable program, so that the method according to any one of claims 1-4 is executed, so that the method according to any one of claims 5-6 is executed, so that the method according to any one of claims 11-13 is executed, or so that the method according to any one of claims 14-16 is executed.

30. A communication device, characterized in that, including a processor and a memory, The memory is configured to store a computer program or instruction; The processor is configured to execute the computer program or instruction in the memory, so that the method according to any one of claims 1-4 is executed, so that the method according to any one of claims 5-6 is executed, so that the method according to any one of claims 11-13 is executed, or so that the method according to any one of claims 14-16 is executed.

31. A computer-readable storage medium, comprising instructions, characterized in that, When the instruction is executed by the processor, the method according to any one of claims 1-4, claims 5-6, claims 11-13, or claims 14-16 is implemented.

32. A chip system, characterized in that, The chip system includes at least one processor, and when the program instruction is executed in the at least one processor, the method according to any one of claims 1-4, claims 5-6, claims 11-13, or claims 14-16 is implemented.

33. A communication system, characterized in that, including a communication device for executing the method according to any one of claims 1-4, and / or a communication device for executing the method according to any one of claims 5-6.

34. A communication system, characterized in that, including a communication device for executing the method according to any one of claims 11-13, and / or a communication device for executing the method according to any one of claims 14-16.