Semiconductor structure
By adopting a light emitting stack design in the semiconductor structure, the problem of circuit congestion and difficulty in improving resolution in traditional light emitting diode display panels is solved, and higher resolution and process simplification is achieved.
Patent Information
- Application Number
- CN202311796723.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-25
- Publication Date
- 2025-07-01
AI Technical Summary
In traditional light emitting diode display panels, light emitting diodes of multiple colors are arranged on the same plane, resulting in congestion of circuits, difficulty in manufacturing, and difficulty in improving resolution.
The semiconductor structure design is adopted, including a substrate, a first type semiconductor layer, a light emitting stack and a second type semiconductor layer. The light-emitting stack emits different color light by stacking multiple light-emitting layers, and the wavelengths of different color lights are in the range of 200 nm to 2000 nm.
This design enables improved resolution or saves manufacturing processes, achieving higher resolution and process simplification by occupying a smaller area and saving the number of electrode sets.
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Figure CN120239376A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor structure. Background Art
[0002] In a conventional light-emitting diode display panel, light-emitting diodes of multiple colors are disposed on the same plane covered with circuits (including driving elements and wires) to achieve full-color display. However, as the resolution increases, the light-emitting diodes of multiple colors get closer and closer to each other, making the circuits too crowded and causing difficulties in manufacturing. In addition, disposing the light-emitting diodes of multiple colors on the same plane occupies a large area, making it difficult to improve the resolution. Summary of the Invention
[0003] The present invention provides a semiconductor structure, which helps to improve the resolution or save the manufacturing process.
[0004] According to an embodiment of the present invention, the semiconductor structure includes a substrate, a first-type semiconductor layer, a light-emitting stack, and a second-type semiconductor layer. The first-type semiconductor layer is disposed on the substrate. The light-emitting stack includes a plurality of light-emitting layers stacked on the first-type semiconductor layer. The plurality of light-emitting layers are respectively configured to emit different-color lights, and the wavelengths of the different-color lights fall within the range of 200 nm to 2000 nm. The second-type semiconductor layer is disposed on the light-emitting stack.
[0005] To make the above features and advantages of the present invention more obvious and understandable, specific embodiments are hereinafter given and described in detail in conjunction with the accompanying drawings as follows. Brief Description of the Drawings
[0006] The accompanying drawings are included to provide a further understanding of the present invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and, together with the description, are used to explain the principles of the present invention.
[0007] Figure 1 is a partial cross-sectional schematic view of a semiconductor structure according to a first embodiment of the present disclosure;
[0008] Figure 2 is a partial cross-sectional schematic view of a semiconductor structure according to a second embodiment of the present disclosure;
[0009] Figure 3 is a partial top-view schematic view of a semiconductor structure according to a third embodiment of the present disclosure;
[0010] Figure 4 corresponds to Figure 3 a cross-sectional schematic view along the section line I-I' in
[0011] Figure 5 is a partial cross-sectional schematic view of a semiconductor structure according to a fourth embodiment of the present disclosure;
[0012] Figure 5 ’ is a partial cross-sectional view of another semiconductor structure according to the fourth embodiment of the present disclosure;
[0013] Figure 6 is a partial top view of a semiconductor structure according to the fifth embodiment of the present disclosure;
[0014] Figure 7 corresponds to Figure 6 the cross-sectional view along the section line II-II’ in
[0015] Figure 8 is a partial cross-sectional view of a semiconductor structure according to the sixth embodiment of the present disclosure;
[0016] Figure 9 is a partial top view of a semiconductor structure according to the seventh embodiment of the present disclosure;
[0017] Figure 10 and Figure 11 are respectively two cross-sectional views corresponding to Figure 9 the section line III-III’ in
[0018] Explanation of the reference numerals in the drawings
[0019] 1, 1A, 1B, 1C, 1C’, 1D, 1E, 1F: semiconductor structures;
[0020] 10: substrate;
[0021] 11: first-type semiconductor layer;
[0022] 12, 12E: light-emitting stacks;
[0023] 13: second-type semiconductor layer;
[0024] 14: reflective layer;
[0025] 15: buffer layer;
[0026] 16: first insulator;
[0027] 17, 17C: current diffusion layers;
[0028] 18, 18A, 18B, 18C: second insulators;
[0029] 120, 121, 122, 123: light-emitting layers;
[0030] C: current;
[0031] DL: dielectric film;
[0032] LS: light-shielding layer;
[0033] R1: Light-emitting region;
[0034] R2: Peripheral region;
[0035] R11, R12: Sub-regions;
[0036] T12, T13, T18: Thicknesses;
[0037] WR1X, WR11X, WR12X, WR1Y, WR11Y, WR12Y: Widths;
[0038] X, Y, Z: Directions;
[0039] I-I’, II-II’, III-III’: Section lines. Detailed implementation manners
[0040] The directional terms mentioned in this article, such as "up", "down", "front", "back", "left", "right", etc., are only references to the directions in the accompanying drawings. Therefore, the directional terms used are for illustration purposes and not for limiting the present invention.
[0041] In the accompanying drawings, each drawing shows the general characteristics of the methods, structures, and / or materials used in specific embodiments. However, these drawings should not be construed as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative sizes, thicknesses, and positions of each film layer, region, or structure may be reduced or enlarged.
[0042] In the following embodiments, the same or similar elements will be denoted by the same or similar reference numerals, and their descriptions will be omitted. In addition, the features in different embodiments can be combined with each other without conflict, and simple equivalent changes and modifications made according to this specification or the claims still fall within the scope covered by the present invention.
[0043] The terms "first", "second", etc. mentioned in this specification or the claims are only used to name different elements or distinguish different embodiments or scopes, and are not used to limit the upper or lower limits of the number of elements, nor to define the manufacturing order or setting order of the elements. In addition, an element / film layer being disposed on another element / film layer (or above) can cover the case where the element / film layer is directly disposed on the other element / film layer (or above) and the two element / film layers are in direct contact; and the case where the element / film layer is indirectly disposed on the other element / film layer (or above) and there is one or more element / film layers between the two element / film layers.
[0044] Figure 1 is a partial cross-sectional schematic view of a semiconductor structure according to the first embodiment of the present disclosure. Please refer to Figure 1, the semiconductor structure 1 may include a substrate 10, a first-type semiconductor layer 11, a light-emitting stack 12, and a second-type semiconductor layer 13. The first-type semiconductor layer 11 is disposed on the substrate 10. The light-emitting stack 12 includes a plurality of light-emitting layers (such as light-emitting layer 120, light-emitting layer 121, light-emitting layer 122, and light-emitting layer 123) stacked on the first-type semiconductor layer 11. The plurality of light-emitting layers are respectively configured to emit different color lights, and the wavelengths of the different color lights fall within the range of 200 nm to 2000 nm. The second-type semiconductor layer 13 is disposed on the light-emitting stack 12.
[0045] Specifically, the substrate 10 is used to carry the first-type semiconductor layer 11, the light-emitting stack 12, and the second-type semiconductor layer 13. For example, the material of the substrate 10 may include sapphire (Al2O3), silicon (Si), gallium nitride (GaN), aluminum nitride (AlN), silicon carbide (SiC), gallium arsenide (GaAs), indium phosphide (InP), boron nitride (BN), graphene, two-dimensional materials, or other suitable materials, which are not limited herein.
[0046] The first-type semiconductor layer 11, the light-emitting stack 12, and the second-type semiconductor layer 13 are sequentially stacked on the substrate 10 along the direction Z. Among them, one of the first-type semiconductor layer 11 and the second-type semiconductor layer 13 is an N-type semiconductor layer, and the other of the first-type semiconductor layer 11 and the second-type semiconductor layer 13 is a P-type semiconductor layer. For example, the first-type semiconductor layer 11 is an N-type semiconductor layer, and the second-type semiconductor layer 13 is a P-type semiconductor layer; or, the first-type semiconductor layer 11 is a P-type semiconductor layer, and the second-type semiconductor layer 13 is an N-type semiconductor layer. The materials of the first-type semiconductor layer 11 and the second-type semiconductor layer 13 can be any suitable materials, which are not limited herein. For example, the materials of the first-type semiconductor layer 11 and the second-type semiconductor layer 13 may include Al x In y Ga z N x’ As y’ P z’ , where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ x' ≦ 1, 0 ≦ y' ≦ 1, 0 ≦ z' ≦ 1, and x + y + z = 1, x' + y' + z' = 1, but not limited thereto.
[0047] The light-emitting stack 12 is disposed between the first-type semiconductor layer 11 and the second-type semiconductor layer 13, and the plurality of light-emitting layers in the light-emitting stack 12 are arranged along the direction Z. In other words, the plurality of light-emitting layers in the light-emitting stack 12 are overlapped with each other in the direction Z.
[0048] Figure 1Schematically shows that the light-emitting stack 12 includes four light-emitting layers, such as light-emitting layer 120, light-emitting layer 121, light-emitting layer 122, and light-emitting layer 123. However, it should be understood that the number of light-emitting layers in the light-emitting stack 12 can be changed according to actual needs and is not limited thereto. For example, the number of light-emitting layers in the light-emitting stack 12 can be more or less, such as more than two layers (i.e., ≧2), more than three layers, or more layers. When the number of light-emitting layers in the light-emitting stack 12 is greater than or equal to three, for example, when the light-emitting stack 12 includes a visible light red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer, the semiconductor structure 1 can output multiple color lights (such as red light, green light, and blue light), and can be used as a full-color light-emitting device, such as a light-emitting diode, but is not limited thereto. The shape and size of the full-color light-emitting device can be unrestricted. For example, the shape of the full-color light-emitting device can be granular, strip-shaped, plate-shaped, or film-shaped, etc., and the size of the full-color light-emitting device can be in the micron level, millimeter level, or sub-millimeter level, etc., but is not limited thereto. In addition, the application of the full-color light-emitting device can also be unrestricted. For example, the full-color light-emitting devices can be arranged in an array for use in a light source module or a display device (such as a pixel array), but is not limited thereto.
[0049] In Figure 1 the light-emitting layer 120, light-emitting layer 121, light-emitting layer 122, and light-emitting layer 123 are respectively, for example, an ultraviolet light-emitting layer, a blue light-emitting layer, a green light-emitting layer, and a red light-emitting layer. However, it should be understood that the color types and / or stacking orders of the multiple light-emitting layers in the light-emitting stack 12 can be changed according to actual needs and are not limited thereto.
[0050] The materials of the multiple light-emitting layers in the light-emitting stack 12 can include group III-V materials, and any one of the multiple light-emitting layers can be a multiple quantum well (MQW) layer. For example, the red light-emitting layer, green light-emitting layer, blue light-emitting layer, and ultraviolet light-emitting layer can all be multiple quantum well layers, and any one of the red light-emitting layer, green light-emitting layer, and blue light-emitting layer can be an alternating stacked layer of multiple layers of indium gallium aluminum nitride (In x Ga y Al z N) layers and multiple layers of indium gallium aluminum nitride (In x’ Ga y’ Al z’ N) layers, and the ultraviolet light-emitting layer can be an alternating stacked layer of multiple layers of indium gallium aluminum nitride (In x Ga y Al z N) layers and multiple layers of indium gallium aluminum nitride (In x’ Ga y’ Al z’alternately stacked layers of (N), but not limited thereto. In the red light-emitting layer, 0.3 ≦ x ≦ 0.6, and x + y + z = 1; in the green light-emitting layer, 0.2 ≦ x ≦ 0.35, and x + y + z = 1; in the blue light-emitting layer, 0.15 ≦ x ≦ 0.3, and x + y + z = 1; in the ultraviolet light-emitting layer, 0.01 ≦ x ≦ 0.15, and x + y + z = 1; in the barrier layer, x' + y' + z' = 1. However, the present disclosure is not limited thereto.
[0051] According to different requirements, the semiconductor structure 1 may further include other components or film layers. For Figure 1 example, the semiconductor structure 1 may further include a reflective layer 14 to improve the light-emitting efficiency or achieve light emission from one side (such as Figure 1 the upper side of the semiconductor structure 1 in the figure), but not limited thereto. The reflective layer 14 is disposed between the substrate 10 and the first-type semiconductor layer 11. For example, the reflective layer 14 may be a Distributed Bragg Reflector (DBR), but not limited thereto. The Distributed Bragg Reflector is, for example, an alternately stacked layer of multiple layers of aluminum nitride (AlN) and multiple layers of gallium nitride (GaN). In some other embodiments, the reflective layer 14 may be a stress control layer, and the reflective layer 14 may be an alternately stacked layer of multiple layers of porous aluminum indium gallium nitride (Al u Ga v In w N) and multiple layers of aluminum indium gallium nitride (Al u Ga v In w N). In still some other embodiments, the reflective layer 14 may be a sacrificial layer, and the reflective layer 14 may be an etch-strippable sacrificial layer of multiple layers of porous aluminum indium gallium nitride (Al u Ga v In w N). In yet some other embodiments, the reflective layer 14 may be a structure weakening layer, and the reflective layer 14 may be a structure weakening structure including multiple layers of porous aluminum indium gallium nitride (Al u Ga v In w N). In the above-mentioned aluminum indium gallium nitride (Al u Ga v In w N) layer, u + v + w = 1, but not limited thereto. In other embodiments not shown, the reflective layer 14 may be omitted.
[0052] In some embodiments, the semiconductor structure 1 may further include a buffer layer 15 to improve the lattice constant mismatch problem. The buffer layer 15 is disposed between the substrate 10 and the first-type semiconductor layer 11. In the architecture where the semiconductor structure 1 includes a reflective layer 14, the buffer layer 15 is, for example, disposed between the substrate 10 and the reflective layer 14. For example, the material of the buffer layer 15 may include an undoped gallium nitride layer, or the material of the buffer layer 15 may include a multi-layer thin film structure with different elemental compositions of a gallium indium aluminum nitride layer (AlInGaN) doped with a high concentration of silicon, but not limited thereto. In other embodiments, the buffer layer 15 may be omitted.
[0053] In some embodiments, the semiconductor structure 1 may further include a dielectric film DL. The dielectric film DL may be a single-layer film or a multi-layer film, and the material of the dielectric film DL may include SiO2, TiO2, Si3N4, Ta2O5, etc., but not limited thereto. The dielectric film DL may serve as a coating layer or a mirror structure, such as a distributed Bragg reflector (DBR) formed by alternately stacking multiple layers of TiO2 and multiple layers of SiO2.
[0054] In some embodiments, although not shown, the semiconductor structure 1 may further include a plurality of electrodes, such as a cathode and an anode, where the cathode is electrically connected to the N-type semiconductor layer (e.g., the first-type semiconductor layer 11), and the anode is electrically connected to the P-type semiconductor layer (e.g., the second-type semiconductor layer 13). The cathode and the anode are made of a conductive material. The conductive material may include a transparent conductive material (such as metal oxides, graphene, two-dimensional materials, etc.) or a non-transparent conductive material (such as metals or alloys, etc.). The top-view shapes of the cathode and the anode are not limited. For example, the top-view shapes of the cathode and the anode may each be block-shaped, strip-shaped, sheet-shaped, frame-shaped, ring-shaped, or irregular-shaped. In addition, the cathode and the anode may have the same or different top-view shapes.
[0055] By controlling the voltage difference between the cathode and the anode, the color of the light output from the semiconductor structure 1 can be controlled. For example, when the voltage difference between the cathode and the anode is greater than a first value, the semiconductor structure 1 outputs a first color light; when the voltage difference between the cathode and the anode is greater than a second value, the semiconductor structure 1 outputs a second color light; when the voltage difference between the cathode and the anode is greater than a third value, the semiconductor structure 1 outputs a third color light; and when the voltage difference between the cathode and the anode is greater than a fourth value, the semiconductor structure 1 outputs a fourth color light, where the first value to the fourth value are different, and the wavelengths / colors of the first color light to the fourth color light are different. For example, the first value to the fourth value are between 0 volts (V) and 20 volts, and the first color light to the fourth color light are, for example, red light, green light, blue light, and UV light, and a DC voltage, a pulsed voltage, an AC voltage, a pulsed current, etc. can be used, but not limited thereto.
[0056] Each of the first value to the fourth value may vary depending on factors such as the selected materials and process parameters. For example, in an embodiment where an indium phosphide-based material is used in the light-emitting layer, the first value is, for example, 1.5 volts; in an embodiment where a gallium arsenide-based material is used in the light-emitting layer, the first value is, for example, 2 volts; in an embodiment where a gallium nitride-based material is used in the light-emitting layer, the first value is, for example, 3 volts. It should be understood that the above first value is only an example and is not intended to limit the present invention.
[0057] In some embodiments, as the voltage difference between the cathode and the anode increases, the light output by the semiconductor structure 1 can change from red light to green light, from green light to blue light, and from blue light to UV light. In some embodiments, the ultraviolet light-emitting layer can be used as a stress release layer or as a color conversion light source for a photoresist phosphor and a quantum dot material, and the ultraviolet light-emitting layer can be made not to emit light by controlling the voltage difference.
[0058] Compared with arranging multiple light-emitting layers on the same plane (for example, the XY plane formed by the directions X and Y) and arranging multiple electrode groups corresponding to the multiple light-emitting layers (each electrode group includes a cathode and an anode), the design of using the light-emitting stack 12 in this embodiment can occupy a smaller area and can save the number of electrode groups used, thus helping to improve the resolution, helping to miniaturize, or helping to simplify the process.
[0059] Figure 2 is a partial cross-sectional schematic view of a semiconductor structure according to a second embodiment of the present disclosure. Please refer to Figure 2 , the main differences between the semiconductor structure 1A and Figure 1 the semiconductor structure 1 are described later. The semiconductor structure 1A has a light-emitting area R1 and a peripheral area R2 surrounding the light-emitting area R1, and the semiconductor structure 1A further includes a first insulator 16. The first insulator 16 is disposed in the peripheral area R2, wherein the first insulator 16 extends from the second-type semiconductor layer 13 into the first-type semiconductor layer 11, and the first insulator 16 can absorb different color lights emitted by the multiple light-emitting layers.
[0060] In the architecture of a single micro light-emitting diode, the first insulator 16 can be used to absorb large-angle light or improve side leakage light, thus helping to control the light-emitting angle of the semiconductor structure 1A, and realizing single-sided light emission, reducing the light divergence angle, and improving the light-emitting efficiency in cooperation with the reflective layer 14.
[0061] Under the architecture of a micro light-emitting diode array, for example, when the semiconductor structure 1A includes a plurality of light-emitting regions R1, and the plurality of light-emitting regions R1 are arranged in an array along the direction X and the direction Y, the plurality of light-emitting regions R1 can be separated by the first insulator 16. Therefore, the second-type semiconductor layer 13 in each light-emitting region R1 can maintain an independent electrical property. At the same time, the first insulator 16 can be used to absorb the side leakage light, improving the problems of light mixing and optical crosstalk caused by the side leakage light.
[0062] In some embodiments, the first insulator 16 can be formed by ion implantation, ion bombardment, oxidation, or diffusion. The ion implantation can use As, P, Mg, BF2, or other ion sources with an atomic weight / molecular weight greater than or equal to 30 a.m.u., but is not limited thereto. In other embodiments, the first insulator 16 can be formed by a patterning process to form a platform portion, and then a light-shielding material (such as a black matrix or other light-absorbing materials) can be filled in the voids beside the platform portion (i.e., the portions removed by the patterning process) to form it.
[0063] The first insulator 16 is formed by ion implantation or ion bombardment of the second-type semiconductor layer 13, the light-emitting stack 12, and the partial first-type semiconductor layer 11 in the peripheral region R2. The surface resistance of the first insulator 16 in the peripheral region R2 is, for example, more than 2 times, such as more than 10 times, the surface resistance of any one of the first-type semiconductor layer 11, the light-emitting stack 12, and the second-type semiconductor layer 13 in the light-emitting region R1. In addition, by forming the first insulator 16 in the above manner, in addition to saving space and contributing to miniaturization, the patterning process can be omitted, which helps to simplify the process and maintain the surface flatness.
[0064] In some embodiments, the semiconductor structure 1A may further include a current diffusion layer 17. The current diffusion layer 17 is disposed on the second-type semiconductor layer 13 and can electrically connect the anode (not shown) to the second-type semiconductor layer 13. The current diffusion layer 17 can be a light-transmissive conductive layer to reduce the shielding of the light from the light-emitting stack 12. For example, the material of the current diffusion layer 17 can include metal oxides, graphene, other suitable transparent conductive materials, or a combination of the above. The metal oxides can include indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium germanium zinc oxide, or other metal oxides.
[0065] In some embodiments, the current diffusion layer 17 can be further disposed on the first insulator 16. Optionally, the sidewall of the current diffusion layer 17 can be flush with the sidewall of the first insulator 16, but is not limited thereto. For example, under the architecture of a micro light-emitting diode array, although not shown in Figure 2, the current diffusion layer 17 may not be disposed on the first insulator 16 (see Figure 7 ) or may be disposed on only a part of the first insulator 16 to maintain the independent electrical property of the second-type semiconductor layer 13.
[0066] Although Figure 2 the first insulator 16 and the current diffusion layer 17 are disposed under the architecture of the four-layer light-emitting layer, it should be understood that the number of light-emitting layers may be increased or decreased according to actual requirements, and the following embodiments may also be changed according to this description and will not be repeated hereinafter.
[0067] Figure 3 is a partial top view schematic diagram of a semiconductor structure according to the third embodiment of the present disclosure. Figure 4 is corresponding to Figure 3 the cross-sectional schematic diagram of the section line I-I' in Figure 3 and Figure 4 , the main differences between the semiconductor structure 1B and the Figure 2 semiconductor structure 1A are described hereinafter. The semiconductor structure 1B further includes a second insulator 18. The second insulator 18 is disposed in the light-emitting region R1, wherein the second insulator 18 extends from the second-type semiconductor layer 13 into the light-emitting stack 11, and the second insulator 18 can allow different color lights respectively emitted by a plurality of light-emitting layers (including the light-emitting layer 120 to the light-emitting layer 123) to pass through. In other words, the second insulator 18 is light-transmissive.
[0068] In some embodiments, the second insulator 18 may be formed by ion implantation, ion bombardment or oxidation. Ion implantation may use H, He, B, C, N, O or other ion sources with an atomic weight / molecular weight less than or equal to 30 a.m.u., but not limited thereto. The shape of the second insulator 18 may be changed according to the device size, and the second insulator 18 may be entirely or partially transparent and insulating.
[0069] The second insulator 18 is formed by ion implanting or ion bombarding at least one of the light-emitting layers in the local second-type semiconductor layer 13 (such as the second-type semiconductor layer 13 in the sub-region R11) and the light-emitting stack 12 thereunder in the light-emitting region R1. The surface resistance of the second insulator 18 is, for example, more than 1.5 times, such as more than 2 times, the surface resistance of any one of the light-emitting stack 12 and the second-type semiconductor layer 13 in the light-emitting region R1.
[0070] In addition, the thickness T18 of the second insulator 18 is less than the sum of the thicknesses of the second-type semiconductor layer 13 and the light-emitting stack 12 (i.e., the thickness T13 plus the thickness T12), that is, T18 < (T13 + T12). In Figure 4Among them, the thickness T18 of the second insulator 18 is equal to the sum of the thicknesses of the second-type semiconductor layer 13, the light-emitting layer 123, the light-emitting layer 122, and the light-emitting layer 121, but the present disclosure is not limited thereto. In other embodiments, although not shown, the thickness T18 of the second insulator 18 may be equal to the sum of the thicknesses of the second-type semiconductor layer 13, the light-emitting layer 123, and the light-emitting layer 122, or may be equal to the sum of the thicknesses of the second-type semiconductor layer 13 and the light-emitting layer 123.
[0071] In the light-emitting region R1, the second insulator 18 is, for example, located at the center of the light-emitting region R1 and overlaps with the sub-region R11 of the light-emitting region R1, and the second insulator 18 exposes the sub-region R12 of the light-emitting region R1. In other words, the second insulator 18 does not overlap with the sub-region R12. Since the resistance value of the region where the second insulator 18 is located is higher than that of the region outside the second insulator 18, the current C is injected from the periphery (sub-region R12) of the light-emitting region R1 and laterally flows into the light-emitting layer (such as the light-emitting layer 120) under the second insulator 18. Take Figure 4 as an example. As the voltage difference increases, multiple light-emitting layers (such as the light-emitting layer 123, the light-emitting layer 122, the light-emitting layer 121, and the light-emitting layer 120) in the sub-region R12 can sequentially emit red light, green light, blue light, and UV light, while the light-emitting layer 120 in the sub-region R11 can emit UV light.
[0072] Since the region replaced by the second insulator 18 in the light-emitting stack does not emit light, the light intensity of each color light can be adjusted by designing the thickness and / or area of the second insulator 18. For example, the light intensity of each color light can be made close to the same or the light intensity of some color lights can be made much lower than that of other color lights. In addition, by providing the second insulator 18 in the light-emitting region R1 (i.e., reducing the area of the current channel), the current density of the sub-region R12 can be increased, which helps to reduce the voltage difference for the light-emitting layer to emit light. In some embodiments, the second insulator 18 can be a patterned array, and the current C is injected into the current diffusion layer 17 to light up the underlying light-emitting layer.
[0073] In some embodiments, as Figure 3 shown, the shapes of the semiconductor structure 1B and the sub-region R11 can be quadrilateral, but not limited thereto. In other embodiments, the shapes of the semiconductor structure 1B and the sub-region R11 can be circular, triangular, or other polygons, and the shapes of the semiconductor structure 1B and the sub-region R11 can be the same or different.
[0074] In addition, the width WR11X of the sub-region R11 in the X direction can be greater than 0 and less than the width WR1X of the light-emitting region R1 in the X direction, and the width WR11Y of the sub-region R11 in the Y direction can be greater than 0 and less than the width WR1Y of the light-emitting region R1 in the Y direction. The width WR11X can be the same as or different from the width WR11Y, and the width WR1X can be the same as or different from the width WR1Y. Similarly, the width WR12X of the sub-region R12 in the X direction can be greater than 0 and less than the width WR1X of the light-emitting region R1 in the X direction, and the width WR12Y of the sub-region R12 in the Y direction can be greater than 0 and less than the width WR1Y of the light-emitting region R1 in the Y direction. The width WR12X can be the same as or different from the width WR12Y. In some embodiments, the ratio of the width WR11X to the width WR12X can be 1:2, and the ratio of the width WR11Y to the width WR12Y can be 1:2, so that the light intensities of the respective color lights are close to being consistent, but the present disclosure is not limited thereto.
[0075] Figure 5 is a partial cross-sectional schematic view of a semiconductor structure according to a fourth embodiment of the present disclosure. Please refer to Figure 5 , the main differences between the semiconductor structure 1C and Figure 4 the semiconductor structure 1B will be described later. In the semiconductor structure 1C, the thickness T18 of the second insulator 18 is equal to the sum of the thicknesses of the second-type semiconductor layer 13 and the light-emitting layer 123. Therefore, as the voltage difference increases, multiple light-emitting layers (such as the light-emitting layer 122, the light-emitting layer 121, and the light-emitting layer 120) in the sub-region R11 can sequentially emit green light, blue light, and UV light. In addition, the current diffusion layer 17C is, for example, a light-shielding conductive layer (such as a metal layer), and the current diffusion layer 17C exposes the second insulator 18 to reduce the shielding of the light emitted by the light-emitting layer.
[0076] By disposing the current diffusion layer 17C having a light-shielding property on the second-type semiconductor layer 13, that is, the current diffusion layer 17C overlaps the sub-region R12, the light emitted from the sub-region R12 can be shielded. Therefore, it helps to control the wavelength band of the light output from the semiconductor structure 1C or change the light shape, including the near-field, mid-field, and far-field light shapes. This design can be used in combination with an optical lens group.
[0077] Figure 5 ’ is a partial cross-sectional schematic view of another semiconductor structure according to a fourth embodiment of the present disclosure. Please refer to Figure 5 ’, the main differences between the semiconductor structure 1C’ and Figure 4 the semiconductor structure 1B will be described later. The semiconductor structure 1C’ further includes a light-shielding layer LS, where the light-shielding layer LS is disposed on a part of the current diffusion layer 17 and exposes the second insulator 18. The light-shielding layer LS can be formed of a black photoresist material, a metal, or other light-shielding materials.
[0078] By disposing the light-shielding layer LS on the second-type semiconductor layer 13, that is, the light-shielding layer LS overlaps the sub-region R12, the light emitted from the sub-region R12 can be blocked, thus contributing to controlling the wavelength band of the light output from the semiconductor structure 1C' or changing the light shape, including near-field, mid-field, and far-field light shapes. This design can also be used in combination with an optical lens group.
[0079] Figure 6 It is a partial top view schematic diagram of a semiconductor structure according to the fifth embodiment of the present disclosure.
[0080] Figure 7 corresponds to Figure 6 the cross-sectional schematic diagram of the middle section line II-II'. Please refer to Figure 6 and Figure 7 , the main differences between the semiconductor structure 1D and Figure 3 and Figure 4 the semiconductor structure 1B of are described later. The semiconductor structure 1D has a plurality of light-emitting regions R1, and a second insulator 18 is disposed in at least one of the plurality of light-emitting regions R1.
[0081] Taking Figure 6 and Figure 7 as an example, the plurality of light-emitting regions R1 are arranged along the direction X, for example, but the present disclosure is not limited thereto. In other embodiments not shown, the plurality of light-emitting regions R1 may be arranged along the direction Y, or the plurality of light-emitting regions R1 may be arranged in an array along the direction X and the direction Y.
[0082] The semiconductor structure 1D may include a plurality of second insulators 18. Figure 6 and Figure 7 schematically shows three second insulators 18, such as the second insulator 18A, the second insulator 18B, and the second insulator 18C. The second insulator 18A, the second insulator 18B, and the second insulator 18C are respectively located in three sub-regions R11 of the three light-emitting regions R1, and the second insulator 18A, the second insulator 18B, and the second insulator 18C have different thicknesses, but the present disclosure is not limited thereto. For example, in other embodiments not shown, one or more second insulators 18 may be disposed in each light-emitting region R1, and the thicknesses of the plurality of second insulators 18 in the plurality of light-emitting regions R1 may be the same or different.
[0083] Figure 8 It is a partial cross-sectional schematic diagram of a semiconductor structure according to the sixth embodiment of the present disclosure. Please refer to Figure 8 , the semiconductor structure 1E and Figure 7The main differences of the 1D semiconductor structure are described below. The semiconductor structure 1E further includes a light-shielding layer LS disposed on a part of the current diffusion layer 17. The light-shielding layer LS can be formed of a black photoresist material, a metal, or other light-shielding materials. In addition, the light-emitting stack 12E includes a light-emitting layer 121, a light-emitting layer 122, and a light-emitting layer 123, and does not include the light-emitting layer 120. In this architecture, as the voltage difference increases, multiple light-emitting layers (such as the light-emitting layer 123, the light-emitting layer 122, and the light-emitting layer 121) in the left light-emitting region R1 can sequentially emit red light, green light, and blue light, while the light-emitting layer 121 in the sub-region R11 can emit blue light.
[0084] Figure 9 is a partial top-down schematic view of a semiconductor structure according to the seventh embodiment of the present disclosure. Figure 10 and Figure 11 are respectively corresponding Figure 9 two cross-sectional schematic views of the cross-section line III-III' in. Please refer to Figures 9 to 11 , the semiconductor structure 1F and Figure 6 and Figure 7 The main differences of the semiconductor structure 1D are described below. In the semiconductor structure 1F, the light-emitting region R1 includes four sub-regions R11 and a sub-region R12 surrounding the four sub-regions R11. The semiconductor structure 1F includes a plurality of second insulators 18 (schematically showing four), and the light-emitting region R1 is provided with a plurality of second insulators 18. In some embodiments, as Figure 9 shown, the plurality of second insulators 18 can have the same thickness. In other embodiments, as Figure 10 shown, the plurality of second insulators 18 can have different thicknesses.
[0085] Although Figures 9 to 11 only schematically shows one light-emitting region R1, the semiconductor structure 1F can also include a plurality of light-emitting regions R1, and the plurality of light-emitting regions R1 can have the same or different designs. In addition, each of the plurality of light-emitting regions R1 can be provided with one or more second insulators 18 or not provided with any second insulators 18, and when the light-emitting region R1 is provided with a plurality of second insulators 18, the plurality of second insulators 18 can have the same or different thicknesses.
[0086] It should be noted that the above-mentioned embodiments can, without departing from the spirit of the present disclosure, replace, recombine, and mix the features in several different embodiments to complete other embodiments. As long as the features between the embodiments do not violate the spirit of the invention or conflict with each other, they can be arbitrarily mixed and used.
[0087] In summary, in the embodiments of the present invention, the semiconductor structure adopting the design of the light-emitting stack can occupy a smaller area and can save the number of electrode groups used, thus helping to improve the resolution, helping to miniaturize, or helping to simplify the process.
[0088] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A semiconductor structure, characterized in that, Comprising: A substrate; A first-type semiconductor layer disposed on the substrate; A light-emitting stack including a plurality of light-emitting layers stacked on the first-type semiconductor layer, the plurality of light-emitting layers being respectively configured to emit different-color light, and the wavelengths of the different-color light falling within the range of 200 nm to 2000 nm; And A second-type semiconductor layer disposed on the light-emitting stack.
2. The semiconductor structure according to claim 1, wherein The number of the plurality of light-emitting layers is greater than or equal to three.
3. The semiconductor structure according to claim 1, wherein The semiconductor structure has a light-emitting region and a peripheral region surrounding the light-emitting region, and the semiconductor structure further includes: A first insulator disposed in the peripheral region, wherein the first insulator extends from the second-type semiconductor layer into the first-type semiconductor layer, and the first insulator is capable of absorbing the different-color light emitted by the plurality of light-emitting layers.
4. The semiconductor structure according to claim 3, wherein, The surface resistance of the first insulator is more than 2 times the surface resistance of any one of the first-type semiconductor layer, the light-emitting stack, and the second-type semiconductor layer.
5. The semiconductor structure according to claim 3, wherein The first insulator is formed by ion implantation, ion bombardment, oxidation, or diffusion.
6. The semiconductor structure according to claim 3, wherein Further comprising: A current diffusion layer disposed on the second-type semiconductor layer; And A second insulator disposed in the light-emitting region, wherein the second insulator extends from the second-type semiconductor layer into the light-emitting stack, and the second insulator is capable of allowing the different-color light respectively emitted by the plurality of light-emitting layers to pass through.
7. The semiconductor structure according to claim 6, wherein, The thickness of the second insulator is less than the sum of the thicknesses of the second-type semiconductor layer and the light-emitting stack.
8. The semiconductor structure according to claim 6, wherein The surface resistance of the second insulator is more than 1.5 times the surface resistance of any one of the light-emitting stack and the second-type semiconductor layer.
9. The semiconductor structure according to claim 6, wherein The second insulator is formed by ion implantation, ion bombardment, or oxidation.
10. The semiconductor structure according to claim 6, characterized in that, The current diffusion layer is a light-transmissive conductive layer, and the current diffusion layer is further disposed on the second insulator.
11. The semiconductor structure according to claim 10, wherein Further comprising: A light-shielding layer disposed on a part of the light-transmissive conductive layer and exposing the second insulator.
12. The semiconductor structure according to claim 6, wherein The current diffusion layer is a light-shielding conductive layer, and the current diffusion layer exposes the second insulator.
13. The semiconductor structure according to claim 6, wherein Further comprising: A reflective layer disposed between the substrate and the first-type semiconductor layer.
14. The semiconductor structure according to claim 6, wherein The semiconductor structure has a plurality of the light-emitting regions, and the second insulator is disposed in one of the plurality of light-emitting regions.
15. The semiconductor structure according to claim 6, wherein, The semiconductor structure includes a plurality of the second insulators, and the light-emitting region is provided with a plurality of the second insulators.
16. The semiconductor structure according to claim 15, wherein, The plurality of second insulators have different thicknesses.