Three-temperature testing method and device for semiconductor chips

Abstract

The present invention discloses a three-temperature testing method and device for a semiconductor chip, relating to the technical field of semiconductor chip testing. The method comprises the following steps: inputting an initialization parameter set into an impedance-temperature mapping model, performing phase angle analysis and multi-band feature fusion through a broadband impedance spectrum analysis method, obtaining the instantaneous value of the chip junction temperature, dynamically compensating the instantaneous value of the chip junction temperature using a PID controller, mapping the result into an execution instruction set through a fuzzy rule base inference engine, converting the execution instruction set into a bidirectional voltage signal through pulse width modulation, driving a semiconductor refrigeration plate to perform bidirectional temperature rise and fall control in a three-temperature environment, and synchronously collecting real-time temperature change test data. The present invention adopts broadband impedance spectrum analysis combined with multi-band feature fusion technology to more accurately obtain the instantaneous value of the chip junction temperature. At the same time, the combination of the PID controller and the fuzzy rule base inference engine can quickly respond to rapid temperature changes, greatly improving the response capability.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chip testing, and in particular to a three-temperature testing method and device for a semiconductor chip. Background Art

[0002] Semiconductor chips are widely used in nearly all modern electronic devices, performing a variety of functions such as computing and signal conversion. With technological advancements, chip designs are becoming increasingly complex and integrated. However, this high-density integration also brings new challenges, particularly regarding heat management. Failure to effectively dissipate heat can cause chip temperatures to rise, impacting performance. The emergence of three-temperature testing provides a comprehensive method to evaluate the thermal performance of semiconductor chips throughout their lifecycle, directly contributing to extending chip lifespan and reducing failure rates.

[0003] However, the existing technology still has some shortcomings. On the one hand, traditional chip temperature testing methods mainly rely on thermocouples, infrared temperature measurement and other means, which have limitations in high precision, real-time and multi-environment adaptability. On the other hand, the existing temperature detection scheme based on broadband impedance spectroscopy analysis still has shortcomings in dynamic response speed and adaptability to complex environments. Especially in the rapidly changing three-temperature environment, it is difficult to ensure the accuracy and stability of the measurement results. Summary of the Invention

[0004] In view of the above existing problems, the present invention is proposed.

[0005] Therefore, the present invention provides a three-temperature testing method for semiconductor chips to solve the problems of insufficient accuracy of traditional temperature measurement means and delayed response in a rapidly changing temperature environment.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] In a first aspect, the present invention provides a three-temperature test method for a semiconductor chip, comprising: inputting an initialization parameter set into an impedance-temperature mapping model, performing phase angle analysis and multi-band feature fusion through a broadband impedance spectrum analysis method, and obtaining an instantaneous value of the chip junction temperature;

[0008] The PID controller is used to dynamically compensate the instantaneous value of the chip junction temperature and is mapped into an execution instruction set through the fuzzy rule base inference engine;

[0009] The execution instruction set is converted into a bidirectional voltage signal through pulse width modulation, driving the semiconductor refrigeration chip to perform bidirectional temperature control in three temperature environments, and synchronously collect real-time temperature change test data;

[0010] The real-time temperature change test data is input into the impedance temperature mapping model, and incremental updates are performed through the recursive least squares method to obtain the optimized impedance temperature mapping model. The three-temperature test report of the chip is generated simultaneously using the three-dimensional thermal topology rendering engine.

[0011] As a preferred solution of the three-temperature testing method for semiconductor chips of the present invention, the initialization parameter set includes impedance spectrum data, chip packaging structure parameters and temperature baseline data.

[0012] As a preferred solution of the three-temperature test method for semiconductor chips of the present invention, the specific steps of obtaining the instantaneous value of the chip junction temperature are as follows:

[0013] The impedance-temperature mapping model is constructed by dynamically iterating the parameters of the impedance spectrum data layer and the temperature baseline data layer through the automatic differentiation mechanism.

[0014] The initialization parameter set is input into the impedance temperature mapping model, and the impedance spectrum data layer is decoupled by phase angle characteristics through broadband impedance spectrum analysis to obtain the phase spectrum feature matrix;

[0015] The temperature baseline data layer uses a one-dimensional convolution kernel to perform local time series extraction and nonlinear dimensionality reduction to obtain the temperature baseline vector;

[0016] The phase spectrum feature matrix and temperature baseline vector are fused into multi-band features through the convolution fusion channel to obtain the instantaneous value of the chip junction temperature.

[0017] As a preferred solution of the three-temperature test method for semiconductor chips of the present invention, wherein: the fuzzy rule base inference engine is mapped into an execution instruction set, and the specific steps are as follows:

[0018] The PID controller is used to calculate the deviation of the instantaneous value of the chip junction temperature to obtain the temperature deviation compensation amount, and the temperature deviation compensation amount is subjected to a composite operation of proportional-integral-differential to generate a dynamic compensation signal;

[0019] The dynamic compensation signal is subjected to Mamdani fuzzy reasoning through the fuzzy rule base inference engine to obtain the PID parameter correction coefficient, which is then mapped through a dynamic hash table to generate an execution instruction set.

[0020] As a preferred solution of the three-temperature test method for semiconductor chips of the present invention, wherein: the synchronous collection of real-time temperature change test data, the specific steps are as follows:

[0021] The execution instruction set is synchronized with complementary waveforms through pulse width modulation to generate two PWM waveforms, and the duty cycle is adjusted through the half-bridge drive circuit to obtain a bidirectional voltage signal;

[0022] The polarity of the bidirectional voltage signal is switched to drive the semiconductor refrigeration chip to perform thermal inertia compensation in a three-temperature environment, and an anti-integral saturation strategy is used to dynamically switch the hot and cold surfaces of the chip and control the heat flow in both directions.

[0023] The chip's thermal field is monitored simultaneously through a multi-spectral infrared thermal imager to generate real-time temperature change test data.

[0024] As a preferred solution of the three-temperature testing method for semiconductor chips of the present invention, the steps of obtaining the optimized impedance-temperature mapping model are as follows:

[0025] The real-time temperature change test data is input into the impedance temperature mapping model through the UART interface, the temperature gradient is discretized, and the temperature feature vector is obtained;

[0026] The recursive least squares method is used to perform covariance iteration on the temperature eigenvector to obtain parameter estimation results;

[0027] Adaptive weight assignment is used to incrementally update the parameter estimation results to obtain the optimized impedance-temperature mapping model.

[0028] As a preferred solution of the three-temperature test method for semiconductor chips of the present invention, wherein: the three-temperature test report of the chip is generated by synchronously using a three-dimensional thermal topology rendering engine, the specific steps are as follows:

[0029] Perform multi-dimensional feature screening and dynamic parameter fusion on the optimized impedance-temperature mapping model to generate temperature-impedance correlation parameters;

[0030] The 3D thermal topology rendering engine is used to render the heat distribution trend of temperature-impedance related parameters and mark abnormal component points to generate a chip three-temperature test report.

[0031] In a second aspect, the present invention provides a three-temperature test device for a semiconductor chip, comprising an impedance temperature measurement module, an intelligent control mapping module, a temperature control module, and a temperature control module.

[0032] The impedance temperature measurement module is used to input the initialization parameter set into the impedance temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis, and obtain the instantaneous value of the chip junction temperature;

[0033] The intelligent control mapping module is used to dynamically compensate the instantaneous value of the chip junction temperature using a PID controller and map it into an execution instruction set through a fuzzy rule base inference engine;

[0034] The temperature control module is used to convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the semiconductor refrigeration chip to perform bidirectional temperature control in a three-temperature environment, and synchronously collect real-time temperature change test data;

[0035] The model optimization module is used to input real-time temperature change test data into the impedance temperature mapping model, and perform incremental updates through recursive least squares method to obtain the optimized impedance temperature mapping model, and simultaneously use the three-dimensional thermal topology rendering engine to generate the chip three-temperature test report.

[0036] In a third aspect, the present invention provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: when the computer program is executed by the processor, any step of the three-temperature testing method for semiconductor chips as described in the first aspect of the present invention is implemented.

[0037] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein: when the computer program is executed by a processor, any step of the three-temperature testing method for semiconductor chips as described in the first aspect of the present invention is implemented.

[0038] The beneficial effects of the present invention are as follows: the use of broadband impedance spectrum analysis combined with multi-band feature fusion technology can more accurately obtain the instantaneous value of the chip junction temperature, thereby significantly improving the accuracy of temperature measurement. At the same time, dynamic compensation is performed by combining a PID controller with a fuzzy rule base inference engine, which can quickly respond to rapid temperature changes and greatly improve the response capability in a rapidly changing temperature environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0040] Figure 1 The figure is a flow chart of the three-temperature test method for semiconductor chips.

[0041] Figure 2 Schematic diagram of a three-temperature test device for semiconductor chips.

[0042] Figure 3 Flowchart for obtaining the instantaneous value of chip junction temperature.

[0043] Figure 4 Flowchart generated for dynamic compensation and execution instructions. DETAILED DESCRIPTION

[0044] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0045] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0046] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive of other embodiments.

[0047] Reference Figures 1 to 4 , is an embodiment of the present invention, which provides a three-temperature testing method for a semiconductor chip, comprising the following steps:

[0048] S1. Input the initialized parameter set into the impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis to obtain the instantaneous value of the chip junction temperature.

[0049] The specific steps include:

[0050] S1.1. Collecting an initialization parameter set, which includes impedance spectrum data, chip package structure parameters, and temperature baseline data. Acquiring impedance spectrum data requires applying a series of AC signals of varying frequencies to the chip, measuring the current and voltage of the chip under these different AC signals using a network analyzer, and performing vector decomposition of the current and voltage to generate impedance spectrum values. The impedance spectrum values are then integrated into impedance spectrum data using data processing software (e.g., LabVIEW).

[0051] The acquisition of chip package structure parameters involves the precise measurement of the chip's physical dimensions, material properties, and layout information. Chip physical dimensions are acquired using a 3D scanner; material properties are acquired using an X-ray fluorescence analyzer and an electron microscope; and layout information is acquired using computer-aided design (CAD) files. Data processing software (such as Cadence Virtuoso) organizes these information into chip package structure parameters.

[0052] To collect temperature baseline data, the chip must be monitored for extended periods of time in an unloaded state. Temperature fluctuations on the chip are captured using thermocouples and infrared thermal imagers. Dynamic baseline extraction of these fluctuations is then performed to generate temperature readings. Least squares linear fitting is used to perform long-term drift compensation and trend correction on the temperature readings to obtain temperature baseline data. This data is then cross-validated with the chip surface temperature distribution collected by the temperature sensor to ensure its accuracy and reliability.

[0053] The impedance spectrum data, chip packaging structure parameters and temperature baseline data are encapsulated through the feature fusion engine to generate an initialization parameter set.

[0054] S1.2. Preprocess the initialization parameter set. Specifically, first, use the sliding window mean filter algorithm to perform time domain smoothing and noise reduction on the initialization parameter set to eliminate high-frequency interference. At the same time, use the box plot method to identify and remove abnormal data points that exceed the abnormal range to obtain the smoothed initialization parameter set. Use Morlet wavelet transform to perform multi-band feature decomposition on the smoothed initialization parameter set to eliminate crosstalk between frequency bands, and use min-max normalization to perform normalization processing, and uniformly map the smoothed initialization parameter set to the normalized interval. At the same time, use principal component analysis to perform feature selection and dimensionality compression to reduce the data dimension and retain valid information to obtain the preprocessed initialization parameter set.

[0055] It should be noted that the abnormal range is defined based on the mean and standard deviation of the 3σ criterion;

[0056] The preprocessed initialization parameter set can not only improve the accuracy and stability of chip junction temperature measurement, but also provide reliable initial data support for subsequent aging tests, ensuring accurate capture and analysis of temperature change trends during the test process.

[0057] S1.3. Construct an impedance-temperature mapping model and train it. Specifically, in the PyTorch framework, call the dual-input network architecture through the nn.Module parameter, and separate the dual-input network architecture into an impedance spectrum data layer and a temperature baseline data layer through a parallel feature extraction channel. The impedance spectrum data layer is initialized through Conv1d, with the number of input channels set to 1 and the number of output channels set to 64. At the same time, the temperature baseline data layer is initialized through the Linear (fully connected layer), with the number of input features set to 12 and the number of output features set to 128. PyTorch's automatic differentiation mechanism performs dual-stream gradient backpropagation on the initialized impedance spectrum data layer and temperature baseline data layer to obtain the gradient tensor of the parameters of each layer. The Adam optimizer is used to update the parameters of the obtained gradient tensors of the parameters of each layer to generate the iterated model parameters, completing the construction of the impedance-temperature mapping model.

[0058] Next, the impedance-temperature mapping model is trained. Specifically, the initialization parameter set is divided into a sample set, a training set, and a validation set. The sample set is dimensionally expanded in feature space to generate enhanced training samples. The enhanced training samples are forward and backward propagated on the training set using the stochastic gradient descent (SGD) optimizer, and the mean squared error (MSE) loss function is used to iteratively update the parameters to obtain the optimized impedance-temperature mapping model parameters. On the validation set, model training is completed when the optimized impedance-temperature mapping model parameters meet the convergence threshold for 10 consecutive epochs. The trained impedance-temperature mapping model is then exported using the torch.save interface.

[0059] It should be noted that the convergence threshold is defined based on the relative rate of change of the validation set loss function, and its value range is [0.001, 0.005];

[0060] The trained impedance-temperature mapping model can not only accurately predict the junction temperature changes of semiconductor chips under various operating conditions, but also provide continuous and stable data support for aging tests, ensuring that temperature change trends are accurately captured throughout the entire test cycle, thereby effectively evaluating the long-term reliability and performance degradation of the chip.

[0061] S1.4. Generate the instantaneous value of the chip junction temperature using the trained anti-temperature mapping model. In the specific operation, the impedance spectrum data layer extracts the impedance components in the initialization parameter set through Hilbert transform, and uses Morlet wavelet transform to perform time-frequency analysis on the impedance components at three random characteristic frequency points to generate a three-dimensional phase spectrum feature matrix; use broadband impedance spectrum analysis to isolate adjacent three-dimensional phase spectrum feature matrices to obtain the characteristic sub-matrix after frequency band decoupling; use principal component analysis (PCA) to reduce the dimension of the characteristic sub-matrix after frequency band decoupling, and use least squares phase fitting to decouple the phase angle features to obtain continuous phase features; use weighted fusion algorithm to weight and fuse the continuous phase features to generate a phase spectrum feature matrix;

[0062] The temperature baseline data layer uses a one-dimensional convolution kernel to perform local time series extraction and nonlinear dimensionality reduction to obtain a temperature baseline vector. Specifically, a one-dimensional convolution is first used to perform sliding window feature extraction on the input initialization parameter set, and 64 output channels are set to capture temperature fluctuation patterns at different time scales. Next, the temperature fluctuation pattern is nonlinearly transformed using the ReLU activation function and downsampled using MaxPool1d (a one-dimensional maximum pooling layer) to obtain temperature compression features. Then, a second one-dimensional convolution is used to extract local time series from the temperature compression features and normalize them using GroupNormalization to generate high-order time series features. Finally, average pooling is used to compress the high-order time series features and reduce the dimensionality of the feature space to generate a temperature baseline vector.

[0063] The phase spectrum feature matrix and the temperature baseline vector are fused with multi-band features through the convolution fusion channel to obtain the instantaneous value of the chip junction temperature. In the specific operation, the temperature baseline vector is first expanded into a two-dimensional tensor of [1,64] through unsqueeze (dimensionality increase operation). At the same time, the phase spectrum feature matrix is frequency-weighted through a 1×1 convolution kernel to form a weighted phase feature. The two-dimensional tensor and the weighted phase feature are spliced in the convolution fusion channel to form a fused feature tensor of [3,128].

[0064] A 1×1 convolution kernel is used to perform cross-band feature interaction on the fused feature tensor. Feature extraction and dimensionality reduction are performed through a three-layer bottleneck residual block to generate a 64-dimensional high-purity fused feature. The number of output channels of each residual block is 256, 128, and 64, respectively. The 64-dimensional high-purity fused feature is summed up through skip connections and spatial and temporal compression is performed through global average pooling to obtain a global feature vector. The global feature vector is mapped to the instantaneous value of the junction temperature through a fully connected layer.

[0065] The instantaneous junction temperature provides real-time information about the temperature status of semiconductor chips during operation, ensuring efficient chip operation while avoiding overheating damage, thereby extending their lifespan and enhancing reliability. Furthermore, during burn-in testing, accurate monitoring of the instantaneous junction temperature helps promptly identify potential thermal failure risks.

[0066] S2. Use the PID controller to dynamically compensate the instantaneous value of the chip junction temperature and map it into an execution instruction set through the fuzzy rule base inference engine.

[0067] The specific steps include:

[0068] S2.1. Dynamically compensate the instantaneous junction temperature of the chip using a PID controller to generate a dynamic compensation signal. Specifically, the instantaneous junction temperature and temperature baseline data are input into the PID controller using the SPI digital interface. The temperature baseline data is subjected to noise suppression and baseline calibration using a sliding window mean filter to obtain a reference temperature value. The instantaneous junction temperature and the reference temperature value are subtracted to obtain a temperature deviation compensation value.

[0069] The three parallel channels of the PID controller perform compound operations on the temperature deviation compensation: in the proportional channel, the temperature deviation compensation is multiplied by the proportional coefficient to generate an immediate response component; in the integral channel, the historical temperature deviation compensation is discretely accumulated and multiplied by the integral coefficient to eliminate steady-state errors and obtain the integral cumulative component; in the differential channel, the difference between the current temperature deviation compensation and the temperature deviation compensation at the previous moment is calculated and weighted by the differential coefficient to predict the temperature change trend and obtain the differential prediction component;

[0070] The instant response component, integral accumulation component and differential prediction component are linearly superimposed in the adder to generate a dynamic compensation signal. The specific mathematical formula is as follows:

[0071] ;

[0072] in, Represents the time index, Indicates time The dynamic compensation signal, represents the proportionality coefficient; Indicates time The temperature deviation compensation amount, represents the integral coefficient, represents the integration variable, represents the differential coefficient;

[0073] It should be noted that the proportional coefficient is defined based on the actual response speed requirement and has a value range of [0.1~10.0]; the integral coefficient is defined based on the actual error elimination rate requirement and has a value range of [0.001~1.0]; the differential coefficient is defined based on the actual temperature change rate sensitivity requirement and has a value range of [0.01~5.0];

[0074] The dynamic compensation signal can not only correct the deviation in the chip junction temperature measurement in real time and improve the accuracy of temperature control, but also optimize the response characteristics of the semiconductor refrigeration chip in three-temperature environments and enhance the stability and adaptability under complex working conditions.

[0075] S2.2. The dynamic compensation signal is subjected to Mamdani fuzzy inference through the fuzzy rule base inference engine to obtain the PID parameter correction coefficient. In the specific operation, the dynamic compensation signal is first input into the fuzzy rule base inference engine through the high-speed SPI interface; the dynamic compensation signal is fuzzy quantized and graded using the triangular membership function, and the dynamic compensation signal is mapped into seven levels of language variables: "positive large", "positive medium", "positive small", "zero", "negative small", "negative medium", and "negative large";

[0076] According to the fuzzy rule base, Mamdani fuzzy reasoning is performed on the seven-level language variables. In the specific operation, the Mamdani minimum-maximum method is used to synthesize the fuzzy relations of the seven-level language variables to obtain the activated truncated membership function; and the weighted average method is used to perform weighted comprehensive calculation on the activated truncated membership function to generate the PID parameter correction; the PID parameter correction is subjected to sup-max aggregation to form a fuzzy output set; the area center of the fuzzy output set is calculated to obtain the accurate correction value; the obtained accurate correction value is normalized and limited to generate the PID parameter correction coefficient;

[0077] It should be noted that the fuzzy rule base is defined based on the nonlinear mapping relationship between the dynamic compensation signal and the PID parameter correction amount.

[0078] S2.3. Map the PID parameter correction coefficients through a dynamic hash table to generate an execution instruction set. Specifically, first, perform key-value conversion and hash mapping on the PID parameter correction coefficients using a specific hash function (such as the MurmurHash3 algorithm) to obtain a 32-bit hash code.

[0079] The dynamic hash table uses a two-level cache mechanism for hash codes. The first-level cache uses the LRU cache for fast retrieval and initial matching of hash codes. If the match is successful, the matching hash slot is directly generated. If the match does not hit, the second-level cache is required. The second-level cache uses a flash memory database with a B+ tree index to perform a second precise match of the hash code. For example, when a new PID parameter correction coefficient is entered into the dynamic hash table, a match is first searched in the first-level cache. If a match does not hit, a search is triggered in the second-level cache. The SIMD instruction parallel ratio is used during the search process to improve the query speed.

[0080] The instruction template is decoded for the matching hash slot to obtain the instruction parameters, which are then integrated through a multi-channel data mixing processor to generate an execution instruction set.

[0081] S3. Convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the semiconductor refrigeration chip to perform bidirectional temperature rise and fall control in a three-temperature environment, and synchronously collect real-time temperature change test data.

[0082] The specific steps include:

[0083] S3.1. Convert the execution instruction set into a bidirectional voltage signal through pulse width modulation. Specifically, the instruction decoder extracts the control parameters from the execution instruction set and inputs them into the comparison register group through the APB bus. The comparison register group uses pulse width modulation to map the control parameters to duty cycle and period, obtaining a PWM timing signal. The PWM timing signal is then synchronized with its complementary waveform to generate a drive signal with opposite phases. A dead zone insertion unit is used to adjust the edge delay of the drive signal with opposite phases to obtain two PWM waveforms.

[0084] The two PWM waveforms are input into the half-bridge drive circuit after being isolated by an optocoupler. The half-bridge drive circuit performs level conversion through an integrated charge pump to obtain the gate drive signal. Based on the gate drive signal, the duty cycle of the two PWM waveforms is adjusted using the power MOSFET bridge arm to obtain the chopping voltage. The polarity of the chopping voltage is determined using a differential sampling circuit. For example, when the chopping voltage exceeds the reference threshold of the differential sampling circuit, it is determined to be positive polarity. The duty cycle of the positive polarity chopping voltage is maintained and the dead zone is fine-tuned through the PWM phase synchronizer, and finally a bidirectional voltage signal is output. The bidirectional voltage signal is ripple-suppressed through an LC filter to prevent high-frequency switching noise from interfering with the load characteristics.

[0085] It should be noted that the reference threshold is defined based on a 50% voltage divider ratio of the supply voltage, and its value range is [1.8V~3.3V].

[0086] S3.2. Use a bidirectional voltage signal to drive a semiconductor refrigeration chip to perform bidirectional temperature control in a three-temperature environment. In specific operation, the bidirectional voltage signal is transmitted to the semiconductor refrigeration chip drive end via a low-impedance coaxial cable, and a real-time heat flux density is calculated based on a current sampling circuit to obtain heat flux characteristic parameters. The heat flux characteristic parameters are used to switch the polarity of the bidirectional voltage signal to generate a bidirectional adjustable drive current.

[0087] According to the bidirectional adjustable driving current, the thermal inertia compensation of the semiconductor refrigeration chip is carried out in high temperature (such as 85℃), medium temperature (such as 25℃) and low temperature (such as -40℃) environments. In the specific operation, first, the actual temperature in the three temperature zones is collected. When the temperature change is detected, the corresponding PID parameter group is immediately activated by the PID controller, and the temperature change rate is calculated through the sliding window; the PID parameter group uses the dynamic feedforward compensation algorithm to perform weighted sliding average filtering on the temperature change rate to generate the current adjustment parameter; according to the current adjustment parameter, the proportional integral of the PID controller is adjusted to compensate for the thermal inertia of the semiconductor refrigeration chip, and the temperature response curve is obtained. The curve characteristic parameters are extracted by least square fitting to generate the optimized driving parameters;

[0088] According to the optimized driving parameters, the anti-integral saturation strategy is used to dynamically switch the hot and cold surfaces of the chip and control the heat flow in both directions. In the specific operation, the anti-integral saturation strategy is used to dynamically limit the integral term of the chip to obtain the overshoot control quantity, and the duty cycle phase of the overshoot control quantity is adjusted to generate a fine-tuned PWM waveform; according to the optimized PWM waveform, the hot and cold surfaces of the chip are dynamically switched to form a reversible heat flow field; and the temperature feedback algorithm is used to quantify the temperature difference of the reversible heat flow field and extract the steady-state temperature difference parameters; according to the steady-state temperature difference parameters, the heat flow is bidirectionally controlled through the H-bridge power circuit to achieve rapid response and precise temperature control of the hot and cold surfaces of the chip.

[0089] S3.3. During the bidirectional temperature rise and fall control process, real-time temperature change test data is collected synchronously. In the specific operation, the multi-spectral infrared thermal imager scans the chip surface to obtain the infrared radiation signal, and outputs the thermal image after non-uniformity correction and temperature calibration; the thermal image is segmented by the image processing algorithm to extract the temperature distribution of each area of the chip, and the transient temperature change rate of each area is calculated in combination with the moving window Fourier transform; the temperature distribution and transient temperature change rate are integrated through multi-parameter correlation through the data fusion algorithm to form real-time temperature change test data.

[0090] S4. Input the real-time temperature change test data into the impedance temperature mapping model, and perform incremental updates through the recursive least squares method to obtain the optimized impedance temperature mapping model. Simultaneously, use the 3D thermal topology rendering engine to generate the chip three-temperature test report.

[0091] The specific steps include:

[0092] S4.1. Input the real-time temperature variation test data into the impedance-temperature mapping model via the UART interface, discretize the temperature gradient, and obtain a temperature eigenvector. Specifically, first, use a sliding window mean filter to eliminate transmission noise from the real-time temperature variation test data. Then, input the data into the impedance-temperature mapping model for numerical mapping to obtain discrete temperature values. Simultaneously, the discrete temperature values are mapped to corresponding impedance eigenvalues using a table lookup method.

[0093] During the temperature gradient discretization process, the cubic spline interpolation algorithm is used to resample the non-uniform sampling points in the impedance eigenvalues. The temperature field gradient distribution is calculated using a gradient operator to obtain a two-dimensional gradient matrix. Finally, the two-dimensional gradient matrix is reduced in dimension through principal component analysis and vector normalization is performed through the Normalization Layer to generate a temperature eigenvector.

[0094] It should be noted that the gradient operator refers to the Sobel convolution kernel used to calculate the spatial rate of change of the temperature field, which is called by the cv2.Sobel function of the image processing library.

[0095] S4.2. Incrementally update the impedance-temperature mapping model based on the temperature eigenvector. Specifically, use recursive least squares to perform matrix operations on the temperature eigenvector to obtain the covariance of the parameter vector. Dynamically adjust the covariance of the parameter vector using the Kalman gain. Simultaneously use the forgetting factor to iterate. Automatically stop iteration when the covariance of the parameter vector reaches the error threshold. Simultaneously output the parameter estimation results through the residual analyzer.

[0096] It should be noted that the forgetting factor refers to the attenuation coefficient of the covariance of the current parameter vector, and its value range is [0.9-1.0]. The error threshold is defined based on the normalized residual sum of squares, and its value range is [0.01-0.05].

[0097] Adaptive weight allocation is used to calculate the weight allocation coefficient of the parameter estimation results. According to the weight allocation coefficient, the parameter estimation results are incrementally updated using the weighted least squares method to obtain the optimized parameter vector. According to the optimized parameter vector, the parameters are reloaded through a parameter update program (such as LabVIEW), and finally the optimized impedance-temperature mapping model is output.

[0098] S4.3. Multi-dimensional feature screening and dynamic parameter fusion are performed on the optimized impedance-temperature mapping model to generate temperature-impedance correlation parameters. In the specific operation, the optimized impedance-temperature mapping model parameters are firstly reduced in dimensionality through principal component analysis, and the first three principal components are extracted as core features; then the dynamic time warping (DTW) algorithm is used to perform time series alignment and similarity calculation on the core features to obtain the time-varying feature matrix; in the parameter fusion stage, the time-varying feature matrix is weightedly fused based on the Kalman filter framework, and the parameter fluctuations are smoothed through a sliding window to generate temperature-impedance correlation parameters.

[0099] S4.4. Use a 3D thermal topology rendering engine to render the heat distribution trend of the temperature impedance associated parameters and mark abnormal component points to generate a three-temperature test report for the chip. Specifically, first, import the temperature impedance associated parameters into the OpenGL rendering pipeline of the 3D thermal topology rendering engine. Use a vertex shader to map the discrete temperature impedance associated parameters to 3D mesh vertices. Use thermal flow field particles to render the heat distribution trend of the 3D mesh vertices to generate a 3D thermal topology mesh. In the fragment shader, color the 3D thermal topology mesh in real time according to the temperature-color level mapping table to obtain a temperature distribution rendering.

[0100] It should be noted that thermal flow field particles refer to point metadata with attributes used to visualize heat conduction paths, which are called through the CUDA library;

[0101] The 3D thermal topology rendering engine synchronously calls the CUDA kernel function to mark abnormal component points on the temperature distribution rendering image, and uses the report generation function of the Qt framework to perform multi-view typesetting and data annotation, and output the chip three-temperature test report in PDF format.

[0102] This embodiment also provides a three-temperature test device for a semiconductor chip, comprising: an impedance temperature measurement module, an intelligent control mapping module, a temperature control module,

[0103] The impedance temperature measurement module is used to input the initialization parameter set into the impedance temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis, and obtain the instantaneous value of the chip junction temperature;

[0104] The intelligent control mapping module is used to dynamically compensate the instantaneous value of the chip junction temperature using a PID controller and map it into an execution instruction set through a fuzzy rule base inference engine;

[0105] The temperature control module is used to convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the semiconductor refrigeration chip to perform bidirectional temperature control in a three-temperature environment, and synchronously collect real-time temperature change test data;

[0106] The model optimization module is used to input real-time temperature change test data into the impedance temperature mapping model, and perform incremental updates through recursive least squares method to obtain the optimized impedance temperature mapping model, and simultaneously use the three-dimensional thermal topology rendering engine to generate the chip three-temperature test report.

[0107] This embodiment also provides a computer device suitable for the three-temperature testing method of semiconductor chips, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the three-temperature testing method of semiconductor chips proposed in the above embodiment.

[0108] The computer device may be a terminal, comprising a processor, memory, a communication interface, a display, and an input device connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores an operating system and computer programs. The internal memory provides an environment for the operating system and computer programs stored in the non-volatile storage media. The communication interface of the computer device is used to communicate with external terminals via wired or wireless communication. Wireless communication may be achieved via Wi-Fi, a carrier network, NFC (near-field communication), or other technologies. The display of the computer device may be a liquid crystal display or an electronic ink display. The input device may be a touchscreen overlay on the display, buttons, a trackball, or a touchpad on the computer device housing, or an external keyboard, touchpad, or mouse.

[0109] This embodiment also provides a storage medium having a computer program stored thereon. When the program is executed by a processor, the processor implements the three-temperature test method for a semiconductor chip as proposed in the above embodiment. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0110] In summary, the present invention can more accurately obtain the instantaneous value of the chip junction temperature through: broadband impedance spectrum analysis combined with multi-band feature fusion technology, thereby significantly improving the accuracy of temperature measurement. At the same time, dynamic compensation is performed by combining a PID controller with a fuzzy rule base inference engine, which can respond quickly to rapid temperature changes and greatly improve the response capability in a rapidly changing temperature environment.

[0111] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A three-temperature testing method for semiconductor chips, characterized by: include, Input the initialized parameter set into the impedance-temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis to obtain the instantaneous value of the chip junction temperature. The specific steps are as follows: The impedance spectrum data layer and the temperature baseline data layer are dynamically iterated through the automatic differentiation mechanism to construct an impedance-temperature mapping model. The initialization parameter set is input into the impedance-temperature mapping model. The impedance spectrum data layer is subjected to phase angle feature decoupling through broadband impedance spectrum analysis to obtain the phase spectrum feature matrix. The temperature baseline data layer is subjected to local time series extraction and nonlinear dimensionality reduction through a one-dimensional convolution kernel to obtain a temperature baseline vector. The phase spectrum feature matrix and the temperature baseline vector are then fused through a convolution fusion channel for multi-band feature fusion to obtain the instantaneous value of the chip junction temperature. The PID controller is used to dynamically compensate the instantaneous value of the chip junction temperature and is mapped into an execution instruction set through the fuzzy rule base inference engine. The specific steps are as follows: The PID controller is used to calculate the deviation of the instantaneous value of the chip junction temperature to obtain the temperature deviation compensation amount. The temperature deviation compensation amount is then subjected to a proportional-integral-differential compound operation to generate a dynamic compensation signal. The dynamic compensation signal is subjected to Mamdani fuzzy reasoning through a fuzzy rule base inference engine to obtain the PID parameter correction coefficient. This is then mapped through a dynamic hash table to generate an execution instruction set. The execution instruction set is converted into a bidirectional voltage signal through pulse width modulation, driving the semiconductor refrigeration chip to perform bidirectional temperature control in a three-temperature environment, and synchronously collect real-time temperature change test data. The specific steps are as follows: Pulse width modulation is used to synchronize the complementary waveforms of the execution instruction set, generating two PWM waveforms. The duty cycle is adjusted through a half-bridge drive circuit to obtain a bidirectional voltage signal, switch the polarity of the bidirectional voltage signal, drive the semiconductor cooling chip to compensate for thermal inertia in a three-temperature environment, and use an anti-integral saturation strategy to dynamically switch the hot and cold surfaces of the chip and control the heat flow in both directions. Simultaneously, a multi-spectral infrared thermal imager is used to monitor the chip's thermal field and generate real-time temperature change test data. The real-time temperature change test data is input into the impedance temperature mapping model, and incremental updates are performed through the recursive least squares method to obtain the optimized impedance temperature mapping model. The three-temperature test report of the chip is generated simultaneously using the three-dimensional thermal topology rendering engine.

2. The three-temperature testing method for semiconductor chips according to claim 1, wherein: The initialization parameter set includes impedance spectrum data, chip packaging structure parameters and temperature baseline data.

3. The three-temperature testing method for semiconductor chips according to claim 1, wherein: The specific steps of obtaining the optimized impedance temperature mapping model are as follows: The real-time temperature change test data is input into the impedance temperature mapping model through the UART interface, the temperature gradient is discretized, and the temperature feature vector is obtained; The recursive least squares method is used to perform covariance iteration on the temperature eigenvector to obtain parameter estimation results; Adaptive weight assignment is used to incrementally update the parameter estimation results to obtain the optimized impedance-temperature mapping model.

4. The three-temperature testing method for semiconductor chips according to claim 1, wherein: The three-dimensional thermal topology rendering engine is used to generate a chip three-temperature test report. The specific steps are as follows: Perform multi-dimensional feature screening and dynamic parameter fusion on the optimized impedance-temperature mapping model to generate temperature-impedance correlation parameters; The 3D thermal topology rendering engine is used to render the heat distribution trend of temperature-impedance related parameters and mark abnormal component points to generate a chip three-temperature test report.

5. A three-temperature testing device for semiconductor chips, based on the three-temperature testing method for semiconductor chips according to any one of claims 1 to 4, characterized in that: Including impedance temperature measurement module, intelligent control mapping module, temperature control module, temperature control module, The impedance temperature measurement module is used to input the initialization parameter set into the impedance temperature mapping model, perform phase angle analysis and multi-band feature fusion through broadband impedance spectrum analysis, and obtain the instantaneous value of the chip junction temperature; The intelligent control mapping module is used to dynamically compensate the instantaneous value of the chip junction temperature using a PID controller and map it into an execution instruction set through a fuzzy rule base inference engine; The temperature control module is used to convert the execution instruction set into a bidirectional voltage signal through pulse width modulation, drive the semiconductor refrigeration chip to perform bidirectional temperature control in a three-temperature environment, and synchronously collect real-time temperature change test data; The model optimization module is used to input real-time temperature change test data into the impedance temperature mapping model, and perform incremental updates through recursive least squares method to obtain the optimized impedance temperature mapping model, and simultaneously use the three-dimensional thermal topology rendering engine to generate the chip three-temperature test report.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the three-temperature testing method for semiconductor chips according to any one of claims 1 to 4 are implemented.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the three-temperature testing method for semiconductor chips according to any one of claims 1 to 4 are implemented.

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