Chip preparation method for methane detection and methane detector

Abstract

The invention relates to a chip preparation method for methane detection and a methane detector, and the chip preparation method comprises the steps: growing an epitaxial structure on the surface of a substrate, and obtaining an epitaxial wafer; manufacturing a grating mask on the epitaxial wafer, and corroding a grating structure on the grating mask; performing grating burying and ohmic contact layer growth on the grating structure to obtain a grating sheet; a mask is deposited on the grating sheet, the grating sheet is corroded to a corrosion cut-off layer after being processed, the mask is removed, and a ridge waveguide wafer is obtained; a first passivation layer is deposited on the surface of the wafer, a heating module is manufactured on the first passivation layer, the first passivation layer at the top end of the ridge waveguide is removed to expose the ohmic contact layer, a metal electrode is evaporated on the ohmic contact layer, a laser bonding pad is formed, and finally an epitaxial wafer is processed to form a chip. Another method of the invention can only integrate a heater. The heating efficiency can be improved, and the power consumption can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of methane detector chips, and in particular to a method for preparing a chip for methane detection and a methane detector. Background Art

[0002] Methane detection utilizes the TDLAS (Tunable Diode Laser Absorption Spectroscopy) principle. When monochromatic light passes through methane molecules, light of a specific wavelength will be absorbed by the methane molecules, resulting in attenuation of the light energy. By detecting the change in light intensity, the effect of methane concentration detection can be achieved; methane molecules have a maximum absorption peak near 1653.7 nm, and there are no strong absorption lines of other gases within ±0.5 nm of this absorption line, and its line strength far exceeds that of other gas absorption lines in this wavelength band. Therefore, using monochromatic light of 1653.7 nm can achieve an extremely low detection limit, is very suitable for detecting trace methane gas leakage, and can also avoid the interference of other gases in the air. However, during the use of the laser, it will heat up, resulting in a drift of the central wavelength and attenuation of the power, affecting the gas detection accuracy.

[0003] In order to obtain a laser with a stable output power and central wavelength, it is necessary to precisely control the temperature of the laser. There are mainly two processes in the related technologies. The first is to encapsulate a TEC cooler on the methane detector to control the temperature of the TEC device; the second is to set a heater on the substrate to control the chip temperature through the heater. However, the first solution has an expensive TEC, resulting in a high cost of the device and is not suitable for large-scale promotion. But the second solution has low heating efficiency, high power consumption, and the heater is far from the chip, and there is a large difference between the detected temperature and the actual temperature of the chip. Summary of the Invention

[0004] Therefore, the technical problem to be solved by the present invention is to overcome the problems in the prior art that when the chip is temperature-controlled by setting a heating resistor and a thermistor on the heat sink, there are low heating efficiency, high power consumption, and the thermistor is far from the chip, and there is a large difference between the detected temperature and the actual temperature of the chip.

[0005] To solve the above technical problems, the present invention provides a method for preparing a chip for methane detection, including: Growing an epitaxial structure on the surface of a substrate to obtain an epitaxial wafer; Making a grating mask on the epitaxial wafer through spin coating, exposure, and development, and etching a grating structure on the grating layer of the epitaxial wafer based on the grating mask; After removing the grating mask, performing grating burial and growth of an ohmic contact layer on the grating structure to obtain a grating wafer; Deposit a mask on the grating chip. After photolithography, etching, and resist stripping, etch until reaching the etch stop layer of the epitaxial wafer, then remove the mask to obtain a wafer with ridge waveguides. Deposit a first passivation layer on the surface of the wafer. Make a heating module pattern on the first passivation layer through spin coating, exposure, and development, and deposit a metal thin film. After stripping, obtain the heating module; the heating module is a heater, or a combination of a thermistor and a heater. Remove the first passivation layer at the top of the ridge waveguide to expose the ohmic contact layer. Evaporate and deposit a metal electrode on the ohmic contact layer and form a laser pad, which is used to connect to an external drive circuit. Grind and thin the back of the epitaxial wafer, deposit a metal, cleave into bar strips, deposit a high-reflection film on the backlight end face, deposit an antireflection film on the light-emitting end face, and obtain single chips after cleavage.

[0006] In an embodiment of the present invention, or after obtaining the wafer with ridge waveguides, it further includes: Deposit a first passivation layer on the surface of the wafer, and remove the first passivation layer at the top of the ridge waveguide to expose the ohmic contact layer. Evaporate and deposit a metal electrode on the ohmic contact layer to form a laser pad. Grow a second passivation layer on the laser pad. Make a heating module pattern on the second passivation layer through spin coating, exposure, and development, and deposit a metal thin film. After stripping, obtain the heating module. Grind and thin the back of the epitaxial wafer, deposit a metal, cleave into bar strips, deposit a high-reflection film on the backlight end face, deposit an antireflection film on the light-emitting end face, and obtain single chips after cleavage.

[0007] In an embodiment of the present invention, both the first passivation layer and the second passivation layer are any one of silicon oxide, silicon nitride, and silicon oxynitride; the thicknesses of both the first passivation layer and the second passivation layer are greater than or equal to 100 nm and less than or equal to 1000 nm.

[0008] In an embodiment of the present invention, the coating method of the metal thin film is any one of magnetron sputtering coating, electron beam evaporation coating, resistance heating evaporation coating, electroplating, or chemical coating.

[0009] In an embodiment of the present invention, the thermistor and the heater share a negative electrode pad, or the thermistor and the heater are respectively provided with negative electrode pads.

[0010] In an embodiment of the present invention, the materials of both the thermistor and the heater are any one of palladium, germanium, tantalum, titanium, platinum, gold, silver, nickel, aluminum, chromium, tungsten, iridium, tin, copper, thallium, yttrium, manganese, bismuth, tellurium, silicon, and iron, or alloys, nitrides, or oxides formed by multiple of them.

[0011] In one embodiment of the present invention, the epitaxial structure sequentially includes a lower confinement layer, an active layer, an upper confinement layer, an etch stop layer, a grating layer, and a cladding layer from bottom to top; the heater is placed on the first passivation layer or the second passivation layer, and after being powered on, heats the active layer and the grating layer; the thermistor is placed on the first passivation layer or the second passivation layer, and after being powered on, characterizes the chip temperature through the change in resistance value.

[0012] In one embodiment of the present invention, the thermistor and the heater are fabricated by spin coating, exposure, development, metal coating, and stripping, or by metal coating, spin coating, exposure, development, etching, and resist stripping.

[0013] In one embodiment of the present invention, the depth of the ridge waveguide is greater than or equal to 1 μm and less than or equal to 3 μm.

[0014] To solve the above technical problems, the present invention provides a methane detector, which is characterized by including a chip prepared by the above-mentioned chip preparation method for methane detection.

[0015] The above technical solution of the present invention has the following advantages compared with the prior art: The present invention provides a chip preparation method for methane detection, including a chip preparation method integrating a thermistor and a heater, and a chip preparation method integrating a heater. Both methods can prepare chips for accurately detecting methane. By integrating a thermistor and a heater on the chip, the present invention can significantly reduce costs while improving the heating efficiency, reducing power consumption, and improving the temperature control accuracy of the thermistor. The present invention can effectively improve the methane detection accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to make the content of the present invention easier to be clearly understood, the following further describes the present invention in detail according to specific embodiments of the present invention in conjunction with the drawings.

[0017] Figure 1 is a flowchart of a chip preparation method for setting a heating module on the first passivation layer in an embodiment of the present invention; Figure 2 is a flowchart of a chip preparation method for setting a heating module on the second passivation layer in an embodiment of the present invention; Figure 3 is a top view of a chip with a heating module being a thermistor and a heater in an embodiment of the present invention; Figure 4 is a top view of a chip with a heating module being a heater in an embodiment of the present invention; Figure 5 is an end view of a chip prepared with a heating module being a thermistor and a heater in an embodiment of the present invention; Figure 6 It is an end face view of a chip with a heating module provided on a second passivation layer in an embodiment of the present invention. Specific embodiments

[0018] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, so that those skilled in the art can better understand the present invention and be able to implement it, but the embodiments given are not intended to limit the present invention. Embodiment 1

[0019] As described in the background art, in order to obtain a laser with stable output power and central wavelength, it is necessary to precisely control the temperature of the laser. There are mainly two processes in the related art. The first is to encapsulate a TEC cooler on a methane detector to control the temperature of the TEC device; the second is to set a heater on the substrate. The heater is far from the chip, and the chip temperature is controlled by the heater. However, in the first solution, the TEC is expensive, resulting in a high cost of the device. In the second solution, the heating efficiency is low, the power consumption is large, and the difference between the detected temperature and the actual temperature of the chip is large.

[0020] The heating module 3 in this embodiment can be a heater (the heater is a heating resistor), or a combination of a heater and a thermistor.

[0021] Refer to Figure 1 As shown, the present invention relates to a method for fabricating a chip for methane detection. The heating module 3 is provided on the first passivation layer 2-1, including: Step 101, growing an epitaxial structure on the surface of the substrate to obtain an epitaxial wafer.

[0022] Step 102, making a grating mask on the epitaxial wafer through spin coating, exposure, and development. Based on the grating mask, a grating structure is etched out on the grating layer of the epitaxial wafer.

[0023] Step 103, after removing the grating mask, performing grating burial and growth of an ohmic contact layer on the grating structure to obtain a grating wafer.

[0024] Step 104, depositing a mask on the grating wafer, and after photolithography, etching, and removing the glue, etching until the etching stop layer of the epitaxial wafer, and removing the mask to obtain a wafer with a ridge waveguide 1.

[0025] Step 105, depositing a first passivation layer 2-1 on the surface of the wafer, making a heating module pattern on the first passivation layer 2-1 through spin coating, exposure, and development, and plating a metal thin film. After stripping, the heating module 3 is obtained; the heating module 3 is a heater, or a combination of a thermistor and a heater.

[0026] Step 106, removing the first passivation layer 2-1 at the top of the ridge waveguide to expose the ohmic contact layer.

[0027] Step 107: Evaporate a metal electrode on the ohmic contact layer and form a laser pad 4, which is used to connect to an external drive circuit.

[0028] Step 108: Grind and thin the back side of the epitaxial wafer, deposit metal on it, cleave out bar strips, deposit a high-reflection film on the backlight end face, deposit an antireflection film on the light-emitting end face, and obtain single chips after cleavage.

[0029] Refer to Figure 2 As shown, the present invention relates to a method for preparing a chip for methane detection. The heating module is disposed on the second passivation layer 2-2 and includes: Step 101: Grow an epitaxial structure on the surface of a substrate to obtain an epitaxial wafer.

[0030] In this step, on the surface of the substrate, use MOCVD to grow, from bottom to top, a lower confinement layer (for light confinement), an active layer (laser emission region), an upper confinement layer (cooperating with the lower confinement layer to further confine light), an etch stop layer (ensuring precise control of the etching depth), a grating layer (for wavelength selection), and a cladding layer (guiding the light propagation direction) to obtain an epitaxial wafer.

[0031] Step 102: Fabricate a grating mask on the epitaxial wafer through spin coating, exposure, and development. Based on the grating mask, etch a grating structure on the grating layer of the epitaxial wafer.

[0032] Step 103: After removing the grating mask, perform grating burial and grow an ohmic contact layer on the grating structure to obtain a grating wafer.

[0033] In Steps 102-103, during the process of fabricating the grating mask, fabricate the grating pattern by electron beam lithography or holographic grating method. Fabricate a grating mask on the epitaxial wafer through spin coating, exposure, and development, use dry or wet etching to etch a grating structure on the grating layer, and after removing the grating mask, perform grating burial and grow an ohmic contact layer by MOCVD to obtain a grating wafer.

[0034] Step 104: Deposit a mask on the grating wafer, and after photolithography, etching, and resist stripping, etch until reaching the etch stop layer, then remove the mask to obtain a wafer with a ridge waveguide 1.

[0035] In this step, deposit a mask on the grating wafer by PECVD, and through spin coating, exposure, development, etching, resist stripping, and dry or wet etching, etch until reaching the etch stop layer, then remove the mask to fabricate a wafer with a ridge waveguide 1. In this embodiment, the depth of the ridge waveguide 1 is greater than or equal to 1 μm and less than or equal to 3 μm.

[0036] If the heating module 3 is a thermistor (with pads provided) and a heater (the heater is a heating resistor, and the heating resistor has pads), in this embodiment, the thermistor and the heater together include three pads ( Figure 3 represented by three letters A, B, and C). These three pads are, from top to bottom, the positive electrode of the heater (the area where A is located), the positive electrode of the thermistor (the area where B is located), and the common negative electrode of the heater and the thermistor (the area where C is located).

[0037] If the heating module 3 is a heater (the heater includes a heating resistor, and the heating resistor has pads), Figure 4 the pads include two upper and lower pads, both of which are pads connected to the heating resistor, and positive / negative connection terminals are provided on the two pads. The heating resistor and the pads are in a linear structure, a meandering structure, or a combination of a linear structure and a meandering structure.

[0038] Step 105: Deposit a first passivation layer 2-1 on the surface of the wafer, and remove the first passivation layer 2-1 at the top of the ridge waveguide 1 to expose the ohmic contact layer.

[0039] Exemplarily, the first passivation layer 2-1 includes, but is not limited to, one of silicon oxide, silicon nitride, and silicon oxynitride. Deposit a silicon oxide, silicon nitride, or silicon oxynitride thin film as the first passivation layer 2-1 by PECVD. The thickness of the first passivation layer 2-1 is greater than or equal to 100 nm and less than or equal to 1000 nm. Remove the first passivation layer 2-1 at the top of the ridge waveguide 1 by photolithography, dry / wet etching, and resist stripping to expose the ohmic contact layer.

[0040] Step 106: Evaporate a metal electrode on the ohmic contact layer, and the metal electrode can be extended to obtain the laser pad 4 (the laser pad 4 is part of the metal electrode); Form the laser pad 4 on the first passivation layer 2-1 through photolithography, metal coating, and stripping.

[0041] Step 107: Grow a second passivation layer 2-2 on the laser pad 4; Step 108: Fabricate the heating module 3 on the second passivation layer 2-2.

[0042] Exemplarily, as Figure 2As shown in the figure, on the second passivation layer 2-2 in step 107, the pattern of the heating module 3 is fabricated through spin coating, exposure, and development. Then, a metal thin film is deposited by magnetron sputtering coating, electron beam evaporation coating, resistance heating evaporation coating, electroplating, or chemical coating. After stripping, the fabrication of the heating module 3 is completed. Specifically, the heating module 3 is fabricated through spin coating, exposure, development, metal coating, and stripping, or through metal coating, spin coating, exposure, development, etching, and resist stripping. Among them, if the heating module 3 is a thermistor and a heater, then the thermistor and the heater are placed on the second passivation layer 2-2, and their materials are any one of palladium, germanium, tantalum, titanium, platinum, gold, silver, nickel, aluminum, chromium, tungsten, iridium, tin, copper, thallium, yttrium, manganese, bismuth, tellurium, silicon, and iron, or an alloy, nitride, or oxide formed by a combination of multiple ones. If the heating module 3 is a thermistor and a heater, the thermistor and the heater are in a linear structure, a meander structure, or a combination of a linear structure and a meander structure. The thermistor and the heater can share a negative pad or can be provided with negative pads separately.

[0043] Step 109: Grind and thin the back surface of the epitaxial wafer, deposit metal on it, cleave out bar strips, deposit a high-reflection film on the backlight end face, deposit an antireflection film on the light-emitting end face, and obtain single chips after cleavage.

[0044] The above step sequence is only an example and does not limit the technical solution of the present invention. Among them, steps 106-108 can be step 107, step 106, and step 108, or can also be step 107, step 108, and step 106.

[0045] To make the solution of this application clearer, the embodiments of this application further disclose specific examples: Case 1: Taking the heating module 3 as a heater and a thermistor as an example, and setting the heater and the thermistor on the second passivation layer 2-2, specifically including: 1) Epitaxial growth: Use MOCVD to sequentially grow a lower confinement layer, multiple quantum wells, an upper confinement layer, a grating layer, and a cladding layer on the surface of the substrate to obtain an epitaxial wafer.

[0046] 2) Grating fabrication: Fabricate a grating mask on the epitaxial wafer through spin coating, exposure, and development. Use dry or wet etching to etch the grating layer to form a grating structure. After removing the mask, perform grating burial through MOCVD to obtain a grating wafer.

[0047] 3) Ridge waveguide process: Deposit a mask on the grating wafer through PECVD, and fabricate a ridge waveguide 1 through spin coating, exposure, development, etching, resist stripping, and dry or wet etching.

[0048] 4) Confinement layer process: Grow confinement layers on both sides of the ridge waveguide 1 through MOCVD.

[0049] 5) Contact layer burying: After removing the mask of the ridge waveguide 1, InP and InGaAs contact layers with different doping concentration gradients are grown on the surface to obtain a BH epitaxial wafer.

[0050] 6) Double-groove process: On the BH epitaxial wafer, through spin coating, exposure, development, etching, and stripping of photoresist, the confinement layer is etched, and part of the confinement layer structure on both sides of the active region is retained.

[0051] 7) Passivation process: On the basis of step 6), a silicon oxide or silicon nitride thin film is deposited by PECVD as the first passivation layer 2-1.

[0052] 8) Ridge windowing process: On the basis of step 7), through photolithography, dry / wet etching, and stripping of photoresist, the first passivation layer 2-1 at the top of the ridge waveguide 1 is removed to expose the ohmic contact layer.

[0053] 9) Metal process: On the basis of step 8), through spin coating, exposure, development, metal coating, stripping, and alloying, a metal electrode that forms an ohmic contact with the ohmic contact layer and a laser pad 4 (the laser pad 4 is part of the metal electrode) are fabricated.

[0054] 10) Second passivation process: On the basis of step 9), a silicon oxide or silicon nitride thin film is deposited by PECVD as the second passivation layer 2-2.

[0055] 11) Integration process: On the second passivation layer 2-2 in step 10), a heater pattern is fabricated through spin coating, exposure, and development, and a metal thin film is deposited by metal evaporation or magnetron sputtering, and after stripping, the thermistor and heater are fabricated.

[0056] 12) Backside process: On the basis of step 11), the backside of the epitaxial wafer of the wafer is ground and thinned, a backside metal is plated, and after alloying, the backside process is completed.

[0057] 13) Chip process: On the basis of step 12), the epitaxial wafer of the wafer is cleaved into bar strips, a high-reflection film HR is plated on the backlight end face, an antireflection film AR is plated on the light-emitting end face, and single chips are cleaved.

[0058] The end-face diagram of the finally prepared chip can be referred to Figure 6 .

[0059] Case 2: Taking the heating module 3 as the heater as an example, and a heater is arranged on the second passivation layer 2-2, specifically including: 1) Epitaxial growth: On the surface of the substrate, a lower confinement layer, an active layer, an upper confinement layer, an etch stop layer, a grating layer, and a cladding layer are sequentially grown by MOCVD to obtain an epitaxial wafer.

[0060] 2) Fabricate the grating: On the epitaxial wafer, a grating mask is fabricated through spin coating, exposure, and development. The grating layer is etched to form a grating structure using dry or wet etching. After removing the mask, grating burial and growth of the ohmic contact layer are carried out by MOCVD to obtain a grating wafer.

[0061] 3) Ridge waveguide process: On the grating wafer, a mask is deposited by PECVD, and through spin coating, exposure, development, etching, stripping, and dry or wet etching, it is etched to the etching stop layer, and the mask is removed to fabricate a ridge waveguide 1.

[0062] 4) Passivation process: Based on step 3), a silicon oxide or silicon nitride thin film is deposited by PECVD as the first passivation layer 2-1.

[0063] 5) Ridge windowing process: Based on step 4), through photolithography, dry / wet etching, and stripping, the first passivation layer 2-1 at the top of the ridge waveguide 1 is removed to expose the ohmic contact layer.

[0064] 6) Metal process: Based on step 5), through spin coating, exposure, development, metal coating, stripping, and alloying, a metal electrode and a laser pad 4 that form an ohmic contact with the ohmic contact layer are fabricated.

[0065] 7) Heater process: Deposit the second passivation layer 2-2, and on it, a heater pattern is fabricated through spin coating, exposure, and development. A metal thin film is deposited by metal evaporation or magnetron sputtering, and after stripping, the heater fabrication is completed.

[0066] 8) Backside process: Based on step 7), the backside of the wafer is ground and thinned, a backside metal is plated, and after alloying, the backside process is completed.

[0067] 9) Chip process: Based on step 8), the wafer is cleaved into bar strips, a high reflection film HR is plated on the backlight end face, an antireflection film AR is plated on the light output end face, and single chips are cleaved.

[0068] The end face diagram of the finally prepared chip can also be referred to Figure 6 .

[0069] Case 3: Taking the heating module 3 as the heater as an example, and a heater is arranged on the first passivation layer 2-1, specifically including: 1) Epitaxial growth: On the surface of the substrate, the following layers are sequentially grown by MOCVD: a lower confinement layer, an active layer, an upper confinement layer, a grating layer, and a cladding layer to obtain an epitaxial wafer.

[0070] 2) Fabricate the grating: On the epitaxial wafer, a grating mask is fabricated through spin coating, exposure, and development. The grating layer is etched to form a grating structure using dry or wet etching. After removing the mask, grating burial is carried out by MOCVD to obtain a grating wafer.

[0071] 3) Ridge waveguide process: Deposit a mask on the grating wafer through PECVD, and then through spin coating, exposure, development, etching, stripping, and dry or wet etching, fabricate the ridge waveguide 1.

[0072] 4) Confining layer process: Grow confining layers on both sides of the ridge waveguide 1 through MOCVD.

[0073] 5) Contact layer burying: After removing the mask of the ridge waveguide 1, grow InP and InGaAs contact layers with different doping concentration gradients on the surface to obtain a BH epitaxial wafer.

[0074] 6) Double-groove process: On the BH epitaxial wafer, through spin coating, exposure, development, etching, and stripping, etch the confining layer and retain part of the confining layer structure on both sides of the active region.

[0075] 7) Passivation process: On the basis of step 6), deposit a silicon oxide or silicon nitride thin film by PECVD as the first passivation layer 2-1.

[0076] 8) Heater integration process: On the first passivation layer 2-1 in step 7), fabricate the heater pattern through spin coating, exposure, and development, deposit a metal thin film by metal evaporation or magnetron sputtering, and complete the fabrication of the heater 3-2 after stripping.

[0077] 9) Ridge windowing process: On the basis of step 8), through photolithography, dry / wet etching, and stripping, remove the first passivation layer 2-1 at the top of the ridge waveguide 1 to expose the ohmic contact layer.

[0078] 10) Metal process: On the basis of step 9), through spin coating, exposure, development, metal coating, stripping, and alloying, fabricate the metal electrodes and the laser pads 4 that form ohmic contacts with the ohmic contact layer.

[0079] 11) Backside process: On the basis of step 10), grind and thin the backside of the wafer, deposit backside metal, and complete the backside process after alloying.

[0080] 12) Chip process: On the basis of step 11), cleave the wafer into bar strips, deposit a high-reflectivity film HR on the backlight end face and an antireflection film AR on the light-emitting end face, and cleave out single chips.

[0081] The end face diagram of the finally prepared chip can be referred to Figure 5 。

[0082] Case 4: Taking the heating module 3 as an example of the heater, and setting the heater on the second passivation layer 2-2, specifically including: 1) Epitaxial growth: Use MOCVD to sequentially grow a lower confining layer, an active layer, an upper confining layer, a grating layer, and a cladding layer on the surface of the substrate to obtain an epitaxial wafer.

[0083] 2) Fabricate the grating: On the epitaxial wafer, a grating mask is fabricated through spin coating, exposure, and development. The grating layer is etched to form a grating structure using dry or wet etching. After removing the mask, the grating is buried through MOCVD to obtain a grating wafer.

[0084] 3) Ridge waveguide process: On the grating wafer, a mask is deposited through PECVD, and a ridge waveguide 1 is fabricated through spin coating, exposure, development, etching, stripping, and dry or wet etching.

[0085] 4) Confining layer process: Confining layers are grown on both sides of the ridge waveguide 1 through MOCVD.

[0086] 5) Contact layer burying: After removing the mask of the ridge waveguide 1, InP and InGaAs contact layers with different doping concentration gradients are grown on the surface to obtain a BH epitaxial wafer.

[0087] 6) Double-groove process: On the BH epitaxial wafer, the confining layer is etched through spin coating, exposure, development, etching, and stripping, and part of the confining layer structure on both sides of the active region is retained.

[0088] 7) Passivation process: On the basis of step 6), a silicon oxide or silicon nitride thin film is deposited through PECVD as the first passivation layer 2-1.

[0089] 8) Ridge windowing process: On the basis of step 7), the top first passivation layer 2-1 of the ridge waveguide 1 is removed through photolithography, dry / wet etching, and stripping to expose the ohmic contact layer.

[0090] 9) Metal process: On the basis of step 8), a metal electrode and a laser pad 4 that form an ohmic contact with the contact layer are fabricated through spin coating, exposure, development, metal coating, stripping, and alloying.

[0091] 10) Second passivation process: On the basis of step 9), a silicon oxide or silicon nitride thin film is deposited through PECVD as the second passivation layer 2-2.

[0092] 11) Heater integration process: On the second passivation layer 2-2 of step 10), a heater pattern is fabricated through spin coating, exposure, and development. A metal thin film is deposited through metal evaporation or magnetron sputtering, and the heater is completed after stripping.

[0093] 12) Backside process: On the basis of step 11), the backside of the wafer is ground and thinned, a backside metal is plated, and the backside process is completed after alloying.

[0094] 13) Chip process: On the basis of step 12), the wafer is cleaved into bar strips, a high-reflectivity film HR is plated on the backlight end face, an antireflection film AR is plated on the light-emitting end face, and single chips are cleaved. Example 2

[0095] This embodiment provides a methane detector, which is characterized by including a chip, and the chip is prepared by using the chip preparation method for methane detection described in Embodiment 1.

[0096] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to these embodiments once they know the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present application.

[0097] Obviously, the above embodiments are only examples for clear illustration and are not limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. And the obvious changes or variations derived therefrom are still within the protection scope of the present invention.

Claims

1. A method for preparing a chip for methane detection, characterized in that: Including: Growing an epitaxial structure on the substrate surface to obtain an epitaxial wafer; Fabricating a grating mask on the epitaxial wafer through spin coating, exposure, and development. Based on the grating mask, etching a grating structure on the grating layer of the epitaxial wafer; After removing the grating mask, performing grating burial on the grating structure and growing an ohmic contact layer to obtain a grating wafer; Depositing a mask on the grating wafer, followed by photolithography, etching, and resist stripping, and then etching until reaching the etch stop layer of the epitaxial wafer, and removing the mask to obtain a wafer with a ridge waveguide; Depositing a first passivation layer on the surface of the wafer, fabricating a heating module pattern on the first passivation layer through spin coating, exposure, and development, and plating a metal thin film, and obtaining a heating module after stripping; the heating module is a heater, or a combination of a thermistor and a heater; Removing the first passivation layer at the top of the ridge waveguide to expose the ohmic contact layer; Evaporating a metal electrode on the ohmic contact layer and forming a laser pad, which is used to connect to an external drive circuit; Grinding and thinning the back surface of the epitaxial wafer and plating it with metal, cleaving into bar strips, plating a high reflection film on the backlight end face, plating an antireflection film on the light output end face, and obtaining a single chip after cleavage.

2. The method for preparing a chip for methane detection according to claim 1, wherein: Or after obtaining the wafer with a ridge waveguide, it further includes: Depositing a first passivation layer on the surface of the wafer, removing the first passivation layer at the top of the ridge waveguide to expose the ohmic contact layer; Evaporating a metal electrode on the ohmic contact layer to form a laser pad; Growing a second passivation layer on the laser pad; Fabricating a heating module pattern on the second passivation layer through spin coating, exposure, and development, and plating a metal thin film, and obtaining a heating module after stripping; Grinding and thinning the back surface of the epitaxial wafer and plating it with metal, cleaving into bar strips, plating a high reflection film on the backlight end face, plating an antireflection film on the light output end face, and obtaining a single chip after cleavage.

3. The method for preparing a chip for methane detection according to claim 2, wherein: Both the first passivation layer and the second passivation layer are any one of silicon oxide, silicon nitride, and silicon oxynitride; the thicknesses of both the first passivation layer and the second passivation layer are greater than or equal to 100 nm and less than or equal to 1000 nm.

4. The method for preparing a chip for methane detection according to claim 1, wherein: The coating method of the metal thin film is any one of magnetron sputtering coating, electron beam evaporation coating, resistance heating evaporation coating, electroplating, or chemical coating.

5. The method for preparing a chip for methane detection according to claim 1, characterized in that: When the heating module is a thermistor and a heater, the thermistor and the heater share a negative electrode pad, or the thermistor and the heater are respectively provided with negative electrode pads.

6. The method for preparing a chip for methane detection according to claim 1, characterized in that: The materials of both the thermistor and the heater are any one of palladium, germanium, tantalum, titanium, platinum, gold, silver, nickel, aluminum, chromium, tungsten, iridium, tin, copper, thallium, yttrium, manganese, bismuth, tellurium, silicon, and iron, or alloys, nitrides, or oxides formed by multiple of them.

7. The method for preparing a chip for methane detection according to claim 2, wherein: The epitaxial structure sequentially includes a lower confinement layer, an active layer, an upper confinement layer, an etch stop layer, a grating layer, and a cladding layer from bottom to top; the heater is placed on the first passivation layer or the second passivation layer, and after being powered on, heats the active layer and the grating layer; the thermistor is placed on the first passivation layer or the second passivation layer, and after being powered on, characterizes the chip temperature through the change in resistance value.

8. The method for preparing a chip for methane detection according to claim 1, wherein: Fabricating the thermistor and the heater through spin coating, exposure, development, metal coating, and stripping, or through metal coating, spin coating, exposure, development, etching, and resist stripping.

9. The method for preparing a chip for methane detection according to claim 1, wherein: The depth of the ridge waveguide is greater than or equal to 1 μm and less than or equal to 3 μm.

10. A methane detector, characterized in that, It includes a chip, and the chip is prepared by using the chip preparation method for methane detection according to any one of claims 1-9.

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