Test system for testing radio frequency characteristics of unit to be tested and calibration method thereof

Abstract

The invention provides a test system for testing radio frequency characteristics of a unit to be tested and a calibration method of the test system. The test system comprises a digital waveform generation module, a voltage detection module, a calibration module and a calibration detector, and the digital waveform generation module sends a first digital waveform signal to a unit to be tested to simulate radio frequency input and can also send a second digital waveform signal to the calibration detector; the voltage detection module detects a first voltage value output by the unit to be detected and receives a second voltage value generated by the calibration detector in response to the second signal; and the calibration module converts the equivalent radio frequency power of the second signal into a target voltage value based on the known input power-voltage relationship of the calibration detector, and calculates a power loss compensation value of the transmission path by actually measuring the difference value between the second voltage value and the target value, so as to correct the power output of the first digital waveform signal. The radio frequency signal received by the unit to be detected is ensured not to be influenced by the path loss, so that the accurate detection of the radio frequency characteristic is realized.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency chip testing, and particularly to a testing system for testing the radio frequency characteristics of a unit under test and its calibration method. Background Art

[0002] With the development of electronic technology, the application scope of semiconductor chip manufacturing technology is becoming increasingly wide. The verification of semiconductor chips at the wafer stage, also called CP (Chip Probing) testing, refers to testing the chips on a whole wafer that has not been diced and packaged. Through a prober, the bare chips are connected to a tester head, and a prober card is used to test the chips on the wafer. Screening out qualified chips through CP testing before packaging can improve the yield and reduce the subsequent packaging cost.

[0003] The tester head of a conventional CP tester includes a power supply, a high-speed digital test board card, etc., and can perform digital communication protocol testing, DC parameter testing, and partial low-frequency AC parameter testing on the chips on the wafer. For complex radio frequency testing, such as high-precision radio frequency signal power testing, the conventional CP tester cannot perform it because it cannot provide radio frequency power signals.

[0004] To solve the problem that the conventional CP tester cannot provide radio frequency power signals, there are usually the following two solutions: Solution 1: On the basis of a conventional CP tester, an external device capable of sending radio frequency power signals is added. This method requires joint debugging of the CP tester and the external device, with complex procedures and high development costs. Solution 2: Instead of using a conventional CP tester, a radio frequency tester that can directly send radio frequency power signals is used. However, since the number of radio frequency testers is relatively small compared to conventional CP testers, their development costs are relatively high. In addition, a dedicated radio frequency prober card needs to be developed and designed, increasing the cost of hardware facilities.

[0005] In addition, before performing radio frequency signal power testing, it is usually necessary to calibrate the radio frequency power signal. Both of the above two solutions require a power meter to calibrate the cable loss, and a vector network analyzer is needed to cooperate with a through-line to calibrate the loss of the prober card and the prober card transmission line.

[0006] Both of the above two solutions have the following disadvantages: the hardware structure is complex, and complex hardware improvement and upgrade for radio frequency signal power test are required based on a conventional CP tester; the development difficulty is high, and special solutions and programs need to be developed for radio frequency signal power test; the cost is high, and additional external devices or special radio frequency probe cards are used to increase the hardware and development costs; the calibration is difficult, and special calibration equipment is required to perform power calibration. Summary of the Invention

[0007] To solve at least some of the above technical problems, the present application provides a test system and method for testing the radio frequency characteristics of a unit under test, which uses the digital waveform signal generated by the digital waveform generation module to simulate the radio frequency power signal, enabling a test system such as a CP tester to perform radio frequency signal power test, and does not require special calibration equipment for power calibration.

[0008] The first aspect of the present application discloses a test system for testing the radio frequency characteristics of a unit under test. The test system includes: a digital waveform generation module for generating the first digital waveform signal, where the first digital waveform signal is used to simulate an input radio frequency power signal to the unit under test; a voltage detection module for receiving and detecting a first voltage value of the first voltage signal, where the first voltage signal is the signal output by the unit under test after receiving the first digital waveform signal and is used to characterize the radio frequency characteristics of the unit under test; a calibration detector with a known input radio frequency power-output voltage relationship, where the digital waveform generation module is further configured to output a second digital waveform signal to the calibration detector, and the voltage detection module is further configured to receive a second voltage signal output by the calibration detector and detect a second voltage value of the second voltage signal, where the second voltage signal is the signal output by the calibration detector after receiving the second digital waveform signal; a calibration module connected to the digital waveform generation module and the voltage detection module respectively, and configured to: obtain the equivalent radio frequency power of the second digital waveform signal and the second voltage value; based on the input radio frequency power-output voltage relationship and according to the equivalent radio frequency power of the second digital waveform signal, obtain a target voltage value, where the target voltage value is the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss of the second digital waveform signal in the transmission path is zero, and the transmission path is the path from the output end of the digital waveform generation module to the input end of the calibration detector; determine a power compensation value according to the difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

[0009] The second aspect of the present application discloses a calibration method, which is applied to the test system disclosed in the first aspect of the present application, and includes: storing the input radio frequency power-output voltage relationship; obtaining the equivalent radio frequency power of the second digital waveform signal and the second voltage value; based on the input radio frequency power-output voltage relationship and according to the equivalent radio frequency power of the second digital waveform signal, obtaining a target voltage value; wherein, the target voltage value is: the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss in the transmission path of the second digital waveform signal is zero; the transmission path is the path between the output end of the digital waveform generation module and the input end of the calibration detector; determining a power compensation value according to the difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

[0010] In the test system of the present application, a digital waveform generation module is added to the digital test machine. The first digital waveform signal output by the digital waveform generation module can simulate a radio frequency power signal and can perform radio frequency signal power testing on the unit under test. Compared with using a radio frequency signal source, the cost is lower. The cost of the digital waveform generation module is low, which can effectively reduce the cost. Moreover, the voltage amplitude of the digital waveform signal is easy to adjust through digital circuits or software, can quickly and flexibly change the signal characteristics, can simulate different radio frequency powers, and can meet different test or application requirements. Furthermore, the digital signal generator is easy to integrate into various systems and can conveniently cooperate with other digital devices or circuits to achieve more complex functions.

[0011] In the first aspect of the present application, the test system further includes: a digital test machine, the digital waveform generation module, the voltage detection module and the calibration module are located in the digital test machine, and the digital test machine is calibrated by detecting the calibration detector; a probe card, including a plurality of probes, which are respectively connected to the digital test machine and are used to contact the unit under test; wherein, the digital waveform generation module is connected to the first part of the probes, and the first part of the probes is used to input the first digital waveform signal into the unit under test; the voltage detection module is connected to the second part of the probes, and the second part of the probes is used to output the first voltage signal to the digital test machine.

[0012] When the second digital waveform signal output by the digital waveform generation module is transmitted to the input end of the calibration detector, power loss will occur. The loss power is equal to the difference between the power at the input end of the calibration detector and the power at the output end of the digital waveform generation module; and there is a linear relationship between the input RF power and the output voltage of the calibration detector. Therefore, the difference between the second voltage value and the target voltage value has a proportional relationship with the loss power of the second digital waveform signal. Therefore, the loss power of the second digital waveform signal can be determined according to the difference between the second voltage value and the target voltage value. This loss power is the power compensation value that needs to be compensated. The power compensation value can be used to compensate for the loss of the first digital waveform signal during transmission, ensuring that the power received by the unit under test is consistent with the expected power, thereby improving the test accuracy of the unit under test. Description of the Drawings

[0013] Figure 1 It is a schematic structural diagram of the test system involved in the present application; Figure 2 It is a schematic framework diagram of the first embodiment of the test system involved in the present application; Figure 3 It is a schematic diagram of the working principle of the detector; Figure 4 It is a schematic framework diagram of the second embodiment of the test system involved in the present application in the calibration working state; Figure 5 It is a schematic diagram of the input RF power-output voltage relationship of the calibration detector involved in the present application; Figure 6 It is a schematic framework diagram of the second embodiment of the test system involved in the present application in the test working state; Figure 7 It is a flowchart of the calibration method involved in the present application. Detailed Embodiments

[0014] The present application will be further described below in conjunction with specific embodiments and the accompanying drawings. It can be understood that the illustrative embodiments of the present disclosure are only for explaining the present application, rather than limiting the present application. In addition, for the convenience of description, only parts related to the present application rather than all structures or processes are shown in the drawings.

[0015] The following specific embodiments illustrate the implementation manners of the present application, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. Although the description of the present application will be introduced in conjunction with preferred embodiments, this does not mean that the features of this invention are limited to this implementation manner. On the contrary, the purpose of introducing the invention in conjunction with the implementation manner is to cover other alternatives or modifications that may extend based on the claims of the present application. In order to provide a deep understanding of the present application, many specific details will be included in the following description. The present application may also be implemented without using these details. In addition, in order to avoid confusing or obscuring the key points of the present application, some specific details will be omitted in the description. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments may be combined with each other.

[0016] Unless otherwise specified in the context, the terms "comprise", "have" and "include" are synonyms. The phrase "A / B" means "A or B". The phrase "A and / or B" means "(A and B) or (A or B)".

[0017] It should be understood that although the terms "first", "second", etc. may be used here to describe various components, units or data, these components, units or data should not be limited by these terms. These terms are only used to distinguish one feature from another. For example, without departing from the scope of the exemplary embodiments, the first feature may be referred to as the second feature, and similarly the second feature may be referred to as the first feature.

[0018] It should be understood that although the directional terms such as "upper", "lower", "left", "right", etc. may be used here to describe the positional relationship between various components, these directional terms are only used to conveniently represent the directions in the drawings for understanding and cannot be used to limit the protection scope of the present application.

[0019] It should be noted that in this specification, similar reference numerals and letters indicate similar items in the drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0020] To make the purpose, technical solutions and advantages of the present application clearer, the following will further describe the implementation manners of the present application in detail with reference to the drawings.

[0021] CP (Chip Probing) testing refers to testing the chips on a whole wafer that has not been diced and packaged. Through a prober, the exposed chips are connected to the tester head, and a prober card is used to test the chips on the wafer. FT (Final Test) testing refers to testing the diced and packaged chips. The FT tester has a dedicated RF board for corresponding RF testing, while the CP tester does not have a dedicated RF board for corresponding RF testing. The CP tester has a digital board for outputting digital signals. Therefore, generally, RF testing is performed on the chips during FT testing, and CP testing is basically DC testing without involving RF testing.

[0022] The inventors of this application have found through research that if RF testing is performed on the uncut chip dies on the wafer during the CP testing stage, defective products can be directly discarded when detected, without the need for subsequent dicing and packaging, thus reducing costs. In order to be able to perform RF testing during the CP testing stage, this application proposes a testing system and method that can use a CP tester for RF testing. The testing system and method of this application are introduced in detail below.

[0023] Figure 1 It is a schematic structural diagram of the testing system involved in this application. As Figure 1 shown, the testing system includes: A digital tester 10, which is used to generate a first digital waveform signal for testing the unit under test. The first digital waveform signal is a test signal. The digital tester 10 receives and analyzes the first voltage signal output by the unit under test based on the first digital waveform signal. The first voltage signal is the test result of the unit under test. The digital tester 10 may also include a tester head 11. As a component of the digital tester 10, the tester head 11 is used to connect and transmit the signals of the digital tester 10 to other components of the testing system; A load board 20, which plays a role of transitional connection and conducts the signals of the tester head 11 to the prober card 30; A prober card 30, which has a plurality of probes 31, each connected to the digital tester, and is used to contact the unit under test 4 for electrical connection to realize the input of the test signal and the output of the test result; A prober stage 40, which has a probe base 41 for supporting and fixing the unit under test 4. The prober stage 40 moves and positions the unit under test 4 through a precision mechanical structure, so that the probes 31 of the prober card 30 can accurately contact the unit under test 4 to achieve electrical connection; A data interface 50, which is used for communication coordination between various parts of the testing system or for connecting and interacting with external devices.

[0024] Figure 2 This is a schematic diagram of the framework of the first embodiment of the test system involved in this application. For clear display, in the Figure 2 schematic diagram of the framework shown, parts such as the test head, load board, probe card, probe table, data interface, etc. are omitted. As Figure 2 shown, the digital tester 10 of the test system 1 includes a digital waveform generation module 2 and a voltage detection module 3. The digital waveform generation module 2 and the voltage detection module 3 are respectively connected to the unit under test 4, and the unit under test 4 is a radio frequency chip to be tested for radio frequency characteristics.

[0025] Specifically, in combination with Figure 1 and Figure 2 , the test system 1 can be a CP tester. The digital waveform generation module 2 and the voltage detection module 3 are arranged in the digital tester 10 of the test system 1. In some embodiments, the digital waveform generation module 2 and the voltage detection module 3 can be arranged in the test head 11 of the digital tester 10. The digital waveform generation module 2 is connected to the first part of the probes 31 in the probe card 30 through a cable, and is used to generate a first digital waveform signal; and then is connected to the unit under test 4 arranged on the probe table 40 through the first part of the probes 31, and is used to input the first digital waveform signal into the unit under test 4. Among them, the first digital waveform signal is used to simulate inputting a radio frequency power signal into the unit under test 4.

[0026] The voltage detection module 3 is connected to the probe card 30 through another cable, and then is connected to the unit under test 4 arranged on the probe table 40 through the first part of the probes 31. The digital waveform generation module 2 is used to send a test signal to the unit under test 4, and the voltage detection module 3 is used to detect the first voltage value of the first voltage signal fed back by the unit under test 4, forming a closed loop to perform wafer testing. Among them, the first voltage signal is the signal output by the unit under test 4 after receiving the first digital waveform signal, and its first voltage value can reflect the radio frequency characteristics of the unit under test 4. The radio frequency characteristics include the detection voltage and / or the radio frequency power, or the relationship between the detection voltage and the radio frequency power.

[0027] According to the test system of this application, the digital waveform generation module of the CP tester can be used to output a first digital waveform signal, and the first digital waveform signal is used to simulate a radio frequency power signal to perform radio frequency signal power testing on the unit under test. Compared with using an additional radio frequency signal source, using a digital waveform to simulate a radio frequency power signal does not require additional radio frequency hardware, which reduces the development difficulty and effectively reduces the cost at the same time. Moreover, the voltage amplitude of the digital waveform signal is easy to adjust through digital circuits or software, and can quickly and flexibly change the signal characteristics to meet different test or application requirements.

[0028] In some embodiments, the unit under test 4 is a chip die on a whole un-diced and un-packaged wafer, which can be any kind of RF chip, such as a detector chip, a power amplifier, a transceiver chip, an RF switch chip, etc. Hereinafter, the detector chip will be taken as an example for illustration. A detector, also known as a Radio Frequency Detector (RFDET), is used to receive an RF power signal and output a corresponding voltage signal. The voltage value of the voltage signal is proportional to the power of the input signal, and it can accurately detect and measure the amplitude and power of the RF signal, and is widely used in wireless systems. Figure 3 is a schematic diagram of the working principle of the detector. As Figure 3 shown, the input signal of the detector is an RF power signal, and its power Pin (unit: dBm) changes with time; the output signal of the detector is a voltage signal, and the voltage value of the voltage signal VOUT (unit: V) is proportional to the power of the input signal.

[0029] Generally, RF testing is only performed on the diced and packaged chips during the Final Test (FT). There is a dedicated RF board in the FT tester for the corresponding RF testing. However, the inventor of the present application innovatively advances the RF testing originally performed in the FT testing stage to the CP testing stage, and the RF testing function can be realized by modifying the software and hardware of the CP tester without further adding external devices, which reduces the development cost. Moreover, testing the un-diced chip die on the wafer during the CP testing stage allows defective products to be directly discarded without subsequent dicing and packaging, thereby further reducing costs.

[0030] In some embodiments, the digital waveform generation module 2 can generate various digital waveform signals, such as a digital waveform generator or a digital board. Preferably, the digital waveform generation module 2 generates a square wave signal or a triangular wave signal as the first digital waveform signal for simulating an RF power signal input to the unit under test 4. The square wave signal and the triangular wave signal are the digital waveform signals that the digital waveform generation module 2 can most easily generate, and their voltage amplitudes are easy to adjust. Using them to simulate the RF power signal can effectively reduce the testing cost.

[0031] The equivalent RF power P in1 of the first digital waveform signal can be calculated based on the voltage amplitude V in1 of the first digital waveform signal and the known load resistance value R. The equivalent RF power of a digital waveform refers to converting the power characteristics of a digital signal (such as a square wave, a triangular wave, etc.) through frequency domain analysis into an equivalent power value within a specific RF frequency band.

[0032] Taking the first digital signal as a square wave signal as an example, the equivalent RF power of the first digital waveform signal can be calculated by the following formula (1): .

[0033] Similarly, when the first digital signal is a triangular wave signal, its equivalent RF power can be calculated by the following formula (2): .

[0034] Taking the case where the digital waveform signal is a digital square wave signal as an example, the equivalent RF power of the digital square wave signal can be calculated by the following specific formula (1-1): , where V in represents the voltage amplitude of the digital square wave signal, with the unit of millivolt (mV). First, divide the voltage amplitude by 1000 to convert it to the unit of volt, then square the voltage amplitude, and set the resistance value of the load resistor to 50 ohms to obtain the power value of the digital square wave signal, with the unit of watt (W) at this time. Then divide the power value by 0.001 (i.e., the reciprocal of 1000) to convert the power unit from watt to milliwatt. Then take the logarithm to the base 10 of the power value obtained in milliwatt units and multiply by 10. Finally, the equivalent RF power value of the digital square wave signal can be converted from the linear unit milliwatt (mW) to the logarithmic unit decibel milliwatt (dBm).

[0035] Using the above formula, for example, when the high and low level amplitudes of the digital square wave signal are ±200 mV, the calculated equivalent RF power is 0.8 mW, which is approximately -1 dBm when converted to decibel milliwatt.

[0036] The inventors of the present application further found through research that the equivalent RF power emitted by the CP tester is inconsistent with the RF power of the signal received by the unit under test because the cable and the probe will consume a certain amount of RF power. Therefore, it is necessary to calibrate the power of the test system to improve the test accuracy.

[0037] Figure 4 This is a schematic diagram of the framework of the second embodiment of the test system involved in the present application in the calibration working state. For clear display, in Figure 4 the shown schematic diagram of the framework, parts such as the test head, load board, probe card, probe table, data interface, etc. are omitted. Combining Figure 1 and Figure 4, in the second embodiment of the present application, in addition to the digital waveform generation module 2 and the voltage detection module 3, the digital tester 10 of the test system 1 further includes a calibration module 5, which is calibrated by the test calibration detector 6. In the present application, the input RF power and the output voltage of the calibration detector 6 are linearly related within the dynamic range, and this linear relationship is known. That is to say, when the input RF power of the calibration detector 6 is a known and specific power, its output voltage is a known and specific voltage, and this known and specific voltage can be understood as the target voltage value. If the signal sent by the digital waveform generation module 2 is equivalent to this known and specific power, but the output voltage of the calibration detector 6 is different from the known and specific voltage, it means that due to the loss of the cable and the probe, the input power reaching the calibration detector 6 is different from this known and specific power, so the output voltage of the calibration detector 6 is different from the known and specific voltage. Therefore, the digital waveform generation module 2 can be used to send a digital waveform signal to the calibration detector 6, and the voltage detection module 3 can be used to detect the output voltage of the calibration detector 6, so as to perform calibration by comparing the actually measured output voltage with the output voltage corresponding to the digital waveform signal in the ideal case without any attenuation.

[0038] During calibration, the calibration detector 6 is placed on the probe station 40. The digital waveform generation module 2 is connected to the probe card 30 through a cable, and then connected to the calibration detector 6 arranged on the probe station 40 through the first part of the probes 31 on the probe card 30; the voltage detection module 3 is connected to the probe card 30 through another cable, and then connected to the calibration detector 6 arranged on the probe station 40 through the second part of the probes on the probe card, for simulating the test environment of the unit under test. And the calibration module 5 is respectively connected to the digital waveform generation module 2 and the voltage detection module 3. It should be noted here that the calibration detector can be fixed as a part of the test system on one of the multiple probe seats of the probe station, or the calibration detector can be a detachable calibration device and be installed on the probe seat of the probe station when calibration work is required.

[0039] As Figure 4 shown, the digital waveform generation module 2 outputs a second digital waveform signal to the calibration detector 6. Similar to the first digital waveform signal, the second digital waveform signal is preferably a square wave signal or a triangular wave signal. It should be noted here that during the entire calibration and test process, the first digital waveform signal and the second digital waveform signal should select the same waveform signal, that is, both the first digital waveform signal and the second digital waveform signal select square wave signals, or both the first digital waveform signal and the second digital waveform signal select triangular wave signals.

[0040] The digital waveform generation module 2 is connected to the calibration detector 6, and the calibration detector 6 receives the second digital waveform signal from the digital waveform generation module 2. The calibration detector 6 is connected to the voltage detection module 3, and the voltage detection module 3 receives the second voltage signal output by the calibration detector 6 and detects the second voltage value of the second voltage signal. Herein, the second voltage signal is the signal output by the calibration detector after receiving the second digital waveform signal. The calibration module 5 obtains the second voltage value from the voltage detection module 3.

[0041] On the one hand, the calibration module 5 is configured to obtain the equivalent RF power of the second digital waveform signal from the digital waveform generation module 2. Based on the input RF power - output voltage relationship of the calibration detector 6 and the equivalent RF power of the second digital waveform signal, the output voltage corresponding to the equivalent RF power of the second digital waveform signal can be obtained as the target voltage value. In this application, the target voltage value refers to the voltage value that the calibration detector 6 should output after receiving the second digital waveform signal under ideal conditions, that is, when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path from the output end of the digital waveform generation module 2 to the input end of the calibration detector 6.

[0042] On the other hand, the calibration module 5 is configured to receive the second voltage value from the voltage detection module 3. Since there is power loss when the second digital waveform signal is transmitted from the output end of the digital waveform generation module 2 to the input end of the calibration detector, this second voltage value is the test error caused by factors such as the cables in the transmission path, the transmission lines on the probe card, the probe loss, and the impedance mismatch of the test system, and it is the actually measured voltage value.

[0043] Furthermore, based on the characteristic that the output voltage of the detector shows a linear change with the input power within the dynamic range, the compensation value of the output voltage and the compensation value of the input power also show a linear law, which means that the compensation value that needs to be made to the input power can be accurately calculated according to the output voltage compensation value. Therefore, the calibration module 5 can determine the power compensation value according to the difference between the second voltage value and the target voltage value.

[0044] In some embodiments, the calibration module 5 calculates according to the voltage amplitude of the second digital waveform signal to obtain the equivalent RF power of the second digital waveform signal. For example, when the second digital waveform signal is a square wave signal, the equivalent RF power of the second digital waveform signal can be calculated according to the following formula (3): , where P in2 is the equivalent RF power of the second digital waveform signal, V in2 is the voltage amplitude of the second digital waveform signal, and R is the load resistance value.

[0045] In some embodiments, the calibration module 5 can obtain the target voltage value through the following two methods: The first method is to obtain the target voltage value based on the look-up table of the radio frequency power-output voltage relationship and the equivalent radio frequency power of the second digital waveform signal. Specifically, the test system further includes a non-volatile memory. For example, a non-volatile memory is provided in the digital tester of the test system. The input radio frequency power-output voltage relationship is stored in the non-volatile memory in the form of a look-up table. The calibration module 5 can read the look-up table stored in the non-volatile memory and, according to the equivalent radio frequency power of the second digital waveform signal, can find the corresponding output voltage as the target voltage value; The second method is to obtain the target voltage value based on the calculation formula of the radio frequency power-output voltage relationship and the equivalent radio frequency power of the second digital waveform signal. Specifically, the calibration module 5 can substitute the equivalent radio frequency power of the second digital waveform signal into the formula of the input radio frequency power-output voltage relationship to calculate the output voltage under the equivalent radio frequency power of the second digital waveform signal as the target voltage value.

[0046] The following combines Figure 5 to illustrate the second method. Figure 5 FIG. is a schematic diagram of the input radio frequency power-output voltage relationship of the calibration detector involved in the present application. As Figure 5 shown, the horizontal axis represents the input radio frequency power, the vertical axis represents the output voltage, the input radio frequency power and the output voltage are linearly related, and k is a linear parameter representing the slope. It should be noted here that the calibration detector 6 has standard linear response characteristics and linear parameters as a calibration component. By measuring the output voltage characteristics of the calibration detector 6, the power compensation value can be determined, so as to calibrate the input power, make the input power more accurately input to the unit under test 4, and then more accurately test the detection voltage characteristics of the unit under test 4. The input radio frequency power-output voltage relationship formula (4) of the calibration detector 6 is: , where x is the input radio frequency power of the calibration detector, b is the bias parameter, k is the linear parameter representing the slope, and y is the output voltage.

[0047] Substitute the equivalent radio frequency power P in2 of the second digital waveform signal into x in formula (4), and the target voltage value obtained is: .

[0048] In Figure 5 , A represents the target voltage value, B represents the second voltage value, and it can be obtained that the deviation between the actual output voltage (i.e., the second voltage value) and the target voltage value caused by the deviation of the input power is V_offset = A - B. According to the known linear parameter k, the power compensation value can be determined by the following formula (5): .

[0049] This power compensation value is used to eliminate the test errors caused by factors such as the cables on the signal transmission path, the transmission lines on the probe card, the probe loss, and the impedance mismatch of the test system.

[0050] After determining the power compensation value, store this power compensation value in the calibration module 5. When the test system 1 is in the test working state, the calibration module 5 sends the power compensation value to the digital waveform generation module 2, and uses this power compensation value to compensate the first digital waveform signal generated by the digital waveform generation module 2, so as to perform a more accurate radio frequency characteristic test. Using this power compensation value to compensate the first digital waveform signal means adding the power compensation value to the target equivalent radio frequency power n at the receiving end of the device under test 4, so that the equivalent radio frequency power P of the first digital waveform signal at the output end of the digital waveform generation module can be obtained through the following formula (6) in1 :[[]]END]] .

[0051] In Figure 6 the shown frame schematic diagram, parts such as the test head, load board, probe card, probe table, and data interface are omitted. As Figure 6 shown, the calibration module 5 is connected to the digital waveform generation module 2. The calibration module 5 will output the power compensation value obtained under the calibration working state to the digital waveform generation module 2. The digital waveform generation module 2 compensates the equivalent radio frequency power of the first digital waveform signal according to the received power compensation value, so as to effectively eliminate the power loss generated on the test loop, and at the same time overcome the problem of input power inaccuracy, and then accurately calibrate the power to the receiving end of the device under test 4. The device under test 4 receives the first digital waveform signal and outputs the first voltage signal to the voltage detection module 3. The voltage detection module 3 detects the first voltage value of the first voltage signal, thereby completing the detection voltage characteristic test of the device under test 4.

[0052] In some embodiments, the calibration module 5 can be or include: an application specific integrated circuit (ASIC), an electronic circuit, a (shared, dedicated or group) processor and / or memory that executes one or more software or firmware programs, a combinational logic circuit, and / or other suitable components that provide the described functions. In some cases, the calibration module 5 can be implemented in hardware, firmware, software, or any combination thereof. The calibration module 5 can also be implemented as instructions carried or stored on one or more temporary or non - temporary machine - readable (e.g., computer - readable) storage media, which can be read and executed by one or more processors.

[0053] The present application also discloses a calibration method, which is designed based on the structure and working principle of the above test system and aims to solve the power calibration problem during the test process. This calibration method is applied to the calibration process of the test system as shown in Figure 1 and Figure 4 . As shown in Figure 7 , the calibration method disclosed in the present application includes the following steps: Step S101, the calibration module 5 obtains the input RF power-output voltage relationship of the calibration detector 6. Specifically, this input RF power-output voltage relationship is the known input RF power-output voltage relationship of the calibration detector 6; Step S102, place the calibration detector 6 on the probe station 40 in Figure 1 , and the probe contacts the calibration detector 6; the digital waveform generation module 2 sends a second digital waveform signal to the calibration detector 6 through the first part of the probes to simulate the RF power; the calibration module 5 also obtains the equivalent RF power of the second digital waveform signal from the digital waveform generation module 2; Step S103, based on the second digital waveform signal, the calibration detector 6 feeds back a second voltage signal to the voltage detection module 3; the second part of the probes of the voltage detection module 3 detects the voltage value of the second voltage signal and outputs the second voltage value; the calibration module 5 also obtains the second voltage value from the voltage detection module 3; Step S104, based on the input RF power-output voltage relationship and according to the equivalent RF power of the second digital waveform signal, the calibration module 5 can obtain the target voltage value under this equivalent RF power; In some embodiments, the calibration module 5 can obtain the target voltage value through the first method or the second method described above, which will not be elaborated here.

[0054] Step S105, the calibration module 5 can determine the power compensation value according to the difference between the second voltage value and the target voltage value.

[0055] In some embodiments, the calibration module 5 can determine the power compensation value according to formula (5) above, which will not be elaborated here. This power compensation value is used to eliminate the test errors caused by factors such as the cables on the signal transmission path, the transmission lines on the probe card, the probe loss, and the impedance mismatch of the test system.

[0056] After determining the power compensation value, store this power compensation value in the calibration module 5. When the test system 1 is in the test working state, the calibration module 5 sends the power compensation value to the digital waveform generation module 2 and uses this power compensation value to compensate the first digital waveform signal generated by the digital waveform generation module 2, so as to perform a more accurate RF characteristic test.

[0057] In some embodiments, the calibration module 5 may determine the equivalent RF power P of the first digital waveform signal according to the foregoing formula (6). in1 Details are not described herein again.

[0058] The test system and method for testing the RF characteristics of a unit under test disclosed in the present application use a digital waveform generator in a conventional CP tester to test the power of RF signals. Compared with the methods of using an RF tester or an external RF power signal source, the hardware and development costs are reduced, and the efficiency is effectively improved. Moreover, for the test errors caused by the cables in the transmission path of the RF signal, the transmission lines on the probe card, the probe loss, and the impedance mismatch of the test system during the RF signal power test, the method of adjusting the input power by using the detection voltage output terminal can be used to effectively calibrate the input power at the tip of the probe without using a dedicated calibration device.

[0059] The above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed in the present application can think of changes or substitutions, which should be covered within the protection scope of the present application; without conflict, the embodiments of the present application and the features in the embodiments can be combined with each other. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A test system for testing the radio frequency characteristics of a unit under test, characterized in that The test system includes: A digital waveform generation module for generating the first digital waveform signal; wherein, the first digital waveform signal is used to simulate an input radio frequency power signal to the unit under test; A voltage detection module for receiving and detecting a first voltage value of the first voltage signal; wherein, the first voltage signal is a signal output by the unit under test after receiving the first digital waveform signal and is used to characterize the radio frequency characteristics of the unit under test; A calibration detector, the relationship between the input radio frequency power and the output voltage of the calibration detector being known; wherein, The digital waveform generation module is further configured to output a second digital waveform signal to the calibration detector; The voltage detection module further receives a second voltage signal output by the calibration detector and detects a second voltage value of the second voltage signal; wherein, the second voltage signal is a signal output by the calibration detector after receiving the second digital waveform signal; A calibration module, connected to the digital waveform generation module and the voltage detection module respectively, and configured to: Obtain the equivalent radio frequency power of the second digital waveform signal and the second voltage value; Based on the input radio frequency power-output voltage relationship and according to the equivalent radio frequency power of the second digital waveform signal, obtain a target voltage value; wherein, the target voltage value is: the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path between the output end of the digital waveform generation module and the input end of the calibration detector; Determine a power compensation value according to the difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

2. The test system according to claim 1, wherein The test system further includes: A digital tester, the digital waveform generation module, the voltage detection module and the calibration module are located in the digital tester, and the digital tester is calibrated by detecting the calibration detector; A probe card, including a plurality of probes, which are respectively connected to the digital tester and are used to contact the unit under test; wherein, The digital waveform generation module is connected to a first part of the probes, and the first part of the probes is used to input the first digital waveform signal into the unit under test; The voltage detection module is connected to a second part of the probes, and the second part of the probes is used to output the first voltage signal to the digital tester.

3. The test system according to claim 1, wherein The test system further includes a non-volatile memory, and the input radio frequency power-output voltage relationship is stored in the non-volatile memory in the form of a look-up table; The steps for the calibration module to obtain the target voltage value include: Obtaining the target voltage value by querying the look-up table according to the equivalent radio frequency power of the second digital waveform signal.

4. The test system according to claim 1, characterized in that The steps for the calibration module to obtain the target voltage value include: The calibration module calculates the target voltage value according to the following formula: ， where P in2 is the equivalent RF power of the second digital waveform signal, k is a linear parameter representing the slope, and b is a bias parameter.

5. The test system according to claim 3 or 4, characterized in that, The determination of the power compensation value includes: The calibration module calculates the power compensation value according to the following formula: ， where P in_offset is the power compensation value, A is the target voltage value, B is the second voltage value, and k is a linear parameter representing the slope.

6. The test system according to any one of claims 1-4, characterized in that, The first digital waveform signal and the second digital waveform signal are square wave signals or triangular wave signals.

7. The test system according to any one of claims 1 to 4, characterized in that, The unit under test is a detector under test.

8. A calibration method, characterized in that, For the test system according to any one of claims 3-5, the calibration method includes: Storing the input RF power-output voltage relationship; Obtaining the equivalent RF power of the second digital waveform signal and the second voltage value; Based on the input RF power-output voltage relationship and according to the equivalent RF power of the second digital waveform signal, obtaining a target voltage value; wherein, the target voltage value is: the voltage value output by the calibration detector after receiving the second digital waveform signal when the power loss of the second digital waveform signal in the transmission path is zero; the transmission path is the path between the output end of the digital waveform generation module and the input end of the calibration detector; Determining a power compensation value according to the difference between the second voltage value and the target voltage value, and the power compensation value is used to compensate the first digital waveform signal.

9. The calibration method according to claim 8, wherein The steps for the calibration module to obtain the target voltage value include: The calibration module calculates the target voltage value according to the following formula: ， where P in2 is the equivalent RF power of the second digital waveform signal, k is a linear parameter representing the slope, and is a bias parameter; or, The test system further includes a non-volatile memory, and the input RF power-output voltage relationship is stored in the non-volatile memory in the form of a look-up table; The steps for the calibration module to obtain the target voltage value include: Obtaining the target voltage value by querying the look-up table according to the equivalent RF power of the second digital waveform signal.

10. The calibration method according to claim 8, wherein Determining the power compensation value includes: The calibration module calculates the power compensation value according to the following formula: ， where P in_offset is the power compensation value, A is the target voltage value, B is the second voltage value, and k is a linear parameter representing the slope.

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