Contact detection device, contact detection method and measurement system
Through the coordinated work of FPGA and analog circuit, multi-speed quantization detection of contact resistance between voltage and current terminals on the same side in the four-terminal architecture is achieved, which solves the problems of high error rate and insufficient adaptability of contact detection in the prior art, improves detection accuracy and flexibility, and reduces costs.
Patent Information
- Application Number
- CN202510724193.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-03
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2045-06-03
AI Technical Summary
The existing contact detection technology is difficult to quantify the contact resistance between voltage and current terminals on the same side in the four-terminal architecture, and lacks adaptability, resulting in a high misjudgment rate and making it difficult to achieve accurate contact state diagnosis and early warning.
The FPGA and analog circuit work together, and through the multi-speed control function, the contact resistance between the voltage and current terminals on the same side is quantified, and combined with the multiplexer and the comparison unit to detect the contact reliability between the opposite terminals. Users can flexibly set the limit value of the allowable contact resistance according to environmental parameters.
It effectively solves the problems of single and insufficient flexibility in judgment results of traditional detection methods, improves the accuracy and adaptability of contact detection, reduces costs, and improves detection efficiency.
Smart Images

Figure CN120254708A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of four-terminal method measurement, and particularly relates to a contact detection device, a contact detection method and a measurement system. Background Art
[0002] In the fields of electronic manufacturing, semiconductor testing and automated assembly, the contact reliability of test fixtures (including test jigs, probe stations, IC (Integrated Circuit) sockets, etc.) is a key factor affecting product quality and production efficiency. Traditionally, to eliminate the measurement error introduced by lead resistance, the Kelvin four-wire detection architecture is widely used in high-precision measurement scenarios. Accordingly, it is very necessary to monitor the contact reliability between corresponding ends. Poor working conditions such as excessive resistance between the voltage and current terminals on the same side of the fixture and mis-clamping of the fixture will significantly affect the measurement effect of the system. Typical use cases include, but are not limited to: PCBA (printed circuit board assembly) testing: poor contact between the probe and the pad in ICT (in circuit tester online testing) and FCT (Functional Circuit Test) will lead to misjudgment; battery / connector detection: an increase in contact resistance under high-current load will cause potential safety hazards such as temperature rise.
[0003] Existing contact detection technologies are based on simplified on-off detection principles, and it is difficult to quantitatively evaluate the contact resistance between the voltage and current terminals on the same side in a four-terminal architecture. Moreover, the lack of adaptability, that is, the lack of the ability to dynamically adjust the contact resistance determination threshold according to environmental parameters (temperature, humidity, aging degree, mechanical wear, oxidation degree, etc.), results in a high misjudgment rate. This technical gap makes it difficult for the test system to achieve accurate contact state diagnosis and warning.
[0004] The above information disclosed in this background art is only used to increase the understanding of the background art of the present application. Therefore, it may include prior art that is not known to those of ordinary skill in the art. Summary of the Invention
[0005] An object of an embodiment of the present invention is to provide a contact detection device, which supports multi-gear setting of the allowable contact resistance between the voltage and current terminals on the same side, realizes quantification of the contact resistance between the voltage and current terminals on the same side, so as to determine whether the contact resistance between the corresponding ends meets the range of the allowable contact resistance acceptable to the user, realizes the contact reliability between the test corresponding ends, and improves the accuracy of measuring products using the four-terminal fixture.
[0006] To achieve the above object of the invention, the present invention is implemented by the following technical solutions: The present application relates to a contact detection device, including: Four - wire terminal, which includes a first voltage - current pair terminal and a second voltage - current pair terminal; A first voltage acquisition unit, which includes the contact resistance between the first current terminal and the first voltage terminal in the first voltage - current pair terminal. The voltage output terminal of the first voltage acquisition unit is connected to the first follower. Among them, different preset first allowable contact resistances between the first voltage - current pair terminals correspond to different first voltage levels; A second voltage acquisition unit, which includes the contact resistance between the second current terminal and the second voltage terminal in the second voltage - current pair terminal. The voltage output terminal of the second voltage acquisition unit is connected to the second follower. Among them, different preset second allowable contact resistances between the second voltage - current pair terminals correspond to different second voltage levels; A comparison unit, whose first input terminal receives a threshold voltage; An output control unit, which is used to switch and output the output value of the first follower or the output value of the second follower to the second input terminal of the comparison unit; A multiplexer; An FPGA, which is used to control the output control unit, and according to the selected gear of the first allowable contact resistance or the second allowable contact resistance, the FPGA controls the multiplexer to select and output a certain voltage signal equal to the threshold voltage, and the certain voltage signal is equal to the voltage level corresponding to the selected gear of the first allowable contact resistance or the second allowable contact resistance; The output terminal of the comparison unit is connected to the FPGA.
[0007] In some embodiments of the present application, the contact detection device further includes: A third follower, which is arranged at the output terminal of the first follower; A fourth follower, which is arranged at the output terminal of the second follower; The output control unit switches and outputs the output value of the third follower or the output value of the fourth follower to the second input terminal of the comparison unit.
[0008] In some embodiments of the present application, the output control unit includes: A first switch control element, which is connected to the output terminal of the third follower and the second input terminal of the comparison unit; A second switch control element, which is connected to the output terminal of the fourth follower and the second input terminal of the comparison unit.
[0009] In some embodiments of the present application, when the FPGA controls the first switch control element to close and the second switch control element to open, the contact detection device is used to detect the contact reliability between the first voltage - current pair terminals; When the FPGA controls the second switch control element to close and the first switch control element to open, the contact detection device is used to detect the contact reliability between the second voltage-current pair terminals.
[0010] In some embodiments of the present application, the number of multiplexed voltage signals selected and output by the multiplexer is greater than or equal to the sum of the number of different first voltage levels and the number of different second voltage levels.
[0011] In some embodiments of the present application, the multiplexer includes a plurality of input channels, a plurality of output channels, and an output terminal. The contact detection device further includes: A voltage dividing circuit having a plurality of voltage dividing output terminals. One voltage dividing output terminal is correspondingly connected to one output channel, and the voltage division at one voltage dividing output terminal is equal to one of the different first voltage levels and the different second voltage levels.
[0012] In some embodiments of the present application, the first input terminal of the comparison unit is the non-inverting input terminal. The contact detection device further includes: An early warning unit connected to the FPGA. When the comparison unit outputs a high level, the FPGA controls the early warning unit not to output an early warning of poor contact between the corresponding terminals. When the comparison unit outputs a low level, the FPGA controls the early warning unit to output an early warning of poor contact between the corresponding terminals.
[0013] The contact detection device proposed in the present application has the following advantages and beneficial effects compared with the prior art: By using the FPGA and the analog circuit to work together, and through the multi-level control function of the FPGA for the first allowable contact resistance and the second allowable contact resistance, the contact reliability detection between the terminals is realized, and the user can flexibly set the limit value of the allowable contact resistance according to different test environment conditions, effectively solving the problems of single judgment result, difficulty in quantifying the contact resistance, and lack of flexibility in the traditional on-off detection method.
[0014] The present application also relates to a contact detection method implemented by using the contact detection device as described above. The contact detection method includes: The FPGA issues an instruction to control the output control unit to act, so that the contact detection device is in the first detection state or the second detection state; Select the first allowable contact resistance level in the first detection state or select the second allowable contact resistance level in the second detection state; According to the signal output by the FPGA, judge whether the contact resistance between the first voltage-current pair terminals exceeds the selected first allowable contact resistance level, or whether the contact resistance between the second voltage-current pair terminals exceeds the selected second allowable contact resistance level.
[0015] This application also relates to a measurement system, including: A voltage and current sampling architecture based on a four-wire terminal. The four-wire terminal includes a first voltage-current pair terminal and a second voltage-current pair terminal. The voltage and current sampling architecture includes a signal source module, a voltage acquisition module, and a current acquisition module. The signal source module is connected to the first current terminal in the first voltage-current pair terminal. The first voltage terminal in the first voltage-current pair terminal is connected to the voltage acquisition module through the output of a first follower. The second voltage terminal in the second voltage-current pair terminal is connected to the voltage acquisition module through the output of a second follower. The second current terminal in the second voltage-current pair terminal is connected to the virtual ground connection point of a self-balancing bridge circuit. The current acquisition module acquires the current flowing through the sampling resistor in the self-balancing bridge circuit; A first voltage acquisition unit, which includes a contact resistance between the first current terminal and the first voltage terminal. The voltage output terminal of the first voltage acquisition unit is connected to the first follower. Among them, different preset first allowable contact resistances between the first voltage-current pair terminals correspond to different first voltage levels; A second voltage acquisition unit, which includes a contact resistance between the second current terminal and the second voltage terminal. The voltage output terminal of the second voltage acquisition unit is connected to the second follower. Among them, different preset second allowable contact resistances between the second voltage-current pair terminals correspond to different second voltage levels; A switch control component, which is used to switch the measurement system to the sampling state of the voltage and current sampling architecture, the first detection state for detecting the contact resistance between the first voltage-current pair terminals, and the second detection state for detecting the contact resistance between the second voltage-current pair terminals. The first voltage acquisition unit is connected in the first detection state, and the second voltage acquisition unit is connected in the second detection state; A comparison unit, whose first input terminal receives a threshold voltage. By controlling the switch control component, the output value of the first follower in the first detection state is input to the second input terminal of the comparison unit, and the output value of the second follower in the second detection state is input to the second input terminal of the comparison unit; A multiplexer; An FPGA, which controls the state of the switch control component, and according to the selected gear of the first allowable contact resistance or the second allowable contact resistance, controls the multiplexer to select and output a certain voltage signal equal to the threshold voltage. The certain voltage signal is equal to the voltage level corresponding to the selected gear of the first allowable contact resistance or the second allowable contact resistance; The output terminal of the comparison unit is connected to the FPGA.
[0016] The measurement system proposed in this application has the following advantages and beneficial effects compared with the prior art: (1)By leveraging the original voltage and current sampling architecture based on four-wire terminals, the original resources are effectively utilized, the cost of contact detection layout is reduced, and an additional contact resistance monitoring solution is provided for applications in most four-terminal method measurement fields. This avoids the need to design an independent circuit or invest manpower for the monitoring function. While effectively controlling costs, the efficiency of detecting the contact reliability between the voltage and current opposite ends on the same side is significantly improved; (2)The FPGA and analog circuits work together. Through the multi-gear control function of the FPGA for the first allowable contact resistance and the second allowable contact resistance, the contact reliability detection of the opposite ends is realized, and users can flexibly set the limit values of the allowable contact resistance according to different test environment conditions, effectively solving the problems of single judgment result, difficulty in quantifying the contact resistance, and lack of flexibility in the traditional on-off detection method.
[0017] In some embodiments of the present application, the switch control component includes a plurality of switch control elements, and the plurality of switch control elements include: The first switch control element is connected between the output end of the first follower and the second input end of the comparison unit; The second switch control element is connected between the output end of the second follower and the second input end of the comparison unit; The third switch control element is connected on the line between the first current terminal and the signal source module; One end of the fourth switch control element is connected to the common connection position of the third switch control element and the first current terminal, and the other end is grounded; For the fifth switch control element, a first current-limiting resistor is connected between the first voltage terminal and the input end of the first follower. One end of the fifth switch control element is connected to the power supply, and the other end is connected to the common connection position between the first current-limiting resistor and the input end of the first follower through a second current-limiting resistor; The sixth switch control element is connected between the second current terminal and the sampling resistor; One end of the seventh switch control element is connected to the common connection position of the sixth switch control element and the second current terminal, and the other end is grounded; For the eighth switch control element, a third current-limiting resistor is connected between the second voltage terminal and the input end of the second follower. One end of the eighth switch control element is connected to the power supply, and the other end is connected to the common connection position between the third current-limiting resistor and the input end of the second follower through a fourth current-limiting resistor.
[0018] After reading the specific embodiments of the present invention in conjunction with the drawings, other features and advantages of the present invention will become clearer. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for use in the embodiments. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.
[0020] Figure 1 The circuit diagram showing the connection between the analog circuit and the FPGA in the contact detection device proposed by the present invention; Figure 2 The circuit diagram showing the connection between the FPGA and the multiplexer in the contact detection device proposed by the present invention; Figure 3 The preset table showing the relationship between the voltage levels and the allowable contact resistance values involved in the contact detection device proposed by the present invention; Figure 4 Showing the existing voltage and current sampling architecture based on four-wire terminals; Figure 5 The circuit diagram showing the measurement system proposed by the present invention.
[0021] Reference numerals: 10. Signal source and voltage sampling part; 11. Signal source module; 12. Operational amplifier conditioning circuit; 13. Voltage acquisition module; 20. Self-balancing bridge and current sampling part; 21. Current acquisition module; 30. Four-wire terminal; 40. First voltage acquisition unit; 50. Second voltage acquisition unit; 60. Comparison unit; 70. Multiplexer; 80. FPGA; 90. Voltage division circuit. Detailed implementation manners
[0022] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments.
[0023] Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention. In the description of the present invention, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.
[0024] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in a suitable manner in any one or more embodiments or examples.
[0025] The terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise stated, the meaning of "a plurality" is two or more.
[0026] In existing industrial commercial four-terminal clamp fixtures, a voltage and current sampling architecture based on a self-balancing bridge circuit is used to measure the resistance value of the measured resistor and needs to detect whether the contact resistance between the opposite ends of the fixture is reasonable. It is impossible to quantify the contact resistance between the opposite ends. However, the contact reliability between the opposite ends in the fixture will affect the electrical measurement effect of the product. Under ideal conditions, the voltage terminals and current terminals on the same side in the four-terminal should be in a short-circuit state. However, in actual applications, due to the influence of the fixture, pin resistance, and wire resistance, contact resistance will inevitably be introduced. Therefore, it is very necessary to monitor the contact resistance between the voltage and current terminals on the same side to improve the detection accuracy of the fixture.
[0027] In order to achieve the detection of the contact reliability of the four-terminal clamp, the present application relates to a contact detection device and a contact detection method. The contact detection method is implemented based on the contact detection device. Therefore, the contact detection device and the contact detection method are described together as follows.
[0028] By using the contact detection device, the resistance value of the contact resistance between the voltage and current terminals on the same side can be quantified, and the resistance value of the allowable contact resistance corresponding to the contact resistance can be flexibly and dynamically adjusted according to different test environmental conditions (such as temperature, mechanical wear, oxidation degree, etc.), realizing the monitoring of the contact resistance between the opposite ends in different environmental scenarios and improving the flexibility of use of the contact detection device.
[0029] In some embodiments of the present application, refer to Figure 1 and Figure 2 , the contact detection device includes a four-terminal 30, a first voltage acquisition unit 40, a second voltage acquisition unit 50, an output control unit, a comparison unit 60, a multiplexer 70, and an FPGA 80. By using the synergistic effect of the FPGA 80 and the analog circuit, the contact resistance between the opposite ends is quantified, and the contact reliability between the opposite ends is detected.
[0030] Return for reference Figure 1 The four-wire terminal 30 includes a first voltage-current pair terminal and a second voltage-current pair terminal. The first voltage-current pair terminal includes a first voltage terminal Hpot and a first current terminal Hcur on the same side, and the second voltage-current pair terminal includes a second voltage terminal Lpot and a second current terminal Lcur on the same side.
[0031] In some embodiments of the present application, through the control of the output control unit by the FPGA 80, it is possible to switch between a first detection state for detecting the contact resistance between the first voltage-current pair terminals (i.e., the contact resistance Rh between the first current terminal Hcur and the first voltage terminal Hpot) and a second detection state for detecting the contact resistance between the second voltage-current pair terminals (i.e., the contact resistance Rl between the second current terminal Lcur and the second voltage terminal Lpot).
[0032] That is, according to the user's need to detect the contact reliability between different pair terminals, the FPGA 80 controls the operation of the output control unit.
[0033] In some embodiments of the present application, multiple tolerance contact resistance values are set for the voltage-current terminals on the same side. See Figure 3 For example, five tolerance contact resistance levels of 1000Ω, 500Ω, 100Ω, 50Ω, and 10Ω are respectively set for the H pair terminal and the L pair terminal, and each level corresponds to the maximum contact resistance value acceptable to the measurement system between the voltage-current terminals.
[0034] And to achieve multi-level detection, return for reference Figure 2 The multiplexer 70 is used. When the user selects a tolerance contact resistance level, the FPGA 80 controls the multiplexer 70 to output the voltage level (i.e., the threshold voltage) corresponding to the tolerance contact resistance. Each tolerance contact resistance corresponds to a voltage level. For the H pair terminal (or the L pair terminal), different tolerance contact resistances with different values correspond to different voltage levels.
[0035] For example, see Figure 3 For the H pair terminal, five different tolerance contact resistance levels of 1000Ω, 500Ω, 100Ω, 50Ω, and 10Ω are set, and they respectively correspond to five different voltage levels V1, V2, V3, V4, and V5; for the L pair terminal, five different tolerance contact resistance levels of 1000Ω, 500Ω, 100Ω, 50Ω, and 10Ω are set, and they respectively correspond to five different voltage levels V4, V5, V6, V7, and V8.
[0036] In some embodiments of the present application, the different tolerance contact resistance levels between the H pair terminals and the different tolerance contact resistance levels between the L pair terminals can be multiplexed, as Figure 3As shown, the 50Ω and 10Ω ranges between the H terminals and the 1000Ω and 500Ω ranges between the L terminals can be multiplexed. Of course, the number of multiplexed channels can be set according to requirements and is not limited here.
[0037] In some embodiments of the present application, since eight voltage ranges are provided, the multiplexer 70 selects a 3 - 8 channel multiplexer (see Figure 2 ), that is, the multiplexer 70 has three input channels A0 / A1 / A2, eight output channels Y0 / Y1 / Y2 / Y3 / Y4 / Y5 / Y6 / Y7, and one output terminal Z.
[0038] The FPGA 80 controls the multiplexer 70 to output the voltage value corresponding to the selected output channel at the output terminal Z according to the selected range of the allowable contact resistance, and this voltage value is equal to the voltage range corresponding to the selected range of the allowable contact resistance.
[0039] For example, when the resistance value of the allowable contact resistance between the H terminals is selected to be 100Ω, the FPGA 80 controls the output terminal Z to output the voltage at a certain output channel, that is, V3; when the resistance value of the allowable contact resistance between the H terminals is selected to be 1000Ω, the FPGA 80 controls the output terminal Z to output the voltage at a certain output channel, that is, V1.
[0040] To achieve the selective output of the multiplexer 70, a voltage - dividing circuit 90 is provided on the side of the output channels Y0 / Y1 / Y2 / Y3 / Y4 / Y5 / Y6 / Y7 of the multiplexer 70. The eight output channels Y0 / Y1 / Y2 / Y3 / Y4 / Y5 / Y6 / Y7 respectively receive eight different voltage - dividing values of the voltage - dividing circuit 90, and the magnitude of the voltage - dividing values can be changed by adjusting the power supply of the voltage - dividing circuit 90 and the resistance value of the voltage - dividing resistors in the voltage - dividing circuit 90.
[0041] In some embodiments of the present application, the multiplexer 70 can also select a multiplexer 70 with other numbers of output channels, as long as the number of multiplexed voltage signals selected and output by the multiplexer 70 is greater than the required number of voltage ranges.
[0042] For example, the multiplexer 70 can select a multiplexer 70 with more than eight output channels. When in use, only select to output eight corresponding voltage - dividing values at its output terminal Z.
[0043] In some embodiments of the present application, referring back to Figure 1, in order to detect the contact resistance between the H terminal or the L terminal, a first voltage acquisition unit 40 and a second voltage acquisition unit 50 are provided. The FPGA 80 controls the output control unit to make the contact detection device in the first detection state, and inputs the voltage collected by the first voltage acquisition unit 40 to the second input terminal of the comparison unit 60 through the first follower IC1; the FPGA 80 controls the output control unit to make the contact detection device in the second detection state, and inputs the voltage collected by the second voltage acquisition unit 50 to the second input terminal of the comparison unit 60 through the second follower IC3.
[0044] Combined with the threshold voltage V_thr output by the multiplexer 70 received by the first input terminal of the comparison unit 60, the contact resistance between the terminals (H terminal or L terminal) can be quantified, thereby detecting the contact reliability between the terminals.
[0045] In some embodiments of the present application, in order to enhance the driving ability, refer back to Figure 1 , a third follower IC2 is provided between the output terminal of the first follower IC1 and the second input terminal of the comparison unit 60, and a fourth follower IC4 is provided between the output terminal of the second follower IC3 and the second input terminal of the comparison unit 60.
[0046] In some embodiments of the present application, in order to switch between the first detection state and the second detection state, the output control unit includes a first switch control element and a second switch control element.
[0047] The first switch control element is connected between the output terminal of the third follower IC2 and the second input terminal of the comparison unit 60, and the second switch control element is connected between the output terminal of the fourth follower IC4 and the second input terminal of the comparison unit 60. Both the first switch control element and the second switch control element are controlled by the FPGA 80 to be turned on and off and only one of them is connected at the same time.
[0048] Refer back to Figure 1 , the first switch control element can be selected as the normally open switch S3 of the first relay (not shown), and the second switch control element can be selected as the normally open switch S4 of the second relay (not shown).
[0049] When the user selects to detect the contact resistance between the H terminals, the FPGA 80 controls the coil of the first relay to be energized, closes the normally open switch S3, and controls the coil of the second relay to be de-energized, opens the normally open switch S4; when the user selects to detect the contact resistance between the L terminals, the FPGA 80 controls the coil of the second relay to be energized, closes the normally open switch S4, and controls the coil of the first relay to be de-energized, opens the normally open switch S3.
[0050] Continue to refer to Figure 1The contact resistance between the H terminals is denoted as Rh, and the contact resistance between the L terminals is denoted as Rl.
[0051] The first voltage acquisition unit 40 includes the contact resistance Rh between the H terminals. For details, refer to Figure 1 The first voltage acquisition unit 40 includes a power supply V, a current-limiting resistor R1, a current-limiting resistor R2, and a current-limiting resistor R3.
[0052] Taking the allowable contact resistance between the H terminals being 100Ω as an example for illustration.
[0053] The voltage Vh collected by the non-inverting input terminal of the first follower IC1 is (R1 + R2 + Rh) * V / (R1 + R2 + R3 + Rh).
[0054] When the selected allowable contact resistance is 100Ω, the FPGA 80 controls the multiplexer 70 to output the threshold voltage V_thr = V3 at its output terminal Z.
[0055] The non-inverting input terminal of the comparison unit 60 receives the threshold voltage V_thr, and the inverting input terminal receives the voltage after the voltage Vh is driven by the third follower IC2. The comparison unit 60 outputs the comparison result to the FPGA 80.
[0056] The FPGA 80 determines the contact reliability between the H terminals according to this comparison result. Specifically, when Rh < 100Ω, Vh < V3. At this time, the comparison unit 60 outputs a high level, and the FPGA 80 believes that the current contact resistance between the H terminals is within the selected allowable contact resistance (i.e., 100Ω), and determines that the contact between the H terminals is good; when Rh > 100Ω, Vh > V3. At this time, the comparison unit 60 outputs a low level, and the FPGA 80 believes that the current contact resistance between the H terminals exceeds the selected allowable contact resistance (i.e., 100Ω), and determines that the contact between the H terminals is poor.
[0057] For example, when the selected allowable contact resistance between the H terminals is 50Ω, the FPGA 80 controls the multiplexer 70 to output the threshold voltage V_thr = V4 at its output terminal Z.
[0058] When Rh < 50Ω, Vh < V4. At this time, the comparison unit 60 outputs a high level, and the FPGA 80 believes that the current contact resistance between the H terminals is within the selected allowable contact resistance (i.e., 50Ω), and determines that the contact between the H terminals is good; when Rh > 50Ω, Vh > V4. At this time, the comparison unit 60 outputs a low level, and the FPGA 80 believes that the current contact resistance between the H terminals exceeds the selected allowable contact resistance (i.e., 50Ω), and determines that the contact between the H terminals is poor.
[0059] Therefore, through this contact detection device, it can be detected whether the contact resistance between the terminals of the fixture is within the allowable contact resistance acceptable to the user, so as to test the contact reliability between the terminals. Moreover, the allowable contact resistance of different gears is convenient for the user to flexibly select, improving the accuracy of the user using this four-terminal fixture to measure products.
[0060] In some embodiments of the present application, an early warning unit (not shown) may also be provided, which is used to output an early warning of poor contact when the FPGA 80 determines that the contact between the opposite ends is poor, facilitating the user to intuitively understand.
[0061] Similarly, the detection of the contact reliability between the L opposite ends also adopts the detection of the contact reliability between the H opposite ends as described above.
[0062] Taking the allowable contact resistance between the L opposite ends being selected as 100Ω as an example for illustration.
[0063] The voltage Vl collected by the positive-phase input terminal of the second follower IC3 is (R5 + Rl) * V / (Rl + R5 + R6).
[0064] When the selected allowable contact resistance is 100Ω, the FPGA 80 controls the multiplexer 70 to output the threshold voltage V_thr = V6 at its output terminal Z.
[0065] The positive-phase input terminal of the comparison unit 60 receives the threshold voltage V_thr, and the negative-phase input terminal receives the voltage after the voltage Vh is driven by the fourth follower IC4. The comparison unit 60 outputs the comparison result to the FPGA 80.
[0066] The FPGA 80 determines the contact reliability between the L opposite ends according to this comparison result. Specifically, when Rl < 100Ω, Vl < V6. At this time, the comparison unit 60 outputs a high level, and the FPGA 80 believes that the current contact resistance between the L opposite ends is within the selected allowable contact resistance (i.e., 100Ω), and determines that the contact between the L opposite ends is good; when Rl > 100Ω, Vl > V6. At this time, the comparison unit 60 outputs a low level, and the FPGA 80 believes that the current contact resistance between the L opposite ends exceeds the selected allowable contact resistance (i.e., 100Ω), and determines that the contact between the L opposite ends is poor.
[0067] By setting the allowable contact resistance of multiple gears and their corresponding voltage gears, the size of the contact resistance between the opposite ends can be quantitatively judged, so as to determine whether the contact between the opposite ends (H opposite end or L opposite end) meets the reliability requirements, improving the accuracy of using this four-terminal fixture to measure products.
[0068] In some embodiments of the present application, by changing the resistance values of the resistors in the first voltage acquisition unit 40 or the second voltage acquisition unit 50 and the divided voltage value output by the voltage dividing circuit 90, different gears of allowable contact resistance can be flexibly set to meet the quantitative detection of different contact resistances under different environmental parameter changes.
[0069] In some embodiments of the present application, when using this contact detection device for contact detection, the FPGA 80 issues an instruction to control the output control unit to act, so that the contact detection device is in the first detection state or the second detection state.
[0070] When controlling the first switch control element (for example, normally open switch S3) to close and the second switch control element (for example, normally open switch S4) to open, the contact detection device is in the first detection state, and is used to detect the contact reliability between the H opposite ends.
[0071] When controlling the second switch control element (for example, normally open switch S4) to close and the first switch control element (for example, normally open switch S3) to open, the contact detection device is in the second detection state, and is used to detect the contact reliability between the L opposite ends.
[0072] When the user selects the allowable contact resistance of the corresponding gear in the corresponding detection state, the FPGA 80 will correspondingly control the multiplexer 70 to output the voltage gear corresponding to the allowable contact resistance to the positive input terminal of the comparison unit 60 at the output terminal Z.
[0073] In the first detection state, when the signal output by the FPGA 80 is at a high level, it is determined that the contact resistance between the H opposite ends does not exceed the selected gear of the allowable contact resistance, indicating that the H opposite ends are in good contact; otherwise, the contact resistance between the H opposite ends exceeds the selected gear of the allowable contact resistance, indicating that the H opposite ends are in poor contact.
[0074] In the second detection state, when the signal output by the FPGA 80 is at a high level, it is determined that the contact resistance between the L opposite ends does not exceed the selected gear of the allowable contact resistance, indicating that the L opposite ends are in good contact; otherwise, the contact resistance between the L opposite ends exceeds the selected gear of the allowable contact resistance, indicating that the L opposite ends are in poor contact.
[0075] In the existing industrial commercial four-wire terminal fixture, a voltage and current sampling architecture based on a self-balancing bridge circuit is used to measure the resistance value of the measured resistor and needs to detect whether the contact resistance between the opposite ends of the fixture is reasonable. Therefore, for the purpose of reducing costs, in some embodiments of the present application, a measurement system is designed to take into account both voltage and current sampling and contact detection functions.
[0076] See Figure 4 and Figure 5, the measurement system utilizes the original voltage and current sampling architecture based on the four-wire terminal 30, effectively leveraging the existing resources, reducing the cost of contact detection layout, providing an additional contact resistance monitoring solution for applications in most four-terminal method measurement fields, avoiding the need to design an independent circuit or allocate manpower for the monitoring function, and significantly improving the efficiency of detecting the contact reliability between the voltage and current opposite ends on the same side while effectively controlling costs.
[0077] In some embodiments of the present application, refer to Figure 4 , which shows the existing voltage and current sampling architecture of the four-wire terminal 30 based on the principle of a self-balancing bridge circuit.
[0078] The voltage and current sampling architecture includes a signal source and a voltage sampling section 10, and a self-balancing bridge and a current sampling section 20. Among them, the signal source and voltage sampling section 10 includes a signal source module 11, an operational amplifier conditioning circuit 12, and a voltage acquisition module 13. The self-balancing bridge and current sampling section 20 includes a sampling resistor Rr, an amplifier IC6, and a current acquisition module 21.
[0079] Refer to Figure 4 , the signal source module 11 is connected to the first current terminal Hcur, the second current terminal Lcur is respectively connected to one end of the sampling resistor Rr and the negative-phase input terminal of the amplifier IC6 in the self-balancing bridge circuit, the positive-phase input terminal of the amplifier IC6 is grounded, the output terminal of the amplifier IC6 is connected to the other end of the sampling resistor Rr, and the current acquisition module 21 acquires the current flowing through the sampling resistor Rr.
[0080] The first voltage terminal Hpot is connected to the positive-phase input terminal of the first follower IC1 through a current-limiting resistor R2, and the output value of the first follower IC1 is input to the operational amplifier conditioning circuit 12 for amplitude modulation of the voltage signal output by the first follower IC1 to an appropriate range; the second voltage terminal Lpot is connected to the positive-phase input terminal of the second follower IC3 through a current-limiting resistor R5, and the output value of the second follower IC3 is input to the operational amplifier conditioning circuit 12 for amplitude modulation of the voltage signal output by the second follower IC3 to an appropriate range.
[0081] The voltage acquisition module 13 acquires the two amplitude-modulated voltages.
[0082] This existing voltage and current sampling architecture based on the four-wire terminal 30 is mostly used in most four-terminal method measurement fields.
[0083] In some embodiments of the present application, refer to Figure 5 , under the above voltage and current sampling architecture, some circuits are reused to provide an additional contact resistance monitoring solution.
[0084] In some embodiments of the present application, in order to enable the measurement system to take into account voltage and current sampling, the first detection state, and the second detection state, a switch control component is provided.
[0085] The FPGA 80 can control the switch control component to switch to implement the sampling state of voltage and current sampling using a voltage and current sampling architecture, the first detection state of detecting the contact reliability between the H terminals, and the second detection state of detecting the contact reliability between the L terminals.
[0086] That is, according to the user's needs, the FPGA 80 controls the switch control component to act.
[0087] In some embodiments of the present application, in order to implement the detection of the contact resistance between the H terminals or the L terminals, similarly as above, a first voltage acquisition unit 40 and a second voltage acquisition unit 50 are provided. In the first detection state, the FPGA 80 controls the switch control component to connect the first voltage acquisition unit 40, and inputs the voltage acquired by the first voltage acquisition unit 40 to the second input terminal of the comparison unit 60 through the first follower IC1. In the second detection state, the FPGA 80 controls the switch control component to connect the second voltage acquisition unit 50, and inputs the voltage acquired by the second voltage acquisition unit 50 to the second input terminal of the comparison unit 60 through the second follower IC3.
[0088] In some embodiments of the present application, in order to enhance the driving ability, refer to Figure 5 , a third follower IC2 is provided between the output terminal of the first follower IC1 and the second input terminal of the comparison unit 60, and a fourth follower IC4 is provided between the output terminal of the second follower IC3 and the second input terminal of the comparison unit 60.
[0089] In some embodiments of the present application, in order to implement the switching between the sampling state, the first detection state, and the second detection state, the switch control component includes a plurality of switch control elements, and the plurality of switch control elements include a first switch control element, a second switch control element, a third switch control element, a fourth switch control element, a fifth switch control element, a sixth switch control element, a seventh switch control element, and an eighth switch control element.
[0090] The first switch control element is connected between the output terminal of the third follower IC2 and the second input terminal of the comparison unit 60; the second switch control element is connected between the output terminal of the fourth follower IC4 and the second input terminal of the comparison unit 60; the third switch control element is connected on the line between the first current terminal Hcur and the signal source module 11; one end of the fourth switch control element is connected to the common connection position of the third switch control element and the first current terminal Hcur, and the other end is grounded; one end of the fifth switch control element is connected to the power supply V, and the other end is connected to the common connection position between the current limiting resistor R2 and the input terminal of the first follower IC1 through the current limiting resistor R3; the sixth switch control element is connected between the second current terminal Lcur and the sampling resistor Rr; one end of the seventh switch control element is connected to the common connection position of the sixth switch control element and the second current terminal Lcur, and the other end is grounded; one end of the eighth switch control element is connected to the power supply V, and the other end is connected to the common connection position between the current limiting resistor R5 and the input terminal of the second follower IC3 through the current limiting resistor R6.
[0091] See Figure 5 , the first switch control element can be selected as the normally open switch S3 of the relay, the second switch control element can be selected as the normally open switch S4 of the relay, the third switch control element can be selected as the normally open switch S7 of the relay, the fourth switch control element can be selected as the normally open switch S5 of the relay, the fifth switch control element can be selected as the normally open switch S1 of the relay, the sixth switch control element can be selected as the normally open switch S8 of the relay, the seventh switch control element can be selected as the normally open switch S6 of the relay, and the eighth switch control element can be selected as the normally open switch S2 of the relay.
[0092] When the FPGA 80 controls the normally open switches S7 and S8 to be closed and the others to be open, the measurement system forms the original voltage and current sampling architecture (i.e., Figure 4 ), which is used for voltage and current sampling.
[0093] When the FPGA 80 controls the normally open switches S7, S8, S6, S2, and S4 to be open and the normally open switches S5, S1, and S3 to be closed, the measurement system enters the first detection state.
[0094] The detection of the contact resistance between the H opposite ends in the first detection state can refer to the above-mentioned part and will not be elaborated here.
[0095] When the FPGA 80 controls the normally open switches S7, S8, S5, S1, and S3 to be open and the normally open switches S6, S2, and S4 to be closed, the measurement system enters the second detection state.
[0096] The detection of the contact resistance between the L opposite ends in the second detection state can refer to the above-mentioned part and will not be elaborated here.
[0097] The measurement system involved in this application can effectively utilize the original resources by means of the original voltage and current sampling architecture based on the four-wire terminal 30, taking into account the realization of voltage and current sampling and contact resistance detection functions, reducing the layout cost of contact detection, providing an additional contact resistance monitoring solution for most applications in the four-terminal method measurement field, avoiding the extra design of an independent circuit or investment in manpower for the monitoring function, and significantly improving the efficiency of detecting the contact reliability between the opposite ends of the voltage and current on the same side while effectively controlling the cost.
[0098] In addition, the FPGA 80 and the analog circuit work together. By setting multiple levels of allowable contact resistance and their corresponding voltage levels through the FPGA 80, the size of the contact resistance between the opposite ends can be quantitatively judged, so as to determine whether the contact resistance between the opposite ends meets the allowable contact resistance acceptable to the user, thereby testing the contact reliability between the opposite ends and improving the accuracy of measuring products using this four-terminal fixture.
[0099] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, for those of ordinary skill in the art, it is still possible to modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions required to be protected by the present invention.
Claims
1. A contact detection device, characterized in that, Comprising: A four-wire terminal, which includes a first voltage-current pair terminal and a second voltage-current pair terminal; A first voltage acquisition unit, which includes a contact resistance between a first current terminal and a first voltage terminal in the first voltage-current pair terminal, and a voltage output terminal of the first voltage acquisition unit is connected to a first follower. Among them, different preset first allowable contact resistances between the first voltage-current pair terminals correspond to different first voltage levels; A second voltage acquisition unit, which includes a contact resistance between a second current terminal and a second voltage terminal in the second voltage-current pair terminal, and a voltage output terminal of the second voltage acquisition unit is connected to a second follower. Among them, different preset second allowable contact resistances between the second voltage-current pair terminals correspond to different second voltage levels; A comparison unit, whose first input terminal receives a threshold voltage; An output control unit, which is used to switch and output the output value of the first follower or the output value of the second follower to the second input terminal of the comparison unit; A multiplexer; An FPGA, which is used to control the output control unit, and according to the selected gear of the first allowable contact resistance or the second allowable contact resistance, the FPGA controls the multiplexer to select and output a certain voltage signal equal to the threshold voltage, and the certain voltage signal is equal to the voltage level corresponding to the selected gear of the first allowable contact resistance or the second allowable contact resistance; The output terminal of the comparison unit is connected to the FPGA.
2. The contact detection device according to claim 1, characterized in that, The contact detection device further includes: A third follower, which is arranged at the output terminal of the first follower; A fourth follower, which is arranged at the output terminal of the second follower; The output value of the third follower or the output value of the fourth follower is switched and output to the second input terminal of the comparison unit through the output control unit.
3. The contact detection device according to claim 2, wherein, The output control unit includes: A first switch control element, which is connected to the output terminal of the third follower and the second input terminal of the comparison unit; A second switch control element, which is connected to the output terminal of the fourth follower and the second input terminal of the comparison unit.
4. The contact detection device according to claim 3, characterized in that When the FPGA controls the first switch control element to close and the second switch control element to open, the contact detection device is used to detect the contact reliability between the first voltage-current pair terminals; When the FPGA controls the second switch control element to close and the first switch control element to open, the contact detection device is used to detect the contact reliability between the second voltage-current pair terminals.
5. The contact detection device according to claim 1, characterized in that The number of multiple voltage signals selected and output by the multiplexer is greater than or equal to the sum of the number of different first voltage levels and the number of different second voltage levels.
6. The contact detection device according to claim 1, characterized in that, The multiplexer includes multiple input channels, multiple output channels and an output terminal. The contact detection device further includes: A voltage dividing circuit, which has multiple voltage dividing output terminals, one voltage dividing output terminal is correspondingly connected to one output channel, and the voltage division at one voltage dividing output terminal is equal to one of different first voltage levels and different second voltage levels.
7. The contact detection device according to claim 1, characterized in that The first input terminal of the comparison unit is the non-inverting input terminal, and the contact detection device further includes: An early warning unit, which is connected to the FPGA. When the comparison unit outputs a high level, the FPGA controls the early warning unit not to output an early warning of poor contact between corresponding pairs of terminals. When the comparison unit outputs a low level, the FPGA controls the early warning unit to output an early warning of poor contact between corresponding pairs of terminals.
8. A contact detection method, characterized in that, Implemented by using the contact detection device according to any one of claims 1 to 7, the contact detection method includes: The FPGA issues an instruction to control the output control unit to act, so that the contact detection device is in the first detection state or the second detection state; Select the gear of the first allowable contact resistance in the first detection state or select the gear of the second allowable contact resistance in the second detection state; According to the signal output by the FPGA, determine whether the contact resistance between the first voltage-current pair of terminals exceeds the selected gear of the first allowable contact resistance, or whether the contact resistance between the second voltage-current pair of terminals exceeds the selected gear of the second allowable contact resistance.
9. A measurement system, characterized in that, Including: A voltage-current sampling architecture based on four-wire terminals. The four-wire terminals include a first voltage-current pair of terminals and a second voltage-current pair of terminals. The voltage-current sampling architecture includes a signal source module, a voltage acquisition module, and a current acquisition module. The signal source module is connected to the first current terminal in the first voltage-current pair of terminals. The first voltage terminal in the first voltage-current pair of terminals is connected to the voltage acquisition module through the output of a first follower. The second voltage terminal in the second voltage-current pair of terminals is connected to the voltage acquisition module through the output of a second follower. The second current terminal in the second voltage-current pair of terminals is connected to the virtual ground connection point of the self-balancing bridge circuit. The current acquisition module acquires the current flowing through the sampling resistor in the self-balancing bridge circuit; A first voltage acquisition unit, which includes the contact resistance between the first current terminal and the first voltage terminal. The voltage output terminal of the first voltage acquisition unit is connected to the first follower. Among them, different gears of the first allowable contact resistance preset between the first voltage-current pair of terminals correspond to different first voltage gears; A second voltage acquisition unit, which includes the contact resistance between the second current terminal and the second voltage terminal. The voltage output terminal of the second voltage acquisition unit is connected to the second follower. Among them, different gears of the second allowable contact resistance preset between the second voltage-current pair of terminals correspond to different second voltage gears; A switch control component, which is used to switch the measurement system to the sampling state of the voltage-current sampling architecture, the first detection state of detecting the contact resistance between the first voltage-current pair of terminals, and the second detection state of detecting the contact resistance between the second voltage-current pair of terminals. The first voltage acquisition unit is connected in the first detection state, and the second voltage acquisition unit is connected in the second detection state; A comparison unit, whose first input terminal receives a threshold voltage. By controlling the switch control component, the output value of the first follower in the first detection state is input to the second input terminal of the comparison unit, and the output value of the second follower in the second detection state is input to the second input terminal of the comparison unit; A multiplexer; An FPGA controls the state of the switch control component and, according to the selected gear of the first allowable contact resistance or the second allowable contact resistance, controls the multiplexer to select and output a certain voltage signal equal to the threshold voltage, where the certain voltage signal is equal to the voltage gear corresponding to the selected gear of the first allowable contact resistance or the second allowable contact resistance; The output terminal of the comparison unit is connected to the FPGA.
10. The measurement system according to claim 9, characterized in that, The switch control component includes a plurality of switch control elements, and the plurality of switch control elements include: A first switch control element connected between the output terminal of the first follower and the second input terminal of the comparison unit; A second switch control element connected between the output terminal of the second follower and the second input terminal of the comparison unit; A third switch control element connected on the line between the first current terminal and the signal source module; A fourth switch control element, one end of which is connected to the common connection position of the third switch control element and the first current terminal, and the other end is grounded; A fifth switch control element, a first current-limiting resistor is connected between the first voltage terminal and the input terminal of the first follower, one end of the fifth switch control element is connected to the power supply, and the other end is connected to the common connection position between the first current-limiting resistor and the input terminal of the first follower through a second current-limiting resistor; A sixth switch control element connected between the second current terminal and the sampling resistor; A seventh switch control element, one end of which is connected to the common connection position of the sixth switch control element and the second current terminal, and the other end is grounded; An eighth switch control element, a third current-limiting resistor is connected between the second voltage terminal and the input terminal of the second follower, one end of the eighth switch control element is connected to the power supply, and the other end is connected to the common connection position between the third current-limiting resistor and the input terminal of the second follower through a fourth current-limiting resistor.
Citation Information
Patent Citations
Automatic test system for resistor
CN104897965A
Inspection device and inspection method
CN111751623A
Power cable core detection device and method
CN112630533A
High-precision resistance acquisition system and acquisition method
CN117741255A
Automatic gear shifting circuit for current detection and current detection device
CN117969917A