High-voltage cascade valve hall type energy storage direct current side double frequency generation current suppression method

Abstract

The invention relates to the technical field of power systems, and particularly discloses a high-voltage cascade valve hall type energy storage direct current side double-frequency current suppression method, which comprises the following steps of S1, acquiring the current of a branch where a battery cluster is located and / or the current of a battery stack direct current bus; s2, performing second harmonic extraction on the current of the branch and / or the current of the direct current bus to obtain a second harmonic generation harmonic current component; s3, performing difference calculation on the reference value of the double-frequency harmonic current component and the double-frequency harmonic current component to obtain a modulation signal; s4, inputting the modulation signal into a full-current controller, adjusting the output target voltage of the battery pack, and acting on a loop of a direct-current capacitor of a half-bridge sub-module and / or a full-bridge sub-module to realize suppression of a double-frequency harmonic current component; according to the invention, the extracted double-frequency harmonic current component is compared with the preset reference value to generate the modulation signal, and the battery pack is adjusted by using the modulation signal to output the target voltage, so that suppression of the double-frequency harmonic current component is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of power systems, and more specifically, to a method for suppressing the second-harmonic current on the DC side of a high-voltage cascaded valve hall type energy storage system. Background Art

[0002] With the continuous increase in the penetration rate of new energy power generation, the problems of volatility and intermittency brought by new energy power generation have become increasingly prominent, seriously affecting the safe and stable operation of the power grid. Energy storage technology can improve the reliability and utilization rate of new energy power generation, suppress the volatility and intermittency of new energy power generation, and is increasingly widely used in new power systems. Compared with traditional energy storage technology solutions, the new high-voltage cascaded energy storage represented by lithium-ion batteries has higher efficiency, reliability, and flexibility, and occupies a small area, gradually becoming the best choice for the energy storage application market.

[0003] The new high-voltage cascaded energy storage usually uses the H-bridge topology as the energy conversion module. Inevitably, the H-bridge module will generate second-harmonic current on the DC side during operation, which will not only cause the temperature rise of the battery cells to increase, have an irreversible impact on the battery life, but also increase the current sampling noise, making it difficult to estimate the state of charge (SOC).

[0004] The literature "Coordinated Suppression Method of Ripple Current on the DC Side of Cascaded H-Bridge Energy Storage Converter" introduced the existing second-harmonic current suppression schemes, and further proposed a coordinated scheme using a passive filter combined with third-harmonic injection to jointly suppress the ripple current on the DC side (mainly the second-harmonic current component). The disadvantage of this scheme is that it uses a passive filter with high cost and large volume, and the injected third-harmonic essentially only changes the second-harmonic current on the DC side of the H-bridge module into a fourth-harmonic current, which is finally filtered by the passive filter. The purpose is to reduce the volume and cost of the passive filtering device, but it still cannot completely avoid using a passive filter.

[0005] In the existing technology, either an active filter circuit, a passive filter, or a passive filter combined with an auxiliary control strategy is used to suppress the second-harmonic current on the DC side of the H-bridge module of the high-voltage cascaded energy storage. Among them, the active filter circuit increases the number of switching tubes, introducing potential fault points, increasing the system control complexity and reducing the reliability, while the passive filter increases the volume, weight, and cost of the H-bridge module. Therefore, using the existing schemes, it is impossible to completely avoid the adverse effects brought by the generation of second-harmonic current on the DC side. Summary of the Invention

[0006] The object of the present invention is to provide a method for suppressing the second - harmonic current on the DC side of a high - voltage cascaded valve - hall - type energy storage. By comparing the extracted second - harmonic current component with a preset reference value, generating a corresponding modulation signal, and using this modulation signal to adjust the output target voltage of the battery pack, the suppression of the second - harmonic current component is achieved.

[0007] To achieve the above object, the present invention provides the following technical solutions:

[0008] A method for suppressing the second - harmonic current on the DC side of a high - voltage cascaded valve - hall - type energy storage, comprising the following steps:

[0009] S1. Obtain in real - time the current of the branch where the battery cluster in the battery stack is located and / or the current of the DC bus of the battery stack;

[0010] S2. Calculate the second - harmonic current obtained by performing second - harmonic extraction on the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack, to obtain the second - harmonic current component of each battery cluster;

[0011] S3. Calculate the difference between the preset reference value of the second - harmonic current component and the calculated second - harmonic current component, and input the calculation result into a proportional controller and / or a proportional - resonant controller to generate a corresponding modulation signal;

[0012] S4. Input the corresponding modulation signal into a full - current controller. By adjusting the output target voltage of the battery packs in the battery cluster, and applying the target voltage to the loop formed by the DC capacitors of the half - bridge sub - modules and / or full - bridge sub - modules in the battery cluster and the power conversion circuit, the suppression of the second - harmonic current component in the branch where the battery cluster is located and / or the DC bus of the battery stack is achieved.

[0013] Further, in S2, calculate the second - harmonic current obtained by performing second - harmonic extraction on the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack, to obtain the second - harmonic current component of each battery cluster; wherein, for the second - harmonic extraction, specifically:

[0014] Use a band - pass filter and / or discrete Fourier transform to perform second - harmonic extraction on the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack to obtain the second - harmonic current; and divide the extracted second - harmonic current by the total number of parallel - connected battery clusters to obtain the second - harmonic current component that each battery cluster needs to share; wherein, the center frequency of the band - pass filter is set to twice the fundamental frequency.

[0015] Further, in S4, by adjusting the output target voltage of the battery packs in the battery cluster, the target voltage is applied to the loop formed by the battery cluster and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit, so as to suppress the second-harmonic current component in the branch where the battery cluster is located and / or the DC bus of the battery stack. Specifically:

[0016] The full current controller is used to adjust the output target voltage of each battery pack in the battery cluster, and the target voltages output by multiple battery packs are applied to the loop formed by the battery cluster and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit, so as to apply the second-harmonic current to the loop formed by the branch where the battery cluster is located and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit; and by adjusting the capacitance value in the half-bridge sub-module and / or the full-bridge sub-module, the second-harmonic voltage fluctuation component across the DC capacitors in the half-bridge sub-module and / or the full-bridge sub-module is suppressed within a preset range.

[0017] Further, the power conversion circuit includes: a half-bridge sub-module and / or a full-bridge sub-module; wherein, the power devices of the half-bridge sub-module and / or the full-bridge sub-module are: Mosfet, IGBT or IGCT.

[0018] Further, the battery cluster is composed of multiple series-connected battery packs; wherein, the number of parallel connections of the battery cluster is N, N≥1; each battery pack includes: multiple series-connected battery cells.

[0019] Further, the method further includes: connecting a passive filter in parallel or in series in the power conversion circuit to suppress high-frequency harmonic current.

[0020] Further, the method is also used for suppressing quadruple-frequency harmonic current or higher-frequency harmonic current.

[0021] According to the specific embodiments provided by the present invention, the following technical effects are disclosed by the present invention:

[0022] The method for suppressing the second-harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage proposed by the present invention can directly suppress the second-harmonic current component, avoiding the adverse effects on the reliability, control complexity and cost of the high-voltage cascaded valve hall type energy storage system caused by additionally adding an active filter circuit, and at the same time avoiding the increase in volume, weight and cost brought by using a passive filter, further improving the working efficiency and reliability of the high-voltage cascaded valve hall type energy storage system. Description of the Drawings

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to the provided drawings.

[0024] The following further describes the method for suppressing the second-harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage in combination with the drawings;

[0025] Figure 1 is the overall flow schematic diagram of the method for suppressing the second-harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage provided by the present invention;

[0026] Figure 2 is the topology diagram of a single power module in the embodiment of the present invention;

[0027] Figure 3 is the schematic diagram of the second-harmonic extraction structure in the embodiment of the present invention; among them, (a) is the schematic diagram of extracting the second harmonic from the current of the branch where the battery cluster is located; (b) is the schematic diagram of extracting the second harmonic from the current of the DC bus of the battery stack.

[0028] Figure 4 is the schematic diagram of the structure of the test circuit in the embodiment of the present invention;

[0029] Figure 5 is the simulation schematic diagram of the test circuit in the embodiment of the present invention; among them, (a) is the waveform diagram of the total current flowing into the DC capacitor C0 and the battery cluster, (b) is the waveform diagram of the current flowing into the battery cluster, and (c) is the waveform diagram of the voltage across the DC capacitor C0;

[0030] Figure 6 is the simulation result diagram of the test circuit with a pure reactive load in the embodiment of the present invention; among them, (a) is the simulation result waveform diagram of the total current flowing into the DC capacitor C0 and the battery cluster, (b) is the simulation result waveform diagram of the current flowing into the battery cluster, and (c) is the simulation result waveform diagram of the voltage across the DC capacitor C0;

[0031] Figure 7 is the topology diagram of the power module including the LC filter circuit in the embodiment of the present invention;

[0032] Figure 8 is the schematic diagram of the fourth-harmonic extraction structure in the embodiment of the present invention; among them, (a) is the schematic diagram of extracting the fourth harmonic from the current of the branch where the battery cluster is located; (b) is the schematic diagram of extracting the fourth harmonic from the current of the total DC bus. Detailed implementation manners

[0033] The specific embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following embodiments are used to illustrate the present invention, but are not used to limit the scope of the present invention.

[0034] To better understand the purpose, structure and function of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0035] Embodiment 1

[0036] As Figure 1 shown, without adding a passive filter, the present invention suppresses the second-harmonic current on the DC side of the H-bridge module, and provides a method for suppressing the second-harmonic current on the DC side of a high-voltage cascaded valve hall type energy storage, including the following steps:

[0037] S1. Obtain the current of the branch where the battery cluster is located in the battery stack and / or the current of the DC bus of the battery stack in real time;

[0038] S2. Calculate the second-harmonic current obtained by extracting the second harmonic of the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack, and obtain the second-harmonic current component of each battery cluster;

[0039] S3. Calculate the difference between the reference value of the preset second-harmonic current component and the calculated second-harmonic current component, and input the calculation result into a proportional controller and / or a proportional-resonant controller to generate a corresponding modulation signal;

[0040] S4. Input the corresponding modulation signal into a full-current controller, and by adjusting the output target voltage of the battery packs in the battery cluster, apply the target voltage to the loop formed by the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the battery cluster and the power conversion circuit, so as to suppress the second-harmonic current component in the branch where the battery cluster is located and / or the DC bus of the battery stack.

[0041] In this solution, the topology of a single power module includes two parts, namely a power conversion circuit and a battery stack. Among them, the power conversion circuit includes, but is not limited to, half-bridge sub-modules and / or full-bridge sub-modules, and the power devices used in the half-bridge sub-modules and full-bridge sub-modules include, but are not limited to: Mosfet, IGBT or IGCT, etc.; the battery stack includes multiple battery PACKs and battery clusters formed by connecting the battery PACKs in series, and then connecting the battery clusters in parallel to form a battery stack; among them, there is a full-current controller in the battery pack (see the authorized patent CN114389347 B).

[0042] In S2, calculate the second-harmonic current components of each battery cluster by calculating the second-harmonic current obtained by extracting the second harmonic of the current in the branch where the battery cluster is located and / or the current of the DC bus of the battery stack; where the extraction of the second harmonic is specifically as follows:

[0043] Use a band-pass filter and / or discrete Fourier transform to extract the second harmonic of the current in the branch where the battery cluster is located and / or the current of the DC bus of the battery stack to obtain the second-harmonic current; and divide the obtained second-harmonic current by the total number of parallel battery clusters to obtain the second-harmonic current component that each battery cluster needs to share; where the center frequency of the band-pass filter is set to twice the fundamental frequency.

[0044] In this solution, according to the single power module topology, a DC second-harmonic current suppression strategy can be obtained, such as Figure 3 shown. In the figure, i armk (k = 1,..., N) is the current in the branch where battery cluster k is located, where N is the number of battery clusters; i dc is the current of the total DC bus, and its magnitude is equal to the sum of the currents in the branches where all battery clusters are located; i armref2 is the second-harmonic current reference value, and the default value is zero; the second-harmonic extraction link can be implemented using either a band-pass filter or a discrete Fourier transform (DFT), where the center frequency of the band-pass filter is set to twice the fundamental frequency.

[0045] For different extraction objects of the second harmonic, the following two control strategies can be obtained:

[0046] As Figure 3 shown in (a), extract the second-harmonic current from the current in the branch where the battery cluster is located;

[0047] As Figure 3 shown in (b), extract the second-harmonic current from the current of the DC bus of the battery stack.

[0048] In S4, by adjusting the output target voltage of the battery packs in the battery cluster and applying the target voltage to the loop formed by the DC capacitors of the half-bridge sub-module and / or full-bridge sub-module in the battery cluster and the power conversion circuit, suppress the second-harmonic current component in the branch where the battery cluster is located and / or the DC bus of the battery stack, specifically as follows:

[0049] Using the full - current controller to adjust the output target voltage of each battery pack in the battery cluster, and applying the target voltages output by multiple battery packs to the loop formed by the DC capacitors of the half - bridge sub - modules and / or full - bridge sub - modules in the battery cluster and the power conversion circuit, so as to achieve applying the double - frequency harmonic current to the loop formed by the branch where the battery cluster is located and the DC capacitors of the half - bridge sub - modules and / or full - bridge sub - modules in the power conversion circuit; and by adjusting the capacitance values in the half - bridge sub - modules and / or full - bridge sub - modules, suppressing the double - frequency voltage fluctuation component across the DC capacitors in the half - bridge sub - modules and / or full - bridge sub - modules within a preset range.

[0050] In this solution, the extracted second - harmonic current component is divided by the total number of parallel - connected battery clusters to obtain the double - frequency harmonic current component that each battery cluster needs to share. Then, the reference value \(i\) of the preset double - frequency harmonic current component armref2 minus the extracted double - frequency harmonic current component, and after the action of the proportional link \(P\) and / or the resonant control link \(PR\), the corresponding modulation signal \(m\) k is obtained; finally, the modulation signal \(m\) k is input into the full - current controller. The full - current controller is equivalent to a proportional link, and the proportional coefficient is denoted as \(K\), then Figure 2 the port voltage \(u\) of the full - current controller in the battery pack pack can be expressed as \(u\) pack =\(K\times m\) k , thus controlling the battery pack to output the target voltage, and this target voltage acts on the loop formed by the battery cluster and the DC capacitors of the half - bridge sub - modules and / or full - bridge sub - modules, thereby suppressing the double - frequency harmonic current component in the branch where the battery cluster is located or the total DC bus current. Its function is equivalent to forcibly transferring the double - frequency harmonic current from the branch where the battery cluster is located to the branch where the DC capacitors in the half - bridge sub - modules and / or full - bridge sub - modules are located. To sum up, since the double - frequency current is forced to flow through the DC capacitor, it will cause a double - frequency fluctuation component in the DC capacitor voltage. By reasonably selecting the capacitance value, the double - frequency voltage fluctuation component across the DC capacitor can be suppressed within a reasonable range, and thus the overall performance of the system is not affected.

[0051] The power conversion circuit includes: half - bridge sub - modules and / or full - bridge sub - modules; wherein, the power devices of the half - bridge sub - modules and / or full - bridge sub - modules are: Mosfet, IGBT or IGCT.

[0052] The battery cluster is composed of multiple series - connected battery packs; wherein, each battery pack contains: multiple series - connected battery cells, and the number of parallel connections of the battery cluster is \(N\) (\(N\geq1\)).

[0053] Embodiment 2:

[0054] As Figure 4As shown, the corresponding main circuit parameters are as follows: The DC capacitor C0 in the power conversion circuit is 8 mF; 104 battery cells are connected in series to form a battery pack, 6 battery packs are connected in series to form a battery cluster, and a total of 4 battery clusters are connected in parallel to form a battery stack. The rated voltage of the DC bus on the DC side of the H-bridge module is 1.997 kV.

[0055] Figure 5 is Figure 4 the simulation result of the main circuit shown, Figure 5 in which (a) represents the waveform of i dc1 ; Figure 5 in which (b) represents the waveform of i dc2 ; Figure 5 in which (c) represents the waveform of u dc . Among them, i dc1 is the total current flowing into the DC capacitor C0 and the battery cluster, i dc2 is the current flowing into the battery cluster, and u dc is the voltage across the DC capacitor C0. The simulation model is set to enable the double-frequency current suppression strategy at 1.25 s.

[0056] Figure 5 In (a) is the waveform of i dc1 ; The waveform of i dc1 is similar to the shape of a steamed bun, so it is called the steamed bun wave;

[0057] The DC component, double-frequency component, and high-frequency component of i dc1 correspond respectively as follows:

[0058] DC component: The DC component of i dc1 is the average value of the waveform in (a) in Figure 5 ;

[0059] Double-frequency fluctuation component: The time interval between the peaks of adjacent steamed bun waves is 10 ms, and a fundamental wave period (or power frequency period) is 20 ms. Therefore, in terms of frequency, 10 ms corresponds to 100 Hz, and 20 ms corresponds to 50 Hz. So, Figure 5 the fluctuation frequency of the steamed bun wave in (a) in

[0060] is 100 Hz, which is the double-frequency fluctuation component;

[0061] From Figure 5 it can be seen that i dc1 contains a DC component, a double-frequency component, and a high-frequency component; when the double-frequency current suppression strategy is not enabled, i dc2It contains a second - harmonic current with an amplitude of 0.894 kA. The second - harmonic current suppression strategy is enabled at 1.25 s. After about 50 ms, the amplitude of the second - harmonic current decreases to 0.0089 kA, a reduction of about 99%. At the same time, the amplitude of the DC bus voltage fluctuation increases, and the voltage fluctuation percentage is 8.5%.

[0062] Figure 6 is the simulation result when it is a pure reactive load, i dc2 The amplitude of the second - harmonic current in it decreases from 0.894 kA to 0.0089 kA, a reduction of about 99%. At the same time, the DC bus voltage fluctuation percentage is 7.95%.

[0063] From Figure 6 The simulation results show that by using the method for suppressing the second - harmonic current on the DC side of the high - voltage cascaded valve - hall - type energy storage proposed in the present invention, the second - harmonic current flowing into the battery cells can be effectively suppressed. Although the second - harmonic current is forced to flow through the DC capacitor, causing an increase in the voltage fluctuation of the DC capacitor, the voltage fluctuation percentage is less than 10%, which can meet the engineering requirements. If it is necessary to further reduce the voltage fluctuation percentage, it can be achieved by increasing the capacitance value of the DC capacitor.

[0064] Figure 7 is another embodiment, in which a passive filter is connected in parallel or in series in the power conversion circuit to further suppress the high - frequency harmonic current.

[0065] In this solution, an LC filter is included. The LC filter circuit includes but is not limited to a single inductor, a single capacitor, and a series / parallel circuit of a capacitor and an inductor. By adding a passive filter, the high - frequency harmonic suppression ability on the DC side is further improved. On the basis of the above - mentioned solution, the parameter values of the devices selected for the passive filter can be further reduced, thereby reducing the volume, weight, and cost of the passive filter devices. Therefore, the present invention can also include a passive filter to obtain a better harmonic suppression effect.

[0066] In this embodiment, the method of third - harmonic injection is further combined. The second - harmonic current on the DC side of the power module will become a fourth - harmonic current. Still using the method for suppressing the second - harmonic current on the DC side of the high - voltage cascaded valve - hall - type energy storage provided by the present invention, the fourth - harmonic current can be directly suppressed. The specific control block diagram is as shown in Figure 8 in (a) and Figure 8 in (b).

[0067] In summary, summarizing the method for suppressing the second - harmonic current on the DC side of the high - voltage cascaded valve - hall - type energy storage and its specific embodiments provided by the present invention, the following key points are obtained:

[0068] Key Point 1: The power conversion circuit in the present invention includes, but is not limited to, half-bridge sub-modules and full-bridge sub-modules, and the power switching devices used include, but are not limited to, Mosfets, IGBTs, or IGCTs, etc.

[0069] Key Point 2: The minimum number of battery clusters in the present invention is 1, and there is no upper limit; the minimum number of battery PACKs connected in series in a single battery cluster is 1, and there is no upper limit; the number of series-connected battery cells in a single battery PACK is not limited.

[0070] Key Point 3: The double-frequency harmonic current suppression strategy proposed in the present invention needs to be implemented in combination with a full current controller.

[0071] Key Point 4: The present invention can be used in combination with a passive filter, or in combination with a third-harmonic injection method, or in combination with all three methods, which can not only improve the suppression effect, but also reduce the volume and cost of the passive filter, ultimately improving the system efficiency and reducing the manufacturing cost.

[0072] Key Point 5: The present invention includes, but is not limited to, double-frequency current suppression, and can also suppress harmonic currents of other frequencies.

[0073] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for suppressing the second-harmonic current on the DC side of a high-voltage cascaded valve hall type energy storage, characterized in that, It includes the following steps: S1. Obtain the current of the branch where the battery cluster is located in the battery stack and / or the current of the DC bus of the battery stack in real time; S2. Calculate the second-harmonic current components of each battery cluster by calculating the double-frequency harmonic current obtained by extracting the second harmonic of the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack; S3. Calculate the difference between the reference value of the preset double-frequency harmonic current component and the calculated double-frequency harmonic current component, and input the calculation result into a proportional controller and / or a proportional-resonant controller to generate a corresponding modulation signal; S4. Input the corresponding modulation signal into a full-current controller. By adjusting the output target voltage of the battery packs in the battery cluster, apply the target voltage to the loop formed by the battery cluster and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit, so as to suppress the double-frequency harmonic current component in the branch where the battery cluster is located and / or the DC bus of the battery stack.

2. The method for suppressing the second harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage according to claim 1, wherein In S2, calculate the second-harmonic current components of each battery cluster by calculating the double-frequency harmonic current obtained by extracting the second harmonic of the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack; wherein, the extraction of the second harmonic is specifically: Use a band-pass filter and / or discrete Fourier transform to extract the second harmonic of the current of the branch where the battery cluster is located and / or the current of the DC bus of the battery stack to obtain the double-frequency harmonic current; and divide the obtained double-frequency harmonic current by the total number of parallel battery clusters to obtain the double-frequency harmonic current component that each battery cluster needs to share; wherein, the center frequency of the band-pass filter is set to twice the fundamental frequency.

3. The method for suppressing the second harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage according to claim 1, characterized in that, In S4, by adjusting the output target voltage of the battery packs in the battery cluster, apply the target voltage to the loop formed by the battery cluster and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit, so as to suppress the double-frequency harmonic current component in the branch where the battery cluster is located and / or the DC bus of the battery stack. Specifically: Use the full-current controller to adjust the output target voltage of each battery pack in the battery cluster, and apply the target voltages output by multiple battery packs to the loop formed by the battery cluster and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit, so as to apply the double-frequency harmonic current to the loop formed by the branch where the battery cluster is located and the DC capacitors of the half-bridge sub-module and / or the full-bridge sub-module in the power conversion circuit; and by adjusting the capacitance value in the half-bridge sub-module and / or the full-bridge sub-module, suppress the double-frequency voltage fluctuation component across the DC capacitors in the half-bridge sub-module and / or the full-bridge sub-module within a preset range.

4. The method for suppressing the second harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage according to claim 1, wherein, The power conversion circuit includes: a half-bridge sub-module and / or a full-bridge sub-module; wherein, the power devices of the half-bridge sub-module and / or the full-bridge sub-module are: Mosfet, IGBT or IGCT.

5. The method for suppressing the second harmonic current on the DC side of the high-voltage cascade valve hall type energy storage according to claim 1, wherein, The battery cluster is composed of multiple series-connected battery packs; wherein, the number of parallel battery clusters is N, N≥1; each of the battery packs includes: multiple series-connected battery cells.

6. The method for suppressing the second harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage according to claim 1, wherein The method further includes: connecting a passive filter in parallel or in series in the power conversion circuit to suppress high-frequency harmonic currents.

7. The method for suppressing the second harmonic current on the DC side of the high-voltage cascaded valve hall type energy storage according to claim 1, wherein, The method is also used for suppressing quadruple-frequency harmonic currents or higher-frequency harmonic currents.

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