A two-dimensional active sum-difference network device and its preparation method

Abstract

The present invention belongs to the field of radar and communication technology, and relates to a two-dimensional active sum-difference network device and its preparation method. It comprises: four antenna subarrays, at least three four-channel amplitude-phase multifunction chips, and four 1-to-3 equal-power Wilkinson power dividers; the four antenna subarrays are distributed on the antenna array plane, with one antenna subarray corresponding to one quadrant of the antenna array plane; the four-channel amplitude-phase multifunction chip has four branch input ports and one combiner; the common end of one antenna subarray is connected to the common end of one of the one-to-3 equal-power Wilkinson power dividers; and one of the power-divided paths of each one-to-3 equal-power Wilkinson power divider is connected to each of the four branch input ports of the four-channel amplitude-phase multifunction chip. Through modular design and dynamic parameter configuration, the present invention achieves highly integrated, low-loss two-dimensional beamforming while supporting flexible expansion of the antenna subarrays.

Description

Technical Field

[0001] The present invention belongs to the field of radar and communication technology, and particularly relates to a two-dimensional active sum-difference network device and a preparation method thereof. Background Art

[0002] Traditional two-dimensional sum-and-difference networks typically utilize discrete components such as 3dB bridges, power dividers, phase shifters, and attenuators, resulting in bulky systems, low integration, and high cost. For example, in traditional solutions, each antenna subarray requires its own phase shifter and attenuator, and signal synthesis is achieved using microstrip and waveguide sum-and-difference devices. This not only increases system complexity but can also introduce signal loss and phase errors. Furthermore, traditional solutions struggle to achieve low sidelobe control for both sum and difference beams, failing to meet the high-precision angle measurement and interference mitigation requirements of modern radar systems.

[0003] In recent years, with the advancement of microwave monolithic integrated circuit (MMIC) technology, integrated amplitude and phase control chips have gradually been applied to radar systems. However, existing integrated solutions are mostly targeted at one-dimensional beamforming and are difficult to directly extend to two-dimensional scenarios. For example, some solutions achieve two-dimensional control by cascading multiple one-dimensional amplitude and phase chips. However, this approach results in long signal paths, increased latency, and poor system scalability. Summary of the Invention

[0004] The purpose of the present invention is to provide a two-dimensional active sum-difference network device and a preparation method thereof, which realizes high-integration, low-loss two-dimensional sum-difference beamforming through modular design and dynamic parameter configuration, and supports flexible expansion of antenna subarrays and simultaneous low-sidelobe shaping of sum, azimuth difference, and elevation difference beams.

[0005] The present invention is achieved through the following technical solutions:

[0006] In a first aspect, a two-dimensional active sum-difference network device is provided, comprising: four antenna subarrays, at least three four-channel amplitude-phase multifunctional chips, and four 1-to-3 equal-power Wilkinson power dividers; the four antenna subarrays are distributed on an antenna array plane, with one antenna subarray corresponding to one quadrant of the antenna array plane; the 4-channel amplitude-phase multifunctional chip has four branch input ports and one combining port; the common end of one antenna subarray is connected to the common end of a 1-to-3 equal-power Wilkinson power divider; and one of the paths after power division by each 1-to-3 equal-power Wilkinson power divider is respectively connected to the four branch input ports of the 4-channel amplitude-phase multifunctional chip.

[0007] Furthermore, the two-dimensional active sum-difference network device also includes a wave control module for dynamically configuring parameters for the digital phase shifter and the digitally controlled attenuator; the wave control module is connected to the 4-channel amplitude-phase multifunctional chip via the SPI communication protocol.

[0008] Furthermore, the 4-channel amplitude-phase multifunctional chip integrates a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator and an amplifier.

[0009] Furthermore, the combined intersection includes: a combined intersection, an azimuth difference intersection, and a pitch difference intersection.

[0010] Furthermore, the number of antenna subarrays can be expanded to ≥16.

[0011] In a second aspect, a method for preparing a two-dimensional active sum-difference network is provided, comprising the following steps: distributing four antenna subarrays on an antenna array plane so that one antenna subarray corresponds to one quadrant of the antenna array plane; correspondingly connecting the common end of each antenna subarray to the common end of a 1-to-3 equal power division Wilkinson power divider; and connecting one of the power divisions of each 1-to-3 equal power division Wilkinson power divider to four branch input ports of a 4-channel amplitude-phase multifunction chip.

[0012] Furthermore, the method for preparing a two-dimensional active sum-difference network further includes the following steps: connecting each 4-channel amplitude-phase multifunction chip to a beam control module via the SPI communication protocol; integrating a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier on the 4-channel amplitude-phase multifunction chip; and expanding the number of antenna subarrays to ≥16.

[0013] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0014] 1. High integration: By integrating a 4-channel amplitude and phase multifunctional chip and a Wilkinson power divider, the system size is significantly reduced.

[0015] 2. High-precision control: 6-bit digital phase shifter and 6-bit digitally controlled attenuator achieve precise control of amplitude and phase.

[0016] 3. Fast dynamic adjustment: The SPI protocol supports microsecond-level parameter updates to meet the radar system's anti-interference and tracking requirements.

[0017] 4. Flexible scalability: By adding antenna sub-arrays and cascading chips, it can be expanded to more than 16 sub-arrays, suitable for large phased array radar systems.

[0018] 5. Output interface freedom: By configuring the parameters of the 4-channel amplitude and phase multi-function chips of the device clock through SPI, the output ports of sum, azimuth difference and pitch difference can be arbitrarily exchanged without being fixed by physical position.

[0019] 6. Beamforming freedom: By configuring the parameters of the device's 4-channel amplitude and phase multi-function chip through SPI, 3-way and beam forming can be achieved. If cascade expansion is used, a multi-beam phased array antenna (more than 3 beams) can be formed. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, constitute a part of this application, and do not constitute a limitation of the embodiments of the present invention. In the drawings:

[0021] Figure 1 A schematic structural diagram of a two-dimensional active sum-difference network device provided by an embodiment of the present invention.

[0022] Figure 2 A top view of the antenna array provided in an embodiment of the present invention.

[0023] Markings and corresponding parts names in the accompanying drawings:

[0024] 1-antenna subarray, 2-4-channel amplitude and phase multifunctional chip, 3-1-3 equal power division Wilkinson power divider, 4-wavelength control module. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below in conjunction with the examples. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention. The embodiments described below are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0026] In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that these specific details are not necessarily required to practice the present invention. In other examples, well-known structures, materials, or methods are not specifically described to avoid obscuring the present invention. The materials, instruments, and reagents used in the following examples, unless otherwise specified, are commercially available. The techniques used in the examples, unless otherwise specified, are conventional techniques well known to those skilled in the art.

[0027] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0028] Embodiment 1: A first aspect provides a two-dimensional active sum-difference network device, such as Figure 1 and Figure 2As shown, the system comprises four antenna subarrays 1, at least three 4-channel amplitude-phase multifunction chips 2, and four 1-to-3 equal-power Wilkinson power dividers 3. The four antenna subarrays 1 are distributed across the antenna plane, with each antenna subarray 1 corresponding to a quadrant of the antenna plane. The 4-channel amplitude-phase multifunction chip 2 has four branch input ports and one combiner. The common terminal of each antenna subarray 1 is connected to the common terminal of a 1-to-3 equal-power Wilkinson power divider 3. One of the power splitters from each 1-to-3 equal-power Wilkinson power divider 3 is connected to the four branch input ports of the 4-channel amplitude-phase multifunction chip 2. The 4-channel amplitude-phase multifunction chip 2 integrates a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier. The combiner includes a sum port, an azimuth difference port, and an elevation difference port. It should be noted that in addition to the 6-bit digital phase shifter and 6-bit digitally controlled attenuator, higher-bit digital phase shifters and digitally controlled attenuators can also be used.

[0029] The signal flow of the two-dimensional active sum-difference network device is:

[0030] The RF signal enters antenna subarray 1 and is split into three paths by a 1-to-3 equal power splitter (Wilkinson power splitter 3). One path enters the branch input port of the 4-channel amplitude-phase multifunction chip 2. This chip adjusts the amplitude and phase of the four signals. Specifically, a 6-bit digital phase shifter (5.625° resolution) achieves phase control, a 6-bit digitally controlled attenuator (0.5dB resolution) achieves amplitude control, and an amplifier compensates for signal loss. The adjusted signals are synthesized within the 4-channel amplitude-phase multifunction chip 2 and output through a common port. Based on the known port definitions, these signals are output as either a sum port, an azimuth difference port, or an elevation difference port.

[0031] The excitation signal is input from the sum port, azimuth difference port, and pitch difference port, and enters the phase shifter and attenuator after being amplified by the amplifier.

[0032] In addition to the antenna subarray 1, the 4-channel amplitude-phase multifunction chip 2, and the 1-to-3 equal-power Wilkinson power divider 3, the 2D active sum-difference network device also includes a beam control module 4 for dynamically configuring parameters for the digital phase shifter and digitally controlled attenuator. This beam control module 4 connects to the 4-channel amplitude-phase multifunction chip 2 via the SPI communication protocol. The SPI communication protocol utilizes the following: the beam control module 4 acts as the master device, sending a 16-bit control word to the 4-channel amplitude-phase multifunction chip 2 via the SPI interface. The upper 6 bits control the phase shifter, and the lower 6 bits control the attenuator. The communication rate can reach 10 MHz, supporting rapid parameter updates. Dynamic parameter configuration involves defining sum, azimuth, and elevation information based on actual conditions, as well as common operating frequency information, to calculate the required phase offset and amplitude attenuation. These parameters are written to the 4-channel amplitude-phase multifunction chip 2 via the SPI protocol, enabling microsecond-level adjustment of beam pointing.

[0033] In addition, the number of antenna subarrays 1 can be expanded to ≥16. This includes antenna subarray 1 expansion and chip cascading. Antenna subarray 1 expansion increases the number of antenna subarrays 1 to 16, evenly distributed across the four quadrants of the antenna array. Each antenna subarray 1 is connected to an independent 4-channel amplitude and phase multifunction chip 2 via a 1-to-3 power splitter, and is uniformly controlled by a wave control module 4. Chip cascading involves cascading multiple 4-channel amplitude and phase multifunction chips 2 to expand the number of channels. For example, cascading four chips achieves 16-channel control. Parameters between cascaded chips are synchronized via the SPI bus to ensure signal consistency.

[0034] In summary, the two-dimensional active sum-difference network device proposed in the first aspect of this embodiment achieves miniaturization, high precision and high flexibility of the two-dimensional active sum-difference network through integrated design and dynamic parameter configuration, and is suitable for the beamforming requirements of modern radar and communication systems.

[0035] A second aspect of this embodiment provides a method for preparing a two-dimensional active sum-difference network, comprising the following steps:

[0036] Step 1: Distribute the four antenna subarrays on the antenna array plane so that one antenna subarray corresponds to one quadrant of the antenna array plane.

[0037] Step 2: Connect the common end of each antenna subarray to the common end of a 1-to-3 equal power Wilkinson power divider.

[0038] Step 3: Connect one of the channels after power division by each 1-to-3 equal power division Wilkinson power divider to the four branch input ports of the 4-channel amplitude and phase multifunctional chip.

[0039] Furthermore, the method for preparing a two-dimensional active sum-difference network also includes the following steps: connecting each 4-channel amplitude-phase multifunction chip to a beam control module via the SPI communication protocol; integrating a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator, and an amplifier on the 4-channel amplitude-phase multifunction chip; and expanding the number of antenna subarrays to ≥ 16. It should be noted that in addition to the 6-bit digital phase shifter and the 6-bit digitally controlled attenuator, higher-bit digital phase shifters and digitally controlled attenuators can also be used.

[0040] It should be understood that the terms "system," "device," "unit," and / or "module" used in this specification are a method for distinguishing different components, elements, parts, portions, or assemblies at different levels. However, if other terms can achieve the same purpose, the terms may be replaced by other expressions.

[0041] As used in this specification and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" do not refer to the singular but also include the plural. Generally speaking, the terms "comprises" and "include" only indicate the inclusion of the steps and elements specifically identified, and these steps and elements do not constitute an exclusive list. A method or apparatus may also include other steps or elements.

[0042] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

[0043] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for understanding and reading by those familiar with this technology, and are not used to limit the conditions for implementation of the present invention. Therefore, they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the efficacy and purpose of the present invention. At the same time, the terms such as "upper", "lower", "left", "right", "middle", etc. quoted in this specification are only for the convenience of description and are not used to limit the scope of implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of implementation of the present invention without substantially changing the technical content.

Claims

1. A two-dimensional active sum-difference network device, characterized in that: include: Four antenna subarrays (1), at least three 4-channel amplitude-phase multifunctional chips (2) and four 1-for-3 equal power division Wilkinson power dividers (3); the four antenna subarrays (1) are distributed on the antenna array surface, and one antenna subarray (1) corresponds to one quadrant of the antenna array surface; the 4-channel amplitude-phase multifunctional chip (2) has four branch input ports and one combining port; the common end of one antenna subarray (1) is connected to the common end of one 1-for-3 equal power division Wilkinson power divider (3); one of the paths after power division of each 1-for-3 equal power division Wilkinson power divider (3) is respectively connected to the four branch input ports of the 4-channel amplitude-phase multifunctional chip (2); It also includes a wave control module (4) for dynamically configuring parameters for the digital phase shifter and the digitally controlled attenuator; the wave control module (4) is connected to the 4-channel amplitude and phase multifunctional chip (2) via the SPI communication protocol.

2. A two-dimensional active sum-difference network device according to claim 1, characterized in that: The 4-channel amplitude-phase multifunctional chip (2) is integrated with a 6-bit digital phase shifter, a 6-bit digitally controlled attenuator and an amplifier.

3. A two-dimensional active sum-difference network device according to claim 1 or 2, characterized in that: The junction includes: a junction, an azimuth difference junction and a pitch difference junction.

4. A two-dimensional active sum-difference network device according to claim 1 or 2, characterized in that: The number of antenna subarrays (1) can be expanded to ≥16.

5. A method for preparing a two-dimensional active sum-difference network, characterized in that: The following steps are involved: Distributing four antenna subarrays on an antenna array plane so that one antenna subarray corresponds to one quadrant of the antenna array plane; Connecting the common end of each antenna subarray to the common end of a 1-to-3 equal power Wilkinson power divider; Connecting one of the channels after power division by each of the 1-to-3 equal power division Wilkinson power dividers to the four branch input ports of the 4-channel amplitude and phase multifunctional chip; The method further includes the following steps: connecting each of the 4-channel amplitude-phase multifunctional chips to the wave control module via the SPI communication protocol.

6. The method for preparing a two-dimensional active sum-difference network according to claim 5, characterized in that: The following steps are also included: A 6-bit digital phase shifter, a 6-bit digitally controlled attenuator and an amplifier are integrated on the 4-channel amplitude-phase multifunctional chip.

7. A method for preparing a two-dimensional active sum-difference network according to claim 5 or 6, characterized in that: The following steps are also included: The number of antenna subarrays is expanded to ≥16.

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