Epitaxial structure and light emitting diode

Abstract

The invention provides an epitaxial structure and a light-emitting diode, and relates to the technical field of light-emitting diodes, the epitaxial structure comprises a substrate and a laminated structure, and the laminated structure comprises a first N-type layer, a light-emitting layer, a P-type layer and a second N-type layer which are sequentially laminated from bottom to top. Wherein one side, facing the second N-type layer, of the P-type layer comprises at least one ion injection region, each ion injection region extends from the surface of the P-type layer to the interior of the P-type layer, and the resistance of the ion injection region in the P-type layer is greater than that of the other region, so that when holes in the P-type layer are transversely transmitted, the holes are blocked by the ion injection region, and the hole transmission efficiency is improved. Longitudinal transmission is carried out along the extension direction of the ion implantation region, and then transverse transmission is carried out, so that an evacuation effect on transverse transmission of holes is achieved, the condition of concentrated congestion during transverse transmission of the holes can be inhibited, plane expansion of carriers in the P-type layer is facilitated, transmission of current is facilitated, and large current density is realized.

Description

Technical Field

[0001] The present application relates to the technical field of light emitting diodes, and in particular to an epitaxial structure and a light emitting diode. Background Art

[0002] With the popularization of light-emitting diode applications, they are increasingly used in general lighting, light sources for display components, and outdoor screens, becoming an important technology for visible light display in today's society. Among them, micro light-emitting diodes (also known as MicroLEDs) have become a hot topic in the display field due to their excellent display characteristics. They have the advantages of ultra-high resolution, high color saturation, fast response speed, long life, and low energy consumption. They have been applied in the display field, optical communications, biology, and medical industries, and are expected to be further expanded to new applications such as AR, VR, vehicle-mounted displays, ultra-large displays, and space imaging, with broad market prospects.

[0003] With the development of display technology, light-emitting diodes are gradually becoming smaller. However, as the size of light-emitting diodes decreases step by step, their current density continues to increase, resulting in heat loss, etc., affecting the light efficiency of the light-emitting diodes and further affecting the working efficiency of the display components. Summary of the invention

[0004] In view of this, the present application provides an epitaxial structure and a light-emitting diode, wherein the epitaxial structure can achieve a high current density, and the scheme is as follows:

[0005] An epitaxial structure comprising:

[0006] substrate;

[0007] A stacked structure located on one side of the substrate, the stacked structure comprising a first N-type layer, a light-emitting layer, a P-type layer, and a second N-type layer arranged in sequence from bottom to top, the first N-type layer being used to electrically connect to an N-electrode, and the second N-type layer being used to electrically connect to a P-electrode;

[0008] The side of the P-type layer facing the second N-type layer includes at least one ion implantation region, and the ion implantation region extends from the surface of the P-type layer toward the inside of the P-type layer along a first direction; the first direction is perpendicular to the bearing surface of the stacked structure and points from the stacked structure to the substrate;

[0009] Wherein, the resistance of each ion implantation region in the at least one ion implantation region is greater than the resistance of the region other than the ion implantation region in the P-type layer.

[0010] Optionally, along the first direction, the depths of the ion implantation regions in the at least one ion implantation region are equal or unequal, and the maximum depth of each ion implantation region is H1, where H1 = (H2) / 4, and the thickness of the P-type layer is H2, and the value range of H2 is 10 nm to 200 nm, including the end values;

[0011] Along the second direction, the widths of the ion implantation regions in the at least one ion implantation region on the side of the P-type layer facing the second N-type layer are equal or unequal, and the width of each ion implantation region on the side of the P-type layer facing the second N-type layer is D1, and the value range of D1 is 1 μm to 2 μm, including the end values;

[0012] The second direction is parallel to the bearing surface of the stacked structure.

[0013] Optionally, the side of the P-type layer facing the second N-type layer includes N ion implantation regions, where 2 ≤ N ≤ 8;

[0014] The N ion implantation regions are arranged in X rows along the third direction, and / or the N ion implantation regions are arranged in Y columns along the fourth direction, where X ≥ 1 and Y ≥ 1;

[0015] The third direction and the fourth direction are parallel to the bearing surface of the stacked structure, and the third direction and the fourth direction are perpendicular.

[0016] Optionally, along the third direction, the distance between two adjacent ion implantation regions is D2, and the value range of D2 is 2 μm to 3 μm, including the end values;

[0017] Along the fourth direction, the distance between two adjacent ion implantation regions is D3, and the value range of D3 is 2 μm to 3 μm, including the end values.

[0018] Optionally, the area of the side of the P-type layer facing the second N-type layer is S1, and on the side of the P-type layer facing the second N-type layer, the area of the at least one ion implantation region is S2, where the value range of S2 is 25%S1 to 50%S1, including the end values.

[0019] Optionally, at least some of the ion implantation regions in the at least one ion implantation region are located in the middle region of the P-type layer, and the implanted ions of the ion implantation region are F ions.

[0020] Optionally, the stacked structure further includes:

[0021] A nucleation layer, and the nucleation layer is located on one side of the substrate;

[0022] A buffer layer, which is located on the side of the nucleation layer away from the substrate, and the buffer layer is located between the first N-type layer and the nucleation layer;

[0023] An electron blocking layer, which is located between the light-emitting layer and the P-type layer.

[0024] Optionally, the substrate is one of an insulator substrate, a semiconductor substrate, a metal substrate, and a conductive substrate;

[0025] The nucleation layer is one of an AlN layer, an AlGaN layer, a GaN layer, an InGaN layer, and an InN layer, or the nucleation layer is a superlattice structure formed by an AlN layer and a GaN layer, or the nucleation layer is a superlattice structure formed by an InGaN layer and an InN layer;

[0026] The buffer layer is one of a GaN layer and an AlGaN layer, or the buffer layer is a superlattice structure composed of a GaN layer and an AlGaN layer;

[0027] The first N-type layer is an Si-doped N-type GaN layer, and the doping concentration of Si is 5E+18 cm -3 ~5E+19 cm -3 , including the end values;

[0028] The light-emitting layer includes a well layer and a barrier layer. The well layer is an InGaN layer, and the barrier layer is a GaN layer;

[0029] The electron blocking layer is an Mg-doped P-type AlGaN layer, and the doping concentration of Mg is 5E+17 cm -3 ~5E+18 cm -3 , including the end values, and the molar content of Al is 0.15 to 0.30, including the end values;

[0030] The P-type layer is an Mg-doped P-type GaN layer, and the doping concentration of Mg is 1E+19 cm -3 ~1E+20 cm -3 , including the end values;

[0031] The second N-type layer is an Si-doped N-type GaN layer, and the doping concentration of Si is 5E+19 cm -3 ~5E+20 cm -3 , including the end values.

[0032] Optionally, the light-emitting layer is used to emit blue light. Among them, the molar content of In in the well layer of the light-emitting layer is 0.10 to 0.15, including the end values, the thickness of the well layer in the light-emitting layer ranges from 2 nm to 4 nm, including the end values, and the thickness of the barrier layer ranges from 10 nm to 13 nm, including the end values;

[0033] The light-emitting layer is used to emit green light. Among them, the molar content of In in the well layer of the light-emitting layer is 0.20 to 0.25, including the end values. The thickness of the well layer in the light-emitting layer ranges from 2 nm to 4 nm, including the end values. The thickness of the barrier layer ranges from 10 nm to 13 nm, including the end values;

[0034] The light-emitting layer is used to emit red light. Among them, the molar content of In in the well layer of the light-emitting layer is 0.35 to 0.5, including the end values. The thickness of the well layer in the light-emitting layer ranges from 1.5 nm to 3 nm, including the end values. The thickness of the barrier layer ranges from 10 nm to 15 nm, including the end values.

[0035] A light-emitting diode, comprising:

[0036] An epitaxial structure, the epitaxial structure includes a substrate and a stacked structure on one side of the substrate. The stacked structure includes a first N-type layer, a light-emitting layer, a P-type layer, and a second N-type layer arranged in sequence from bottom to top. The light-emitting layer exposes a part of the first N-type layer, and the P-type layer and the second N-type layer are sequentially stacked on the side of the light-emitting layer facing away from the first N-type layer;

[0037] A P electrode, the P electrode is electrically connected to the second N-type layer, and the P electrode covers the first side of the epitaxial structure through a first insulating layer;

[0038] An N electrode, the N electrode is electrically connected to the exposed part of the first N-type layer, and the N electrode covers the second side of the epitaxial structure through a second insulating layer; the first side and the second side are two opposite sides of the epitaxial structure along a fifth direction, and the fifth direction is parallel to the bearing surface of the stacked structure;

[0039] Among them, one side of the P-type layer facing the second N-type layer includes at least one ion implantation region. The ion implantation region extends from the surface of the P-type layer towards the inside of the P-type layer along a first direction, and the resistance of each ion implantation region in the at least one ion implantation region is greater than the resistance of the region in the P-type layer other than the ion implantation region;

[0040] The first direction is perpendicular to the bearing surface of the stacked structure.

[0041] Compared with the related art, the beneficial effects of the technical solution of the present application are as follows:

[0042] The epitaxial structure includes a substrate and a stacked structure. The stacked structure includes a first N-type layer, a light-emitting layer, an electron blocking layer, a P-type layer, and a second N-type layer that are stacked in sequence from bottom to top. The first N-type layer is used for electrically connecting to an N electrode, and the second N-type layer is used for electrically connecting to a P electrode. Among them, one side of the P-type layer facing the second N-type layer includes at least one ion implantation region. The ion implantation region extends from the surface of the P-type layer towards the interior of the P-type layer along a first direction. The first direction is perpendicular to the bearing surface of the stacked structure, and the resistance of the ion implantation region in the P-type layer is greater than the resistance of the region in the P-type layer other than the ion implantation region.

[0043] Since there are a large number of holes in the P-type layer, these holes will not only be longitudinally transported in the P-type layer but also laterally transported, and the holes in the P-type layer are unevenly distributed. Therefore, collisions will occur when the holes are laterally transported, which will further lead to a concentrated congestion situation when the holes are laterally transported, affecting the lateral migration of the holes, and further affecting the planar expansion of the carriers in the P-type layer. The ion implantation region can change the resistance distribution state of the P-type layer. The resistance of the ion implantation region in the P-type layer is greater than that of the remaining regions, so that when the holes in the P-type layer are laterally transported, they will be blocked by the ion implantation region and longitudinally transported along the extension direction of the ion implantation region, and then laterally transported, which has an evacuation effect on the lateral transport of the holes. Thus, the lateral collision of the holes can be reduced to a certain extent, and then the concentrated congestion situation during the lateral transport of the holes can be suppressed, which is beneficial to the lateral migration of the holes, and further beneficial to the planar expansion of the carriers in the P-type layer and beneficial to the transmission of current to achieve a large current density. Description of the Drawings

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to the provided drawings.

[0045] The structures, ratios, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those who are familiar with this technology to understand and read, and are not used to limit the limited conditions that the present application can be implemented. Therefore, they do not have a substantial technical meaning. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the effects that the present application can produce and the purposes that can be achieved, should still fall within the scope that the technical content disclosed in the present application can cover.

[0046] Figure 1 It is a schematic structural diagram of an epitaxial structure provided by the present application;

[0047] Figure 2 It is a cross-sectional view of the P-type layer;

[0048] Figure 3 Top view of the P-type layer;

[0049] Figure 4 Schematic diagram of the resistance distribution of the P-type layer;

[0050] Figure 5 Schematic diagram of the structure of a light-emitting diode provided by the present application. Detailed implementation manners

[0051] Next, the embodiments in the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0052] To make the above objects, features, and advantages of the present application more obvious and understandable, the present application will be further described in detail below in conjunction with the drawings and specific implementation manners.

[0053] As described in the background art section, how to achieve a large current density of a light-emitting diode while gradually miniaturizing the light-emitting diode has become a focus for those skilled in the art.

[0054] Based on the above, the present application provides an epitaxial structure, as Figure 1 shown Figure 1 Schematic diagram of the structure of an epitaxial structure provided by the present application. The epitaxial structure includes:

[0055] Substrate 100.

[0056] A stacked structure 200 located on one side of the substrate 100. The stacked structure 200 includes a first N-type layer 203, a light-emitting layer 204 (also referred to as a multi-quantum well, an active layer, etc.), a P-type layer 206, and a second N-type layer 207 that are stacked in sequence from bottom to top. Among them, the first N-type layer 203 is used to electrically connect to the N electrode, and the second N-type layer 207 is used to electrically connect to the P electrode. That is, when the epitaxial structure is used to form a light-emitting component and a display component, the first N-type layer 203 is used to electrically connect to the N electrode, and the second N-type layer 207 is used to electrically connect to the P electrode.

[0057] One side of the P-type layer 206 facing the second N-type layer 207 includes at least one ion implantation region 208, that is, the side where the P-type layer 206 is in contact with the second N-type layer 207 includes the ion implantation region 208. The ion implantation region 208 extends from the surface of the P-type layer 206 towards the interior of the P-type layer 206 along the first direction, that is, the ion implantation region 208 extends from the side where the P-type layer 206 is in contact with the second N-type layer 207 towards the interior of the P-type layer 206 along the first direction. It should be noted that the first direction is perpendicular to the bearing surface of the stacked structure and points from the stacked structure 200 towards the substrate 100, that is, the first direction is perpendicular to the bearing surface of the substrate 100 and points from the stacked structure 200 towards the substrate 100. Among them, the resistance of each ion implantation region 208 in the at least one ion implantation region 208 is greater than the resistance of the region in the P-type layer 206 other than the ion implantation region 208, that is, the resistance of the ion implantation region 208 in the P-type layer 206 is greater than the resistance of the remaining regions. That is to say, the ion implantation region 208 can change the resistance distribution state of the P-type layer 206.

[0058] It should be noted that there are a large number of holes in the P-type layer 206. These holes will not only be longitudinally transported in the P-type layer 206 but also laterally transported. Moreover, these holes are not evenly distributed in the P-type layer 206. The hole concentration in some regions may be higher, while the hole concentration in other regions may be lower. Due to the uneven distribution of holes in the P-type layer 206, collisions will occur during the lateral transport of holes, which will further lead to a concentrated congestion situation during the lateral transport of holes, affecting the lateral migration of holes and further affecting the planar expansion of carriers in the P-type layer 206. It should be noted that the lateral transport of carriers in the P-type layer 206 refers to the transport of carriers in the P-type layer 206 along a direction parallel to the bearing surface of the stacked structure, and the longitudinal transport of carriers in the P-type layer 206 refers to the transport of carriers in the P-type layer 206 along a direction perpendicular to the bearing surface of the stacked structure.

[0059] For the epitaxial structure provided by the present application, the P-type layer 206 includes an ion implantation region 208, and the resistance of the ion implantation region 208 is greater than that of the remaining regions. That is to say, due to the ion implantation region 208, the resistance of the P-type layer 206, especially the region near the surface, is no longer uniform. Instead, the resistance of the ion implantation region 208 is large, and the resistance of the remaining regions is small. When holes in the P-type layer 206 are laterally transported, they will be blocked by the ion implantation region 208 and then longitudinally transported along the extension direction of the ion implantation region 208 and then laterally transported, which has a dispersing effect on the lateral transport of holes. Thus, the lateral collision of holes can be reduced to a certain extent, and then the concentrated congestion during the lateral transport of holes can be suppressed, which is beneficial to the lateral migration of holes. Furthermore, it is beneficial to the planar expansion of carriers in the P-type layer 206, enabling the area of the region for transporting carriers in the P-type layer to become larger, which is beneficial to the current transmission and realizes a large current density. It should be noted that the epitaxial structure can achieve a large current density here, which means that when the epitaxial structure is applied to a light-emitting component and a display component, a potential difference is formed between the electrically connected P electrode and N electrode, so that when there is a current flowing through the epitaxial structure, that is, during the current transmission process, a large current density can be achieved.

[0060] As can be seen from the above, the second N-type layer 207 is used to electrically connect to the P electrode, which can form a tunneling junction when the second N-type layer 207 is electrically connected to the P electrode. Furthermore, a good ohmic contact is formed between the second N-type layer 207 and the P electrode, reducing the resistance between the second N-type layer 207 and the P electrode. The thermal effect during the current transmission process is relatively low, which is beneficial to the current transmission and thus realizes a large current density.

[0061] In addition, the top of the epitaxial structure is an N-type layer. When the epitaxial structure is stacked with other epitaxial structures, it can be directly formed on the second N-type layer 207. The second N-type layer 207 can be used as the N-type layer of the subsequent stacked epitaxial structure, which is convenient for stacking with other epitaxial structures. At the same time, since the top of the epitaxial structure is an N-type layer, other epitaxial structures can be directly stacked on its second N-type layer. Thus, multiple epitaxial structures can also be formed on a single substrate 100. Furthermore, three epitaxial structures emitting red, green, and blue light can be formed on a single substrate 100 respectively. For example, for a display component, a pixel unit can be formed on a single substrate 100 without separately forming three-color epitaxial structures and then arranging and combining them to form pixel units, which helps to miniaturize the pixel unit and thus contributes to the development of a micro display component.

[0062] In an embodiment of the present application, as Figure 2As shown, along the first direction, the depths of the ion implantation regions 208 in at least one ion implantation region 208 are equal or unequal, and the maximum depth of each ion implantation region 208 in at least one ion implantation region 208 is H1, where H1 = (H2) / 4. Here, the thickness of the P-type layer 206 is H2, and the value range of H2 can be from 10 nm to 200 nm, including the end values.

[0063] Along the second direction, the widths of the ion implantation regions 208 in at least one ion implantation region on the side of the P-type layer 206 facing the second N-type layer 207 are equal or unequal, and the width of each ion implantation region on the side of the P-type layer 206 facing the second N-type layer 207 is D1. The value range of D1 can be from 1 μm to 2 μm, including the end values.

[0064] The second direction is parallel to the bearing surface of the stacked structure, that is, the second direction is parallel to the plane where the side of the P-type layer 206 facing the second N-type layer 207 is located.

[0065] As can be seen from the above, in the P-type layer 206, the depths of the ion implantation regions 208 can be equal or unequal, and the widths of the ion implantation regions 208 can be equal or unequal. However, the maximum depth of the ion implantation region 208 does not exceed half of the thickness of the P-type layer 206, and the width of the ion implantation region 208 is between 1 μm and 2 μm, so that the extension depth of the ion implantation region 208 in the P-type layer 206 is not too large, and the width is not too large either. That is, the volume of the ion implantation region 208 in the P-type layer 206 is not too large, avoiding that the ion implantation region 208 with a large resistance occupies too large an area in the P-type layer 206, so as to avoid the ion implantation region 208 affecting the lateral transport of holes, and further enabling the ion implantation region 208 to relieve the congestion of the lateral transport of holes while not affecting the lateral transport of holes.

[0066] In an embodiment of the present application, as Figure 3 shown, Figure 3 is a top view of the P-type layer. The side of the P-type layer 206 facing the second N-type layer 207 includes N ion implantation regions 208, where 2 ≤ N ≤ 8.

[0067] Among them, the N ion implantation regions 208 are arranged in X rows along the third direction, and / or the N ion implantation regions 208 are arranged in Y columns along the fourth direction, where X≥1 and Y≥1. The third direction and the fourth direction are parallel to the bearing surface of the stacked structure, and the third direction and the fourth direction are perpendicular to each other. That is, the second direction is parallel to the plane of the side of the P-type layer 206 facing the second N-type layer 207, and the third direction and the fourth direction are perpendicular to each other. That is to say, the multiple ion implantation regions 208 in the P-type layer 206 can be arranged in rows, or in columns, or in an array in the P-type layer 206, so that the ion implantation regions 208 can be evenly distributed in the P-type layer 206 and cover the entire P-type layer 206 as much as possible, effectively alleviating the congestion of hole lateral transmission in the P-type layer 206. And the ion implantation regions 208 are arranged in rows, or in columns, or in an array, and thus can be evenly distributed in the P-type layer 206. Moreover, the arrangement of the ion implantation regions 208 can have a certain pattern, making the formation of the ion implantation regions 208 simpler and more convenient.

[0068] In an embodiment of the present application, for example Figure 3 As shown, the P-type layer 206 includes 8 ion implantation regions 208, which are respectively denoted as 1, 2, 3, 4, 5, 7, 8. The 8 ion implantation regions 208 are arranged in 4 rows along the third direction, with 2 ion implantation regions 208 in each row. Based on Figure 2 the above structure, as Figure 4 shown, Figure 4 in (a) represents the resistance value distribution schematic diagram of the regions where the second row and the fourth row of the above 8 ion implantation regions 208 are located along the third direction, and (b) represents the resistance value distribution schematic diagram of the regions where the first row and the third row of the above 8 ion implantation regions 208 are located along the third direction. According to Figure 4 it can be known that the resistance of the ion implantation region 208 is greater than that of the remaining regions. When holes in the P-type layer 206 are laterally transmitted, they will be blocked by the ion implantation region 208 and then longitudinally transmitted along the ion implantation region 208, which has a dispersing effect on the lateral transmission of holes, and thus can suppress the concentrated congestion during the lateral transmission of holes.

[0069] It should be noted that Figure 2 and Figure 3 are only schematic diagrams of the ion implantation region 208, rather than a structural limitation on the ion implantation region 208. For example, Figure 2 in the ion implantation region 208 can also be set to have a smaller width as the implantation depth increases, which will not be elaborated here one by one. It should also be noted that Figure 4This is only a schematic diagram of the resistance distribution state of the P-type layer 206, indicating that the resistance of the ion implantation region 208 is greater than that of other regions. It does not mean that the resistances of the ion implantation regions 208 are the same. The resistances of the ion implantation regions 208 are determined according to the actual situation, and they can be the same, different, or some can be the same while others are different, etc. This application does not limit this.

[0070] In an embodiment of the present application, as Figure 3 shown, along the third direction, the distance between two adjacent ion implantation regions 208 is D2, and the value range of D2 can be 2 μm to 3 μm, including the endpoint values. Along the fourth direction, the distance between two adjacent ion implantation regions 208 is D3, and the value range of D3 can be 2 μm to 3 μm, including the endpoint values, so that the distance between two adjacent ion implantation regions 208 is neither too large nor too small to ensure the evacuation effect of the ion implantation region 208 on the lateral hole transport. Because if the distance between two adjacent ion implantation regions 208 is too large, collisions will still occur during the lateral hole transport between two adjacent ion implantation regions 208, resulting in congestion. If the distance between two adjacent ion implantation regions 208 is too small, the lateral hole transport distance between two adjacent ion implantation regions 208 is too small, affecting the planar expansion of carriers in the P-type layer 206 and being unfavorable for the high current density of the epitaxial structure.

[0071] In an embodiment of the present application, the area of the side of the P-type layer 206 facing the second N-type layer 207 is S1, and on the side of the P-type layer 206 facing the second N-type layer 207, the area of at least one ion implantation region 208 is S2. Among them, the value range of S2 is 25%S1 to 50%S1, including the endpoint values, so that the area occupied by the ion implantation region 208 in the P-type layer 206 is appropriate, to ensure the evacuation effect of the ion implantation region 208 on the lateral hole transport while not affecting the planar expansion of carriers in the P-type layer 206, so as to achieve the high current density of the epitaxial structure.

[0072] In an embodiment of the present application, at least some of the ion implantation regions 208 in at least one ion implantation region 208 are located in the middle region of the P-type layer 206, and the implanted ions in the ion implantation region 208 are F ions. It should be noted that at least some of the ion implantation regions 208 in at least one ion implantation region 208 being located in the middle region of the P-type layer 206 means that at least one of the ion implantation regions 208 in the ion implantation region 208 is located in the middle region of the P-type layer 206.

[0073] Since F ions have strong non-metallic properties, the F ions in the ion implantation region 208 can adsorb hydrogen (also known as H) in the P-type layer 206 and react with H, making the resistance of the ion implantation region 208 greater and the resistance of the remaining regions smaller. Furthermore, the resistance of the ion implantation region 208 in the P-type layer 206 is greater than that of the remaining regions, so as to achieve the evacuation of the lateral hole transfer and suppress the congestion of the lateral hole transfer.

[0074] In addition, the F ions in the ion implantation region 208 can adsorb hydrogen (also known as H) in the P-type layer 206 and react with H, providing an overflow path for H in the P-type layer 206. They can also enable Mg in the P-type layer 206 to be efficiently activated, thereby generating more holes, increasing the carrier concentration of the P-type layer 206, and further contributing to the realization of a large current density in the epitaxial structure. Especially for H in the middle region on the side where the P-type layer 206 is in contact with the second N-type layer 207, since the P-type layer 206 is covered by the second N-type layer, it is difficult for H in the middle region on the side in contact with the second N-type layer 207 to overflow, resulting in the ineffective activation of Mg. In this application, at least one ion implantation region 208 is located in the middle region of the P-type layer 206, so that Mg in the middle region of the P-type layer 206 can be efficiently activated, effectively increasing the carrier concentration of the P-type layer 206.

[0075] In one embodiment of the present application, as Figure 1 shown, the epitaxial structure further includes:

[0076] A nucleation layer 201, and the nucleation layer 201 is located on one side of the substrate 100.

[0077] A buffer layer 202, and the buffer layer 202 is located on the side of the nucleation layer 201 away from the substrate 100, and the buffer layer 202 is located between the first N-type layer 203 and the nucleation layer 201.

[0078] An electron blocking layer 205, and the electron blocking layer 205 is located between the light emitting layer 204 and the P-type layer 206.

[0079] It should be noted that although the above describes that the epitaxial structure includes a stacked nucleation layer 201, buffer layer 202, first N-type layer 203, light emitting layer 204, electron blocking layer 205, P-type layer 206, and second N-type layer 207, the present application does not limit this. The above epitaxial structure may further include other structures in addition to the above structures, depending on the specific situation.

[0080] In one embodiment of the present application, the substrate 100 can be one of an insulator substrate, a semiconductor substrate, a metal substrate, and a conductive substrate, such as silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), silicon germanium (GeSi), sapphire, silicon wafer, diamond, glass substrate, or other semiconductor materials formed of III / V compounds, etc. It also includes a stacked structure composed of the above semiconductor materials. Specifically, the substrate 100 can be determined based on the application scenario to which it is applied, for example, determined according to the type and size of the micro display panel.

[0081] The nucleation layer 201 can be one of an AlN layer, an AlGaN layer, a GaN layer, an InGaN layer, and an InN layer, or the nucleation layer can be a superlattice structure formed by an AlN layer and a GaN layer, or the nucleation layer can be a superlattice structure formed by an InGaN layer and an InN layer. Since the material and density of the nucleation layer 102 can affect the growth and stress of the subsequent light-emitting layer 204 (multiple quantum well layer), any of the above nucleation layer structures can be selected according to requirements.

[0082] The buffer layer 202 can be one of a GaN layer and an AlGaN layer, or the buffer layer 202 can be a superlattice structure composed of a GaN layer and an AlGaN layer.

[0083] The first N-type layer 203 is an Si-doped N-type GaN layer, and the Si doping concentration can be 5E+18 cm -3 ~5E+19 cm -3 , including the end values.

[0084] The light-emitting layer 204 includes a well layer and a barrier layer. The well layer is an InGaN layer, and the barrier layer is a GaN layer. It should be understood that the well layer and the barrier layer in the light-emitting layer 105 can be multiple layers, and the well layer and the barrier layer are arranged alternately.

[0085] The electron blocking layer 205 is an Mg-doped P-type AlGaN layer, and the Mg doping concentration can be 5E+17 cm -3 ~5E+18 cm -3 , including the end values. The molar content of Al can be 0.15 - 0.30, including the end values.

[0086] The P-type layer 206 is an Mg-doped P-type GaN layer, and the Mg doping concentration can be 1E+19 cm -3 ~1E+20 cm -3 , including the end values.

[0087] The second N-type layer 207 is an Si-doped N-type GaN layer, and the Si doping concentration can be 5E+19 cm -3 ~5E+20 cm -3 , including the end values.

[0088] In one embodiment of the present application, the thickness of the substrate 100 may range from 350 μm to 2000 μm, including the end values, and the area of one side of the substrate 100 for setting the stacked structure 200 may range from 2 inches to 12 inches, including the end values. The thickness of the nucleation layer 201 may range from 1 μm to 2 μm, including the end values. The thickness of the buffer layer 202 may range from 1 μm to 2 μm, including the end values. The thickness of the first N-type layer 203 may range from 1 μm to 2 μm, including the end values. The thickness of the well layer in the light-emitting layer 204 may range from 1.5 nm to 4 nm, including the end values, and the thickness of the barrier layer in the light-emitting layer 204 may range from 10 nm to 15 nm, including the end values. The thickness of the electron blocking layer 205 may range from 20 nm to 80 nm, including the end values. The thickness of the P-type layer 206 may range from 10 nm to 200 nm, including the end values. The thickness of the second N-type layer 207 may range from 15 nm to 30 nm, including the end values.

[0089] In one embodiment of the present application, the light-emitting layer 204 can be used to emit blue light, wherein the molar content of In in the well layer of the light-emitting layer 204 can be 0.10 to 0.15, including the end values, the thickness of the well layer in the light-emitting layer 204 may range from 2 nm to 4 nm, including the end values, and the thickness of the barrier layer may range from 10 nm to 13 nm, including the end values.

[0090] The light-emitting layer 204 can be used to emit green light, wherein the molar content of In in the well layer of the light-emitting layer 204 can be 0.20 to 0.25, including the end values, the thickness of the well layer in the light-emitting layer 204 may range from 2 nm to 4 nm, including the end values, and the thickness of the barrier layer may range from 10 nm to 13 nm, including the end values.

[0091] The light-emitting layer 204 can be used to emit red light, wherein the molar content of In in the well layer of the light-emitting layer 204 can be 0.35 to 0.5, including the end values, the thickness of the well layer in the light-emitting layer 204 may range from 1.5 nm to 3 nm, including the end values, and the thickness of the barrier layer may range from 10 nm to 15 nm, including the end values.

[0092] To more clearly understand an epitaxial structure provided by the present application, the preparation process of the epitaxial structure will be described below.

[0093] First, a substrate 100 is provided. A nucleation layer 201 is sequentially formed on the substrate 100. A buffer layer 202 is formed on the nucleation layer 201. A first N-type layer 203 is formed on the buffer layer 202. A light-emitting layer 204, that is, a multi-quantum well layer, is formed on the first N-type layer 203. When forming the light-emitting layer 204, if the light-emitting layer 204 is used to emit blue light, the growth temperatures of the well layer and the barrier layer can be the same; if the light-emitting layer 204 is used to emit green light, the growth temperatures of the well layer and the barrier layer can differ by 100°C to 150°C; if the light-emitting layer 204 is used to emit red light, the growth temperatures of the well layer and the barrier layer can differ by 150°C to 250°C.

[0094] An electron blocking layer 205 is formed on the light-emitting layer 204. It should be noted that when growing the electron blocking layer 205, the growth temperature is higher than that of the light-emitting layer 204, and the temperature difference can be 150°C to 200°C. A P-type layer 206 is formed on the electron blocking layer 205. After forming the P-type layer 206, an ion implantation process is performed on the P-type layer 206 to form an ion implantation region 208 in the P-type layer 206. The implanted ions are preferably F ions.

[0095] After forming the ion implantation region 208 in the P-type layer 206, a second N-type layer 207 is formed on the P-type layer 206 to complete the preparation of the epitaxial structure.

[0096] Based on the epitaxial structure described in any of the above embodiments, the present application further provides a light-emitting diode, as Figure 5 shown Figure 5 is a schematic structural diagram of a light-emitting diode provided by the present application. The light-emitting diode includes:

[0097] An epitaxial structure, which is the epitaxial structure described in any of the above embodiments. The epitaxial structure includes a substrate 100 and a stacked structure 200 on one side of the substrate 100. The stacked structure 200 includes a first N-type layer 203, a light-emitting layer 204 (also referred to as a multi-quantum well layer, an active layer, etc.), a P-type layer 206, and a second N-type layer 207 that are sequentially stacked from bottom to top. Among them, the light-emitting layer 204 exposes a part of the first N-type layer 203. The P-type layer 206 and the second N-type layer 207 are sequentially stacked on the side of the light-emitting layer 204 facing away from the first N-type layer 203, that is, the overall structure composed of the light-emitting layer 204, the P-type layer 206, and the second N-type layer 207 exposes a part of the first N-type layer 203. It should be noted that as described in the above epitaxial structure part, the epitaxial structure of the light-emitting diode may further include a nucleation layer 201, a buffer layer 202, and an electron blocking layer 205, etc. Among them, the nucleation layer 201 is on one side of the substrate 100, the buffer layer 202 is on the side of the nucleation layer 201 facing away from the substrate 100, and the buffer layer 202 is between the first N-type layer 203 and the nucleation layer 201, and the electron blocking layer 205 is between the light-emitting layer 204 and the P-type layer 206.

[0098] The P electrode 300 is electrically connected to the second N-type layer 207, and the P electrode 300 covers the first side of the epitaxial structure through the first insulating layer 301.

[0099] The N electrode 400 is electrically connected to the exposed portion of the first N-type layer 203, and the N electrode 400 covers the second side of the epitaxial structure through the second insulating layer 401. The first side and the second side of the epitaxial structure are two opposite sides of the epitaxial structure along the fifth direction, and the fifth direction is parallel to the bearing surface of the stacked structure.

[0100] Wherein, one side of the P-type layer 206 facing the second N-type layer 207 includes at least one ion implantation region 208, that is, the side of the P-type layer 206 in contact with the second N-type layer 207 includes the ion implantation region 208. The ion implantation region 208 extends from the surface of the P-type layer 206 towards the inside of the P-type layer 206 along the first direction, and the first direction is perpendicular to the bearing surface of the stacked structure. The resistance of the ion implantation region 208 in the P-type layer 206 is the first resistance, and the resistance of the region in the P-type layer 206 other than the ion implantation region 208 is the second resistance. The first resistance is greater than the second resistance, that is, the resistance of the ion implantation region 208 in the P-type layer 206 is greater than that of the remaining regions. That is to say, the ion implantation region 208 can change the resistance distribution state of the P-type layer 206.

[0101] As can be seen from the above, the ion implantation region 208 can change the resistance distribution state of the P-type layer 206, making the resistance of the ion implantation region 208 in the P-type layer 206 greater than that of the remaining regions. Furthermore, when holes in the P-type layer 206 are laterally transported, they will be blocked by the ion implantation region 208 and then longitudinally transported along the ion implantation region 208 and then laterally transported, which has a dispersing effect on the lateral transport of holes, thereby reducing the lateral collision of holes to a certain extent, and further suppressing the concentrated congestion during the lateral transport of holes, which is beneficial to the lateral migration of holes, and further beneficial to the planar expansion of carriers in the P-type layer 206 and beneficial to the transmission of current to achieve a high current density of the light-emitting diode.

[0102] It can also be known from the above that the second N-type layer 207 is used to electrically connect the P electrode, which can form a tunneling junction when the second N-type layer 207 is electrically connected to the P electrode. Furthermore, a good ohmic contact is formed between the second N-type layer 207 and the P electrode, reducing the resistance between the second N-type layer 207 and the P electrode, and the thermal effect during the current transmission process is relatively low, which is beneficial to the current transmission, and further achieves a high current density of the light-emitting diode.

[0103] In addition, the uppermost layer of the epitaxial structure in the light-emitting diode is an N-type layer. When the epitaxial structure is stacked with other epitaxial structures, it can be directly formed on the second N-type layer 207. The second N-type layer 207 can be used as the N-type layer of the subsequent stacked epitaxial structures, which facilitates the stacking of other epitaxial structures. As a result, multiple epitaxial structures can be formed on a single substrate 100 for the light-emitting diode. Furthermore, three epitaxial structures that can emit red, green, and blue light respectively can be formed on a single substrate 100, that is, a pixel unit can be formed on a single substrate 100 without separately forming epitaxial structures of three colors and then arranging and combining them to form a pixel unit. This helps to miniaturize the pixel unit and further promotes the development of the microdisplay panel.

[0104] It should be noted that the exposed part of the first N-type layer 203 in the overall structure composed of the light-emitting layer 204, the electron blocking layer 205, the P-type layer 206, and the second N-type layer 207 in the epitaxial structure of the above-mentioned light-emitting diode is for electrical connection to the N electrode. Therefore, the epitaxial structure in the above-mentioned light-emitting diode is the epitaxial structure described in any of the above embodiments.

[0105] In this specification, the various embodiments are described in a progressive, or parallel, or a combination of progressive and parallel manners. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the description in the method section.

[0106] It should be noted that in the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application. When a component is considered to be "connected" to another component, it can be directly connected to the other component or there may be intermediate components present simultaneously.

[0107] It should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the article or device comprising the above elements.

[0108] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features disclosed herein.

Claims

1. An epitaxial structure, characterized in that, Comprising: A substrate; A stacked structure located on one side of the substrate, the stacked structure including a first N-type layer, a light-emitting layer, a P-type layer, and a second N-type layer arranged in sequence from bottom to top. The first N-type layer is used for electrically connecting to an N electrode, and the second N-type layer is used for electrically connecting to a P electrode; One side of the P-type layer facing the second N-type layer includes at least one ion implantation region, and the ion implantation region extends from the surface of the P-type layer towards the interior of the P-type layer along a first direction; the first direction is perpendicular to the bearing surface of the stacked structure and points from the stacked structure towards the substrate; Wherein, the resistance of each ion implantation region in the at least one ion implantation region is greater than the resistance of the region in the P-type layer other than the ion implantation region.

2. The epitaxial structure according to claim 1, wherein Along the first direction, the depths of the ion implantation regions in the at least one ion implantation region are equal or unequal, and the maximum depth of each ion implantation region is H1, H1 = (H2) / 4, where the thickness of the P-type layer is H2, and the value range of H2 is 10 nm to 200 nm, including the end values; Along a second direction, the widths of the ion implantation regions in the at least one ion implantation region on the side of the P-type layer facing the second N-type layer are equal or unequal, and the width of each ion implantation region on the side of the P-type layer facing the second N-type layer is D1, and the value range of D1 is 1 μm to 2 μm, including the end values; The second direction is parallel to the bearing surface of the stacked structure.

3. The epitaxial structure according to claim 1, wherein One side of the P-type layer facing the second N-type layer includes N ion implantation regions, 2 ≤ N ≤ 8; The N ion implantation regions are arranged in X rows along a third direction, and / or the N ion implantation regions are arranged in Y columns along a fourth direction, X ≥ 1, Y ≥ 1; The third direction and the fourth direction are parallel to the bearing surface of the stacked structure, and the third direction and the fourth direction are perpendicular.

4. The epitaxial structure according to claim 3, wherein Along the third direction, the distance between two adjacent ion implantation regions is D2, and the value range of D2 is 2 μm to 3 μm, including the end values; Along the fourth direction, the distance between two adjacent ion implantation regions is D3, and the value range of D3 is 2 μm to 3 μm, including the end values.

5. The epitaxial structure according to claim 1, wherein The area of one side of the P-type layer facing the second N-type layer is S1, and on the side of the P-type layer facing the second N-type layer, the area of the at least one ion implantation region is S2, where the value range of S2 is 25% S1 to 50% S1, including the end values.

6. The epitaxial structure according to any one of claims 1-5, wherein At least some of the ion implantation regions in the at least one ion implantation region are located in the middle region of the P-type layer, and the implanted ions in the ion implantation region are F ions.

7. The epitaxial structure according to claim 1, characterized in that, The stacked structure further includes: A nucleation layer, the nucleation layer being located on one side of the substrate; A buffer layer, the buffer layer being located on a side of the nucleation layer away from the substrate, and the buffer layer being located between the first N-type layer and the nucleation layer; An electron blocking layer, the electron blocking layer being located between the light-emitting layer and the P-type layer.

8. The epitaxial structure according to claim 7, wherein the substrate is one of an insulator substrate, a semiconductor substrate, a metal substrate, and a conductive substrate; the nucleation layer is one of an AlN layer, an AlGaN layer, a GaN layer, an InGaN layer, and an InN layer, or the nucleation layer is a superlattice structure formed by an AlN layer and a GaN layer, or the nucleation layer is a superlattice structure formed by an InGaN layer and an InN layer; the buffer layer is one of a GaN layer and an AlGaN layer, or the buffer layer is a superlattice structure composed of a GaN layer and an AlGaN layer; The first N-type layer is an Si-doped N-type GaN layer, and the Si doping concentration is 5E+18 cm -3 ~5E+19 cm -3 , including the endpoint values; the light-emitting layer includes a well layer and a barrier layer, the well layer is an InGaN layer, and the barrier layer is a GaN layer; The electron blocking layer is a Mg-doped P-type AlGaN layer, and the Mg doping concentration is 5E+17 cm -3 ~5E+18 cm -3 , including the end values, the molar content of Al is 0.15 to 0.30, including the end values; The P-type layer is a Mg-doped P-type GaN layer, and the Mg doping concentration is 1E+19 cm -3 ~1E+20 cm -3 , including the endpoint values; The second N-type layer is an Si-doped N-type GaN layer, and the Si doping concentration is 5E+19 cm -3 ~5E+20 cm -3 , including the end values.

9. The epitaxial structure according to claim 8, wherein the light-emitting layer is configured to emit blue light, wherein the molar content of In in the well layer of the light-emitting layer is 0.10 to 0.15, including the end values, the thickness of the well layer in the light-emitting layer ranges from 2 nm to 4 nm, including the end values, and the thickness of the barrier layer ranges from 10 nm to 13 nm, including the end values; the light-emitting layer is configured to emit green light, wherein the molar content of In in the well layer of the light-emitting layer is 0.20 to 0.25, including the end values, the thickness of the well layer in the light-emitting layer ranges from 2 nm to 4 nm, including the end values, and the thickness of the barrier layer ranges from 10 nm to 13 nm, including the end values; the light-emitting layer is configured to emit red light, wherein the molar content of In in the well layer of the light-emitting layer is 0.35 to 0.5, including the end values, the thickness of the well layer in the light-emitting layer ranges from 1.5 nm to 3 nm, including the end values, and the thickness of the barrier layer ranges from 10 nm to 15 nm, including the end values.

10. A light-emitting diode, characterized in that, Comprising: An epitaxial structure, the epitaxial structure including a substrate and a stacked structure on one side of the substrate, the stacked structure including a first N-type layer, a light-emitting layer, a P-type layer, and a second N-type layer arranged in sequence from bottom to top, the light-emitting layer exposing a part of the first N-type layer, and the P-type layer and the second N-type layer being stacked on a side of the light-emitting layer away from the first N-type layer in sequence; A P electrode, the P electrode being electrically connected to the second N-type layer, and the P electrode covering a first side of the epitaxial structure through a first insulating layer; An N electrode, the N electrode being electrically connected to an exposed part of the first N-type layer, and the N electrode covering a second side of the epitaxial structure through a second insulating layer; the first side and the second side are opposite sides of the epitaxial structure along a fifth direction, and the fifth direction is parallel to a bearing surface of the stacked structure; Wherein, one side of the P-type layer facing the second N-type layer includes at least one ion implantation region, the ion implantation region extends from the surface of the P-type layer towards the interior of the P-type layer along a first direction, and the resistance of each ion implantation region in the at least one ion implantation region is greater than the resistance of the region in the P-type layer other than the ion implantation region; The first direction is perpendicular to the bearing surface of the stacked structure.

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