Cap for optical sensor packaging and method of manufacturing
Manufacture of optical integrated circuit packaging caps through a multi-step injection molding process solves the high cost and manufacturing complexity of caps in the prior art, and realizes a lower cost and easier manufacturing cap, with smaller form factor and improved integration, and can integrate electronic devices in the cap and provide electromagnetic shielding and heat dissipation performance.
Patent Information
- Application Number
- CN202510002216.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-06
- Filing Date
- 2025-01-02
- Publication Date
- 2025-07-08
AI Technical Summary
Caps in existing optical integrated circuit packaging need to be improved to achieve lower cost, easier manufacturing, smaller form factors, improved adhesion and integration, as well as the possibility of integrating active or passive electronic devices and electromagnetic shielding within the cap.
The cap is manufactured using a multi-step injection molding process, including mounting a transparent plate and a diffraction optical element stack on the panel carrier, forming a package panel structure with a lateral packaging resin material, and manufacturing an independent cap by cutting and removing the panel carrier, the peripheral side wall and front wall package transparent plate and diffraction optical element stack is formed to form an open space to accommodate the optical integrated circuit.
A lower cost, easier to manufacture caps are achieved, with smaller form factors, improved optical integration and adhesion, the ability to integrate active or passive electronic devices within the caps, and provide electromagnetic shielding and improved heat dissipation performance.
Smart Images
Figure CN120270663A_ABST
Abstract
Description
[0001] Cross - reference to related applications
[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 617,901, filed on January 5, 2024, the disclosure of which is incorporated herein by reference. Technical Field
[0003] The present invention generally relates to the packaging of optical integrated circuits and, more particularly, to caps for packaging optical integrated circuits. Background Art
[0004] Reference Figure 1 , which shows a cross - sectional view of an optical integrated circuit package 10. The package 10 includes a package substrate 12 in the form of, for example, a multilayer board 14 (e.g., of the printed circuit board type), which includes an interconnect network 16 (formed by wired lines and vias) that electrically connects front solder pads 18 to rear solder pads 20. The rear solder pads 20 may include, for example, portions of a redistribution layer (RDL). Although not explicitly shown, it should be noted that the front and rear surfaces of the package substrate 12 may include solder mask layers with openings at the locations of the pads 18 and 20. The rear solder pads 20 may include, for example, support pads for pillars 21p or balls 21b (in a ball grid array (BGA) type package). The rear solder pads 20 may include, for example, connection solder pads (in a land grid array (LGA) type package).
[0005] Optical integrated circuit sensor die 22s and optical integrated circuit emitter die 22e are mounted to the upper surface of the package substrate 12 using a suitable adhesive material (e.g., a die attach film (DAF)). The optical integrated circuit sensor die 22s includes an optical sensor 24s (e.g., formed by an array of photosensitive elements such as photodiodes) and a plurality of electrical connection die bond pads 26 associated with a surface (e.g., the front surface) opposite the surface (e.g., the rear surface) attached to the package substrate 12. The optical integrated circuit emitter die 22e includes an optical emitter 24e (e.g., including a vertical - cavity surface - emitting laser (VCSEL)) and one or more electrical connection die bond pads 26 associated with a surface (e.g., the front surface) opposite the surface (e.g., the rear surface) attached to the package substrate 12.
[0006] The electrical connection die bond pads 26 of the optical integrated circuit dies 22s, 22e are electrically connected to the front solder pads 18 of the package substrate 12 using bonding wires 28. Electrical connections may also be provided between the rear surfaces of the optical integrated circuit sensor die 22s and the optical integrated circuit emitter die 22e and the associated front solder pads 18 of the package substrate 12.
[0007] The cap 30 is mounted onto the packaging substrate 12. The cap 30 is formed of an injection-molded opaque material and includes a peripheral sidewall 30a, a partition wall 30b, and a front wall 30c. The peripheral sidewall 30a and the front wall 30c define an open space of the cap 30, while the partition wall 30b extends between opposite sidewalls to divide the open space into a first cavity 32a and a second cavity 32b. By mounting the cap 30 on the packaging substrate 12, the optical integrated circuit sensor die 22s is received within the first cavity 32a and the optical integrated circuit emitter die 22e is received within the second cavity 32b. The distal ends of the peripheral sidewall 30a and the partition wall 30b are attached to the upper surface of the packaging substrate 12 using an adhesive material layer.
[0008] The front wall 30c of the cap 30 includes a first through hole 34a that enters the first cavity 32a. The first through hole 34a is aligned with the position of the optical sensor 24s. The front wall 30c further includes a second through hole 34b that enters the second cavity 32b. The second through hole 34b is aligned with the position of the light emitter 24e. A first diffractive optical element (DOE) 36a (e.g., including one or more of an optical lens and an optical filter (e.g., an infrared (IR) filter), and having the form of a flat plate) is attached to the front wall 30c of the cap 30 using an adhesive layer (not explicitly shown). The first DOE 36a is mounted within the cavity 32a at the rear surface of the front wall 30c to cover the first through hole 34a. A second diffractive optical element (DOE) 36b (e.g., including one or more of an optical lens and an optical filter (e.g., an infrared (IR) filter), and having the form of a flat plate) is attached to the front wall 30c of the cap 30 using an adhesive layer (not explicitly shown). The second DOE 36b is mounted within the cavity 32b at the rear surface of the front wall 30c to cover the second through hole 34b.
[0009] There is a need in the art for improved caps for optical integrated circuit packaging. Summary of the Invention
[0010] In an embodiment, a method includes: providing a first panel carrier that includes a plurality of cap regions separated from each other by cap interzones; at each cap region, mounting a stack of a transparent plate and a diffractive optical element to the first panel carrier; molding a first encapsulation resin material on the first panel carrier to laterally encapsulate the stack at each cap region and form a first encapsulated panel structure; attaching a second panel carrier to a side of the first encapsulated panel structure opposite the first panel carrier; removing the first panel carrier; molding a second encapsulation resin material on the first encapsulated panel structure to form a second encapsulated panel structure that has cavities in the second encapsulation resin material that expose each stack; cutting the second encapsulated panel structure at the cap interzones to singulate the second encapsulated panel structure into a plurality of caps; and removing the plurality of caps from the second panel carrier.
[0011] In an embodiment, a cap for an optical integrated circuit package includes: a molded body including a peripheral sidewall and a front wall; wherein the front wall laterally encapsulates a stack of a transparent plate and a diffractive optical element; wherein the peripheral sidewall extends from the front wall and includes a portion extending onto a part of the rear surface of the stack such that the peripheral edge region of the stack is encapsulated between the front wall of the cap and the peripheral sidewall of the cap. The front wall of the cap and the peripheral sidewall of the cap define an open space of the cap, and an integrated circuit of the optical integrated circuit package is received in the open space.
[0012] An optical integrated circuit package includes: a cap including a molded body including a peripheral sidewall and a front wall; wherein the front wall laterally encapsulates a stack of a transparent plate and a diffractive optical element; wherein the peripheral sidewall extends from the front wall and includes a portion extending onto a part of the rear surface of the stack such that the peripheral edge region of the stack is encapsulated between the front wall of the cap and the peripheral sidewall of the cap; and wherein the front wall of the cap and the peripheral sidewall of the cap define an open space of the cap; a packaging substrate; and an integrated circuit die mounted to the packaging substrate; wherein the cap is mounted to the packaging substrate and the integrated circuit die is received in the open space. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] To better understand the embodiments, reference will now be made, by way of example only, to the accompanying drawings, in which:
[0014] Figure 1 A cross-sectional view of an optical integrated circuit package is shown;
[0015] Figure 2 A cross-sectional view of an optical integrated circuit package is shown;
[0016] Figures 3A - 3K Illustrates steps in a process for manufacturing a cap for use in a package as shown in Figure 2 ; and
[0017] Figure 4 A cross-sectional view of an embodiment of the cap is shown. DETAILED DESCRIPTION
[0018] Reference Figure 2, which shows a cross-sectional view of the optical integrated circuit package 110. The package 110 includes a package substrate 112 in the form of, for example, a multilayer board 114 (e.g., of the printed circuit board type), which includes an interconnect network 116 (formed by wired lines and vias) that electrically connects the front solder pads 118 to the rear solder pads 120. The rear solder pads 120 may include, for example, portions of a redistribution layer (RDL). Although not explicitly shown, it should be noted that the front and rear surfaces of the package substrate 112 may include solder mask layers having openings at the locations of the pads 118 and 120. The rear solder pads 120 may include, for example, support pads for pillars 121p or balls 121b (in a ball grid array (BGA) type package). The rear solder pads 120 may include, for example, connection solder pads (in a land grid array (LGA) type package).
[0019] The optical integrated circuit sensor die 122s and the optical integrated circuit emitter die 122e are mounted to the upper surface of the package substrate 112 using a suitable adhesive material (e.g., a die attach film (DAF)). The optical integrated circuit sensor die 122s includes an optical sensor 124s (e.g., formed by an array of photosensitive elements such as photodiodes) and a plurality of electrically connecting die bond pads 126 associated with a surface (e.g., the front surface) opposite the surface (e.g., the rear surface) attached to the package substrate 112. The optical integrated circuit emitter die 122e includes an optical emitter 124e (e.g., including a vertical cavity surface emitting laser (VCSEL)) and one or more electrically connecting die bond pads 126 associated with a surface (e.g., the front surface) opposite the surface (e.g., the rear surface) attached to the package substrate 112.
[0020] The electrically connecting die bond pads 126 of the optical integrated circuit dies 122s, 122e are electrically connected to the front solder pads 118 of the package substrate 112 using bonding wires 128. Electrical connections may also be provided between the rear surfaces of the optical integrated circuit sensor die 122s and the optical integrated circuit emitter die 122e and the associated front solder pads 118 of the package substrate 112.
[0021] Although Figure 2 the optical integrated circuit dies 122s, 122e are shown mounted in a normal orientation, where the backs of these dies are mounted to the package substrate 112 and the fronts face upward, it should be understood that this is merely an example and in alternative embodiments, one or the other or both of the optical integrated circuit dies 122s, 122e may be mounted in a so-called "flip chip" orientation, where the fronts of these dies are mounted to the package substrate 112 (face down) and the electrically connecting die bond pads 126 are directly soldered to the front solder pads 118 of the package substrate 112.
[0022] The cap 130 is mounted to the package substrate 112. The cap 130 is formed of a body of an injection-molded opaque material and includes a peripheral sidewall 130a, a partition wall 130b, and a front wall 130c. As will be explained in more detail herein, the front wall 130c is formed by one injection-molding operation, while the peripheral sidewall 130a and the partition wall 130b are formed by another (i.e., different) injection-molding operation. The illustrated dotted line indicates the position between the encapsulation materials formed by the two injection-molding operations (note, however, that the dividing line between the materials of the two injection-molding operations may not necessarily be fully visible or detectable in all cases).
[0023] Above the optical integrated circuit sensor die 122s is a stack of a first transparent resin plate 134a and a first diffractive optical element (DOE) 136a (e.g., including one or more of an optical lens and an optical filter (e.g., an infrared (IR) filter) and having the form of a flat plate). Above the optical integrated circuit emitter die 122e is a stack of a second transparent resin plate 134b and a second diffractive optical element (DOE) 136a (e.g., including one or more of an optical lens and an optical filter (e.g., an infrared (IR) filter)). Each of the resin plates 134 and the DOE 136 may have a parallelepiped shape. The area of each resin plate 134 is smaller than the area of the DOE 136 on which the resin plate is stacked (where the area in this context refers to the width x length of the major (i.e., largest) face of the parallelepiped). The front wall 130c of the cap 130 laterally encapsulates the stack of the transparent resin plate 134a and the DOE 136a and the stack of the transparent resin plate 134b and the DOE 136b. The peripheral sidewall 130a and the partition wall 130b of the cap 130 extend rearward from the front wall 130c of the cap 130. Portions of the peripheral sidewall 130a and the partition wall 130b extend onto a portion of the rear surface of the DOE 136a, 136b such that the peripheral edge regions 138 of the DOE 136a, 136b (i.e., the regions not covered by the resin plates 134a, 134b of the smaller area) are encapsulated between the front wall 130c of the cap 130 and the peripheral sidewall 130a and the partition wall 130b.
[0024] The stacked peripheral sidewall 130a, front wall 130c, and transparent resin plates 134a, 134b and DOEs 136a, 136b define an open space of the cap 130, and the partition wall 130b extends between the opposing sidewalls to divide the open space into a first cavity 132a and a second cavity 132b. By mounting the cap 130 on the packaging substrate 112, the optical integrated circuit sensor die 122s is received within the first cavity 132a and the optical integrated circuit emitter die 122e is received within the second cavity 132b. The distal ends of the peripheral sidewall 130a and the partition wall 130b are attached to the upper surface of the packaging substrate 112 using an adhesive material layer.
[0025] Now refer to Figures 3A - 3J , which illustrates steps in a process for manufacturing the cap 130 used in the package 110 as shown in Figure 2 .
[0026] Figure 3A - The first panel carrier 200 includes a plurality of cap regions 202 that are separated from each other by inter-cap regions 204. A plurality of singulated diffractive optical elements 206 are mounted to the first panel carrier 200 at the cap regions 202. The singulated diffractive optical elements 206 mounted at each cap region 202 include a first DOE 136a and a second DOE 136b. The first DOE 136a and the second DOE 136b are spaced apart from each other at each cap region 202.
[0027] Figure 3B - A transparent resin block 210 is formed on top of each singulated diffractive optical element 206. In an embodiment, the transparent resin material can be screen printed on the upper surface of the diffractive optical element 206 and subjected to a baking process to cure the resin material to form the resin block 210. The transparent resin blocks 210 mounted at each cap region 202 include a first transparent resin plate 134a that forms a stack with the first DOE 136a and a second transparent resin plate 134b that forms a stack with the second DOE 136b. The area of each transparent resin block 210 (e.g., the surface of the parallelepiped in a plane parallel to the mounting surface of the first panel carrier 200) is smaller than the area of a single diffractive optical element 206 (in a plane parallel to the mounting surface of the first panel carrier 200) on which the transparent resin block 210 is mounted to form a stack.
[0028] It will be noted that structures other than the diffractive optical elements 206 can also be mounted to the first panel carrier 200 at the cap regions 202. For example, structures for assisting in providing electromagnetic shielding can be provided. Additionally, passive or active electronic devices can be provided.
[0029] Figure 3C - 1 and Figure 3C - 2- Then place the first panel carrier 200 with the stack of transparent resin plates 134 on the DOE 136 inside the cavity 220 of the mold 224. As Figure 3C - 1 shown, the top (or upper) mold half 224t of the mold 224 is placed in contact with the upper surfaces of the transparent resin plates 134a, 134b and the bottom (or lower) mold half 224b of the mold 224 is placed in contact with the bottom surface of the first panel carrier 200. Alternatively, as Figure 3C - 2 shown, only the bottom surface of the first panel carrier 200 is placed in contact with the lower mold half 224b of the mold 224.
[0030] Figure 3D - 1 and 3D-2 - Then fill the cavity 220 of the mold 224 with the opaque encapsulation resin material 230 to produce the encapsulated panel structure 232.
[0031] Remove the encapsulated panel structure 232 from the mold 224. For the embodiments as Figure 3C - 2 and Figure 3D - 2 shown, use a grinding or polishing operation to remove the encapsulation resin material 230 covering the transparent resin plates 134a, 134b such that the upper surfaces of the transparent resin plates 134a, 134b are exposed from the encapsulation resin material 230. Similarly, when molding using the embodiments as Figure 3C - 1 and Figure 3D - 1 shown, a grinding or polishing operation can be used to remove any unwanted encapsulation resin material 230 (e.g., in the form of molding flash) that may be present on the upper surfaces of the transparent resin plates 134a, 134b.
[0032] The resulting encapsulated panel structure 232 is shown in Figure 3E . It will be noted that the structure of the front wall 130c of the resulting cap 130 is formed by the portions of the opaque encapsulation resin material 230 of the stack of the lateral encapsulation resin plates 134a, 134b and the DOE 136a, 136b. Further, if any additional structures (e.g., electromagnetic shielding and passive or active electronic devices) are mounted to the first panel carrier 200 at the cap region 202, then such structures will also be encapsulated by the opaque encapsulation resin material 230.
[0033] Figure 3F - Mount the second panel carrier 240 to the side of the encapsulated panel structure 232 opposite the first panel carrier 200. Then remove the first panel carrier 200. Then turn the encapsulated panel structure 232 supported by the second panel carrier 240 upside down.
[0034] Figure 3G- Then, the second panel carrier 240 having the encapsulated panel structure 232 is placed within the cavity 250 of the mold 254. The mold 254 is a two-piece mold including a top (or upper) mold half 254t and a bottom (or lower) mold half 254b. The top mold half 254t includes a plurality of protrusions 256, where each protrusion 256 is located at a corresponding stack alignment with the transparent resin plate 134 and the DOE 136. The bottom of each protrusion 256 of the top mold half 254t of the mold 254 is placed in sealing contact with the upper surface of the transparent resin plate 134, and the bottom mold half 254b of the mold 254 is placed in contact with the bottom surface of the second panel carrier 240.
[0035] It will be noted that structures can be mounted to the encapsulated panel structure 232 at the cap region 202. For example, structures can be provided to assist in providing electromagnetic shielding. Additionally, passive or active electronic devices can be provided.
[0036] Figure 3H - Then, the cavity 250 of the mold 254 is filled with an opaque encapsulation resin material 260 to produce a further encapsulated panel structure 262. In an embodiment, the opaque encapsulation resin material 260 is the same material as the opaque encapsulation resin material 230 used in the Figure 3D - 1 and Figure 3D - 2 injection molding operation. The dotted lines shown indicate the position between the encapsulation materials formed by the two injection molding operations. It will be noted that the peripheral edge regions 138 of the DOE 136a, 136b are encapsulated between the opaque encapsulation resin material 230 (forming the front wall 130c of the cap 130) and the opaque encapsulation resin material 260 (forming the peripheral sidewalls 130a and the partition wall 130b). This ensures that the stack of the resin plates 134a, 134b and the DOE 136a, 136b is firmly held within the cap 130.
[0037] The further encapsulated panel structure 262 is removed from the mold 254. Figure 3I The resulting further encapsulated panel structure 262 is shown in. It will be noted that the structures of the peripheral sidewalls 130a and the partition wall 130b are formed by portions of the opaque encapsulation resin material 260, and the first cavity 132a and the second cavity 132b are formed in the opaque encapsulation resin material 260 at the positions of the protrusions 256 of the top mold half 254t to expose each stack of the resin plate 134 and the DOE 136. The opaque encapsulation resin materials 230, 260 encapsulate and fix the stack of the resin plates 134a, 134b and the DOE 136a, 136b. Additionally, if any additional structures (such as electromagnetic shielding and passive or active electronic devices) are mounted to the encapsulated panel structure 232 at the cap region 202, then such structures will also be encapsulated by the opaque encapsulation resin material 260.
[0038] Figure 3J - Then a cutting process is performed at the capping area 204 to singulate (also known as dicing in the art) the further encapsulated panel structure 262 into a plurality of caps 130. The cutting at the capping area 204 during singulation (dicing) can be performed, for example, using a saw or a laser (schematically indicated by arrow 270). If desired, the cutting operation can also extend completely through the second panel carrier 240. Then the caps 130 are removed from the second panel carrier 240 to produce individual caps 130 such as those shown in Figure 3K the caps as shown.
[0039] Now refer to Figure 4 , which shows a cross-section of a cap 130 including additional structures encapsulated within opaque encapsulation resin materials 230, 260. For example, Figure 4 the cap 130 in shows an electromagnetic shield 400 encapsulated within a front wall 130c (formed from the opaque encapsulation resin material 230) and an electronic device 402 encapsulated within a partition wall 130b (formed from the opaque encapsulation resin material 260). Suitable electrical connections to the electromagnetic shield 400 and / or the electronic device 402 can be provided at the distal ends of the walls 130b and 103c to support electrical coupling to the packaging substrate 112. The provision of the electromagnetic shield 400 encapsulated within the front wall 130c is only an example, and it can be understood that the electromagnetic shield 400 can alternatively be encapsulated within the walls 130a, 103b. The provision of the device 402 encapsulated within the partition wall 130b is only an example, and it can be understood that the device 402 can alternatively be encapsulated within the peripheral sidewall 130a.
[0040] Figure 2 The caps 130 used in the packaging of Figure 1 exhibit a number of advantages compared to the caps 30 used in the packaging of
[0041] In an embodiment, the optical integrated circuit package 110 may form a time-of-flight (ToF) device, where light (e.g., at an infrared wavelength) emitted from the optical transmitter 124e of the optical integrated circuit transmitter die 122e passes through the stack of the second transparent resin plate 134b and the second DOE 136b to illuminate a target. The emitted light reflected by the target passes through the first transparent resin plate 134a and the first DOE 136a to be detected by the optical sensor 124s of the optical integrated circuit sensor die 122s. Processing the detected reflected light in view of the emitted illumination light can provide information about the distance from the optical integrated circuit package 110 to the target.
[0042] Although Figure 2 the optical integrated circuit package 110 shown in includes two cavities 132, it should be understood that this is merely an example, and the package 110 may include only one cavity that houses one or more optical integrated circuit dies.
[0043] Although the present invention has been described in detail in the drawings and the foregoing description, such description and illustration should be regarded as illustrative or exemplary rather than restrictive; the present invention is not limited to the disclosed embodiments. Other variations of the disclosed embodiments can be understood and achieved by those skilled in the art when practicing the claimed invention by studying the drawings, this disclosure, and the appended claims.
Claims
1. A method, comprising: Providing a first panel carrier including a plurality of cap regions separated from each other by inter-cap regions; At each cap region, mounting a stack of a transparent plate and a diffractive optical element to the first panel carrier; Molding a first encapsulation resin material on the first panel carrier to laterally encapsulate the stack at each cap region and form a first encapsulated panel structure; Attaching a second panel carrier to a side of the first encapsulated panel structure opposite to the first panel carrier; Removing the first panel carrier; Molding a second encapsulation resin material on the first encapsulated panel structure to form a second encapsulated panel structure having cavities in the second encapsulation resin material, the cavities exposing each stack; Cutting the second encapsulated panel structure at the inter-cap regions to singulate the second encapsulated panel structure into a plurality of caps; And Removing the plurality of caps from the second panel carrier.
2. The method according to claim 1, wherein molding the second encapsulation resin material on the first encapsulated panel structure includes placing the first encapsulated panel structure in a mold having a first mold half in contact with the second panel carrier and a first mold half having protrusions in contact with each stack to define the cavities.
3. The method according to claim 1, wherein the first encapsulation resin material and the second encapsulation resin material are the same material.
4. The method according to claim 1, wherein mounting the stack at each cap region includes: Mounting the diffractive optical element to the first carrier panel at each cap region; And Mounting the transparent plate to an upper surface of each diffractive optical element.
5. The method according to claim 4, wherein mounting the transparent plate includes: Printing a resin material layer onto the upper surface of each diffractive optical element; And Curing the resin material layer to form the transparent plate.
6. The method according to claim 4, wherein molding the first encapsulation resin material on the first panel carrier includes placing the first panel carrier having the stack in a mold having a first mold half in contact with the first panel carrier and a second mold half in contact with the transparent plate at each cap region.
7. The method according to claim 1, wherein molding the first encapsulation resin material on the first panel carrier includes placing the first panel carrier having the stack in a mold having a first mold half in contact with the first panel carrier and a second mold half in contact with the stack at each cap region.
8. The method according to claim 1, wherein cutting the second encapsulated panel structure at the inter-cap regions forms peripheral sidewalls of the caps.
9. The method according to claim 1, wherein molding the first encapsulation resin material on the first panel carrier forms a front wall of the cap, the front wall laterally encapsulating the stack.
10. The method according to claim 1, further comprising mounting, at each cap region, a structure providing one of an electromagnetic shielding member or an electronic device to the first panel carrier, wherein the structure is encapsulated in the first encapsulated panel structure by the first encapsulation resin material.
11. The method according to claim 1, further comprising mounting, at each cap region, a structure providing one of an electromagnetic shielding member or an electronic device to the first encapsulated panel structure, wherein the structure is encapsulated in the second encapsulated panel structure by the second encapsulation resin material.
12. A cap for an optical integrated circuit package, comprising: A molded body including a peripheral sidewall and a front wall; Wherein the front wall laterally encapsulates a stack of a transparent plate and a diffractive optical element; Wherein the peripheral sidewall extends from the front wall and includes a portion extending onto a part of the rear surface of the stack, such that the peripheral edge region of the stack is encapsulated between the front wall of the cap and the peripheral sidewall of the cap.
13. The cap according to claim 12, wherein the area of the transparent plate is smaller than the area of the diffractive optical element.
14. The cap according to claim 13, wherein the peripheral edge region of the diffractive optical element not covered by the transparent plate is encapsulated between the front wall of the cap and the peripheral sidewall of the cap.
15. The cap according to claim 12, further comprising one of an electromagnetic shield or an electronic device encapsulated within the peripheral sidewall.
16. The cap according to claim 12, further comprising one of an electromagnetic shield or an electronic device encapsulated within the front wall.
17. The cap according to claim 12, wherein the front wall of the cap and the peripheral sidewall of the cap define an open space of the cap, and the integrated circuit of the optical integrated circuit package is received within the open space.
18. An optical integrated circuit package, comprising: A cap, comprising: A molded body including a peripheral sidewall and a front wall; Wherein the front wall laterally encapsulates a stack of a transparent plate and a diffractive optical element; Wherein the peripheral sidewall extends from the front wall and includes a portion extending onto a part of the rear surface of the stack, such that the peripheral edge region of the stack is encapsulated between the front wall of the cap and the peripheral sidewall of the cap; and Wherein the front wall of the cap and the peripheral sidewall of the cap define an open space of the cap; A packaging substrate; and An integrated circuit die mounted to the packaging substrate; Wherein the cap is mounted to the packaging substrate, and the integrated circuit die is received within the open space.
19. The optical integrated circuit package according to claim 18, wherein the peripheral edge region of the diffractive optical element not covered by the transparent plate is encapsulated between the front wall of the cap and the peripheral sidewall of the cap.
20. The optical integrated circuit package according to claim 18, further comprising one of an electromagnetic shield or an electronic device encapsulated within the molded body of the cap.