Task execution method and device, electronic equipment and storage medium

Abstract

The invention provides a task execution method and device, electronic equipment, a storage medium and a program product, and relates to the technical field of chips, in particular to the technical field of large models, the technical field of anomaly detection and the like. According to the specific implementation scheme, a target processor executes a to-be-processed task to obtain an execution result; performing data anomaly detection on the execution result to obtain a data detection result; under the condition that the data detection result represents that the execution result is abnormal, an exception interruption request is sent to a central processing unit; and in response to the received backup operator from the central processing unit, using the backup operator to back up the associated data for executing the to-be-processed task.

Description

Technical Field

[0001] The present disclosure relates to the field of chip technology, especially to the fields of large model technology, anomaly detection technology, etc., and specifically relates to a task execution method, apparatus, electronic device, storage medium, and program product. Background Art

[0002] With the in-depth development of artificial intelligence technology, the inference task of large models has become an important topic for promoting technological innovation. As the model parameters of large models continue to increase, the performance requirements for processors to execute the inference tasks of large models are also getting higher and higher. Summary of the Invention

[0003] The present disclosure provides a task execution method, apparatus, electronic device, storage medium, and program product.

[0004] According to one aspect of the present disclosure, there is provided a task execution method, including: a target processor executes a task to be processed to obtain an execution result; performs data anomaly detection on the execution result to obtain a data detection result; in the case where the data detection result indicates that the execution result is abnormal, sends an exception interrupt request to a central processor; and in response to receiving a backup operator from the central processor, uses the backup operator to back up associated data for executing the task to be processed.

[0005] According to another aspect of the present disclosure, there is provided a task execution apparatus, including: a task execution module for a target processor to execute a task to be processed to obtain an execution result; an anomaly detection module for performing data anomaly detection on the execution result to obtain a data detection result; an interrupt request module for sending an exception interrupt request to a central processor in the case where the data detection result indicates that the execution result is abnormal; and a backup module for receiving a backup operator from the central processor and using the backup operator to back up associated data for executing the task to be processed.

[0006] According to another aspect of the present disclosure, there is provided an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method as described above.

[0007] According to another aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause the computer to execute the method as described above.

[0008] According to another aspect of the present disclosure, there is provided a computer program product including a computer program which, when executed by a processor, implements the method as described above.

[0009] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The drawings are used to better understand the solution and do not constitute a limitation to the present disclosure. Among them:

[0011] Figure 1A Schematically shows an exemplary system architecture to which the task execution method and apparatus according to an embodiment of the present disclosure can be applied;

[0012] Figure 1B Schematically shows a block diagram of a target processor to which the task execution method and apparatus according to an embodiment of the present disclosure can be applied;

[0013] Figure 2 Schematically shows a flowchart of the task execution method according to an embodiment of the present disclosure;

[0014] Figure 3A Schematically shows a schematic diagram of the process of the task execution method according to an embodiment of the present disclosure;

[0015] Figure 3B Schematically shows a schematic diagram of the process of the task execution method according to a related example;

[0016] Figure 4A Schematically shows a schematic diagram of a target processor according to an embodiment of the present disclosure;

[0017] Figure 4B Schematically shows a schematic diagram of a target processor according to another embodiment of the present disclosure;

[0018] Figure 4C Schematically shows a schematic diagram of a target processor according to still another embodiment of the present disclosure;

[0019] Figure 5 Schematically shows a schematic diagram of the process of the task execution method according to another embodiment of the present disclosure;

[0020] Figure 6 Schematically shows a block diagram of the task execution apparatus according to an embodiment of the present disclosure; and

[0021] Figure 7 Schematically shows a block diagram of an electronic device suitable for implementing the task execution method according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] The following describes exemplary embodiments of the present disclosure with reference to the accompanying drawings. Various details of the embodiments of the present disclosure are included to facilitate understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, descriptions of well-known functions and structures are omitted below for clarity and conciseness.

[0023] Figure 1A An exemplary system architecture to which the task execution method and apparatus according to the embodiments of the present disclosure can be applied is schematically illustrated.

[0024] It should be noted that Figure 1A The illustration is only an example of the system architecture to which the embodiments of the present disclosure can be applied, to help those skilled in the art understand the technical content of the present disclosure, but it does not mean that the embodiments of the present disclosure cannot be used in other devices, systems, environments or scenarios. For example, in another embodiment, the exemplary system architecture to which the task execution method and apparatus can be applied may include a terminal device, but the terminal device can implement the task execution method and apparatus provided by the embodiments of the present disclosure without interacting with the server.

[0025] As Figure 1A shown, the system architecture 100 according to this embodiment may include terminal devices 101, 102, 103, a network 104, and a server 105. The network 104 is used to provide a medium for communication links between the terminal devices 101, 102, 103 and the server 105. The network 104 may include various connection types, such as wired and / or wireless communication links, etc.

[0026] Users can use the terminal devices 101, 102, 103 to interact with the server 105 through the network 104 to receive or send messages, etc. Various communication client applications may be installed on the terminal devices 101, 102, 103, such as knowledge reading applications, web browser applications, search applications, instant messaging tools, email clients, and / or social platform software, etc. (only as examples).

[0027] The terminal devices 101, 102, 103 may be various electronic devices having a display screen and supporting web browsing, including but not limited to smart phones, tablet computers, laptop portable computers, and desktop computers, etc.

[0028] Server 105 may be a server that provides various services, such as a background management server (only for example) that supports the content browsed by users using terminal devices 101, 102, and 103. The background management server can analyze and process data such as user requests received, and feedback the processing results (such as web pages, information, or data obtained or generated according to user requests) to the terminal devices.

[0029] It should be noted that a target processor 106 may be configured on the terminal devices 101, 102, and 103. Generally, the task execution method provided by the embodiments of the present disclosure can be executed by the target processor 106 of the terminal devices 101, 102, and 103. Correspondingly, the task execution device provided by the embodiments of the present disclosure can also be set in the target processor 106 of the terminal devices 101, 102, and 103.

[0030] Alternatively, a target processor 106 may be configured on the server 105. Generally, the task execution method provided by the embodiments of the present disclosure can also be executed by the target processor 106 of the server 105. Correspondingly, the task execution device provided by the embodiments of the present disclosure can generally be set in the target processor 106 of the server 105. The task execution method provided by the embodiments of the present disclosure can also be executed by a server or a server cluster different from the server 105 and capable of communicating with the terminal devices 101, 102, 103 and / or the server 105, as long as it is configured with a target processor. Correspondingly, the task execution device provided by the embodiments of the present disclosure can also be set in a server or a server cluster different from the server 105 and capable of communicating with the terminal devices 101, 102, 103 and / or the server 105.

[0031] It should be understood that Figure 1A the numbers of the terminal devices, networks, and servers in

[0032] Figure 1B are merely illustrative. According to the implementation requirements, there can be any number of terminal devices, networks, and servers.

[0033] As Figure 1B shown, the target processor 106 may include a target computing unit 1061, a cache 1062, a target storage unit 1063, etc.

[0034] As Figure 1BAs shown, the target computing unit 1061 can be invoked to execute the task to be processed, and an execution result is obtained. The execution result is stored in the cache 1062. Data anomaly detection is performed on the execution result in the cache 1062 to obtain a data detection result. In the case where the data detection result indicates that the execution result is abnormal, an exception interrupt request can be sent to the central processing unit, and in response to receiving a backup operator from the central processing unit, the associated data used to execute the task to be processed is backed up using the backup operator to obtain backup data. The backup data is stored in the target storage unit 1063.

[0035] In the technical solution of the present disclosure, the collection, storage, use, processing, transmission, provision, disclosure, and application, etc., of the user's personal information involved all comply with the provisions of relevant laws and regulations, necessary confidentiality measures are taken, and it does not violate public order and good customs.

[0036] In the technical solution of the present disclosure, the authorization or consent of the user is obtained before obtaining or collecting the user's personal information.

[0037] It should be noted that the sequence numbers of the respective operations in the following methods are only used as representations of the operations for description, and should not be regarded as indicating the execution order of the respective operations. Unless expressly stated, the method does not need to be executed exactly in the order shown.

[0038] Figure 2 The flowchart of the task execution method according to an embodiment of the present disclosure is schematically shown.

[0039] As Figure 2 shown, the method includes operations S210 to S240.

[0040] In operation S210, the target processor executes the task to be processed to obtain an execution result.

[0041] In operation S220, data anomaly detection is performed on the execution result to obtain a data detection result.

[0042] In operation S230, in the case where the data detection result indicates that the execution result is abnormal, an exception interrupt request is sent to the central processing unit.

[0043] In operation S240, in response to receiving a backup operator from the central processing unit, the associated data used to execute the task to be processed is backed up using the backup operator.

[0044] The device type of the target processor is not limited. For example, it may include one or a combination of multiple processors such as a Graphics Processing Unit (GPU), a Neural Network Processing Unit (NPU), a Deep Learning Processing Unit (DPU), a tensor processing unit (TPU), and an Inter-Processor Unit (IPU).

[0045] The task to be processed can be a large model inference task. However, it is not limited to this. It can also be a deep learning model inference task or a general computing task.

[0046] Optionally, it can be an end-to-end inference task as the task to be processed to obtain an execution result. For example, a large model question-and-answer task can be used as the task to be processed, and the target processor is used to call the model parameters of the entire large model to execute the question-and-answer task to obtain an answer for feedback on the question. However, it is not limited to this. The processing of calling any network layer in the large model can also be used as the task to be processed. For example, the large model may include a Transformer (encoding and decoding) architecture. The large model with a Transformer architecture may include multiple processing layers. The structure of each processing layer may be the same, including a Multi-Head self-Attention (MHA) mechanism and a Feed-Forward Network (FFN). The task to be processed may include the task of performing multi-head self-attention calculation using the module parameters of the multi-head self-attention mechanism, and using the intermediate result after the multi-head self-attention calculation as the execution result.

[0047] The data detection result can be the result obtained after performing data anomaly detection on the execution result. The method of data anomaly detection is not limited. For example, a deep learning model can be used to perform data anomaly detection on the execution result to obtain a data detection result that characterizes whether there is an anomaly in the execution result and the cause of the anomaly. A rule verification method can also be used to perform data anomaly detection on the execution result using a predetermined rule to determine whether the execution result meets the predetermined rule. When the execution result meets the predetermined rule, it characterizes that the execution result is normal. When the execution result does not meet the predetermined rule, it characterizes that the execution result is abnormal.

[0048] When the data detection result characterizes that the execution result is normal, the execution result can be stored in the target storage unit for subsequent operations. When the data detection result characterizes that the execution result is abnormal, an exception interrupt request can be generated.

[0049] Optionally, an exception interrupt request can be used to request an interruption of the currently executing pending task, such as a temporary stop. However, it is not limited to this. It can also be used to request a backup operator. For example, an exception interrupt request is sent to the central processing unit. The central processing unit can, in response to the exception interrupt request, send a backup operator to the target processor. The backup operator can refer to one or more of a program, an algorithm, a function, and code for performing a backup task. The target processor, in response to receiving the backup operator from the central processing unit, performs a backup operation to back up the associated data for executing the pending task.

[0050] The associated data can include any one or more of the execution result, the model parameters for executing the pending task, and the model framework data for executing the pending task. However, it is not limited to this, and it can also include the current running state data of the target processor, etc. As long as it is data related to the execution of the pending task.

[0051] Backing up the associated data can save the abnormal operation scene and reproduce the abnormal problem using the backup data.

[0052] Using the task execution method provided by the embodiments of the present disclosure, it is possible to directly perform data anomaly detection on the execution result on the target processor, and based on the data detection result, timely determine whether there is an anomaly during the execution of the pending task. In addition, in the case of an anomaly, by obtaining a backup operator from the central processing unit, it is possible to timely perform a data backup operation on the associated data for executing the pending task, and timely and quickly save the operation scene to reduce the difficulty of subsequent operations such as problem reproduction and debugging. In addition, both the data anomaly detection of the execution result and the backup of the associated data are performed by the target processor, without relying on the central processing unit, thereby reducing the dependence on the central processing unit and resource consumption.

[0053] Figure 3A Schematically shows a flowchart of the task execution method according to an embodiment of the present disclosure.

[0054] As Figure 3A shown, the target processor 310 can use the computing unit 311 to execute the pending task to obtain an execution result. Use the data anomaly detection unit 312 to perform data anomaly detection on the execution result to obtain a data detection result. Determine whether the data detection result is abnormal. In the case where the data detection result indicates that the execution result is abnormal, an exception interrupt request is sent to the central processing unit 320. The central processing unit 320, in response to receiving the exception interrupt request, sends a backup operator to the target processor 310. In response to receiving the backup operator, use the backup unit 313 to run the backup operator to back up the associated data. In the case where the data detection result indicates that the execution result is normal, perform subsequent task operations based on the execution result.

[0055] Figure 3B A flowchart schematically shows a task execution method according to a related example.

[0056] As Figure 3B shown, the target processor 310' uses the computing unit 311' to execute the task to be processed and obtains an execution result. The hardware exception detection unit 312' is used to perform hardware exception detection on the hardware exception information to obtain a hardware detection result. When the hardware detection result indicates that the target processor 310' is abnormal, an exception interrupt request is sent to the central processing unit 320'. In response to receiving the exception interrupt request, the central processing unit 320' traps from the user mode to the kernel mode, calls the interrupt function running in the kernel mode to perform an interrupt operation, and completes the interrupt operation of the task to be processed and data backup.

[0057] Optionally, the kernel mode and the user mode are two different hardware spaces. The user mode can be configured with application programs that rely on inter-process communication (IPC). The kernel mode can be configured with application programs that rely on the central processing unit to run, such as interrupt functions. The interrupt controller can be used to perform hardware interrupts on the target processor.

[0058] Optionally, the interrupt exception request generated by the target processor can also be received by the interrupt controller and sent to the central processing unit by the interrupt controller. Generally, the interrupt of the target processor cannot be processed in the user mode, and the central processing unit will trap to the kernel mode and execute the corresponding interrupt handler. During this process, the central processing unit must pause other processes that are being executed.

[0059] However, using the application programs configured in the kernel mode to perform interrupt operations and data backup on the target processor depends to a large extent on the CPU computing power and bandwidth resources, which in turn leads to relatively large consumption of CPU computing power and bandwidth resources, and further increases the inference operation cost and duration of the large model.

[0060] Compared with Figure 3B the task execution method shown, using the task execution method as Figure 3A shown can avoid calling the interrupt function in the CPU kernel mode to perform interrupt operations and data backup, and reduce the dependence on the CPU. In addition, it can also use the execution result of the target processor to perform data exception detection, increase the types of exception detection, improve the exception detection efficiency, and ensure the validity and stability of the intermediate results during the inference process of the large model.

[0061] According to an embodiment of the present disclosure, for as Figure 2In the operation S210 shown, the target processor executes the task to be processed and obtains an execution result, which may include: based on the task type of the task to be processed, calling a target operator from multiple candidate operators to process the data to be processed in the task to be processed, and obtaining an execution result.

[0062] Exemplarily, the candidate operators may include a matrix multiplication operator, a transpose operator, and a matrix addition operator. However, it is not limited thereto. It may also be other computational operators for performing large model inference tasks.

[0063] The candidate operators may include one or more of a program, an algorithm, a function, and code for performing the task to be processed.

[0064] Figure 4A A schematic diagram of a target processor according to an embodiment of the present disclosure is schematically shown.

[0065] As Figure 4A shown, the target processor 410 may include N computing units 411. Each computing unit 411 may include multiple computing subunits, such as a matrix multiplication computing subunit 4111 and a general computing subunit 4112. The matrix multiplication operator may be assigned to the matrix multiplication computing subunit 4111, and the transpose operator and the matrix addition operator may be assigned to the general computing subunit 4112.

[0066] The target processor may, based on the task type of the task to be processed, for example, when the task to be processed is the channel splicing of multiple data to be processed, call a matrix addition operator from multiple candidate operators to perform the operation of channel splicing on the multiple data to be processed in the general computing subunit, and obtain an execution result.

[0067] According to an embodiment of the present disclosure, the candidate operators include operators for performing inference tasks of a large model and can be applied to the inference scenario of a large model. In addition, configuring multiple candidate operators in the target processor can improve the task execution scope of the target processor while improving the flexible configuration ability.

[0068] Preferably, multiple target processors may be configured in an electronic device. The running programs configured for each target processor are different, thereby realizing that multiple target processors form a heterogeneous processor cluster. The central processor may be used to determine the target processor for executing the task to be processed from the heterogeneous processor cluster according to the task type of the task to be processed.

[0069] According to an embodiment of the present disclosure, for the operation S220 as Figure 2 shown, performing data anomaly detection on the execution result to obtain a data detection result may include: in response to a lock operation having been performed on the cache for storing the execution result, performing data anomaly detection on the execution result to obtain a data detection result.

[0070] Figure 4B A schematic diagram schematically shows a target processor according to another embodiment of the present disclosure.

[0071] As Figure 4B shown, the target processor 410 may include a cache 412 and a data anomaly detection unit 413. The data anomaly detection unit 413 may be configured to perform data anomaly detection on the execution results stored in the cache 412 by using an anomaly detection operator configured therein, to obtain a data detection result.

[0072] Optionally, the execution results in the cache may be stored by using the Direct Memory Access (DMA) technology. In the case of performing data anomaly detection, a lock operation may be performed on the cache to block the write operation of the execution results to the cache.

[0073] Performing data anomaly detection on the execution results after performing a lock operation on the cache can improve the effectiveness and stability of the data detection result, and avoid the interference of the execution results of subsequent tasks to be processed on the execution results of the current task to be processed.

[0074] According to an embodiment of the present disclosure, after performing a lock operation on the cache, performing data anomaly detection on the execution results to obtain a data detection result may include: performing data anomaly detection on the execution results by using an anomaly detection operator that matches the task type of the task to be processed, to obtain a data detection result. The anomaly detection operator includes at least one of the following: a rule verification operator, a data comparison operator, and a precision verification operator.

[0075] For the inference scenario of large models, due to the increasing richness of functions, the consumption of computing power resources is also increasing. Data anomaly detection of the execution results is becoming more and more important. Data anomaly detection includes, but is not limited to, detection of whether the data type, data precision, result content, etc. meet predetermined conditions.

[0076] The task type may refer to a modality type, such as an image task, a text task, or a voice task, etc., but is not limited thereto, and may also refer to a domain type, such as a question and answer task, a retrieval task, a chat task, a translation task, an intent recognition task, etc.

[0077] An anomaly detection operator may be determined from multiple candidate anomaly detection operators for different task types. The candidate anomaly detection operators may include a rule verification operator, a data comparison operator, a precision verification operator, etc.

[0078] Optionally, a rule verification operator is used to verify the execution result against a predetermined rule to determine the rule verification result of whether the execution result meets the predetermined rule. For example, whether the data in the execution result meets a predetermined data type, and the predetermined data type may include a modality type, such as an image or text, but is not limited thereto. The predetermined data type may also include a numerical type, such as infinity or non-numerical data types, etc.

[0079] Optionally, a data comparison operator is used to compare the execution result with a reference result to determine the data comparison result of whether the execution result matches the reference result. The reference result may refer to the expected result that is the same as the execution result. The reference result can be used as reference data to determine whether the execution result matches the reference result. The match between the reference result and the execution result may refer to type matching, but is not limited thereto, and may also refer to semantic matching or data identity. As long as it can be used for comparison.

[0080] For example, for an execution result of a numerical type, it is used to determine whether the error between the execution result and the reference result is less than an error threshold. Also, for an execution result of a text or image type, it is used to determine whether the semantic similarity between the execution result and the reference result meets a predetermined semantic similarity threshold.

[0081] Optionally, a precision verification operator can be used to verify the precision or confidence level of the execution result to determine whether the execution result meets a predetermined precision threshold or a predetermined confidence level threshold.

[0082] Using an anomaly detection operator to perform anomaly detection on the execution result can improve the detection of abnormal data in the execution results of different types of inference tasks, and improve the flexible configuration ability and application scope.

[0083] According to an embodiment of the present disclosure, performing data anomaly detection on the execution result to obtain a data detection result may include: using a plurality of anomaly detection operators of different types to perform parallel data anomaly detection on the execution result to obtain a plurality of data detection sub-results. In the case where any one of the plurality of data detection sub-results indicates that the execution result is abnormal, it is determined that the data detection result indicates that the execution result is abnormal.

[0084] For example, using a rule verification operator to verify the execution result to obtain a rule verification result indicating whether the execution result meets a predetermined rule. Using a data comparison operator to compare the execution result and the reference result to obtain a data comparison result. Using a precision verification operator to verify the precision of the execution result to obtain a precision verification result. In the case where at least one of the rule verification result, the data comparison result, and the precision verification result indicates that the execution result is abnormal, it is determined that the data detection result indicates that the execution result is abnormal.

[0085] When at least one of the rule verification result, the data comparison result, and the accuracy verification result indicates an abnormal execution result, it is determined that the data detection result indicates an abnormal execution result. By using multiple abnormal detection operators of different types, the detection range and generality of abnormal data can be improved. When at least one indicates an abnormal execution result, that is, the determination principle for determining that the data detection result indicates an abnormal execution result, the effectiveness and stability of the abnormal execution result detection can be ensured.

[0086] For the embodiments of the present disclosure, for operation S230 as Figure 2 shown, sending an abnormal interrupt request to the central processing unit may include: determining the operator type of the backup operator based on the task type of the task to be processed. Generating an abnormal interrupt request based on the operator type.

[0087] For tasks to be processed with different task types, backup operators with different operator types can be configured to back up associated data of different types.

[0088] For example, for a large model inference task, the associated data may include the execution result of the task to be processed, the target operator for executing the task to be processed, the model framework data for executing the task to be processed, etc. However, it is not limited thereto. It may also include the hardware operation status data of the target processor, etc.

[0089] Also for example, for a calculation task of a machine algorithm, the associated data may include the execution result of the task to be processed, the target operator for executing the task to be processed, etc.

[0090] For tasks to be processed with different task types, the corresponding backup operator can be determined. The information indicating the operator type of the backup operator is added to the abnormal interrupt request.

[0091] Using the method provided by the embodiments of the present disclosure to generate an abnormal interrupt request based on the operator type can improve the richness and effectiveness of the content carried by the abnormal interrupt request, and thus improve the efficiency and processing ability of abnormal interrupt processing.

[0092] As an alternative example, the backup operator can be directly configured in the target processor. When it is determined that the execution result is abnormal, the backup operator matching the task type is called to back up the associated data.

[0093] Compared with the method of configuring the backup operator in the target processor, since the backup operator is data that is not frequently used, storing the backup operator in the central processing unit will save the storage space of the target processor and reduce the resource consumption of the target processor.

[0094] According to an embodiment of the present disclosure, the backup operator may include a snapshot operator, but is not limited thereto. The backup operator may further include other copy operators or mirror operators for copying data.

[0095] Optionally, for the operation S240 as Figure 2 shown, using the backup operator to back up the execution result may include: using the snapshot operator to back up the associated data corresponding to the determined abnormal moment.

[0096] Compared with other types of backup operators, using the snapshot operator can improve the efficiency and effectiveness of data backup.

[0097] The associated data corresponding to the determined abnormal moment may include the associated data generated or existing when the abnormal moment is determined.

[0098] The associated data may include at least one of the following: the target operator for executing the task to be processed, the execution result, and the model framework data for executing the task to be processed.

[0099] The target operator for executing the task to be processed may include a model parameter matrix, a function, running code, etc. Optionally, the target operator may include one or more of a matrix multiplication operator, a transpose operator, or a matrix addition operator, etc.

[0100] The model framework data for executing the task to be processed may include data for indicating the model architecture. For example, the model architecture of a large model may include a stack of multiple encoder-decoders, and each encoder-decoder includes an embedding layer, a self-attention mechanism layer, a normalization layer, a feed-forward layer, etc.

[0101] According to an embodiment of the present disclosure, using different types of backup operators to back up the associated data of different task types can back up different types of data such as the model framework, model parameters, and execution results of the large model, thereby improving the effectiveness and comprehensiveness of the backup data, and further improving the effect of subsequent reproduction and debugging.

[0102] Figure 4C Schematically shows a schematic diagram of a target processor according to another embodiment of the present disclosure.

[0103] As Figure 4C shown, the target processor 410 may include N computing units, where N is greater than or equal to 2. For example, it includes one target computing unit 414 and N - 1 other computing units 415. The operation of obtaining the execution result by executing the task to be processed is performed by the target computing unit 414 among the multiple computing units.

[0104] As Figure 4CAs shown, in the case where it is determined that the execution result obtained by the target computing unit 414 executing the task to be processed is abnormal, any other computing unit 415 in the target processor 410 other than the target computing unit 414 executes the task to be processed again to obtain a verification result.

[0105] According to another embodiment of the present disclosure, regardless of whether the execution result obtained by the target computing unit executing the task to be processed is abnormal, the hardware state of the target processor can be monitored in real time to obtain hardware state information characterizing the hardware state of the target processor. Based on the hardware state information of the target processor, a hardware detection result is determined. In the case where the hardware detection result indicates that there is a hardware abnormality in the target processor, any other computing unit in the target processor other than the target computing unit executes the task to be processed again to obtain a verification result.

[0106] In the case where it is determined that there is a hardware abnormality in the target computing unit, the use of the target computing unit can be suspended, and the target computing unit can be repaired. Other computing units are used to replace the target computing unit.

[0107] Using the hardware state information provided by the embodiments of the present disclosure to determine whether there is a hardware abnormality in the target computing unit can combine hardware abnormality detection and data abnormality detection, improving the comprehensiveness and effectiveness of abnormality detection. In addition, in the case where it is determined that there is a hardware abnormality in the target computing unit, using other computing units to replace the target computing unit and executing the task to be processed again can improve the completion effect of the task to be processed and avoid the generation of abnormal results.

[0108] According to the embodiments of the present disclosure, before performing the operation S240 as shown in Figure 2 The task execution method may further include an operation: in response to receiving an interrupt instruction from the central processing unit, performing an interrupt operation on the task to be processed in the user state. The interrupt instruction is generated by the central processing unit based on an exception interrupt request.

[0109] Specifically, the target processor sends an exception interrupt request to the central processing unit, and the central processing unit, in response to receiving the exception interrupt request, sends an interrupt instruction to the target processor. The interrupt instruction carries a backup operator.

[0110] Referring to the above, the kernel state and the user state are two different hardware spaces. The user state can be configured with application programs that rely on inter-process communication (IPC). The kernel state can be configured with application programs that rely on the central processing unit to run, such as interrupt functions.

[0111] In the embodiments of the present disclosure, performing the task to be processed in the user state may refer to directly completing the interrupt operation by the target processor in response to receiving the interrupt instruction.

[0112] Optionally, it can also be that the target processor sends an exception interrupt request to the interrupt controller. The interrupt controller generates an interrupt instruction in the hardware state and sends the interrupt instruction to the target processor, so that the target processor performs an interrupt operation in response to the interrupt instruction.

[0113] However, compared with the operation of using the interrupt controller to issue interrupt instructions, using the central controller can improve the output of the interrupt instruction and the backup operator from the same port, and reduce the hardware configuration such as the interrupt controller. Thereby, while improving the processing efficiency, the number of data transmission ports and hardware devices is reduced.

[0114] Figure 5 A flowchart of a task execution method according to an embodiment of the present disclosure is schematically shown.

[0115] As Figure 5 shown, the task execution method may include operations S510 to S550.

[0116] In operation S510, the target computing unit of the target processor is used to execute the task to be processed, and an execution result is obtained. And the execution result is stored in the cache.

[0117] In operation S520, the data exception detection unit of the target processor performs data exception detection on the execution result to obtain a data detection result.

[0118] In operation S530, when the data detection result indicates that the execution result is abnormal, an exception interrupt request is sent to the central processor.

[0119] In operation S540, a backup operator from the central processor is received.

[0120] In operation S550, the backup unit of the target processor uses the backup operator to back up the associated data in the cache to obtain backup data. The backup data is stored in the target storage unit of the target processor.

[0121] Figure 6 A block diagram of a task execution device according to an embodiment of the present disclosure is schematically shown.

[0122] As Figure 6 shown, the task execution device includes a task execution module 610, an exception detection module 620, an interrupt request module 630, and a backup module 640.

[0123] The task execution module 610 is used for the target processor to execute the task to be processed and obtain an execution result.

[0124] The exception detection module 620 is used for performing data exception detection on the execution result to obtain a data detection result.

[0125] An interrupt request module 630, configured to send an exception interrupt request to a central processing unit when a data detection result indicates an abnormal execution result.

[0126] A backup module 640, configured to receive a backup operator from the central processing unit and use the backup operator to back up associated data for executing a to-be-processed task.

[0127] According to an embodiment of the present disclosure, the task execution module includes: a task execution sub-module.

[0128] The task execution sub-module is configured to process to-be-processed data in the to-be-processed task by calling a target operator from multiple candidate operators based on the task type of the to-be-processed task, and obtain an execution result.

[0129] The candidate operators include a matrix multiplication operator, a transpose operator, and a matrix addition operator.

[0130] According to an embodiment of the present disclosure, the interrupt request module includes: an operator type determination sub-module and an interrupt request generation sub-module.

[0131] The operator type determination sub-module is configured to determine the operator type of the backup operator based on the task type of the to-be-processed task.

[0132] The interrupt request generation sub-module is configured to generate an exception interrupt request based on the operator type.

[0133] According to an embodiment of the present disclosure, the backup operator includes a snapshot operator.

[0134] According to an embodiment of the present disclosure, the backup module includes: a backup sub-module.

[0135] The backup sub-module is configured to use the snapshot operator to back up associated data corresponding to a determined abnormal moment.

[0136] The associated data includes at least one of the following: a target operator for executing the to-be-processed task, an execution result, and model framework data for executing the to-be-processed task.

[0137] According to an embodiment of the present disclosure, the anomaly detection module includes: an anomaly detection sub-module.

[0138] The anomaly detection sub-module is configured to perform data anomaly detection on the execution result by using an anomaly detection operator matching the task type of the to-be-processed task, and obtain a data detection result.

[0139] The anomaly detection operators include at least one of the following: a rule verification operator, a data comparison operator, and an accuracy verification operator.

[0140] According to an embodiment of the present disclosure, the anomaly detection module includes: a rule detection sub-module, a comparison detection sub-module, an accuracy detection sub-module, and a result determination sub-module.

[0141] The rule detection sub-module is configured to perform rule verification on the execution result by using a rule verification operator to obtain a rule verification result for characterizing whether the execution result meets a predetermined rule.

[0142] The comparison detection sub-module is configured to compare the execution result with a reference result by using a data comparison operator to obtain a data comparison result.

[0143] The accuracy detection sub-module is configured to perform accuracy verification on the execution result by using an accuracy verification operator to obtain an accuracy verification result.

[0144] The result determination sub-module is configured to determine that the data detection result characterizes that the execution result is abnormal when at least one of the rule verification result, the data comparison result, and the accuracy verification result characterizes that the execution result is abnormal.

[0145] According to an embodiment of the present disclosure, the target processor includes a plurality of computing units; the operation of executing a task to be processed to obtain an execution result is performed by a target computing unit among the plurality of computing units.

[0146] According to an embodiment of the present disclosure, the task execution device further includes: a hardware detection module and a repeated execution module.

[0147] The hardware detection module is configured to determine a hardware detection result based on the hardware status information of the target processor.

[0148] The repeated execution module is configured to, when the hardware detection result characterizes that there is a hardware anomaly in the target processor, cause any other computing unit in the target processor except the target computing unit to execute the task to be processed again to obtain a verification result.

[0149] According to an embodiment of the present disclosure, the task execution device further includes: an interrupt operation module.

[0150] The interrupt operation module is configured to respond to an interrupt instruction received from the central processing unit and perform an interrupt operation on the task to be processed in the user state. The interrupt instruction is generated by the central processing unit based on an exception interrupt request.

[0151] According to an embodiment of the present disclosure, the anomaly detection module includes: a lock operation sub-module.

[0152] The lock operation sub-module is configured to perform data anomaly detection on the execution result in response to having performed a lock operation on a cache for storing the execution result to obtain a data detection result.

[0153] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0154] According to an embodiment of the present disclosure, an electronic device includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method as described above.

[0155] According to an embodiment of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause a computer to execute the method as described above.

[0156] According to an embodiment of the present disclosure, a computer program product includes a computer program, and the computer program, when executed by a processor, implements the method as described above.

[0157] Figure 7 A schematic block diagram of an exemplary electronic device 700 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as, a laptop computer, a desktop computer, a workbench, a personal digital assistant, a server, a blade server, a mainframe computer, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, a personal digital processor, a cellular phone, a smart phone, a wearable device, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0158] As Figure 7 shown, the device 700 includes a computing unit 701, which can execute various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 702 or a computer program loaded from a storage unit 708 into a random access memory (RAM) 703. In the RAM 703, various programs and data required for the operation of the device 700 can also be stored. The computing unit 701, the ROM 702, and the RAM 703 are connected to each other through a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0159] Multiple components in device 700 are connected to the input / output (I / O) interface 705, including: an input unit 706, such as a keyboard, a mouse, etc.; an output unit 707, such as various types of displays, speakers, etc.; a storage unit 708, such as a disk, an optical disc, etc.; and a communication unit 709, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 709 allows device 700 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0160] The computing unit 701 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 701 include but are not limited to a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 701 executes the various methods and processes described above, such as the task execution method. For example, in some embodiments, the task execution method can be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as the storage unit 708. In some embodiments, part or all of the computer program can be loaded and / or installed onto device 700 via the ROM 702 and / or the communication unit 709. When the computer program is loaded into the RAM 703 and executed by the computing unit 701, one or more steps of the task execution method described above can be executed. Alternatively, in other embodiments, the computing unit 701 can be configured to execute the task execution method by any other suitable means (e.g., by means of firmware).

[0161] The various embodiments of the systems and techniques described above in this article can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGA), application-specific integrated circuits (ASIC), application-specific standard products (ASSP), systems-on-a-chip (SOC), complex programmable logic devices (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs, which can be executed and / or interpreted on a programmable system including at least one programmable processor, and the programmable processor can be a dedicated or general-purpose programmable processor, and can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0162] The program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, a special purpose computer, or other programmable data processing device, such that the program codes, when executed by the processor or controller, cause the functions / operations specified in the flowchart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, as a stand-alone software package partially on the machine and partially on a remote machine, or entirely on the remote machine or server.

[0163] In the context of the present disclosure, a machine-readable medium may be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0164] In order to provide interaction with a user, the systems and techniques described herein may be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and the input received from the user may be in any form (including acoustic input, speech input, or tactile input).

[0165] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected to each other by digital data communication in any form or medium (e.g., a communication network). Examples of communication networks include: local area network (LAN), wide area network (WAN), and the Internet.

[0166] A computer system can include a client and a server. The client and the server are generally remote from each other and typically interact through a communication network. The client-server relationship is created by computer programs that run on the respective computers and have a client-server relationship with each other. The server can be a cloud server, a server of a distributed system, or a server integrated with a blockchain.

[0167] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added, or deleted. For example, the steps recited in this disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this is not limited herein.

[0168] The above specific embodiments do not constitute a limitation on the protection scope of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure shall be included within the protection scope of this disclosure.

Claims

1. A task execution method, comprising: The target processor executes the task to be processed and obtains an execution result; Performing data anomaly detection on the execution result to obtain a data detection result; When the data detection result indicates that the execution result is abnormal, sending an exception interrupt request to the central processing unit; And In response to receiving a backup operator from the central processing unit, using the backup operator to back up the associated data for executing the task to be processed.

2. The method according to claim 1, wherein, The target processor executes the task to be processed and obtains an execution result, including: Based on the task type of the task to be processed, calling a target operator from multiple candidate operators to process the data to be processed in the task to be processed, and obtaining the execution result; Wherein, the candidate operators include a matrix multiplication operator, a transpose operator, and a matrix addition operator.

3. The method according to claim 1 or 2, wherein The sending the exception interrupt request to the central processing unit includes: Determining the operator type of the backup operator based on the task type of the task to be processed; and Generating the exception interrupt request based on the operator type.

4. The method according to claim 3, wherein, The backup operator includes a snapshot operator; The using the backup operator to back up the execution result includes: Using the snapshot operator to back up the associated data corresponding to the determined abnormal moment; Wherein, the associated data includes at least one of the following: The target operator for executing the task to be processed, the execution result, and the model framework data for executing the task to be processed.

5. The method according to any one of claims 1 to 4, wherein The performing data anomaly detection on the execution result to obtain a data detection result includes: Using an anomaly detection operator matching the task type of the task to be processed to perform data anomaly detection on the execution result, and obtaining the data detection result; The anomaly detection operator includes at least one of the following: A rule verification operator, a data comparison operator, and a precision verification operator.

6. The method according to claim 1 or 5, wherein The performing data anomaly detection on the execution result to obtain the data detection result includes: Using a rule verification operator to perform rule verification on the execution result to obtain a rule verification result for indicating whether the execution result meets a predetermined rule; Using a data comparison operator to compare the execution result with a reference result to obtain a data comparison result; Using a precision verification operator to perform precision verification on the execution result to obtain a precision verification result; and When at least one of the rule verification result, the data comparison result, and the precision verification result indicates that the execution result is abnormal, determining that the data detection result indicates that the execution result is abnormal.

7. The method according to any one of claims 1 to 6, wherein The target processor includes a plurality of computing units; the operation of executing the task to be processed to obtain an execution result is performed by a target computing unit among the plurality of computing units; The method further includes: Determining a hardware detection result based on the hardware status information of the target processor; When the hardware detection result indicates that there is a hardware anomaly in the target processor, any other computing unit in the target processor except the target computing unit executes the task to be processed again to obtain a verification result.

8. The method according to any one of claims 1 to 7, further comprising: In response to receiving an interrupt instruction from the central processing unit, perform an interrupt operation on the to-be-processed task in the user state, where the interrupt instruction is generated by the central processing unit based on the exception interrupt request.

9. The method according to any one of claims 1 to 8, wherein Performing data anomaly detection on the execution result to obtain a data detection result includes: In response to having performed a lock operation on the cache for storing the execution result, perform data anomaly detection on the execution result to obtain the data detection result.

10. A task execution device, comprising: A task execution module, configured to execute a to-be-processed task by a target processor to obtain an execution result; An anomaly detection module, configured to perform data anomaly detection on the execution result to obtain a data detection result; An interrupt request module, configured to send an exception interrupt request to the central processing unit when the data detection result indicates that the execution result is abnormal; And A backup module, configured to receive a backup operator from the central processing unit and use the backup operator to back up associated data for executing the to-be-processed task.

11. An electronic device, comprising: At least one processor; And A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method according to any one of claims 1 to 9.

12. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to execute the method according to any one of claims 1 to 9.

13. A computer program product, comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1 to 9.

Images