A high-gain reconfigurable array antenna suitable for transmission line wireless ad hoc networks

By loading varactor diodes and dielectric boards in the transmission line monitoring antenna, high gain, low profile, frequency and beam adjustable ad hoc network array antennas are realized, solving the problems of insufficient signal coverage and complex installation in traditional antennas in transmission line monitoring, and improving communication performance and system reliability.

CN120280689BActive Publication Date: 2025-08-15XIDIAN UNIV
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Patent Information

Application Number
CN202510764152.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-06-10
Publication Date
2025-08-15
Estimated Expiration
2045-06-10

AI Technical Summary

Technical Problem

In the prior art, traditional self-organized network antennas have problems such as limited signal coverage distance, fixed beam, large volume, complex installation and high installation accuracy in power transmission line monitoring, which are difficult to meet the needs of high gain, low cost, strong environmental adaptability and dynamic beam adjustment.

Method used

A high-gain reconfigurable array antenna suitable for wireless ad hoc networking of transmission lines was designed. By loading varactor diodes on the patch array layer, combining the dielectric board and the feed network layer, flexible beam control and frequency tuning are achieved, and a compact structure is adopted to adapt to complex environments.

Benefits of technology

It realizes high gain, low profile, frequency and beam adjustable antenna, with excellent environmental adaptability and flexibility, and is suitable for self-organized network communication of transmission line monitoring equipment, with a gain between 6.9dBi~8.9dBi, a frequency adjustable range of 5.1GHz~5.9GHz, and an aperture efficiency between 63%~77%.

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Abstract

The present invention discloses a high-gain reconfigurable array antenna suitable for transmission line wireless ad hoc networks. The antenna comprises a patch array layer, a first dielectric plate, a first ground layer, a second ground layer, a second dielectric plate, and a feed network layer, arranged sequentially from top to bottom. The patch array layer comprises a plurality of rectangular patch units, and a varactor diode is disposed between at least a portion of adjacent rectangular patch units. The first dielectric plate is provided with metalized upper-layer ground vias and upper-layer feed vias, and the second dielectric plate is provided with metalized lower-layer feed vias. The upper ends of the upper-layer ground vias are connected to a portion of the rectangular patch units, and the lower ends are connected to the first ground layer. The upper ends of the upper-layer feed vias are connected to a portion of the rectangular patch units, and the lower ends are connected to the upper ends of the lower-layer feed vias. The lower ends of the lower-layer feed vias are connected to the feed network layer. The array antenna of the present invention exhibits excellent performance in all aspects and can meet the requirements of wireless communication systems.
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Description

Technical Field

[0001] The present invention belongs to the field of communication technology, and in particular relates to a high-gain reconfigurable array antenna suitable for a wireless ad hoc network of a power transmission line. Background Art

[0002] With the continuous expansion of power transmission networks, especially the widespread distribution of high-voltage and ultra-high-voltage transmission lines in remote and complex geographical areas, online monitoring of transmission towers has become a critical component in ensuring the safe and stable operation of the power grid. However, these remote areas often lack stable communications infrastructure, and traditional data transmission methods face numerous challenges. Existing technologies, such as 4G / 5G cellular communications, optical fiber over Wi-Fi (OPGW), and satellite communications, have been applied in some scenarios, but each has its limitations. Cellular communications have limited coverage and suffer from severe signal attenuation in complex environments such as mountains and forests; optical fiber over Wi-Fi (OPGW) is expensive to lay, complex to maintain, and susceptible to damage; and satellite communications suffer from high latency and high costs, making them difficult to meet the needs of large-scale deployment of transmission tower monitoring equipment.

[0003] To address this challenge, ad hoc network communication technology has attracted widespread attention due to its advantages of not relying on fixed infrastructure, flexible expansion, and rapid deployment. Through automatic routing and relay forwarding between multiple nodes, ad hoc networks can achieve efficient data transmission over a wide area, making them particularly suitable for power transmission line monitoring scenarios in remote areas. However, traditional ad hoc network antenna design faces two major challenges: First, while omnidirectional antennas can support multi-node interconnection, their signal coverage distance is limited, making it difficult to meet the communication needs of tens of kilometers along power transmission lines; second, while directional antennas have a longer transmission distance, their narrow beam characteristics limit the flexibility of the network, making it difficult to achieve adaptive networking in complex environments.

[0004] Furthermore, transmission tower monitoring equipment is constantly exposed to harsh environments such as high altitude, strong winds, ice and snow, and lightning. Therefore, the antenna system must possess excellent environmental adaptability and mechanical reliability. Extreme temperature fluctuations, electromagnetic interference, and adverse weather conditions can all impact antenna performance and stability. Traditional designs struggle to achieve high gain and reliability while also maintaining a low profile, lightweight design, and robustness against environmental interference.

[0005] Prior art proposes an electrically tunable, pattern-reconfigurable integrated array antenna based on a 1-bit digitally coded metasurface. This antenna consists of an 8×8 element structure, divided into a radiating antenna and a phase-controlled metasurface. It uses a rectangular microstrip patch antenna as the radiating source, and phase control is achieved through square slot elements loaded with varactor diodes and a bias circuit layer, thereby achieving reconfigurable patterns. However, this design suffers from low gain, with an aperture efficiency of only 51%, making it difficult to meet high-gain requirements. Another prior art design achieves gain improvement by optimizing a half-plane reflective structure. This design utilizes a specific geometry and metasurface technology to achieve high gain performance in the half-plane direction. However, this design suffers from a very narrow bandwidth, making it difficult to cover a wide range of frequency bands, thus limiting its application in multi-band communications.

[0006] In addition to the above-mentioned metasurface antennas, traditional grid antenna solutions also have the following problems:

[0007] (1) Fixed beam and poor flexibility: The beam direction of traditional grid antennas is usually fixed and difficult to adjust dynamically, making them unable to adapt to the complex and changing communication needs along the transmission lines. When nodes move or the network topology changes, manual adjustment of the antenna direction or integration of sensors and motor drive systems are required, which increases the difficulty of operation and maintenance.

[0008] (2) Large size and complex installation: The physical size of grid antennas is large (especially parabolic antennas), and they may be subject to space constraints when installed on transmission towers. The installation and calibration process is complex and requires professional personnel and equipment.

[0009] (3) High installation accuracy requirements: The performance of grid antennas is highly dependent on installation accuracy. Directional deviations can lead to a significant drop in signal strength. In high-vibration environments such as transmission towers, long-term use may cause antenna deviation, affecting communication quality.

[0010] Therefore, there is an urgent need for an antenna solution that combines high gain, low cost, strong environmental adaptability, and the ability to dynamically adjust the beam direction to improve the communication performance and system reliability of transmission line monitoring equipment. Summary of the Invention

[0011] To address the above-mentioned problems in the prior art, the present invention provides a high-gain reconfigurable array antenna suitable for use in wireless ad hoc networks for power transmission lines. The technical problems to be solved by the present invention are achieved through the following technical solutions:

[0012] The present invention provides a high-gain reconfigurable array antenna suitable for a wireless ad hoc network of a power transmission line, comprising a patch array layer, a first dielectric plate, a first ground layer, a second ground layer, a second dielectric plate and a feed network layer arranged in sequence from top to bottom, wherein the patch array layer comprises a plurality of rectangular patch units arranged at equal intervals along a first direction, and a plurality of varactor diodes are arranged between at least a portion of adjacent rectangular patch units; a metalized upper ground via and an upper feed via are provided on the first dielectric plate, and a metalized lower feed via is provided on the second dielectric plate; the upper end of the upper ground via is connected to the A portion of rectangular patch units in the patch array layer has its lower end connected to the first ground layer; the upper end of the upper-layer feed via is connected to a portion of rectangular patch units in the patch array layer, and the lower end passes through the first ground layer and the second ground layer to be connected to the upper end of the lower-layer feed via at the corresponding position; the lower end of the lower-layer feed via is connected to the feed network layer, and the feed network layer is used to integrate the input DC component and AC component to form a radiation signal, and transmit the radiation signal to the patch array layer through the lower-layer feed via and the upper-layer feed via and radiate through the patch array layer.

[0013] Compared with the prior art, the present invention has the following beneficial effects:

[0014] 1. The high-gain reconfigurable array antenna provided by the present invention achieves flexible beam control by loading varactor diodes on the patch array layer. It has the advantages of high flexibility and wide beam coverage, and can meet the monitoring antenna's requirements for beam adjustment coverage. The antenna unit structure of the present invention is unified and can be formed into an array larger than 4×6 through reasonable layout, achieving higher gain and beam control capabilities. The antenna structure is streamlined, suitable for printed circuit board (PCB) processing, and very easy to mass produce. Therefore, it has good application prospects in wireless communication systems.

[0015] 2. The high-gain reconfigurable array antenna provided by this invention has an adjustable resonant frequency range of 5.1 GHz to 5.9 GHz, capable of covering the 5 GHz band used in WLANs. It has a 14.5% frequency tuning range, with a bandwidth of approximately 3.6% in each tuning state. Its maximum gain varies between 6.9 dBi and 8.9 dBi. The aperture efficiency at the resonance point remains between 63% and 77% under different bias voltages, demonstrating high radiation performance across all operating states. This high-gain reconfigurable array antenna exhibits excellent performance across all aspects, meeting the requirements of wireless communication systems.

[0016] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1This is a schematic diagram of the structural decomposition of a high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network provided by an embodiment of the present invention;

[0018] Figure 2 is a schematic structural diagram of a patch array layer provided by an embodiment of the present invention;

[0019] Figure 3 is a schematic structural diagram of another patch array layer provided by an embodiment of the present invention;

[0020] Figure 4 is a structural schematic diagram of a first dielectric plate provided by an embodiment of the present invention;

[0021] Figure 5 is a structural schematic diagram of a first ground layer provided by an embodiment of the present invention;

[0022] Figure 6 is a structural schematic diagram of a second ground layer provided by an embodiment of the present invention;

[0023] Figure 7 is a structural schematic diagram of a second dielectric plate provided by an embodiment of the present invention;

[0024] Figure 8 1 is a schematic structural diagram of a feed network layer provided by an embodiment of the present invention;

[0025] Figure 9 Schematic diagram of an equivalent circuit model of a varactor diode loaded in a high-gain reconfigurable array antenna according to an embodiment of the present invention;

[0026] Figure 10 Schematic diagram showing the variation of equivalent circuit parameters of a varactor diode loaded in a high-gain reconfigurable array antenna according to an embodiment of the present invention with voltage;

[0027] Figure 11 is a reflection coefficient curve diagram of the high-gain reconfigurable array antenna under different bias voltages in the frequency reconfigurable mode according to an embodiment of the present invention;

[0028] Figure 12 1 is a graph showing gain curves and aperture efficiency curves of the high-gain reconfigurable array antenna under different bias voltages in a frequency reconfigurable mode according to an embodiment of the present invention;

[0029] Figure 13 is a graph showing the relationship between the gain and resonant frequency and the bias voltage of the high-gain reconfigurable array antenna in the frequency reconfigurable mode according to an embodiment of the present invention;

[0030] Figure 14 1D far-field gain diagrams of the high-gain reconfigurable array antenna according to an embodiment of the present invention under different bias voltages in a frequency reconfigurable mode;

[0031] Figure 15 1 is a graph showing changes in port reflection coefficients of the high-gain reconfigurable array antenna according to an embodiment of the present invention in beam reconfigurable mode at different bias voltages at a 5.5 GHz operating frequency;

[0032] Figure 16 1D far-field gain diagrams of the high-gain reconfigurable array antenna according to an embodiment of the present invention at different bias voltages at a 5.5 GHz operating frequency in a beam reconfigurable mode;

[0033] Figure 17 This is a graph showing the relationship between the scanning angle, gain, and frequency of the high-gain reconfigurable array antenna in the beam reconfigurable mode according to an embodiment of the present invention.

[0034] Description of reference numerals:

[0035] 1-patch array layer; 11-rectangular patch unit; 111-square patch unit; 112-slender patch unit; 12-varicap diode; 2-first dielectric plate; 21-upper ground via; 22-upper feed via; 23-first connection hole; 3-first ground layer; 31-first circular hole; 4-second ground layer; 41-second circular hole; 5-second dielectric plate; 51-lower feed via; 52-second connection hole; 6-feed network layer; 61-power splitter network; 611-first branch part; 612-second branch part; 613-main part; 614-capacitor; 62-first DC bias circuit; 63-second DC bias circuit; 64-patch inductor; P1-feed port; D1-first DC bias port; D2-second DC bias port. DETAILED DESCRIPTION

[0036] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the following is a detailed description of a high-gain reconfigurable array antenna suitable for a wireless ad hoc network of power transmission lines proposed in accordance with the present invention, in combination with the accompanying drawings and specific embodiments.

[0037] The aforementioned and other technical contents, features, and effects of the present invention are clearly presented in the following detailed description of the specific embodiments in conjunction with the accompanying drawings. Through the description of the specific embodiments, a deeper and more specific understanding of the technical means and effects adopted by the present invention to achieve the intended purpose can be obtained. However, the accompanying drawings are provided for reference and illustration purposes only and are not intended to limit the technical solutions of the present invention.

[0038] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations are intended to cover non-exclusive inclusion, such that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the article or device comprising the element.

[0039] The present invention aims to maximize antenna gain while optimizing the structural design, reducing manufacturing costs, and improving environmental adaptability. This invention proposes a high-gain, low-profile, frequency- and beam-adjustable transmission tower monitoring antenna. This antenna features high gain, adjustable beam and frequency, a compact structure, a low profile, and high environmental adaptability, making it suitable for the communication needs of ad hoc networks used in transmission line monitoring equipment.

[0040] See Figure 1 , Figure 1 The figure is a schematic diagram of the structure of a high-gain reconfigurable array antenna suitable for power transmission line wireless ad hoc networks, provided by an embodiment of the present invention. The high-gain reconfigurable array antenna comprises, arranged from top to bottom, a patch array layer 1, a first dielectric plate 2, a first ground layer 3, a second ground layer 4, a second dielectric plate 5, and a feed network layer 6. The patch array layer 1 and the first ground layer 3 are printed on the upper and lower surfaces of the first dielectric plate 2, respectively, while the second ground layer 4 and the feed network layer 6 are printed on the upper and lower surfaces of the second dielectric plate 5, respectively. The patch array layer 1, the first ground layer 3, the second ground layer 4, and the feed network layer 6 are all made of conductive metal.

[0041] The patch array layer 1 includes a plurality of rectangular patch units 11 arranged at equal intervals along a first direction, and a plurality of varactor diodes 12 are provided between at least a portion of adjacent rectangular patch units 11; a metallized upper layer ground via 21 and a metallized upper layer feed via 22 are provided on the first dielectric plate 2, and a metallized lower layer feed via 51 is provided on the second dielectric plate 5; the upper end of the upper layer ground via 21 is connected to a portion of the rectangular patch units 11 in the patch array layer 1, and the lower end is connected to the first ground layer 3; The upper end of the layer feed via 22 is connected to a portion of the rectangular patch unit 11 in the patch array layer 1, and the lower end passes through the first ground layer 3 and the second ground layer 4 to be connected to the upper end of the lower layer feed via 51 at the corresponding position; the lower end of the lower layer feed via 51 is connected to the feed network layer 6, and the feed network layer 6 is used to integrate the input DC component and AC component to form a radiation signal and transmit the radiation signal to the patch array layer 1 through the lower layer feed via 51 and the upper layer feed via 22 and radiate through the patch array layer 1.

[0042] See Figure 2 , Figure 2 Schematic diagram of the structure of a patch array layer provided by an embodiment of the present invention. The patch array layer 1 is provided on the upper surface of the first dielectric plate 2 by printing, and the patch array layer 1 includes a first direction ( Figure 2 A plurality of rectangular patch units 11 are arranged at equal intervals (in the x direction shown in FIG) and a plurality of varactors 12 are arranged between the rectangular patch units 11.

[0043] Further, see Figure 3 , Figure 3 1 is a schematic diagram of the structure of another patch array layer provided by an embodiment of the present invention. Each rectangular patch unit 11 includes a second direction ( Figure 3 The second direction is perpendicular to the first direction.

[0044] Preferably, the patch array layer 1 of this embodiment includes six rectangular patch units 11 arranged at equal intervals along a first direction. Each rectangular patch unit 11 includes four square patch units 111 arranged at intervals along a second direction, thereby forming an array of four rows and six columns (4×6) of equally spaced square patch units. In each rectangular patch unit 11, an elongated patch unit 112 is provided between adjacent square patch units 111. The length of the elongated patch unit 112 is equal to the side length of the square patch unit 111, and the width is equal to the distance between adjacent square patch units 111. Because each rectangular patch unit 11 includes four square patch units 111 and three elongated patch units 112, a total of six rectangular patch units 11 are provided on the entire patch array layer 1, thus including a total of 24 square patch units 111 arranged in an array and 18 elongated patch units 112 arranged in an array.

[0045] That is, in each column of 4×6 square patch elements 111, the gap between the upper and lower square patch elements 111 is filled by a slender patch element 112, so that there is no gap between the square patch elements 111 on both sides and the slender patch element 112 in the middle. The upper edge of the slender patch element 112 is exactly connected to the lower edge of the square patch element 111 above, and the lower edge of the slender patch element 112 is exactly connected to the upper edge of the square patch element 111 below. The slender patch element 112 is located between two adjacent square patch elements 111, forming an alternating arrangement of four rows of square patch elements 111 and three rows of slender patch elements 112. The square patch elements 111 and the slender patch elements 112 are closely connected, arranged compactly and without any gaps, forming a continuous conductive path to ensure that the current is evenly distributed across the entire stripline. The elongated patch unit 112, while connecting to the square patch unit 111, plays a role in adjusting the current path and the resonant frequency, optimizing the current distribution, reducing the parasitic effect, and enhancing the radiation efficiency of the antenna.

[0046] Furthermore, for the 4×6 square patch element array of the patch array layer 1 of this embodiment, a varactor diode 12 is connected between the right line of the four square patch elements 111 in the first column and the left line of the four square patch elements 111 in the second column. A varactor diode 12 is connected between the four square patch elements 111 in the second column and the four square patch elements 111 in the third column, and a varactor diode 12 is connected between the four square patch elements 111 in the fourth column and the four square patch elements 111 in the fifth column. Similarly, four varactor diodes 12 are connected to the fifth and sixth columns in the same manner.

[0047] Specifically, taking the first and second columns as an example, a varactor diode 12 is connected between the midpoint of the right line of the first square patch unit 111 of the four square patch units 111 in the first column and the midpoint of the left line of the first square patch unit 111 in the second column; a varactor diode 12 is connected between the midpoint of the right line of the second square patch unit 111 in the first column and the midpoint of the left line of the second square patch unit 111 in the second column; a varactor diode 12 is connected between the midpoint of the right line of the third square patch unit 111 in the first column and the midpoint of the left line of the third square patch unit 111 in the second column; and a varactor diode 12 is connected between the midpoint of the right line of the fourth square patch unit 111 in the first column and the midpoint of the left line of the fourth square patch unit 111 in the second column. In summary, four varactor diodes 12 are arranged at equal intervals between the square patch units 111 in the first column and the square patch units 111 in the second column.

[0048] Similarly, four varactors 12 are evenly spaced between the second and third columns of square patch units 111; four varactors 12 are evenly spaced between the fourth and fifth columns of square patch units 111; and four varactors 12 are evenly spaced between the fifth and sixth columns of square patch units 111. The entire patch array layer 1 includes a total of 16 varactors 12, and their specific connection method is the same as that between the first and second columns, so it will not be repeated here.

[0049] Further, see Figure 4 and Figure 7 , Figure 4 is a structural diagram of a first dielectric plate provided by an embodiment of the present invention. Figure 7 : This is a schematic structural diagram of a second dielectric plate provided in an embodiment of the present invention. A metalized upper-layer ground via 21 and a metalized upper-layer feed via 22 are provided on the first dielectric plate 2, and a metalized lower-layer feed via 51 is provided on the second dielectric plate 5. The top of the upper-layer ground via 21 is connected to a preset position on the patch array layer 1, and the bottom of the upper-layer ground via 21 is connected to the first ground layer 3. The top of the upper-layer feed via 22 is connected to a preset position on the patch array layer 1, and the bottom of the upper-layer feed via 22 passes through the first ground layer 3 and the second ground layer 4 to connect to the lower-layer feed via 51 at the corresponding position on the second dielectric plate 5. The bottom of the lower-layer feed via 51 is connected to the feed network layer 6.

[0050] like Figure 4As shown, the first dielectric plate 2 of this embodiment includes four columns of upper-layer ground vias 21 and two columns of upper-layer feed vias 22, wherein each column of upper-layer ground vias 21 includes four upper-layer ground vias 21 arranged at equal intervals along the second direction, and each column of upper-layer feed vias 22 includes four upper-layer feed vias 22 arranged at equal intervals along the second direction. The upper ends of the four upper-layer ground vias 21 in the first column are respectively connected to one of the four square patch units 111 in the first column. Specifically, the upper end of the first upper-layer ground via 21 in the first column is connected to the first square patch unit 111 in the first column, the upper end of the second upper-layer ground via 21 in the first column is connected to the second square patch unit 111 in the first column, the upper end of the third upper-layer ground via 21 in the first column is connected to the third square patch unit 111 in the first column, and the upper end of the fourth upper-layer ground via 21 in the first column is connected to the fourth square patch unit 111 in the first column.

[0051] Similarly, the upper ends of the four upper-layer ground vias 21 in the second column are respectively connected to one of the four square patch units 111 in the third column, the upper ends of the four upper-layer ground vias 21 in the third column are respectively connected to one of the four square patch units 111 in the fourth column, and the upper ends of the four upper-layer ground vias 21 in the fourth column are respectively connected to one of the four square patch units 111 in the sixth column; the upper ends of the four upper-layer feed vias 22 in the first column are respectively connected to one of the four square patch units 111 in the second column, and the upper ends of the four upper-layer feed vias 22 in the second column are respectively connected to one of the four square patch units 111 in the fifth column.

[0052] The upper ground via 21 and the upper feed via 22 on the first dielectric plate 2 are connected to the square patch unit 111, and the connection points are both located at a position where the geometric center of the square patch unit 111 is offset to the left by a distance N along the first direction, as shown in FIG. Figure 3 As shown. The second and fifth columns of square patch elements 111 from left to right are connected to the upper-layer feed vias 22. These square patch elements 111 draw energy from the feed network layer 6, which is then radiated into the air, generating a resonance point. The first, third, fourth, and sixth columns of square patch elements 111 from left to right are connected to the upper-layer ground vias 21.

[0053] In addition, the thickness of the first dielectric plate 2 and the second dielectric plate 5 are both 0.8 mm. The material of the first dielectric plate 2 and the second dielectric plate 5 are both FR4, with a relative dielectric constant of 4.6 and a dielectric loss of 0.011.

[0054] Further, see Figure 5 and Figure 6 , Figure 5 is a structural schematic diagram of a first ground layer provided by an embodiment of the present invention; Figure 6Schematic diagram of the structure of a second ground layer provided by an embodiment of the present invention. Figure 5 As shown, the lower ends of the four columns of upper-layer ground vias 21 on the first dielectric plate 2 are all connected to the first ground layer 3, and the first ground layer 3 is also provided with a plurality of first circular holes 31 for the lower ends of the two columns of upper-layer feed vias 22 on the first dielectric plate 2 to pass through. Specifically, the number and arrangement of the first circular holes 31 on the first ground layer 3 are the same as the number and arrangement of the upper-layer feed vias 22 on the first dielectric plate 2. A first circular hole 31 is provided on the first ground layer 3 directly below each upper-layer feed via 22, so that the lower end of the upper-layer feed via 22 at the corresponding position can pass through a first circular hole 31.

[0055] Similarly, if Figure 6 As shown, a plurality of second circular holes 41 are provided on the second grounding layer 4 for the lower ends of the two columns of upper-layer feed vias 22 on the first dielectric plate 2 to pass through. The number and arrangement of the second circular holes 41 on the second grounding layer 4 are the same as the number and arrangement of the upper-layer feed vias 22 on the first dielectric plate 2, and correspondingly, the same as the number and arrangement of the first circular holes 31 on the first grounding layer 3. Specifically, a second circular hole 41 is provided on the second grounding layer 4 below each first circular hole 31 on the first grounding layer 3, so that the lower ends of the upper-layer feed vias 22 at corresponding positions pass through the first circular hole 31 and the second circular hole 41 in sequence. The first grounding layer 3 and the second grounding layer 4 are both grounded conductive planes. The first grounding layer 3 and the second grounding layer 4 of this embodiment are in close contact with each other and are used for grounding during specific use. Preferably, the thickness of the first grounding layer 3 and the second grounding layer 4 are both 0.035 mm.

[0056] Furthermore, the diameters of the first circular hole 31 and the second circular hole 41 are slightly larger than the diameter of the upper-layer feed via 22 to ensure that when the upper-layer feed via 22 passes through the first circular hole 31 and the second circular hole 41, the upper-layer feed via 22 remains electrically insulated from the first ground layer 3 and the second ground layer 4. Preferably, the diameters of the first circular hole 31 and the second circular hole 41 are equal and both are 0.2 mm larger than the diameter of the upper-layer feed via 22.

[0057] Continue to see Figure 4 and Figure 7In this embodiment, each of the four corners of the first dielectric plate 2 has a first connection hole 23, and each of the four corners of the second dielectric plate 5 has a second connection hole 52. The first connection holes 23 and second connection holes 52 at corresponding corners overlap. Nylon studs are inserted through the first and second connection holes 23, 52 at the same location (the same corner) to secure the first and second dielectric plates 2, 5 together. The diameter of the nylon studs is slightly smaller than the diameters of the first and second connection holes 23, 52 to ensure a tight fit. Preferably, the diameters of the first and second connection holes 23, 52 are equal, and the diameter of the nylon studs is 0.1 mm smaller than the diameters of the first and second connection holes 23, 52.

[0058] See Figure 8 , Figure 8 The figure is a schematic structural diagram of a feed network layer provided in an embodiment of the present invention. The feed network layer 6 of this embodiment is printed and disposed on the lower surface of the second dielectric plate 5. The feed network layer 6 includes a power splitting network 61, a first DC bias circuit 62, a second DC bias circuit 63, multiple chip inductors 64, a feed port P1, a first DC bias port D1, and a second DC bias port D2. The power splitting network 61 uses two quarter-wavelength microstrip branches for matching. The ends of the microstrip branches are respectively connected to the lower-layer feed vias 51 at corresponding positions in the second dielectric plate 5, forming eight feed excitation ports. One end of the chip inductors 64 is connected to the eight feed excitation ports at the end of the power splitting network 61. The other ends of some of the chip inductors 64 are connected to the first DC bias port D1 via the first DC bias circuit 62, and the other ends of other chip inductors 64 are connected to the second DC bias port D2 via the second DC bias circuit 63. The first DC bias port D1, the second DC bias port D2, the chip inductor 64, the first DC bias circuit 62 and the second DC bias circuit 63 work together to provide a stable DC bias voltage for the varactor diode 12 in the patch array layer 1. The first DC bias circuit 62 and the second DC bias circuit 63 independently control the varactor diode 12 in the left half and the right half of the patch array layer 1 respectively. The chip inductor 64 has a high impedance characteristic, which can prevent the RF signal from leaking into the DC circuit while ensuring the stability of the bias voltage. Preferably, the feeding port P1 is an SMA connector (SubMiniature version A connector), and the first DC bias port D1 and the second DC bias port D2 are both XH2.54mm pin sockets.

[0059] Furthermore, the power division network 61 of this embodiment includes a main circuit portion 613, a first branch portion 611, a second branch portion 612, and two capacitors 614, wherein the first branch portion 611 and the second branch portion 612 use two quarter-wavelength microstrip branches, the first end of the main circuit portion 613 is connected to the feeding port P1, and the second end is connected to the first branch portion 611 or the second branch portion 612 via a capacitor 614, respectively. Each branch of the first branch portion 611 and the second branch portion 612 is respectively connected to the lower layer feeding via 51 at the corresponding position in the second dielectric plate 5, and the two capacitors 614 are used to prevent the DC components on the first DC bias circuit 62 and the second DC bias circuit 63 from affecting each other.

[0060] Preferably, the inductance of the chip inductor 64 is 22 nH, and the capacitance of the capacitor 614 is 10 pF.

[0061] In actual use, this high-gain reconfigurable array antenna receives an AC component through the feed port P1 and a DC component through the first DC bias port D1 and the second DC bias port D2. The AC component is split into two equal parts by the power splitter network 61 and superimposed with the two DC components to form two final radiated signals. These two radiated signals are transmitted to the topmost patch array layer 1 through the lower feed vias 51 on the second dielectric plate 5 and the upper feed vias 22 on the first dielectric plate 2, where they are radiated into the air. The patch array layer 1 is responsible for radiating the signal into the air, while the feed network layer 6 is responsible for integrating the DC and AC signals.

[0062] The model of the varactor diode 12 in this embodiment is SMV1430-040LF. Figure 9 , Figure 9 This is a schematic diagram of the equivalent circuit model of the varactor diode loaded in the high-gain reconfigurable array antenna according to an embodiment of the present invention, including an equivalent circuit model of the varactor diode body (left side) and a simplified equivalent circuit model of the varactor diode (right side). The circuit parameters of the simplified equivalent circuit model vary with the reverse bias voltage, where port1 represents port 1, port2 represents port 2, and DIODE represents a diode.

[0063] See Figure 10 , Figure 10 Figure 2 is a schematic diagram showing how the equivalent circuit parameters of the varactor diode loaded in the high-gain reconfigurable array antenna according to an embodiment of the present invention vary with voltage. As can be seen, under a reverse bias voltage of 0 to 30V, the equivalent capacitance C of the varactor diode 12 varies from 0.3pF to 1.2pF, the equivalent resistance R varies from 1 to 2.5Ω, and the equivalent inductance L remains constant at 0.4nH.

[0064] In this embodiment, other structural dimensions are shown in the following table:

[0065]

[0066] Wherein, P represents the side length of the square patch unit 111, d represents the gap width between adjacent square patch units 111, and N represents the distance of the upper ground via 21 or the upper feed via 22 connected to the square patch unit 111 from the center along the first direction. Figure 3 shown.

[0067] The technical effects of the high-gain reconfigurable array antenna according to the embodiment of the present invention are described in detail below with reference to simulations.

[0068] The performance of the above-mentioned embodiment in the frequency reconfigurable mode and the beam reconfigurable mode is simulated and calculated using the full-wave electromagnetic simulation software CST 2024. The voltages set for the first DC bias port D1 and the second DC bias port D2 are denoted as v1 and v2, respectively. By setting the same or different bias voltages for the first DC bias port D1 and the second DC bias port D2, the array antenna of the present invention can be made to operate in the frequency reconfigurable mode or the beam reconfigurable mode, respectively. In the frequency reconfigurable mode, the bias voltages of the first DC bias port D1 and the second DC bias port D2 are the same; the beam pointing remains unchanged, and the operating frequency band can be flexibly adjusted. In the beam reconfigurable mode, the bias voltages of the first DC bias port D1 and the second DC bias port D2 are different, and the beam pointing and the operating frequency band can be flexibly adjusted.

[0069] See Figure 11 , Figure 11 This figure shows the reflection coefficient curves of the high-gain reconfigurable array antenna according to an embodiment of the present invention under different bias voltages in frequency reconfigurable mode. In frequency reconfigurable mode, the voltages at the first DC bias port D1 and the second DC bias port D2 are identical. When the bias voltages at the first DC bias port D1 and the second DC bias port D2 vary within the range of 4V to 30V, the resonant frequency of the high-gain reconfigurable array antenna can be flexibly adjusted within the range of 5.15GHz to 5.85GHz, demonstrating excellent frequency tunability.

[0070] See Figure 12 , Figure 12 : are the gain curves and aperture efficiency curves of the high-gain reconfigurable array antenna according to an embodiment of the present invention under different bias voltages in the frequency reconfigurable mode, such as Figure 12As shown in the figure, the operating frequency of the array antenna exhibits significant tunability under different bias voltage conditions. When the DC bias voltage increases from 4V to 30V, the maximum achievable gain increases from 6.9dBi to 8.9dBi, and the aperture efficiency remains between 63% and 77%, indicating that ohmic losses decrease with increasing voltage.

[0071] See Figure 13 , Figure 13 FIG is a graph showing the relationship between the gain and resonant frequency of the high-gain reconfigurable array antenna and the bias voltage in the frequency reconfigurable mode according to an embodiment of the present invention. Figure 13 As shown, the frequency of the array antenna exhibits significant tunability under different bias voltage conditions. As the bias voltage at the DC bias port increases from 3V to 30V, the resonant frequency of the array antenna shifts from 5.12GHz to 5.85GHz, and the maximum achievable gain varies between 6.9dBi and 8.9dBi. Furthermore, the aperture efficiency at the resonant point of the array antenna remains between 63% and 77% under different bias voltages, demonstrating high radiation performance across all operating conditions.

[0072] See Figure 14 , Figure 14 This is a diagram of the port reflection coefficient of the high-gain reconfigurable array antenna of an embodiment of the present invention under different bias voltages in the beam reconfigurable mode. It can be seen that the 1D far-field gain distribution characteristics of the array antenna of the embodiment of the present invention under different bias voltage conditions. When the bias voltages of the first DC bias port D1 and the second DC bias port D2 are 4V (5.2GHz), 10V (5.5GHz), 20V (5.8GHz), and 30V (5.9GHz), respectively, the radiation pattern of the array antenna exhibits good directivity characteristics. When the bias voltages of the first DC bias port D1 and the second DC bias port D2 are the same, the main lobe direction of the array antenna remains stable, and the maximum radiation direction remains near the normal direction.

[0073] See Figure 15 , Figure 15 : is a diagram of the port reflection coefficient of the high-gain reconfigurable array antenna according to an embodiment of the present invention in the beam reconfigurable mode at different bias voltages at a 5.5 GHz operating frequency. Figure 15 As shown in the figure, in the beam reconfigurable mode, when the DC bias voltage is changed, the relative bandwidth of S11≤-10dB is maintained at about 200MHz, and 5.5GHz is kept within the operating frequency band.

[0074] See Figure 16 , Figure 16 1D far-field gain diagram of the high-gain reconfigurable array antenna of the embodiment of the present invention in the beam reconfigurable mode at different bias voltages at 5.5 GHz operating frequency. Figure 16 As shown in Figure 1, at an operating frequency of 5.5 GHz, the beam direction can be changed from -15° to +15° by setting different DC bias voltages.

[0075] See Figure 17 , Figure 17 This graph shows the relationship between scanning angle and gain versus frequency for a high-gain reconfigurable array antenna in beam reconfiguration mode. In beam reconfiguration mode, the high-gain reconfigurable array antenna has a beam deflection angle of 9° to 16° within the 5.1 GHz to 5.9 GHz range and a gain of 6.46 dB to 8.12 dB.

[0076] The high-gain reconfigurable array antenna proposed in the present invention has a unified structure and is easier to form into a larger array. In addition, the present invention can obtain a higher operating frequency range by adjusting the bias voltage of the DC bias port (the first DC bias port D1 and the second DC bias port D2). The high-gain reconfigurable array antenna of the present invention has a simpler structure, involves fewer components, reduces the difficulty of manufacturing and assembly, and has better environmental adaptability in harsh space environments. From the above, it can be seen that the high-gain reconfigurable array antenna of the present invention has the characteristics of high gain, high aperture efficiency, simple structure, easy processing and debugging, wide beam coverage and high flexibility.

[0077] The high-gain reconfigurable array antenna provided by this invention has a resonant frequency adjustable range of 5.1 GHz to 5.9 GHz, capable of covering the 5 GHz frequency band used in WLANs. It has a frequency tuning range of 14.5%, with a bandwidth of approximately 3.6% in each tuning state. Its maximum gain varies between 6.9 dBi and 8.9 dBi. The aperture efficiency at the resonance point remains between 63% and 77% under different bias voltages, demonstrating high radiation performance across all operating states. This high-gain reconfigurable array antenna exhibits excellent performance across all aspects, meeting the requirements of wireless communication systems.

[0078] In addition, the high-gain reconfigurable array antenna provided by the present invention achieves flexible beam control by loading varactor diodes, has the advantages of high flexibility and wide beam coverage, and can meet the monitoring antenna's requirements for beam adjustment coverage; the high-gain reconfigurable array antenna of the present invention has a unified structure and can form an array larger than 4×6 through reasonable layout, achieving higher gain and beam control capabilities, and has a streamlined structure, suitable for printed circuit board (PCB) processing, and very easy to mass produce, so it has good application prospects in wireless communication systems.

[0079] In the several embodiments provided herein, it should be understood that the apparatus and method disclosed herein can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the module division is merely a logical functional division. In actual implementation, other division methods may be used. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not implemented.

[0080] In addition, the functional modules in various embodiments of the present invention may be integrated into a single processing module, each module may exist physically separately, or two or more modules may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or hardware plus software functional modules.

[0081] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A high-gain reconfigurable array antenna suitable for transmission line wireless ad hoc networks, characterized in that: The invention comprises a patch array layer (1), a first dielectric plate (2), a first ground layer (3), a second ground layer (4), a second dielectric plate (5) and a feed network layer (6) arranged in sequence from top to bottom, wherein: The patch array layer (1) comprises a plurality of rectangular patch units (11) arranged at equal intervals along a first direction, and a plurality of variable capacitance diodes (12) are provided between at least a portion of adjacent rectangular patch units (11); The first dielectric plate (2) is provided with a metalized upper layer grounding via (21) and a metalized upper layer feeding via (22), and the second dielectric plate (5) is provided with a metalized lower layer feeding via (51); the upper end of the upper layer grounding via (21) is connected to a portion of the rectangular patch unit (11) of the patch array layer (1), and the lower end is connected to the first ground layer (3); the upper end of the upper layer feeding via (22) is connected to a portion of the rectangular patch unit (11) of the patch array layer (1), and the lower end passes through the first ground layer (3) and the second ground layer (4) to be connected to the upper end of the lower layer feeding via (51) at the corresponding position; The lower end of the lower layer feed via (51) is connected to the feed network layer (6), and the feed network layer (6) is used to integrate the input DC component and AC component to form a radiation signal, and transmit the radiation signal to the patch array layer (1) through the lower layer feed via (51) and the upper layer feed via (22) and radiate through the patch array layer (1); Each rectangular patch unit (11) comprises a plurality of square patch units (111) arranged in sequence along a second direction and an elongated patch unit (112) connected between two adjacent square patch units (111), wherein the length of the elongated patch unit (112) is equal to the side length of the square patch unit (111), the width of the elongated patch unit (112) is equal to the spacing between adjacent square patch units (111), and the second direction is perpendicular to the first direction.

2. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 1, characterized in that: The patch array layer (1) comprises six rectangular patch units (11) arranged at equal intervals along a first direction, each rectangular patch unit (11) comprises four square patch units (111) arranged at equal intervals along a second direction, thereby forming a square patch unit array of four rows and six columns, and a slender patch unit (112) is provided between adjacent square patch units (111) in each rectangular patch unit (11), wherein: For the four-row and six-column square patch unit array, a varactor (12) is connected between each square patch unit (111) in the first column and the square patch unit (111) at the corresponding position in the second column, a varactor (12) is connected between each square patch unit (111) in the second column and the square patch unit (111) at the corresponding position in the third column, a varactor (12) is connected between each square patch unit (111) in the fourth column and the square patch unit (111) at the corresponding position in the fifth column, and a varactor (12) is connected between each square patch unit (111) in the fifth column and the square patch unit (111) at the corresponding position in the sixth column.

3. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 2, characterized in that: Four columns of metallized upper-layer grounding vias (21) and two columns of metallized upper-layer feeding vias (22) are provided on the first dielectric plate (2), wherein: Each column of upper-layer ground vias (21) includes four upper-layer ground vias (21) arranged at equal intervals along the second direction, and each column of upper-layer feed vias (22) includes four upper-layer feed vias (22) arranged at equal intervals along the second direction; The upper ends of the four upper ground vias (21) in the first column are respectively connected to one of the four square patch units (111) in the first column of the four-row and six-column square patch unit array; the upper ends of the four upper ground vias (21) in the second column are respectively connected to one of the four square patch units (111) in the third column of the four-row and six-column square patch unit array; the upper ends of the four upper ground vias (21) in the third column are respectively connected to one of the four square patch units (111) in the fourth column of the four-row and six-column square patch unit array; the upper ends of the four upper ground vias (21) in the fourth column are respectively connected to one of the four square patch units (111) in the sixth column of the four-row and six-column square patch unit array; The upper ends of the four upper-layer feeding vias (22) in the first column are respectively connected to one of the four square patch units (111) in the second column of the four-row and six-column square patch unit array, and the upper ends of the four upper-layer feeding vias (22) in the second column are respectively connected to one of the four square patch units (111) in the fifth column of the four-row and six-column square patch unit array.

4. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 1, characterized in that: A plurality of first circular holes (31) are provided on the first grounding layer (3), the number of the first circular holes (31) being the same as the number of the upper-layer feed vias (22) on the first dielectric plate (2), and a first circular hole (31) is respectively provided on the first grounding layer (3) directly below each upper-layer feed via (22), so that the lower end of the upper-layer feed via (22) at the corresponding position on the first dielectric plate (2) can pass through the first circular hole (31); A plurality of second circular holes (41) are provided on the second grounding layer (4), the number of the second circular holes (41) being the same as the number of the upper-layer feed vias (22) on the first dielectric plate (2), and the position distribution of the second circular holes (41) on the second grounding layer (4) being the same as the position distribution of the first circular holes (31) on the first grounding layer (3), so that the lower ends of the upper-layer feed vias (22) at corresponding positions can sequentially pass through the first circular hole (31) and the second circular hole (41).

5. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 4, characterized in that: The diameters of the first circular hole (31) and the second circular hole (41) are larger than the diameter of the upper-layer feed via (22), so as to ensure that when the upper-layer feed via (22) passes through the first circular hole (31) and the second circular hole (41), the upper-layer feed via (22) remains electrically insulated from the first ground layer (3) and the second ground layer (4).

6. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 1, characterized in that: A first connection hole (23) is respectively provided at the four corners of the first dielectric plate (2), and a second connection hole (52) is respectively provided at the four corners of the second dielectric plate (5), wherein: The positions of the first connection hole (23) and the second connection hole (52) at corresponding corners overlap each other, so that the first medium plate (2) and the second medium plate (5) are fixed to each other by using nylon screws passing through the first connection hole (23) and the second connection hole (52) at the same position.

7. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 1, characterized in that: The feed network layer (6) includes a power splitter network (61), a first DC bias circuit (62), a second DC bias circuit (63), a plurality of patch inductors (64), a feed port (P1), a first DC bias port (D1), and a second DC bias port (D2), wherein: The power division network (61) uses two quarter-wavelength microstrip branches for matching, and the ends of the power division network (61) are respectively connected to the lower ends of the lower layer feeding vias (51) at corresponding positions in the second dielectric plate (5), forming eight feeding excitation ports at the ends of the power division network (61); One end of each of the plurality of chip inductors (64) is connected to eight feed excitation ports at the end of the power division network (61), and the other end of a portion of the chip inductors (64) in the plurality of chip inductors (64) is connected to the first DC bias port (D1) through the first DC bias circuit (62), and the other end of another portion of the chip inductors (64) in the plurality of chip inductors (64) is connected to the second DC bias port (D2) through the second DC bias circuit (63).

8. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 7, characterized in that: The power division network (61) includes a main circuit portion (613), a first branch circuit portion (611), a second branch circuit portion (612), and two capacitors (614), wherein: The first branch portion (611) and the second branch portion (612) adopt two quarter-wavelength microstrip branches, the first end of the main portion (613) is connected to the feeding port (P1), and the second end is connected to the first branch portion (611) or the second branch portion (612) via a capacitor (614), and each branch of the first branch portion (611) and the second branch portion (612) is connected to a lower layer feeding via (51) at a corresponding position in the second dielectric plate (5).

9. The high-gain reconfigurable array antenna suitable for a power transmission line wireless ad hoc network according to claim 7 or 8, characterized in that: The first DC bias port (D1) and the second DC bias port (D2) are respectively used to input a DC voltage, and the feeding port (P1) is used to input an AC voltage; When the DC voltages input to the first DC bias port (D1) and the second DC bias port (D2) are the same, the high-gain reconfigurable array antenna operates in a frequency reconfigurable mode; When the DC voltages input to the first DC bias port (D1) and the second DC bias port (D2) are different, the high-gain reconfigurable array antenna operates in a beam reconfigurable mode.

Citation Information

Patent Citations

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    CN113571889A