Printed circuit having a replacent alloy

Abstract

A printed circuit (5) comprising a dielectric substrate (4) having a first and a second main face wherein at least a first foil layer (10) of a first electrically conductive material is provided on at least a portion of the first main face, at least one layer (12) of a second electrically conductive material is provided on at least one region of said first foil layer (10). The at least one layer of second electrically conductive material (12) is composed of an alloy comprising, by weight percent, at least 50% copper, less than 20% tin and more than 5% zinc. The invention also relates to a method for manufacturing a printed circuit.

Description

Technical Field

[0001] The present invention relates to the field of printed circuits, such as printed circuits for smart card connectors, for special devices (such as blood glucose detection), or for manufacturing antennas (such as Internet of Things (IoT) antennas for connecting objects via the Internet). Background Art

[0002] For example, a printed circuit according to the present invention may include conductive traces and / or electrical contact pads formed by etching a foil layer of conductive material pre-deposited and fixed (such as by lamination and / or bonding) on a dielectric substrate (such as using photolithography). Alternatively, the circuit may include one or more connecting lead frames, each lead frame cut from a foil layer of conductive material and co-laminated with the dielectric substrate (such as using lead frame technology). Such printed circuits can be used for manufacturing, for example, the contact points of smart card electronic modules, manufacturing antennas, manufacturing hybrid circuits that include both contact points and antennas, manufacturing electrodes, etc.

[0003] For example, taking a smart card as an example, it usually consists of a rigid support, such as made of plastic material, which forms the main body part of the smart card, and an independently manufactured electronic module is embedded in the main body. The electronic module includes a printed circuit (usually a flexible printed circuit, relative to the rigid support forming the card body), including an electronic chip (integrated circuit), and connecting means for connecting the chip to a device to achieve data reading and writing. These connecting means (or connectors) usually consist of conductive metal lines flush with the surface of the electronic module to form contact points. In addition to the requirement that the contact points must have excellent mechanical strength and corrosion resistance, smart card manufacturers also hope for good electrical connection performance between the contact points and the reading and writing devices, and have a specific appearance effect. For this purpose, a golden effect can be achieved by plating a gold layer on the contact points, for example, or a silver effect can be achieved by plating a silver layer or a palladium layer. However, there are many problems with such surface treatment processes. For example, palladium is a relatively expensive metal; and gold is also expensive and has the disadvantage that it must be deposited on a nickel layer. However, nickel is magnetic, which has an adverse effect in some radio frequency applications (such as non-contact data exchange with the chip and / or card / antenna connection through the induction effect), and is also not suitable for other application scenarios that require non-magnetic properties; in addition, in the field of medical applications where contact with the skin or proximity is required, nickel materials also cause problems.

[0004] The object of the present invention is to manufacture a printed circuit in which gold is not used or used as little as possible, i.e., less gold is used compared to the prior art in the same application, while still maintaining a gold-plated appearance and the electrical and mechanical properties required for its intended use (especially but not limited to smart card contact modules). In other words, the object of the present invention is to find a material that can at least partially replace a part of the gold layer used in the printed circuit.

[0005] To this end, a printed circuit is described herein, which includes a dielectric substrate. The dielectric substrate is a flat structure having a first and a second main surface, which define the thickness of the substrate. At least a part of the first main surface bears a first foil layer made of a first conductive material. In addition, at least one layer made of at least one second conductive material is deposited on at least one area of the first foil layer.

[0006] In addition, at least one of the at least one second conductive material layer is made of an alloy, which includes at least 50% by weight of copper, less than 20% of tin, and more than 5% of zinc.

[0007] Due to the relatively high content of copper and relatively low content of tin in the second conductive material layer, the second conductive material layer has a gold-plated appearance similar to or at least close to that of a gold layer, while also being able to meet the requirements of the intended application in terms of mechanical properties, corrosion resistance, and electrical properties, especially in the manufacture of smart card connectors. For example, the contact resistance (CRM) measurement value of the printed circuit is less than 500 milliohms (mOhm) before and after a 24-hour salt spray test in accordance with ISO 10373 standard.

[0008] The aforementioned printed circuit may preferably have one or more of the following characteristics, which can be considered individually or in combination with each other:

[0009] The printed circuit includes a second foil layer of conductive material provided on at least a part of the second main surface of the dielectric substrate, and at least one second conductive material layer is deposited on at least one area of the second foil layer; in other words, the first foil layer is supported by the first main surface of the substrate, the second foil layer is supported by the second main surface, and at least one second conductive material layer is deposited on at least one area of these two surfaces;

[0010] The printed circuit includes at least one layer of at least one third conductive material, the third conductive material being located between the first and second materials on at least one area of the first foil layer or the second foil layer, and the third conductive material is selected from nickel and nickel-phosphorus alloy; it should be noted that the conjunction "or" here ("the first foil layer or the second foil layer") is used inclusively, in other words, it should be understood as "and / or";

[0011] The printed circuit includes a protective layer, which is composed of at least one self-assembled monolayer (SAM).

[0012] The printed circuit includes a gold layer on the first major surface side, located between the third material layer and the second material layer.

[0013] The printed circuit includes a gold layer on the second major surface side, located on at least one area of the second material layer.

[0014] The thickness of the second material layer is from 0.1 micrometer to 3 micrometers, more preferably from 0.1 micrometer to 2 micrometers.

[0015] The second material is a ternary alloy, and the components of the second material by weight percentage include: 70% - 80% of copper, 5% - 12% of zinc, and 10% - 20% of tin; alternatively, the second material can also be a binary alloy, and the components of the second material by weight percentage include: 50% - 85% of copper and 15% - 50% of zinc.

[0016] The printed circuit includes at least one second material layer provided at the bottom of the connection well; for example, the bottom of the connection well specifically corresponds to the surface of the first foil layer facing the dielectric substrate.

[0017] On the other hand, the present invention relates to a method for manufacturing a printed circuit. The manufacturing method includes: - An acquisition step or a supply step, in which the dielectric substrate is at least partially immersed in at least one electrochemically depositing bath. The dielectric substrate has first and second major surfaces, and at least one first foil layer made of a first conductive material is provided on at least a part of the first major surface. The first foil layer includes current leads and at least one pattern also formed by the first foil layer. - An electrochemically depositing step, in which at least one second conductive material layer is electrochemically deposited on at least one area of the pattern.

[0018] In addition, the second conductive material layer electrochemically deposited on the pattern is made of an alloy, which includes at least 50% of copper, less than 20% of tin, and more than 5% of zinc by weight percentage.

[0019] Due to the presence of the second material layer, this method can omit the nickel deposition step (for example, while nickel is indispensable when it is the lower layer of the gold layer).

[0020] All the process steps described in this method and this document can be implemented by reel-to-reel technology.

[0021] Other features and advantages of the present invention will be reflected through the detailed description and the drawings, in which:

[0022] Figure 1 A smart card including an example module of the present invention is schematically shown in a perspective view;

[0023] Figure 2 A partial structure of an example printed circuit of the present invention is schematically shown in a top view, and the printed circuit includes a plurality of smart card module connectors;

[0024] Figure 3 A single-sided printed circuit example is schematically shown in a partial cross-sectional view, for example, applicable to Figure 1 the connector of the smart card module shown;

[0025] Figure 4 A double-sided printed circuit example is schematically shown in a partial cross-sectional view, for example, applicable to Figure 1 the module connector of the smart card shown;

[0026] Figure 5 A double-sided printed circuit example such as Figure 4 is schematically shown in a partial cross-sectional view. A plurality of layers are electrodeposited on this printed circuit. If the foil layer and material layer below the dashed line are ignored, it is a single-sided variant thereof;

[0027] Figure 6 Another double-sided printed circuit example such as Figure 4 is schematically shown in a partial cross-sectional view. A plurality of layers are electrodeposited on this printed circuit. If the foil layer and material layer below the dashed line are ignored, it is a single-sided variant thereof;

[0028] Figure 7 Another example of a single-sided printed circuit is schematically shown in a partial cross-sectional view. A plurality of layers are electrodeposited on this printed circuit;

[0029] Figure 8 Another example of a single-sided printed circuit is schematically shown in a partial cross-sectional view. A plurality of layers are electrodeposited on this printed circuit.

[0030] The first application example of the printed circuit of the present invention relates to the field of smart cards. However, those skilled in the art should understand how to transfer this example to other printed circuit applications (such as USB socket contacts, medical device antennas (such as pressure sensors in contact with the skin), blood glucose or other blood component test strips, electroencephalogram electrodes, etc.).

[0031] Therefore, as Figure 1In the application example of the printed circuit of the present invention shown, the smart card 1 includes a module 2, and the module 2 is provided with a connector 3. In this example, the smart card 1 is a bank card in the ID-1 format. The module 2 is exemplarily of the Europay Mastercard Visa (EMV) type compliant with the ISO 7810 standard. The module 2 is usually manufactured as an independent component and then embedded in the card body cavity. This component includes a dielectric substrate 4 (see Figure 2 ), and the material of the dielectric substrate 4 can be polyethylene terephthalate (PET), polyamide, or glass-epoxy, etc. The thickness is exemplarily 25 - 150 µm (this thickness range can ensure the appropriate flexibility required for continuous processing). The connector 3 is formed on the dielectric substrate 4. An electronic chip (not shown) is assembled to the module 2 (it can be installed on the substrate 4 or at the substrate slot 15), and the electronic chip is connected to the connector 3.

[0032] Therefore, as Figure 2 shown, the structure of a part of the printed circuit 5 is exemplarily shown including six connectors 3. Each connector 3 is provided with a contact pad 8, and the contact pad 8 includes a plurality of conductive pads 6. Some of the conductive pads 6 are used to form contact points 7. In this example, eight conductive pads 6 specifically constitute the contact points 7 of C1 to C8 defined by the ISO 7816-2 standard. These contact pads 8, conductive pads 6, and contact points 7 are all formed by pattern etching of the first foil layer 10 in the first conductive material.

[0033] The connector 3 can adopt a single-sided structure (only a foil layer of conductive material is provided on one of the main surfaces of the dielectric substrate 4) or a double-sided structure (foil layers of conductive material are provided on both main surfaces of the dielectric substrate 4).

[0034] Figure 3An example of a single-sided structure is shown. The single-sided structure can be manufactured by the following methods, for example: coating an adhesive layer 9 on one of the main surfaces of the dielectric substrate 4; subsequently perforating the dielectric substrate 4 with the adhesive layer 9 to form connection wells 14, and optionally forming cavities 15 for accommodating electronic chips; then complexed laminating the dielectric substrate 4 with the adhesive layer 9 with a first foil layer 10 of a first conductive material (such as copper, aluminum or its alloy, or steel, etc.), and thereafter the adhesive layer 9 can be subjected to hot cross-linking treatment. Alternatively, a so-called clad can be directly used. In this case, for example, connection wells 14 and / or cavities 15 can be formed by a laser arranged to penetrate only the dielectric substrate 4 and terminate at the interface between it and the first foil layer 10. Regardless of the process used, the bottom of the connection wells 14 and / or cavities 15 is a conductive surface, and a layer of conductive material can be electrodeposited to achieve electrical connection (for example, through wire bonding technology through the connection wells 14 across the dielectric substrate 4, or flip chip technology using metallized connection wells, etc.).

[0035] Figure 4 An example of a double-sided structure is shown. For example, the double-sided structure is manufactured as follows: obtaining a dielectric substrate 4 which has been pre-coated with a second foil layer 11 on its first main surface (i.e., the so-called back surface), such as a copper foil, an aluminum foil, its alloy or a steel foil, etc.; at this time, this structure is a so-called clad; subsequently coating an adhesive layer 9 on the other main surface (i.e., the so-called front surface) of the dielectric substrate 4; then perforating the dielectric substrate 4 with the adhesive layer 9 to form connection wells 14, and optionally forming cavities 15 for accommodating electronic chips; then complexed laminating the clad with the adhesive layer 9 with a foil layer 10 of a first conductive material, which can be the same as the aforementioned conductive material, although the thicknesses of the first foil layer 10 and the second foil layer 11 can be different; it should also be noted that the first foil layer 10 and the second foil layer 11 can also be composed of different conductive materials. The bottom of the connection wells 14 and / or cavities 15 is thus composed of a conductive surface, and a layer of conductive material can be electroplated on the conductive surface to achieve electrical connection, for example, through wire bonding technology or through flip chip technology using metallized connection wells, etc.

[0036] Another embodiment is to directly use a double-sided metal-clad substrate. At this time, the connection wells 14 and / or the accommodating cavities 15 can be formed by laser processing - the laser is precisely arranged to penetrate only the dielectric substrate 4 and the second foil layer 11 of the conductive material and terminate at the interface between the dielectric substrate 4 and the first foil layer 10 of the conductive material.

[0037] As Figure 5 and 6As shown in the cross-sectional view, the connector 3 (i.e., the module 2 without an installed electronic chip) has a multi-layer structure, including a dielectric substrate 4, an adhesive layer 9 (not shown in the figure, which is an optional layer), a first foil layer 10, and an optional second foil layer 11. At least one second conductive material layer 12 is electrochemically deposited on these foil layers. The horizontal dotted line in the figure marks the boundary of the so-called single-sided connector 3 (i.e., the part above the dotted line). If this dotted line is ignored, the figure shows a double-sided structure.

[0038] For example, the first conductive material can be composed of copper or a copper alloy. The second conductive material layer 12 is composed of an alloy that includes at least 50% (by weight, wt) of copper, less than 20 wt% of tin, and more than 5 wt% of zinc.

[0039] The composition of the second conductive material layer 12 does not necessarily have to be the same as that of the first foil layer 10 and the second foil layer 11. The composition of the second conductive material layer 12 deposited on the second foil layer 11 can be designed according to the requirement of obtaining better solderability for the second conductive material layer 12.

[0040] The second conductive material layer 12 can be deposited by electroplating. For example, an electroplating solution provided by companies such as UMICORE, MACDERMID, or KIESOW is used. The electroplating temperature is, for example, between 20°C and 60°C, and the current density is between 0.2 A / dm² and 4 A / dm². The specific process conditions can vary according to the type of alloy composition of the second conductive material layer 12 to be deposited. For example, for a ternary alloy that includes 70% to 80% (by weight) of copper, 5% to 12% of zinc, and 10% to 20% of tin, the temperature of the electroplating bath can be set between 55°C and 58°C, and the current density can be, for example, between 2 A / dm² and 4 A / dm². For a binary alloy that includes 50 wt% to 85 wt% of copper and 15 wt% to 50 wt% of zinc, the temperature of the electroplating bath can be between 20°C and 50°C, and the current density is, for example, 0.3 A / dm² to 2 A / dm².

[0041] The second conductive material layer 12 can be used on at least one surface of the first foil layer 10 and / or the second foil layer 11 to replace part or all of the gold layer thickness that should have been deposited.

[0042] Figure 5In the example shown, the multi-layer structure is a double-sided structure. The double-sided structure includes a dielectric substrate 4, and the material and thickness of the dielectric substrate 4 can be the same as those described above, for example. The dielectric substrate 4 is perforated (as described above) to form connection wells 14, for example, to achieve electrical connection between the contact pads 8 on the back surface (or bonding surface) and the front surface (or contact surface) of the chip. A first foil layer 10 and a second foil layer 11 are respectively provided on the two main surfaces of the dielectric substrate 4, and both are made of a first conductive material, such as copper or a copper alloy (alternatively, the first conductive material can also be aluminum or its alloy, steel, etc.).

[0043] A second conductive material layer 12 is deposited on at least one region of the first foil layer 10 and at least one region of the second foil layer 11.

[0044] This embodiment is particularly advantageous and can be used to replace nickel and precious metals on the front surface. In addition, due to the reduction in the number of required electroplating processes, there is also an obvious advantage in terms of cost.

[0045] A protective layer 20 composed of at least one self-assembled monolayer can be deposited on at least one region of the second conductive material layer 12, and the second conductive material layer 12 itself is deposited on at least one region of the front surface of the first layer 10. The protective layer 20 is an optional item; however, in Figure 5 a variant (not shown) of the shown embodiment, the second conductive material layer 12 is in an uncovered state.

[0046] In Figure 5 another variant (not shown) of the shown embodiment, the protective layer 20 is composed of at least one self-assembled monolayer, and the protective layer 20 is respectively deposited on at least one region of the second conductive material layer 12 on the front surface and the back surface.

[0047] In Figure 5 another variant (not shown) of the shown embodiment, the front surface is processed as described above, while the back surface is processed according to the prior art (for example, using a stack of an electroplated nickel layer, a nickel-phosphorus layer, and a gold layer), that is, the back surface does not have an electrodeposited second conductive material layer 12.

[0048] In Figure 5 another variant (not shown) of the shown embodiment, the front surface is processed as described above, while the back surface has an electrodeposited second conductive material layer 12 on the second foil layer 11, and then a gold-containing surface layer is covered (for example, the surface layer 19 described below, and the surface layer 19 is deposited on the flash gold layer 18).

[0049] In Figure 5 another variant (not shown) of the shown embodiment, the front surface and the back surface further include a gold-containing surface layer (for example, the flash gold layer 18 described below).

[0050] InFigure 5 In another variant of the illustrated embodiment, the back surface of the dielectric substrate 4 remains uncovered (without the second foil layer 11 and without electrodepositing the second conductive material layer 12 on the back surface), while a stack structure of the second conductive material layer 12 and an optional protective layer 20 that may be present is provided at the bottom of the connection well 14. This structure is thus a single-sided structure.

[0051] The following table summarizes Figure 5 typical thickness examples of the layers in the illustrated structure.

[0052] Other embodiments of the printed circuit according to the present invention may have a more complex multi-layer structure. Thus, in addition to the second conductive material layer 12, one or more conductive material layers may be deposited above and / or below the second conductive material layer 12. For example, a conductive material layer may be electrodeposited electrochemically in at least a partial region of each of the two copper foils 10, 11 of the first conductive material.

[0053] As Figure 6 shown in the example, the multi-layer structure is a double-sided structure. The double-sided structure includes the dielectric substrate 4 as described above. Similar to the previous example, the dielectric substrate 4 is perforated, and a first foil layer 10 and a second foil layer 11 are respectively provided on the two main surfaces of the dielectric substrate 4, both of which are made of the first conductive material, such as copper or copper alloy as described above. The first foil layer 10 and the second foil layer 11 are fixed to the dielectric substrate 4 in a certain manner as described above.

[0054] As Figure 6 shown in the example, the first foil layer 10 is successively covered with: an optional nickel layer 16, an optional nickel-phosphorus layer 17, an optional flash gold layer 18, the second conductive material layer 12, and a protective layer 20 that may be composed of a self-assembled monolayer.

[0055] In the same example, the second foil layer 11 is successively covered with: an optional nickel layer 16, an optional nickel-phosphorus layer 17, an optional second conductive material layer 12, an optional flash gold layer 18, and an optional gold layer 19.

[0056] The following table summarizes Figure 6 typical thickness examples of the layers in the shown structure.

[0057] It should be noted that the nickel layer 16, nickel-phosphorus layer 17, second conductive material layer 12, flash gold layer 18, and gold-containing surface layer 19 on the back surface can all be regarded as optional layers. However, adding certain noble metal layers on the back surface can improve the quality of the solder connection, such as improving the soldering performance.

[0058] According to this example, the layer stack structure on the back is the same when connecting to the bottom of the well 14 or on the second foil layer 11. However, different layer stack structures can also be achieved by methods such as masking technology.

[0059] In Figure 6 a variant of the illustrated embodiment, the back side of the dielectric substrate 4 remains uncovered (without the second foil layer 11 and without the electroplated layer); on the other hand, a nickel layer 16, a nickel-phosphorus layer 17, a second conductive material layer 12, a flash gold layer 18, and a gold-containing surface layer 19 are stacked on the bottom of the connection well 14. At this time, the structure is a single-sided structure.

[0060] In Figure 6 another variant (not shown) of the illustrated embodiment, the front side is processed as described above, and the back side is processed using the prior art (such as the stacking of an electroplated nickel layer, a nickel-phosphorus layer, and a flash gold layer), that is, without including the electroplated second conductive material layer 12.

[0061] For example, a smart card module includes a laminated structure composed of a dielectric substrate 4 covering a copper foil 10, on which a nickel layer 16, a nickel-phosphorus layer 17, a gold flash layer 18, and a second conductive material layer 12 with a thickness of 0.5 microns are electroplated. The second conductive material layer 12 contains at least 50 wt% copper, less than 20 wt% tin, and more than 5 wt% zinc (i.e., Figure 6 the illustrated structure). The contact resistance of this module is less than 500 mOhm before and after undergoing a 24-hour salt spray test in accordance with the ISO 10373 standard.

[0062] In Figure 7 the printed circuit embodiment of the present invention shown, the multi-layer structure of the printed circuit is a single-sided structure. A second conductive material layer 12 is deposited on at least one area of the first foil layer 10. The front side of the first foil layer 10 is then optionally covered with a protective layer 20. This type of circuit board is suitable for applications where nickel is prohibited, such as in medical applications.

[0063] In Figure 8 the printed circuit embodiment of the present invention shown, the multi-layer structure of the printed circuit is a single-sided structure. The printed circuit includes the dielectric substrate 4 as described above. On the front side, a first metal foil 10 made of a first conductive material is fixed to the dielectric substrate 4 in any of the above ways.

[0064] A plurality of conductive material layers are deposited on at least a part of the free surface of the first foil layer 10 by electrochemical deposition. In Figure 8In the example shown, a second conductive material layer 12 is sequentially deposited on the front side, followed optionally by a flash plating layer 18 composed of a metal selected from gold, silver, or palladium, and finally at least one surface layer 19 including the metals in the following list: gold, silver, palladium, rhodium, ruthenium. Subsequently, the front side may be further covered with an optional protective layer 20. This type of printed circuit is suitable for applications where nickel is prohibited, such as medical applications.

[0065] The following table summarizes Figure 8 Example characteristic thicknesses of the layers in the structure shown.

[0066] If the protection treatment 20 is carried out in the above embodiments and their variants, the protection treatment 20 may (but is not limited to) include the following methods: - Placing it in an Organic Solderability Preserver (OSP) bath, such as benzotriazole or imidazole compounds (such as alkyl benzimidazole, aryl benzimidazole, etc.); - Placing it in a bath solution for forming a self-assembled monolayer (SAM) type of monolayer film, such as one of the following mixtures: a mixture of polyethylene glycol and propylene glycol; a mixture of polyether diol and isopropyl glycol; a mixture of octylphenoxyethanol and octadecyl-1-thiol; polysorbate 80 (CAS No. 9005-65-6); a mixture of alkyl (C12-18) ethoxypropoxy alcohol (CAS No. 69227-21-0), polyethylene glycol lauryl ether (CAS No. 9002-92-0), and 1-octadecanethiol (CAS No. 2885-00-9).

Claims

1. A printed circuit (5), comprising: a dielectric substrate (4) having a first major surface and a second major surface, at least one first foil layer (10) of a first conductive material being provided on at least a part of the first major surface, at least one layer (12) of a second conductive material being provided on at least one area of the first foil layer (10), characterized in that the at least one layer (12) of the second conductive material is composed of an alloy which by weight comprises: at least 50% copper, less than 20% tin and more than 5% zinc.

2. The printed circuit (5) according to claim 1, comprising a second foil layer (11) made of a conductive material on at least a part of the second major surface of the dielectric substrate (4), and the at least one layer (12) of the second conductive material being provided on at least one area of the second foil layer (11).

3. The printed circuit (5) according to claim 1 or 2, comprising at least one layer (16, 17) of a third conductive material between the first conductive material and the second conductive material on at least one area of the first foil layer (10) or the second foil layer (11), the third conductive material being selected from nickel and nickel - phosphorus alloy.

4. The printed circuit (5) according to the foregoing claims, comprising a gold layer (18) on the first major surface side, between the third conductive material layer (16, 17) and the second conductive material layer (12).

5. The printed circuit (5) according to any one of the foregoing claims, comprising a protective layer (20) composed of at least one self - assembled monolayer.

6. The printed circuit (5) according to any one of the foregoing claims, comprising a gold layer (19) on at least one side corresponding to each of the two sides of the first major surface and the second major surface, the gold layer (19) being located on at least one area of the second conductive material layer (12).

7. The printed circuit (5) according to any one of the foregoing claims, wherein the thickness of the second conductive material layer (12) is from 0.1 micrometer to 3 micrometers.

8. The printed circuit (5) according to any one of the foregoing claims, wherein the second conductive material is a ternary alloy, and the second conductive material comprises 70% to 80% copper, 5% to 12% zinc and 10% to 20% tin by weight percentage.

9. The printed circuit (5) according to any one of claims 1 to 7, wherein the second conductive material is a binary alloy, and the second conductive material comprises 50% to 85% copper and 15% to 50% zinc by weight percentage.

10. The printed circuit (5) according to any one of the foregoing claims, comprising a connection well (14), and at least one layer of the second conductive material layer (12) being provided at the bottom of the connection well.

11. A method for manufacturing a printed circuit, comprising: Obtaining step, during which the dielectric substrate (4) is at least partially immersed in at least one electrochemically depositing bath, the dielectric substrate (4) having a first major surface and a second major surface, wherein at least one first foil layer (10) made of a first conductive material is provided on at least a part of the first major surface, the first foil layer (10) including current leads and at least one pattern (6) also formed by the first foil layer (10). Electrochemical deposition step, during which at least one second conductive material layer (12) is electrodeposited on at least one region of the pattern (6). It is characterized in that the second conductive material layer (12) electrodeposited on the pattern (6) is formed of an alloy, the alloy including at least 50% by weight of copper, less than 20% of tin, and more than 5% of zinc.

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