Method for synthesizing porous graphene on semiconductor substrate surface and porous graphene based on semiconductor substrate surface

Abstract

The present invention provides a method for synthesizing porous graphene on the surface of a semiconductor substrate and porous graphene based on the surface of a semiconductor substrate. The method comprises the following steps: step S1, preparing a few-layer FeO material on a clean Au (111) substrate to obtain a few-layer FeO substrate; step S2, depositing a precursor molecule on the few-layer FeO substrate, wherein the precursor molecule is 1,3,5-tris(4-iodophenyl)benzene; step S3, heating the precursor molecule to cause an Ullmann coupling reaction, epitaxially growing and depositing the precursor molecule along the surface of the substrate to obtain a single-layer two-dimensional porous graphene; step S4, annealing to remove the FeI X The technical solution of the present invention is used to obtain a single-layer porous graphene and construct a semiconductor / organic heterostructure. The method is simple and is expected to be applied to sensor chips such as gas sensing, biomolecule detection, and photodetectors.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for synthesizing porous graphene on a semiconductor substrate surface and porous graphene based on the semiconductor substrate surface. Background Art

[0002] Graphene features high carrier mobility and a zero bandgap. For device applications, it is often desirable to combine high carrier mobility with a wide bandgap, enabling both highly sensitive sensing properties and a high on / off ratio. This requires the development of a graphene-like material to meet these requirements, and two-dimensional porous graphene holds promise as a promising solution. First, two-dimensional porous graphene is structurally similar to graphene, but by selectively designing precursor molecules, nanopores are introduced into the structure. Previous research has shown that nanopores can open the bandgap of two-dimensional materials. Furthermore, the bandgap can be altered by varying the size of the nanopores. Second, research has shown that the presence of nanopores can adsorb gas molecules, paving the way for the development of gas molecule sensors. However, the production of two-dimensional porous graphene on non-metallic substrates such as semiconductors presents challenges. Previous studies have largely limited synthesis to metal substrates, which poses a challenge: device fabrication requires transfer from a metal substrate to a semiconductor substrate. This transfer process often introduces impurity contamination, impacting device performance.

[0003] In addition, metal-organic coordination allows organic two-dimensional materials to be well adsorbed on the surface. Most importantly, these metal substrates can serve as ideal surface-assisted catalysts to promote Ullmann coupling at high temperatures. The reaction involves the dehalogenation and subsequent polymerization of a variety of halogenated aromatic compounds to form stable CC bonds and construct porous organic frameworks. In addition, previous studies have proposed a scheme to assist in the synthesis by loading metal catalysts on non-metallic substrates. This method involves a two-step deposition process of molecules and metals, which increases the complexity of the process. Secondly, metal coverage is an important factor affecting the synthesis of covalent structures, which requires a certain amount of time to explore. Summary of the Invention

[0004] In response to the above technical problems, the present invention discloses a method for synthesizing porous graphene on the surface of a semiconductor substrate and porous graphene based on the surface of a semiconductor substrate.

[0005] To this end, the technical solution adopted in the present invention is:

[0006] A method for synthesizing porous graphene on the surface of a semiconductor substrate comprises the following steps:

[0007] Step S1, preparing a few-layer FeO material on a clean Au (111) substrate to obtain a few-layer FeO substrate; wherein the few-layer has a thickness of no more than 5 layers, and further, preferably 3-4 layers.

[0008] Step S2, depositing a precursor molecule on the few-layer FeO substrate, wherein the precursor molecule is 1,3,5-tris(4-iodophenyl)benzene;

[0009] Step S3, heating the precursor molecules to cause an Ullmann coupling reaction, causing epitaxial growth and deposition along the substrate surface to obtain a single-layer two-dimensional porous graphene;

[0010] Step S4, annealing to remove FeI X .

[0011] This technical solution has fewer steps and a simple method. The reaction synthesis can be completed directly on the semiconductor substrate without the need for additional metal deposition assistance, and devices can be made directly on the prepared sample without transfer, which will facilitate the subsequent device preparation process. In addition, there is a high-density delocalized free electron gas on the surface of the metal substrate, which will lead to the sample being preferentially exposed to the external electric field when characterizing the electronic state of the sample, that is, the metal shielding the electronic state. This strong organic metal coupling can lead to the reconstruction of the sample's electronic energy band and cause the metallization of porous graphene to affect the conductivity, band gap, and even optical response of the porous graphene sample. However, the FeO substrate as a semiconductor does not have this problem. As a semiconductor substrate, the band gap of FeO is around 0.5 eV. The unoccupied state of the porous graphene sample prepared by the technical solution of the present invention is lower than the Fermi level of FeO. At this time, due to the interface effect between the two, electrons will flow from the FeO substrate to the porous graphene sample, which can be regarded as n-type doping of the sample. Furthermore, the porous graphene sample prepared using the technical solution of the present invention has occupied states above the Fermi level of FeO. At this point, electrons flow from the porous graphene sample to the substrate, which is equivalent to p-type doping of the porous graphene sample. Furthermore, because both the substrate and the sample are semiconductors, the prepared sample can be considered a heterojunction, which results in completely different optoelectronic properties. Furthermore, the synthesis method of the technical solution of the present invention provides guidance for the synthesis of semiconductor substrates, allowing the substrate type to be changed to obtain different heterostructures.

[0012] As a further improvement of the present invention, in step S1, the few-layer FeO material is synthesized on the Au(111) surface by the principle of thermal oxidation of Fe in a carbon monoxide gas atmosphere.

[0013] As a further improvement of the present invention, the synthesis of FeO is performed by first depositing Fe on the Au(111) surface by thermal evaporation, and then thermally oxidizing the Fe on the Au(111) surface in a carbon monoxide atmosphere.

[0014] As a further improvement of the present invention, during the thermal evaporation, the temperature of the Au(111) substrate is 100-150° C., and the deposition time is 5-30 minutes.

[0015] As a further improvement of the present invention, when depositing Fe, the ambient vacuum is not greater than 1×10 -8 mbar.

[0016] As a further improvement of the present invention, step S1, after depositing the few-layer FeO substrate, further includes annealing treatment, with the annealing temperature being 100-150° C. and the time being 10-30 minutes.

[0017] As a further improvement of the present invention, in step S2, the precursor molecules are deposited by molecular beam epitaxy; when the molecules are deposited by heating the molecular source, the temperature of the few-layer FeO substrate is 100-150° C., and the heating time is 5-10 mins.

[0018] As a further improvement of the present invention, in step S3, the temperature of the substrate during deposition is 180-320° C., and the treatment time is 5-120 minutes.

[0019] As a further improvement of the present invention, step S2 further includes an annealing treatment, wherein the annealing temperature is 100-150° C. and the annealing time is 5-10 minutes, wherein the annealing treatment is an in-situ vacuum annealing treatment.

[0020] As a further improvement of the present invention, in step S3, an annealing treatment is further included after deposition, wherein the substrate temperature during the annealing treatment is 180-320° C. and the duration is 5-120 minutes. The annealing treatment is an in-situ vacuum annealing treatment.

[0021] Whether the precursor molecules can form a large-area porous graphene structure is mainly related to the annealing temperature, the crystal phase of the substrate, and the number of surface defects.

[0022] As a further improvement of the present invention, in step S4, during the annealing, the temperature of the substrate is 350-400° C., and the duration is 5-120 minutes.

[0023] The present invention also discloses porous graphene based on the surface of a semiconductor substrate, which is prepared by using any of the above methods for synthesizing porous graphene on the surface of a semiconductor substrate.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] The technical solution of the present invention uses TIB as a precursor molecule, depositing it on the surface of an FeO substrate. Heating then induces a coupling reaction in the precursor molecule, leading to epitaxial growth along the substrate surface, ultimately yielding a single layer of porous graphene. This creates a semiconductor / organic heterostructure. This simple method has potential applications in sensor chips such as gas sensors, biomolecule detection, and photodetectors. The method of the present invention can be extended to synthesize two-dimensional materials on other semiconductor substrates, providing guidance for synthesis on other semiconductor substrates. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 Schematic diagram of the structural changes of TIB during the preparation process of an embodiment of the present invention.

[0027] Figure 2 This is a picture of a clean FeO surface without deposited molecules in step S1 of an embodiment of the present invention.

[0028] Figure 3 This is the result of high coverage self-assembly on the FeO surface after the precursor molecules are deposited in step S2 of the embodiment of the present invention and then subjected to high temperature heating and annealing.

[0029] Figure 4 LT-STM images of the sample after the molecules are deposited in step S3 of an embodiment of the present invention; wherein (a) and (b) are images at different positions.

[0030] Figure 5 LT-STM images of different lattice structure electronic states of the porous graphene structure in step S4 of an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The preferred embodiments of the present invention are described in further detail below.

[0032] A method for synthesizing porous graphene based on the surface of a semiconductor substrate, that is, a method for synthesizing porous graphene on an FeO semiconductor substrate using precursor molecules, comprising the following steps:

[0033] S1. Prepare few-layer FeO material on a clean Au(111) substrate by thermal oxidation.

[0034] S2. Re-depositing precursor molecules on the few-layer FeO substrate.

[0035] S3. By heating the precursor molecules to produce an Ullmann coupling reaction, epitaxial growth is achieved along the substrate surface, ultimately obtaining a large area of ​​single-layer two-dimensional porous graphene.

[0036] S4, annealing the prepared sample to remove FeI X .

[0037] Optionally, in step S1 : the metal deposition condition is an ultra-high vacuum condition.

[0038] Optionally, in step S1: the vacuum degree of deposition is less than or equal to 1×10 -8 mbar.

[0039] Optionally, in step S1: the temperature of the substrate during deposition is 100-150°C.

[0040] Optionally, in step S1: the deposition time is 5 to 30 minutes.

[0041] Optionally, in step S2: the substrate temperature is 100-150° C. when depositing the molecules.

[0042] Optionally, in step S2: the annealing time is 5 to 10 minutes.

[0043] Optionally, in step S3: the vacuum degree of deposition is less than or equal to 1×10 -8 mbar.

[0044] Optionally, in step S3: the temperature of the substrate during the deposition of molecules is 100-150°C.

[0045] Optionally, in step S3: the temperature of the substrate during annealing is 180-320°C.

[0046] Optionally, in step S3: the deposition time is 5 to 120 minutes.

[0047] Optionally, in step S4: the substrate temperature during annealing is 350-400°C.

[0048] Optionally, in step S4: the annealing time is 5 to 120 minutes.

[0049] Traditionally, graphene materials have high carrier mobility and zero bandgap. For device applications, we typically desire both high carrier mobility and a wide bandgap, which allows for highly sensitive sensing and a high on / off ratio. With this in mind, a graphene-like material is being developed to meet these requirements, and two-dimensional porous graphene holds promise for addressing this challenge.

[0050] First, two-dimensional porous graphene is structurally similar to graphene. Nanopores are introduced into the structure through the selective design of precursor molecules. Previous studies have shown that nanopores can open the band gap of two-dimensional materials. Furthermore, the band gap of a material can be altered by varying the size of the nanopores.

[0051] Secondly, experiments have shown that the presence of nanopores can adsorb gas molecules, laying the foundation for the development of gas molecule sensors. However, the production of two-dimensional porous graphene on non-metallic substrates such as semiconductors is difficult. Previous research has been limited to synthesis on metal substrates, which poses a problem: device fabrication requires transfer from the metal substrate to a semiconductor substrate. This transfer process often introduces impurity contamination, which can affect device performance. For example, gold (Au) is often used due to its superior support properties, high chemical inertness, and ordered atomic arrangement, which promotes efficient molecular organization.

[0052] Furthermore, metal-organic coordination allows organic two-dimensional materials to adsorb well on surfaces. Most importantly, these metal substrates can serve as ideal surface-assisted catalysts, promoting Ullmann coupling at high temperatures. This reaction involves the dehalogenation of various halogenated aromatic compounds and subsequent polymerization, forming stable C-C bonds and constructing porous organic frameworks. Previous studies have also proposed methods to support synthesis by supporting metal catalysts on non-metallic substrates. This method involves a two-step deposition process of molecules and metals, which increases process complexity. Furthermore, metal coverage is a key factor affecting the synthesis of covalent structures, which requires time to explore. Therefore, a process with fewer steps and simpler methods is needed for synthesis. Therefore, the preparation method of the present invention allows this reaction synthesis to be completed directly on a semiconductor substrate, without the need for additional metal deposition assistance. Finally, devices can be fabricated directly on the prepared sample without the need for transfer. This will facilitate the subsequent device fabrication process. Furthermore, the surface of the metal substrate has a high density of delocalized free electron gas, which can lead to the sample being prioritized over the external electric field when characterizing the electronic state of the sample, that is, the metal shielding of the electronic state. This strong coupling of organic metals can lead to the reconstruction of the sample's electronic energy bands, and cause the metallization of porous graphene to affect the conductivity, band gap, and even optical response of the porous graphene sample. However, the FeO substrate as a semiconductor will not have this problem, and as a semiconductor substrate, the band gap of FeO is around 0.5ev. If the unoccupied state of the prepared porous graphene sample is lower than the Fermi level of FeO, then due to the interface effect between the two, electrons will flow from the FeO substrate to the porous graphene sample, which can be regarded as n-type doping of the sample. If the occupied state of the prepared porous graphene sample is higher than the Fermi level of FeO, then electrons will flow from the porous graphene sample to the substrate, which is equivalent to p-type doping of the porous graphene sample. In addition, since the substrate and the sample are both semiconductor properties, the prepared sample can be regarded as a heterojunction, which will bring about completely different optoelectronic properties. Finally, the synthesis method of the technical solution of the present invention has a guiding role in the synthesis of semiconductor substrates, and the type of substrate can be changed to obtain different heterostructures. Moreover, while ensuring a certain chemical activity, the surface of the FeO substrate does not form a strong coupling with the organic structure on the surface, which can provide guidance for the synthesis on other semiconductor substrates.

[0053] The following describes the details in conjunction with specific embodiments.

[0054] A method for synthesizing a covalent organic framework on an FeO substrate using precursor molecules comprises the following steps:

[0055] S1. Prepare a few-layer FeO material on a clean Au(111) substrate by thermal oxidation to obtain a few-layer FeO substrate. Specifically, Fe is first deposited on the Au(111) surface by thermal evaporation. During thermal evaporation, the temperature of the Au(111) substrate is 100-150°C, the deposition time is 5-30 minutes, and the ambient vacuum is no greater than 1×10 -8 mbar. FeO is then synthesized on the Au(111) surface by thermal oxidation of Fe in a carbon monoxide atmosphere. Furthermore, after depositing a few layers of FeO substrate, an annealing treatment is also performed at a temperature of 100-150°C for 10-30 minutes.

[0056] S2. Precursor molecules are deposited on the thin-layer FeO substrate. In this example, 1,3,5-tris(4-iodophenyl)benzene (TIB) is selected as the precursor molecule and deposited using molecular beam epitaxy. During the deposition of the molecules using a heated molecular source, the temperature of the thin-layer FeO substrate is 100-150°C for 5-10 minutes. An in-situ vacuum annealing treatment is then performed at a temperature of 100-150°C for 5-10 minutes.

[0057] S3. By heating the precursor molecules to induce an Ullmann coupling reaction, epitaxial growth is carried out along the substrate surface, ultimately obtaining a large area of ​​single-layer porous graphene. In this step, the substrate temperature is 180-320°C, and the treatment time is 5-120 minutes. After the deposition of the single-layer porous graphene, an in-situ annealing treatment is also included. During the annealing treatment, the substrate temperature is 180-320°C and the duration is 5-120 minutes.

[0058] S4, annealing the prepared sample to remove FeI X In this step, the temperature of the substrate is 350-400°C and the duration is 5-120 minutes.

[0059] Step S3 and Step S4: At this temperature, the adsorbed precursor molecules can undergo Ullmann dehalogenation polymerization reaction, thereby forming a covalent connection.

[0060] The technical solution of the present invention uses TIB as a precursor molecule, deposits it on the surface of the FeO substrate, and promotes the precursor molecule to undergo a coupling reaction by heating, and epitaxially grows along the substrate surface, ultimately obtaining a single-layer porous graphene. Finally, annealing is performed to remove FeI X .

[0061] Furthermore, a TIB molecular source is selected as the precursor evaporation source. Before deposition, the evaporation source can be subjected to impurity removal treatment. Low-temperature small molecular impurities can be slowly evaporated by heating over one to two days until a pure precursor evaporation source is obtained. The FeO substrate can also be surface cleaned and thermally annealed to enhance its adsorption capacity.

[0062] Furthermore, in step S1, the above-mentioned FeO is used to provide good support for the two-dimensional porous graphene while meeting the requirement of substrate conductivity required for LT-STM testing, and will not generate strong coupling with the material to affect the electronic state study of the single-layer porous graphene.

[0063] Optionally, in step S1, the FeO is FeO(111). Using the above substrate can ensure its semiconductor properties.

[0064] Optionally, in steps S1 and S2: the substrate temperature during deposition is 100-150° C. At this temperature, the molecular source can be successfully evaporated.

[0065] Optionally, in steps S1 and S3, the deposition condition is ultra-high vacuum condition, with a vacuum degree of less than 1×10 -8 mbar. Deposition under vacuum conditions significantly improves the quality of single-layer materials.

[0066] Optionally, in step S1, the deposition time is 5-30 minutes; in step S2, the deposition time is 5-10 minutes. Under these times, a monolayer or a few layers of molecular coverage can be obtained.

[0067] TIB is selected as the precursor molecule, and the structure of TIB Figure 1 The TIB molecular source is heated to 130°C for about two days (40-48 hours) to remove impurities, purify the precursor molecules, and obtain a stable molecular evaporation rate. The FeO substrate is thermally annealed to 500°C to obtain an atomically flat substrate. The precursor molecules are deposited on the FeO substrate by thermal evaporation at a temperature of 140°C and a deposition time of 5 minutes. The pressure during deposition is 1×10 -8 mbar; at this time, the sample is transferred to the low-temperature high-resolution scanning tunneling microscope (LT-STM) chamber for in-situ imaging characterization, and the self-assembly behavior of the precursor molecules can be observed, proving that the precursor molecules have been successfully evaporated on the FeO surface. Figure 2 The TIB molecular source was heated to deposit on the substrate, and then annealed to observe the self-assembly. The temperature was 120℃ and the duration was 5mins. The results are shown in Figure 3As shown. The substrate is then heated to 400°C to promote the Ullmann coupling reaction, and the precursor molecules are deiodinated to form carbon-carbon covalent bonds, thereby epitaxially growing a two-dimensional porous graphene film on the surface of the FeO substrate as the main structure. At this time, the sample is transferred to the low-temperature high-resolution scanning tunneling microscope (LT-STM) chamber for in-situ imaging characterization, and a single layer of two-dimensional porous graphene can be observed on the FeO surface. The results are shown in Figure 4 As shown in the figure, the results show that there are lattice units with different pore sizes in the two-dimensional porous graphene. After deposition and processing in step S4, the sample is transferred to the low-temperature high-resolution scanning tunneling microscope (LT-STM) chamber for in-situ imaging characterization. The results show the electronic states of different lattice structures of porous graphene on FeO. Figure 5 shown.

[0068] The specific reasons or mechanisms for the above methods may be as follows:

[0069] (1) TIB molecules can be evaporated from the molecular source onto the FeO substrate by thermal evaporation. The substrate is subjected to medium-high temperature heating and annealing treatment to ensure that the precursor molecules can be stably adsorbed on the surface in a single-layer two-dimensional structure to facilitate subsequent covalent bonding ( Figure 3 shown);

[0070] (2) The precursor molecules are deiodinated and polymerized by high temperature annealing to form a two-dimensional porous graphene film with different pore size lattice structures ( Figure 4 shown);

[0071] (3) This invention reveals the synthesis mechanism of two-dimensional porous graphene on semiconductor substrates and constructs semiconductor / organic heterostructures (such as Figure 4 shown);

[0072] (4) The present invention reveals the electronic state of the two-dimensional porous graphene film synthesized on FeO substrate (e.g. Figure 5 shown).

[0073] The technical solution of this invention can be extended to synthesize two-dimensional materials on other semiconductor substrates, such as MoS2 and h-BN, as well as on semiconductor substrates with strong surface activity, such as TiO2. Those skilled in the art will readily appreciate that various modifications and variations of this invention are possible.

[0074] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A method for synthesizing porous graphene on the surface of a semiconductor substrate, characterized in that: The steps include: Step S1, preparing a few-layer FeO material on a clean Au(111) substrate to obtain a few-layer FeO substrate; the few-layer FeO material is thermally oxidized with Fe in a carbon monoxide gas atmosphere to synthesize FeO on the Au(111) surface; Step S2, depositing a precursor molecule on the few-layer FeO substrate, wherein the precursor molecule is 1,3,5-tris(4-iodophenyl)benzene; Step S3, heating the precursor molecules to cause an Ullmann coupling reaction, causing epitaxial growth and deposition along the substrate surface to obtain a single-layer two-dimensional porous graphene; Step S4, annealing to remove FeI X ; Step S2 also includes an in-situ vacuum annealing treatment, with an annealing temperature of 100-150° C. and an annealing time of 5-10 minutes; In step S3, an annealing treatment is also included after deposition. During the annealing treatment, the substrate temperature is 180-320° C. and the duration is 5-120 minutes.

2. The method for synthesizing porous graphene on a semiconductor substrate surface according to claim 1, wherein: The FeO synthesis method includes firstly depositing Fe on the Au(111) surface by a thermal evaporation method, and then thermally oxidizing the Fe on the Au(111) surface in a carbon monoxide gas atmosphere.

3. The method for synthesizing porous graphene on a semiconductor substrate surface according to claim 2, wherein: During thermal evaporation, the temperature of the Au(111) substrate is 100~150℃, the deposition time is 5~30mins, and the ambient vacuum is not greater than 1×10 - 8 mbar.

4. The method for synthesizing porous graphene on a semiconductor substrate surface according to claim 3, wherein: Step S1, after depositing a few layers of FeO substrate, further includes annealing treatment, with the annealing temperature being 100-150° C. and the time being 10-30 minutes.

5. The method for synthesizing porous graphene on a semiconductor substrate surface according to claim 1, wherein: In step S2, the precursor molecules are deposited by molecular beam epitaxy. When the molecules are deposited by heating the molecular source, the temperature of the few-layer FeO substrate is 100-150° C., and the heating time is 5-10 mins.

6. The method for synthesizing porous graphene on a semiconductor substrate surface according to claim 1, wherein: In step S3 , the temperature of the substrate during deposition is 180-320° C., and the treatment time is 5-120 minutes.

7. The method for synthesizing porous graphene on a semiconductor substrate surface according to claim 1, wherein: In step S4, during the annealing, the temperature of the substrate is 350-400° C. and the duration is 5-120 minutes.

8. Porous graphene based on the surface of a semiconductor substrate, characterized in that: The porous graphene is prepared by the method for synthesizing porous graphene on the surface of a semiconductor substrate according to any one of claims 1 to 7.

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