Storage system

Abstract

The invention provides a storage system capable of reducing the delay of processing corresponding to a write request. According to one embodiment, a memory system includes a nonvolatile memory including a plurality of blocks, and a controller. The controller allocates, as a common block, a first erased block in which a data erase operation has been completed among the plurality of blocks. When the first stream is started to be used, if the plurality of blocks include two or more erased blocks in which the data erase operation has been completed, the controller allocates a second erased block as a write destination block corresponding to the first stream. When the first stream is started to be used, if the plurality of blocks do not include two or more erased blocks for which the data erase operation has been completed, the controller sets the common block as a write destination block.

Description

[0001] This application claims priority based on Japanese Patent Application No. 2024-001843 (filing date: January 10, 2024). This application incorporates the entire content of the base application by reference thereto. Technical Field

[0002] Embodiments of the present invention relate to a storage system that controls a non-volatile memory. Background Art

[0003] In recent years, storage systems having non-volatile memories have been widely popularized. As one such storage system, a solid state drive (SSD) having a NAND type flash memory is known. The SSD is used as a main storage of various computing devices.

[0004] A storage system sometimes has a multi-stream function. The multi-stream function is a function of receiving a write request associated with one of a plurality of streams from a host and writing data associated with the write request into a block in a non-volatile memory allocated to the one stream. The plurality of streams are used, for example, to write data with different lifetimes into different blocks.

[0005] When starting to use a stream, for example, a block for which a data erasure operation has been completed (erased block) is allocated to the stream.

[0006] However, sometimes there are not enough erased blocks ensured when starting to use a stream. When the allocation of erased blocks to a stream that has started to be used is delayed, the execution of processing corresponding to a write request associated with the stream is delayed. Summary of the Invention

[0007] One embodiment provides a storage system capable of reducing a delay in processing corresponding to a write request.

[0008] According to an embodiment, a storage system can be connected to a host. The storage system includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of blocks. The controller is electrically connected to the non-volatile memory. The controller manages a plurality of streams. The controller allocates a first erased block for which a data erasure operation has been completed among the plurality of blocks as a general block capable of writing data not associated with any of the plurality of streams and data associated with any one of the plurality of streams. When starting to use a first stream, if there are two or more erased blocks for which a data erasure operation has been completed among the plurality of blocks, the controller allocates a second erased block as a write destination block corresponding to the first stream. When starting to use a first stream, if there are not two or more erased blocks for which a data erasure operation has been completed among the plurality of blocks, the controller sets the general block as a write destination block corresponding to the first stream. Brief Description of the Drawings

[0009] Figure 1 is a block diagram showing a configuration example of an information processing system including a storage system related to an embodiment.

[0010] Figure 2 is a diagram showing a situation where there is a shortage of erased blocks when starting to use (open) a plurality of streams in a short period in a storage system related to a comparative example.

[0011] Figure 3 is a diagram showing a situation where there is a shortage of erased blocks when writing data to each entire block among a plurality of blocks in a short period in a storage system related to a comparative example.

[0012] Figure 4 is a diagram showing a situation where the storage area of blocks allocated to a stream is wasted in a storage system related to a comparative example.

[0013] Figure 5 is a diagram showing an example of an operation of allocating dedicated blocks to a stream that starts to be used in a storage system related to an embodiment.

[0014] Figure 6 is a diagram showing an example of an operation of setting a general-purpose block as a write destination block of a stream that starts to be used in a storage system related to an embodiment.

[0015] Figure 7 is a diagram showing an example of an operation of changing the write destination block of a stream from a general-purpose block to a dedicated block in a storage system related to an embodiment.

[0016] Figure 8 is a diagram showing an example of an operation of using a dedicated block allocated to a stream that has ended its use as a general-purpose block in a storage system related to an embodiment.

[0017] Figure 9 is a diagram showing an example of an operation of changing a dedicated block allocated to a stream that has ended its use to a general-purpose block and then restoring it to a dedicated block in a storage system related to an embodiment.

[0018] Figure 10 is a flowchart showing an example of a process (sequence) of the first allocation process executed in a storage system related to an embodiment.

[0019] Figure 11 is a flowchart showing an example of a process of the allocation change process executed in a storage system related to an embodiment.

[0020] Figure 12 is a flowchart showing an example of a process of the second allocation process executed in a storage system related to an embodiment.

[0021] Description of Reference Numerals

[0022] 1... Information processing system, 2... Host, 3... Storage system, 4... NAND flash memory, 5... DRAM, 6... Controller, 11... Host I / F, 12... DRAM I / F, 13... NAND I / F, 14... CPU, 141... Streaming management unit, 142... Allocation control unit, 143... Erase control unit, 144... Write control unit, 51... FW, 52... Logical-physical address translation table, 53... Control information. Detailed implementation

[0023] Hereinafter, the embodiments will be described with reference to the drawings.

[0024] First, with reference to Figure 1 , the configuration of the information processing system 1 including the storage system related to the embodiments will be described. The information processing system 1 includes a host device 2 and a storage system 3.

[0025] The host device 2 can be either a storage server that stores a large amount of diverse data in the storage system 3 or a personal computer. Hereinafter, the host device 2 will also be referred to as the host 2.

[0026] The storage system 3 is a storage device configured to write data to a non-volatile memory and read data from the non-volatile memory. The non-volatile memory is, for example, a NAND flash memory 4. The storage system 3 is also referred to as a storage device or a semiconductor storage device. The storage system 3 is implemented, for example, as an SSD having a NAND flash memory 4. Hereinafter, the case where the non-volatile memory is a NAND flash memory 4 will be mainly exemplified.

[0027] The storage system 3 has a multi-stream function. The multi-stream function is a function of receiving a write request associated with one of multiple streams from the outside (here, the host 2) and writing the user data associated with the write request to a block in the NAND flash memory 4 allocated to the one stream. The multiple streams are used, for example, to write user data with different lifetimes to different blocks. More specifically, receiving a write request associated with a stream means receiving a write request specifying the stream. The write request is, for example, a write command. The write request may include information (stream ID) that can uniquely identify the specified stream. Hereinafter, it is assumed that the write request is a write command.

[0028] The storage system 3 can be used as a memory of the host 2. The storage system 3 can be either built into the host 2 or connected to the host 2 via a cable or a network.

[0029] The interface for connecting the host 2 and the storage system 3 follows PCI Express TM (PCIe TM )、EthernetTM , Fibre channel, NVM Express TM (NVMe TM ) and other standards.

[0030] The host 2 includes, for example, a central processing unit (CPU) 21 and a random access memory (RAM) 22. The CPU 21 and the RAM 22 are connected via a bus 20, for example.

[0031] The CPU 21 is, for example, at least one processor. The CPU 21 controls the operations of various components within the host 2.

[0032] The RAM 22 is, for example, a volatile memory. The RAM 22 is, for example, a dynamic random access memory (DRAM) or a static random access memory (SRAM).

[0033] The storage system 3 includes, for example, a NAND flash memory 4, a DRAM 5, and a controller 6.

[0034] The NAND flash memory 4 includes a plurality of blocks B0, B1, B2, …, and Bm-1. The plurality of blocks B0, B1, B2, …, and Bm-1 each function as the minimum unit for a data erasure operation. A block is sometimes referred to as an erase block or a physical block. Each of the plurality of blocks B0, B1, B2, …, and Bm-1 includes a plurality of pages P0, …, and Pn-1. Each of the plurality of pages P0, …, and Pn-1 includes a plurality of memory cells connected to a single word line. Each of the plurality of pages P0, …, and Pn-1 functions as a unit for a data write operation and a data read operation. In addition, a word line can also function as a unit for a data write operation and a data read operation.

[0035] The number of program / erase cycles (cycles, periods) for each block has an upper limit, which is referred to as the maximum P / E cycle number. One P / E cycle of a certain block includes a data erasure operation for making all the memory cells within the block in an erased state and a programming operation for writing data to each page of the block.

[0036] The DRAM 5 is a volatile memory. The storage area of the DRAM 5 is, for example, allocated as a storage area for firmware (FW) 51, a cache area for a logical physical address translation table 52, and a storage area for control information 53. The control information 53 includes, for example, the number of target erased complete blocks. The storage area of the DRAM 5 can also be further allocated as a buffer area for temporarily storing user data.

[0037] The FW 51 is a program for controlling the operation of the controller 6. The FW 51 is, for example, loaded from the NAND flash memory 4 into the DRAM 5.

[0038] The logical-physical address translation table 52 is a table for managing the mapping between each logical address and each physical address. The logical address is an address used by the host 2 for addressing the storage area of the storage system 3. The logical address is, for example, a logical block address (LBA).

[0039] The number of erased target blocks is data indicating the number of erased blocks to be ensured in the NAND flash memory 4. An erased block is a block in which the data erasure operation has been completed and the programming operation has not been performed yet.

[0040] The controller 6 may be composed of a circuit such as a system-on-a-chip (SoC). The controller 6 may also be composed of multiple semiconductor chips. The controller 6 is electrically connected to the NAND flash memory 4 and is configured to control the NAND flash memory 4. The functions of the respective parts in the controller 6 may be implemented by dedicated hardware in the controller 6 or by a processor that executes the FW.

[0041] The controller 6 may also function as a flash translation layer (FTL) configured to perform data management and block management of the NAND flash memory 4. The data management performed by the FTL includes: (1) management of mapping information indicating the correspondence between each logical address and each physical address of the NAND flash memory 4, and (2) processing for hiding the difference between the data read / write operation in units of pages and the data erasure operation in units of blocks. The block management includes management of bad blocks, wear leveling, and garbage collection (GC).

[0042] The management of the mapping between each logical address and each physical address is performed, for example, using the logical-physical address translation table 52. The controller 6 uses the logical-physical address translation table 52 to manage the mapping between each logical address and each physical address in units of a specific management size. The physical address corresponding to a certain logical address indicates the physical storage location in the NAND flash memory 4 where the data of the logical address is written. The controller 6 uses the logical-physical address translation table 52 to manage a plurality of storage areas obtained by logically partitioning the storage area of the NAND flash memory 4. The size of each of the plurality of storage areas is the above-mentioned management size. The plurality of storage areas respectively correspond to a plurality of logical addresses. That is, each of the plurality of storage areas is determined by 1 logical address. The logical-physical address translation table 52 may be loaded from the NAND flash memory 4 into the DRAM 5 when the storage system 3 is started.

[0043] Data writing to one storage unit can be performed only once in each P / E cycle. Therefore, the controller 6 does not write the updated data corresponding to a certain logical address to the physical storage location where the previous data corresponding to that logical address was stored, but writes it to another physical storage location. Further, the controller 6 invalidates the previous data by updating the logical-physical address translation table 52 in such a way that the logical address is associated with that other physical storage location. The data referred to from the logical-physical address translation table 52 (i.e., the data associated with the logical address) is called valid data. In addition, the data not associated with any logical address is called invalid data. Valid data is data that may be read out from the host 2 later. Invalid data is data that can no longer be read out from the host 2.

[0044] The blocks in the NAND type flash memory 4 are roughly classified into active blocks and free blocks. An active block is a block that stores valid data and to which new data cannot be written. A free block is a block that does not store valid data and can be used for writing new data by undergoing a data erasure operation. That is, a free block is used as a new write destination block by undergoing a data erasure operation. A write destination block can store valid data. A free block for which the data erasure operation has been completed is an erased block. In addition, a free block that is in the middle of a data erasure operation is also called an erasing block.

[0045] GC is a process of copying the valid data in several active blocks in which valid data and invalid data are mixed to other blocks (for example, erased blocks). By GC, the valid data is copied to other blocks, and the block that becomes a block with only invalid data is released as a free block. Therefore, by GC, the number of free blocks in the NAND type flash memory 4 can be increased.

[0046] The controller 6 includes, for example, a host interface circuit (host I / F) 11, a DRAM interface circuit (DRAM I / F) 12, a NAND interface circuit (NAND I / F) 13, and a CPU 14. These host I / F 11, DRAM I / F 12, NAND I / F 13, and CPU 14 are connected via a bus 10, for example.

[0047] The host I / F 11 is a circuit configured to receive various commands (for example, I / O commands and various control commands) and data from the host 2 and send responses to the commands and data to the host 2. The I / O commands include, for example, a write command and a read command. The control commands include, for example, an unmapping command (trim command), an open command, and a close command. The unmapping command is a command that requests invalidation of the data corresponding to a specified logical address (or logical address range). The open command is a command that requests the start of using a stream. The close command is a command that requests the end of using a stream.

[0048] The DRAM I / F12 is a DRAM control circuit configured to control access to the DRAM5.

[0049] The NAND I / F13 is a NAND control circuit configured to control the NAND type flash memory 4. The NAND I / F13 can be connected to a plurality of memory chips in the NAND type flash memory 4 via a plurality of channels. By driving the plurality of memory chips in parallel, the bandwidth of the access between the controller 6 and the NAND type flash memory 4 can be expanded.

[0050] The CPU14 is a processor configured to control the host I / F11, the DRAM I / F12, and the NAND I / F13. The CPU14 executes various processes by executing the FW51 loaded from the NAND type flash memory 4 to the DRAM5. The FW51 is a control program including a command group for causing the CPU14 to execute various processes. The CPU14 can execute command processing for processing various commands from the host 2. The operation of the CPU14 is controlled by the FW51 executed by the CPU14.

[0051] The functions of the respective parts in the controller 6 can be implemented either by dedicated hardware in the controller 6 or by the CPU14 executing the FW51.

[0052] The CPU14 functions as, for example, a stream management unit 141, an allocation control unit 142, an erase control unit 143, and a write control unit 144. The CPU14 functions as the above respective parts by executing the FW51, for example.

[0053] The stream management unit 141 manages a plurality of streams. Specifically, the stream management unit 141 manages the start (opening) and end (closing) of the use of the streams.

[0054] The stream management unit 141 sets a certain stream to an open state according to the situation of receiving a command indicating the start of using the stream from the host 2. A command indicating the start of using a stream is, for example, a write command specifying the start of the stream. In addition, as a command indicating the start of using a stream, an open command specifying the stream can also be used. Further, the stream management unit 141 can also set the corresponding stream to an open state according to the situation of sending a response to the open command to the host 2. The stream management unit 141 notifies the allocation control unit 142 of the opening of the stream, for example.

[0055] When the flow management unit 141 detects any of the following situations, it sets the flow to the closed state. The situations are: receiving a close command for the flow from the host 2, and not receiving a write command for the flow from the host 2 for a certain period of time. The flow management unit 141 notifies, for example, the allocation control unit 142 of the closing of the flow. In addition, after setting the flow to the closed state, the flow management unit 141 sets the flow to the open state again according to the situation of receiving a write command (or an open command for the flow) for the flow from the host 2.

[0056] The allocation control unit 142 controls the allocation of general-purpose blocks and dedicated blocks, and the setting of the write destination block.

[0057] A general-purpose block is a block that can write user data associated with a write command without specifying any flow and user data associated with a write command specifying a flow. A write command without specifying any flow is also called a non-stream write command. User data associated with a non-stream write command is also called non-stream user data. Non-stream user data is user data not associated with any flow. A general-purpose block can be used as a write destination block for non-stream user data and can also be used as a write destination block for user data associated with a flow.

[0058] A dedicated block is a block that can only write user data associated with a write command specifying the corresponding flow. A write command specifying a flow is also called a flow write command. User data associated with a flow write command is also called user data associated with a flow. A dedicated block is used as a write destination block for user data associated with the corresponding flow.

[0059] The allocation control unit 142 allocates the erased blocks in the NAND flash memory 4 as general-purpose blocks. The erased blocks in the NAND flash memory 4 are blocks that have not been allocated as general-purpose blocks or dedicated blocks. Specifically, the allocation control unit 142, for example, allocates the erased blocks as general-purpose blocks according to the situation that the storage system 3 is started. In addition, the allocation control unit 142 allocates new erased blocks as general-purpose blocks according to the situation that the data writing to all general-purpose blocks has been completed.

[0060] The allocation control unit 142 allocates the erased blocks in the NAND flash memory 4 as dedicated blocks corresponding to the streams in the open state. Specifically, the allocation control unit 142 can allocate the erased blocks as dedicated blocks corresponding to the stream when the stream is opened. In addition, the allocation control unit 142 can allocate a new erased block as a dedicated block corresponding to the stream according to the condition that the data writing to all the dedicated blocks allocated to the stream has been completed. Further, when there is no erased block that can be allocated as a dedicated block corresponding to the stream, the allocation control unit 142 sets a general-purpose block as the write destination block for the stream. In addition, the allocation control unit 142 can change the dedicated block corresponding to the stream to a general-purpose block according to the detected condition of stream closure.

[0061] The allocation control unit 142 determines the target number of erased blocks based on the number of streams in the open state. For example, the allocation control unit 142 sets the number obtained by adding 1 to the number of streams in the open state as the target number of erased blocks. In this case, the target number of erased blocks is equivalent to the sum of the number of erased blocks that should be allocated as dedicated blocks to each stream in the open state and the number of erased blocks that should be allocated as general-purpose blocks.

[0062] The erasure control unit 143 selects one free block from one or more free blocks in the NAND flash memory 4 and performs a data erasure operation on the selected free block. Specifically, the erasure control unit 143 controls the execution of the data erasure operation on the free block based on the number of erased blocks included in the NAND flash memory 4 and the target number of erased blocks. The erasure control unit 143 performs a data erasure operation on the free block during the period when the number of erased blocks included in the NAND flash memory 4 is less than the target number of erased blocks. The erasure control unit 143 does not perform a data erasure operation on the free block during the period when the number of erased blocks included in the NAND flash memory 4 is equal to or more than the target number of erased blocks.

[0063] The write control unit 144 performs processing corresponding to the write command received from the host 2. Specifically, the write control unit 144 performs processing for writing associated user data to a general-purpose block according to a non-stream write command. The write control unit 144 performs processing for writing associated user data to the write destination block corresponding to the stream according to a stream write command. The write destination block corresponding to the stream is a dedicated block allocated to the stream or a general-purpose block.

[0064] In this way, the stream management unit 141, the allocation control unit 142, the erasure control unit 143, and the write control unit 144 implement a data writing operation corresponding to the multi-stream function. More specific operation examples of the stream management unit 141, the allocation control unit 142, the erasure control unit 143, and the write control unit 144 will be referred to Figures 5 to 9To be described later.

[0065] Here, two cases of the execution delay of a write command in the storage system according to the comparative example will be described. The storage system of the comparative example has a multi-stream function. The execution delay of the write command occurs, for example, because there are not enough erased blocks allocated to the write destination block.

[0066] Figure 2 It shows a case where there are not enough erased blocks when multiple streams are opened in a short period in the storage system of the comparative example (hereinafter, referred to as the first case). In the first case, the 0th block WB0, the 1st block WB1, and the 2nd block WB2 are respectively allocated to the non-stream 30C (non-stream), the 1st stream 31C (stream#1), and the 2nd stream 32C (stream#2). The 0th block WB0 stores the user data 41 of the non-stream 30C. The 1st block WB1 stores the user data 42 associated with the 1st stream 31C. The 2nd block WB2 does not store any data yet. In addition, the NAND flash memory in the storage system includes one erased block EB0 and one erasing block EB1.

[0067] In the first case, two streams, the 3rd stream 33C and the 4th stream 34C, are opened simultaneously ( Figure 2 in (1) below). In response to the opening of the 3rd stream 33C, the erased block EB0 is allocated as the write destination block for the 3rd stream 33C ( Figure 2 in (2) below).

[0068] On the other hand, since no allocatable erased block is ensured, an erased block cannot be allocated as the write destination block for the 4th stream 34C in response to the opening of the 4th stream 34C. Therefore, until the data erasing operation of the erasing block EB1 is completed and the erased block EB1 is obtained, the erased block EB1 cannot be allocated to the 4th stream 34C ( Figure 2 in (3) below).

[0069] Therefore, in the storage system of the comparative example, in the first case, the execution delay of the write command designating the 4th stream 34C occurs.

[0070] Figure 3 It shows a case where there are not enough erased blocks when data is written to each entire block of multiple blocks in a short period in the storage system of the comparative example (hereinafter, referred to as the second case). The relationship between the non-stream 30C, the 1st stream 31C, the 2nd stream 32C, the 0th block WB0, the 1st block WB1, the 2nd block WB2, the erased block EB0, and the erasing block EB1 in the second case is the same as that in the first case.

[0071] In the second case, data is written to the entire blocks of both the 0th block WB0 and the 1st block WB1 within a short period of time ( Figure 3 (1) in). Based on the fact that the data writing to the entire 0th block WB0 has been completed, a newly allocated erased block EB0 is used as the write destination block for the non-stream 30C ( Figure 3 (2) in).

[0072] On the other hand, since no allocable erased block can be ensured, an erased block cannot be allocated as the write destination block for the 1st stream 31C based on the fact that the data writing to the entire 1st block WB1 has been completed. Therefore, until the data erasure operation for the erasing block EB1 is completed and the erased block EB1 is obtained, the erased block EB1 cannot be allocated to the 1st stream 31C ( Figure 3 (3) in).

[0073] Therefore, in the storage system of the comparative example, in the second case, the execution of the write command specifying the 1st stream 31C is delayed.

[0074] Moreover, in the storage system of the comparative example, the storage area of the blocks allocated to the stream may be wasted.

[0075] Figure 4 It shows the situation where the storage area of the blocks allocated to the stream is wasted in the storage system of the comparative example (hereinafter, referred to as the third case). The relationship between the non-stream 30C, the 1st stream 31C, the 2nd stream 32C, the 0th block WB0, the 1st block WB1, the 2nd block WB2, the erased block EB0, and the erasing block EB1 in the third case is the same as that in the first case.

[0076] In the third case, in the 1st stream 31C and the 2nd stream 32C, no write command is received from the host anymore ( Figure 4 (1)). That is, no write command specifying the 1st stream 31C and the write command specifying the 2nd stream 32C are received from the host anymore.

[0077] In this case, after the user data is written halfway in the 1st block WB1, no write command specifying the 1st stream 31C is received, so the storage area where data has not been written yet (unwritten area) is wasted ( Figure 4 (2) in). In addition, in the 2nd block WB2, after it is allocated to the 2nd stream 32C, no write command specifying the 2nd stream 32C is received, so the entire storage area is wasted ( Figure 4 (3) in).

[0078] Therefore, in the storage system of the comparative example, in the third case, the write command specifying the stream is no longer received from the host 2. Thus, the storage area of the block allocated to the stream may be wasted.

[0079] As described above, in the storage system of the comparative example, the execution of the write command specifying the stream may be delayed, and the storage area of the block allocated to the stream may be wasted.

[0080] In contrast, in the storage system 3 according to the present embodiment, when the stream starts to be used, the controller 6: (A) if there are two or more erased blocks, allocates the erased blocks (dedicated blocks) as the write destination blocks corresponding to the stream; (B) if there are not two or more erased blocks, sets the general-purpose blocks as the write destination blocks corresponding to the stream. That is, the controller 6 allocates the erased blocks (dedicated blocks) as the write destination blocks of the stream or sets the general-purpose blocks as the write destination blocks of the stream according to the number of erased blocks included in the NAND flash memory 4. Thereby, regardless of whether there are erased blocks that can be allocated as the write destination blocks of the stream, the controller 6 can execute the write command specifying the stream without delay.

[0081] In addition, when the use of the stream ends, the controller 6 changes the dedicated blocks allocated to the stream to general-purpose blocks. Thereby, the controller 6 can use the unwritten area of the dedicated blocks allocated to the stream whose use has ended without waste for storing user data.

[0082] Furthermore, after changing the dedicated blocks allocated to the stream to general-purpose blocks, the controller 6 can change the general-purpose blocks back to dedicated blocks according to the situation where the use of the stream starts again. Therefore, the controller 6 can also continue to allocate the dedicated blocks to the stream that starts to be used again.

[0083] Refer to Figures 5 to 9 to specifically describe the operations of the stream management unit 141, the allocation control unit 142, the erasure control unit 143, and the write control unit 144 of the storage system 3.

[0084] Figure 5 An example of the operation of allocating dedicated blocks to a stream that starts to be used (i.e., a stream that becomes an open state) in the storage system 3 is shown. In Figure 5In the example shown, it is assumed that a general block GB is allocated to the non-stream 30, and a first dedicated block DB1 is allocated to the first stream 31 (stream#1). The general block GB stores the user data 61 of the non-stream 30. The first dedicated block DB1 stores the user data 62 associated with the first stream 31. Since there is 1 open stream, the target number of erased blocks is, for example, 2 (= the number of open streams + 1). The NAND flash memory 4 includes two erased blocks EB0 and EB1.

[0085] Based on the situation where the stream management unit 141 receives a write command specifying the start of the second stream 32 (stream#2), the second stream 32 is made open ( Figure 5 in (1) below).

[0086] Based on the number of open streams, the allocation control unit 142 changes the target number of erased blocks from 2 to 3 ( Figure 5 in (2) below). That is, based on the situation where the second stream 32 becomes open, the allocation control unit 142 increases the target number of erased blocks by 1. Based on the situation where the number of erased blocks is less than the target number of erased blocks, the erase control unit 143 starts the data erasure operation on the free blocks.

[0087] Next, since the NAND flash memory 4 includes two or more erased blocks EB0 and EB1, the allocation control unit 142 allocates the erased block EB0 as the second dedicated block DB2 (the second dedicated block DB2) for the second stream 32 ( Figure 5 in (3) below). This is because even if the data writing to the entire general block GB is completed after the erased block EB0 is allocated to the second stream 32, the erased block EB1 can be allocated as the next general block GB. The allocation control unit 142 allocating the erased block EB0 as the second dedicated block DB2 means setting the second dedicated block DB2 (= the erased block EB0) as the dedicated write destination block for the second stream 32. In addition, the allocation control unit 142 may also allocate the erased block EB1 as the second dedicated block DB2. The write control unit 144 writes the associated user data to the second dedicated block DB2 according to the write command specifying the second stream 32.

[0088] In this way, when the second stream 32 becomes open during the period when the NAND flash memory 4 includes two or more erased blocks, the allocation control unit 142 allocates any one of the erased blocks as the second dedicated block DB2 corresponding to the second stream 32. Thereby, the write control unit 144 can use the second dedicated block DB2 as the write destination block and execute the write command for the second stream 32 without delay.

[0089] Furthermore, the allocation control unit 142 changes the target number of erased blocks according to the number of streams in the open state.

[0090] In the NAND flash memory 4, erased blocks that are kept in a secured state and are not used for data writing reduce the storage capacity that can be written in the storage system 3. Therefore, securing an excessive number of erased blocks may result in a reduction in the performance of the storage system 3. An excessive number of erased blocks is, for example, erased blocks that are equivalent to the maximum number of streams that can be managed in the storage system 3. In addition, in this case, although there is no delay in the allocation of erased blocks to streams that have become open, erased blocks that require time from the completion of the data erasing operation to the actual use for data writing are generated. The quality of data stored in such erased blocks may deteriorate.

[0091] In the storage system 3, the allocation control unit 142 sets the target number of erased blocks according to the number of streams in the open state, thereby preventing an excessive number of erased blocks from being secured. Therefore, the storage system 3 can maintain overprovisioning (OP) and secure a sufficient total writable capacity even when a stream is not open.

[0092] Figure 6 An example of the operation of setting a general block as a write destination block of a stream to be used in the storage system 3 is shown. Here, it is assumed that the general block GB is allocated to the non-stream 30. The general block GB stores the user data 63 of the non-stream 30. Since there is no stream in the open state, the target number of erased blocks is, for example, 1. The NAND flash memory 4 includes one erased block EB0.

[0093] In response to receiving the write command designating the start of the first stream 31, the stream management unit 141 opens the first stream 31 ( Figure 6 (1) in the figure.

[0094] The allocation control unit 142 changes the target number of erased blocks from 1 to 2 based on the number of streams in the open state. Figure 6 In other words, the allocation control unit 142 increases the target number of erased blocks by 1 according to the fact that the first stream 31 is in the open state. The erase control unit 143 starts the data erase operation on the free blocks according to the fact that the number of erased blocks is less than the target number of erased blocks. Here, the free block in the middle of the data erase operation is the erase-in-progress block EB1.

[0095] Since the NAND flash memory 4 includes only one erased block EB0 (that is, there are no more than two erased blocks), the allocation control unit 142 does not allocate the erased block EB0 to the first stream 31 (Figure 6 (3) in it). The allocation control unit 142 sets the general block GB as the write destination block of the first stream 31 ( Figure 6 (4) in it).

[0096] Thus, the write control unit 144 can write the user data 64 associated with the write command of the first stream 31 to the general block GB without waiting for the completion of the data erasure operation of the erasing block EB1. Therefore, even when the NAND flash memory 4 does not include an erased block that can be allocated to the first stream 31 that has become an open state, the write control unit 144 can use the general block GB as the write destination block and execute the write command of the first stream 31 without delay.

[0097] In addition, the allocation control unit 142 can change the write destination block of the stream from the general block GB to a dedicated block.

[0098] Figure 7 An example of the operation of changing the write destination block of the first stream 31 from the general block GB to a dedicated block in the example shown in Figure 6 is shown.

[0099] After setting the general block GB as the write destination block of the first stream 31, the allocation control unit 142 predicts whether a new erased block will be obtained before the completion of data writing to the entire general block GB. That is, the allocation control unit 142 predicts whether the data erasure operation of the erasing block EB1 by the erasure control unit 143 is completed before the completion of data writing to the entire general block GB. In this prediction, for example, the maximum data write speed of the blocks in the NAND flash memory 4 and the time required for the data erasure operation of one block (data erasure time) are used. The maximum data write speed is, for example, the data write speed when the write performance based on the specifications of the storage system 3 is exhibited. The maximum data write speed can also be, for example, the maximum speed of the programming operation of the NAND flash memory 4. The maximum data write speed can also be, for example, the maximum reception speed of user data from the host 2 during a certain period in the past.

[0100] More specifically, for example, the allocation control unit 142 calculates the time (first time) when the data writing to the entire general block GB is completed based on the size of the unwritten area in the general block GB (that is, the remaining storage capacity in the general block GB) and the maximum data writing speed to the blocks in the NAND flash memory 4. In addition, the allocation control unit 142 calculates the time (second time) when the data erasing operation on the erasing block EB1 is completed based on the time when the data erasing operation starts on the erasing block EB1 and the data erasing time for one block. When the second time is earlier than the first time, the allocation control unit 142 predicts that a new erased block EB1 will be obtained before the data writing to the entire general block GB is completed. When the second time is after the first time, the allocation control unit 142 predicts that a new erased block EB1 will not be obtained before the data writing to the entire general block GB is completed.

[0101] When predicting that a new erased block EB1 will be acquired before data writing to the entire general block GB is completed, the allocation control unit 142 allocates the erased block EB0 as the first dedicated block DB1 corresponding to the first stream 31 ( Figure 7 In addition, the allocation control unit 142 changes the write destination block of the first stream 31 from the general block GB to the first dedicated block DB1 ( Figure 7 In other words, by Figure 7 Through operations (1) and (2) in FIG. 1 , the erased block EB0 is allocated as the write destination block of the first stream 31 .

[0102] Thus, the write control unit 144 can write the user data associated with the write command designating the first stream 31 into the first dedicated block DB1 instead of the general block GB.

[0103] In addition, the allocation control unit 142 also communicates with the allocation control unit 142 when writing of data to the entire dedicated block allocated to the stream is completed. Figures 5 to 7 The operation shown is similar to that of allocating a new erased block as a dedicated block corresponding to the stream (ie, a dedicated write destination block), or setting a general purpose block as a write destination block for the stream.

[0104] Figure 8 An example of an operation in the storage system 3 in which a dedicated block allocated to a stream that has ended use (i.e., a stream that has been detected to be closed) is used as a general block. Here, it is assumed that the general block GB is allocated to the non-stream 30, and the first dedicated block DB1 is allocated to the first stream 31. The general block GB stores the user data 65 of the non-stream 30. The first dedicated block DB1 stores the user data 66 associated with the first stream 31. Since there is one stream in the open state, the target number of erased blocks is, for example, 2. The NAND flash memory 4 includes two erased blocks EB0 and EB1.

[0105] The stream management unit 141 detects the closing of the first stream 31 ( Figure 8 in (1)). The stream management unit 141 detects the closing of the first stream 31, for example, based on any one of the conditions of receiving a closing command from the host 2 and not receiving a write command specifying the first stream 31 from the host 2 within a certain period of time.

[0106] The allocation control unit 142 changes the target number of erased complete blocks from 2 to 1 based on the number of open streams ( Figure 8 in (2)). That is, the allocation control unit 142 reduces the target number of erased complete blocks by 1 according to the condition of detecting the closing of the first stream 31. Further, the allocation control unit 142 changes the first dedicated block DB1 allocated to the first stream 31 to a general block ( Figure 8 in (3)). The general block changed from the first dedicated block DB1 is referred to as the first general block DB1.

[0107] Next, the allocation control unit 142, based on the condition that data writing to the entire general block GB is completed ( Figure 8 in (4)), changes the general block used as the write destination block (hereinafter, also referred to as the general block of the write destination) from the general block GB to the first general block DB1 ( Figure 8 in (5)). That is, the first dedicated block DB1 allocated to the detected closed first stream 31 is used as the new general block of the write destination.

[0108] As a result, the write control unit 144 can write user data to the first general block DB1. For example, user data 67 that is not stream 30 and user data associated with a stream to which a dedicated block is not allocated can be written to the first general block DB1. Therefore, the unwritten area in the first dedicated block DB1 can be used for storing user data without waste.

[0109] In addition, when the detected closed first stream 31 is used again, the allocation control unit 142 can also restore the first general block DB1 to the first dedicated block DB1.

[0110] Figure 9 An example of the operation in the storage system 3 of changing a dedicated block allocated to a detected closed stream to a general block and then restoring it to a dedicated block is shown. Figure 9 The operations (1) to (3) are the same as the operations (1) to (3) of Figure 8

[0111] ​After the stream management unit 141 changes the first dedicated block DB1 to the first general block DB1, for example, according to the situation where a write command specifying the first stream 31 is received from the host 2, the first stream 31 is made open again ( Figure 9 in (4) of

[0112] Based on the situation where the first stream 31 becomes open again, the allocation control unit 142 restores the target number of erased and completed blocks from 1 to 2 ( Figure 9 in (5) of Figure 9 ). Also, after the first dedicated block DB1 is changed to the first general block DB1, before new user data is written to the first general block DB1, based on the situation where the first stream 31 becomes open again, the allocation control unit 142 restores the first general block DB1 to the first dedicated block DB1 (

[0113] in (6) of

[0114] That is, the allocation control unit 142 re - allocates the first general block DB1 as the first dedicated block DB1 corresponding to the first stream 31.

[0115] Next, with reference to Figures 10 to 12 , the processing performed in the storage system 3 will be described.

[0116] Figure 10 is a flowchart showing an example of the process of the first allocation process executed by the CPU 14. The first allocation process is a process of setting a write destination block for a stream that becomes open. The CPU 14 executes the first allocation process, for example, according to the situation where one stream becomes open. Hereinafter, the stream that becomes open will be referred to as the first target stream.

[0117] First, the CPU 14 increments the number of erased blocks that have been completed by 1 (step S101). Next, the CPU 14 determines whether the NAND flash memory 4 contains two or more erased blocks (step S102).

[0118] When the NAND flash memory 4 contains two or more erased blocks (Yes in step S102), the CPU 14 allocates the erased blocks as dedicated blocks for the first object stream (step S103), and the processing of the CPU 14 proceeds to step S109. This dedicated block is used as the write destination block for the first object stream. That is, the user data associated with the write command specifying the first object stream is written to this dedicated block.

[0119] When the NAND flash memory 4 does not contain two or more erased blocks (No in step S102), the CPU 14 sets a general-purpose block as the write destination block for the first object stream (step S104). As a result, the user data associated with the write command specifying the first object stream is not written to the dedicated block but to the general-purpose block. Then, the CPU 14 determines whether the NAND flash memory 4 contains one erased block (step S105).

[0120] When the NAND flash memory 4 does not contain any erased blocks at all (No in step S105), the processing of the CPU 14 returns to step S105. That is, the processing of step S105 is repeated until it is determined that there is one erased block.

[0121] When the NAND flash memory 4 contains one erased block (Yes in step S105), the CPU 14 determines whether a new erased block will be obtained before the data writing to the entire general-purpose block is completed (step S106). The CPU 14 determines whether a new erased block will be obtained before the data writing to the entire general-purpose block is completed, for example, based on the maximum data writing speed of the blocks in the NAND flash memory 4 and the data erasing time for one block.

[0122] When a new erased block will not be obtained before the data writing to the entire general-purpose block is completed (No in step S106), the processing of the CPU 14 returns to step S105. That is, the processing of steps S105 and S106 is repeated until it is determined that there is one erased block in the NAND flash memory 4 and a new erased block will be obtained before the data writing to the entire general-purpose block is completed.

[0123] When a newly erased block is obtained before the data writing to the entire general block is completed (Yes in step S106), the CPU 14 allocates the erased block as a dedicated block for the first object stream (step S107). Then, the CPU 14 changes the write destination block of the first object stream from the general block to the dedicated block (i.e., the allocated erased block) (step S108), and the processing of the CPU 14 proceeds to step S109.

[0124] After performing the processing in either step S103 or step S108, the CPU 14 determines whether the target number of erased blocks has exceeded the number of erased blocks (step S109). When the target number of erased blocks has exceeded the number of erased blocks (Yes in step S109), the CPU 14 selects one free block in the NAND flash memory 4, starts the data erasing process for this free block (step S110), and ends the first allocation process. On the other hand, when the target number of erased blocks is less than or equal to the number of erased blocks (No in step S109), the CPU 14 ends the first allocation process.

[0125] Through the above first allocation process, when the NAND flash memory 4 contains two or more erased blocks, the CPU 14 allocates an erased block to the first object stream. In addition, when the NAND flash memory 4 does not contain two or more erased blocks, the CPU 14 sets the general block as the write destination block of the first object stream. Then, based on the situation where there is one erased block in the NAND flash memory 4 and a new erased block will be obtained before the data writing to the entire general block is completed, the CPU 14 allocates an erased block (dedicated block) to the first object stream. Thus, regardless of whether there is an erased block that can be allocated as the write destination block of the first object stream, the CPU 14 can execute the write command specifying the first object stream without delay.

[0126] In addition, when the data writing to the entire dedicated block allocated to the first object stream is completed, the CPU 14 also performs the process of newly setting the write destination block of the first object stream. This process is, for example, the process obtained by removing the process of step S101 from the first allocation process. Therefore, even when the data writing to the entire dedicated block allocated to the first object stream is completed, regardless of whether there is a new erased block that can be allocated as the write destination block of the first object stream, the CPU 14 can execute the write command specifying the first object stream without delay.

[0127] Figure 11It is a flowchart showing an example of the process of allocation change processing executed by the CPU 14. The allocation change processing is for using the dedicated block that has been allocated to the stream detected as closed. The CPU 14 executes the allocation change processing according to the situation of detecting the closure of one stream. Hereinafter, the stream detected as closed is referred to as the second target stream. It is assumed that a dedicated block is allocated to the second target stream.

[0128] First, the CPU 14 decreases the target number of erased completed blocks by 1 (step S201). The CPU 14 changes the dedicated block allocated to the second target stream to a general block (hereinafter referred to as the second general block) (step S202).

[0129] Next, the CPU 14 determines whether a write command specifying the second target stream has been received (step S203). That is, the CPU 14 determines whether a write command specifying the second target stream has been received again after detecting the closure of the second target stream.

[0130] When a write command specifying the second target stream is received (Yes in step S203), the CPU 14 determines whether user data has been newly written to the second general block (step S204). That is, the CPU 14 determines whether either non-stream user data or user data associated with a stream not allocated a dedicated block has been written to the second general block after step S202.

[0131] When user data has been newly written to the second general block (Yes in step S204), the CPU 14 executes the first allocation process for the second target stream (step S205) and ends the allocation change processing. That is, since the dedicated block allocated to the second target stream is already being used as a general block, the CPU 14 executes the first allocation process in order to set a new write destination block for the second target stream. The process of the first allocation process is as described with reference to Figure 10 as follows.

[0132] When user data has not been newly written to the second general block (No in step S204), the CPU 14 restores the second general block to the dedicated block of the second target stream (step S206). This dedicated block is used again as the write destination block of the second target stream. Then, the CPU 14 increases the target number of erased completed blocks by 1 (step S207) and ends the allocation change processing.

[0133] When a write command specifying the second object stream is not received (No in step S203), the CPU 14 determines whether user data has been newly written to the second general-purpose block (step S208). When user data has not been newly written to the second general-purpose block (No in step S208), the process of the CPU 14 returns to step S203. That is, when the CPU 14 receives a write command specifying the second object stream after changing the dedicated block of the second object stream to the second general-purpose block, the CPU 14 performs the processes of step S203 to step S207 for restarting the use of the second object stream.

[0134] When user data has been newly written to the second general-purpose block (Yes in step S208), the CPU 14 ends the allocation change process. That is, when a write command specifying the second object stream is not received and user data has been newly written to the second general-purpose block, it is determined that the second general-purpose block is used as a general-purpose block.

[0135] Through the above allocation change process, the CPU 14 can use the dedicated block allocated to the closed second object stream as a general-purpose block. That is, the CPU 14 can use the unwritten storage area in the dedicated block as the storage area of the general-purpose block without waste. In addition, after the CPU 14 changes the dedicated block to a general-purpose block, when the second object stream is restarted before new user data is written to the general-purpose block, the general-purpose block is restored to a dedicated block. In this way, the CPU 14 can effectively use the storage area of the block by changing the use of the allocated block according to the usage status of the second object stream.

[0136] Figure 12 It is a flowchart showing an example of the process of the second allocation process executed by the CPU 14. The second allocation process is a process of allocating a general-purpose block. The CPU 14 executes the second allocation process, for example, according to the situation where data writing to the entire general-purpose block (the general-purpose block of the write destination) used as the write destination block is completed.

[0137] First, the CPU 14 determines whether the NAND flash memory 4 contains another general-purpose block different from the current write destination general-purpose block (step S31). Another general-purpose block is, for example, a general-purpose block changed from the dedicated block of the stream corresponding to the detection of the closing of the stream.

[0138] When the NAND flash memory 4 contains another general-purpose block (Yes in step S31), the CPU 14 sets the other general-purpose block as the new write destination general-purpose block (step S32) and ends the second allocation process.

[0139] When the NAND flash memory 4 does not include other general-purpose blocks (No in step S31), the CPU 14 allocates the erased block as a general-purpose block for the new write destination (step S33), and ends the second allocation process.

[0140] Through the above second allocation process, the CPU 14 can set either the other general-purpose block or the erased block as the general-purpose block for the new write destination according to the situation that the data writing to the entire general-purpose block of the current write destination is completed.

[0141] When the other general-purpose block is set as the general-purpose block for the write destination, the CPU 14 can effectively utilize, for example, the unwritten area in the general-purpose block changed from the dedicated block.

[0142] In addition, when the erased block is allocated as the general-purpose block for the write destination, the CPU 14 can allocate the erased block as the general-purpose block without delay. The CPU 14 ensures the erased block in such a way that the erased block can be newly allocated as the general-purpose block at the timing when the data writing to the entire general-purpose block is completed. That is, there is no shortage of erased blocks that should be newly allocated as general-purpose blocks at the timing when the data writing to the entire general-purpose block is completed.

[0143] Therefore, when the data writing to the entire general-purpose block of the write destination is completed, the CPU 14 can also write the associated user data to the general-purpose block of the new write destination without delay according to the non-stream write command or the write command specifying the stream that has not been allocated a dedicated block.

[0144] As described above, according to this embodiment, the delay of the process corresponding to the write request can be reduced. The stream management unit 141 can manage multiple streams. The allocation control unit 142 can allocate the first erased block whose data erasure operation has been completed among the multiple blocks included in the NAND flash memory 4 as a general-purpose block that can write data not associated with any of the multiple streams and data associated with any one of the multiple streams. When the first stream starts to be used, if there are two or more erased blocks whose data erasure operations have been completed among the multiple blocks, the allocation control unit 142 allocates the second erased block as the write destination block corresponding to the first stream. When the first stream starts to be used, if there are not two or more erased blocks whose data erasure operations have been completed among the multiple blocks, the allocation control unit 142 sets the general-purpose block as the write destination block corresponding to the first stream.

[0145] Accordingly, the write control unit 144 can write the associated user data without delay to the write destination block that is either the second erased block or the general block, in accordance with the write request received at the first stream (e.g., a write command specifying the first stream). Therefore, in the storage system 3 having a multi-stream function, it is possible to reduce the latency of the processing corresponding to the write request.

[0146] Each of the various functions described in this embodiment can be implemented by a circuit (processing circuit). Examples of the processing circuit include a programmed processor such as a central processing unit (CPU). The processor executes each of the described functions by executing a computer program (command group) stored in a memory. The processor may be a microprocessor including an electrical circuit. Examples of the processing circuit also include a digital signal processor (DSP), an application specific integrated circuit (ASIC), a microcontroller, a controller, and other electrical circuit components. Each of the other components other than the CPU described in this embodiment can also be implemented by a processing circuit.

[0147] Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and its equivalents.

Claims

1. A storage system capable of connecting to a host, comprising a non-volatile memory and a controller, wherein the non-volatile memory includes a plurality of blocks, and the controller is electrically connected to the non-volatile memory and configured to: manage a plurality of streams, allocate a first erased block, in which the data erasure operation of the plurality of blocks has been completed, as a general block, and the general block is a block capable of writing data not associated with any of the plurality of streams and data associated with any one of the plurality of streams, when starting to use a first stream among the plurality of streams, if the plurality of blocks include two or more erased blocks in which the data erasure operation has been completed, allocate a second erased block as a write destination block corresponding to the first stream, when starting to use the first stream, if the plurality of blocks do not include two or more erased blocks in which the data erasure operation has been completed, set the general block as a write destination block corresponding to the first stream.

2. The storage system according to claim 1, wherein the controller is further configured to: after setting the general block as a write destination block corresponding to the first stream, if the plurality of blocks include a third erased block in which the data erasure operation has been completed and it is predicted that a new erased block will be obtained before the data writing to the entire general block is completed, allocate the third erased block as a write destination block corresponding to the first stream.

3. The storage system according to claim 2, wherein the controller is configured to: use the maximum data writing speed to the general block and the time required for the data erasure operation of the blocks in the non-volatile memory to predict whether a new erased block will be obtained before the data writing to the entire general block is completed.

4. The storage system according to claim 2, wherein the controller is further configured to: according to the situation that the use of the first stream has ended, change the third erased block allocated as a write destination block corresponding to the first stream to the general block.

5. The storage system according to claim 4, wherein the controller is further configured to: after changing the third erased block to the general block, before newly writing data to the third erased block that has been changed to the general block, according to the situation that the first stream is started to be used again, re-allocate the third erased block as a write destination block corresponding to the first stream.

6. The storage system according to claim 1, wherein the controller is further configured to: according to the situation that the use of the first stream has ended, change the second erased block allocated as a write destination block corresponding to the first stream to the general block.

7. The storage system according to claim 6, wherein the controller is further configured to: after changing the second erased block to the general block, before newly writing data to the second erased block that has been changed to the general block, according to the situation that the first stream is started to be used again, re-allocate the second erased block as a write destination block corresponding to the first stream.

8. The storage system according to any one of claims 1 to 7, wherein the controller is configured to: determine a second quantity of erased blocks to be ensured based on a first quantity of used streams, perform the data erasure operation on the blocks in the plurality of blocks that do not store valid data to ensure the second quantity of erased blocks.

9. The storage system according to claim 8, wherein the controller is configured to: increase the second quantity by 1 when starting to use the first stream, decrease the second quantity by 1 when ending the use of the first stream.

10. The storage system according to claim 1, wherein the controller is further configured to: write data associated with the first write request into the general block according to a situation where the first write request not specifying any stream is received from the host, write data associated with the second write request into the write destination block corresponding to the first stream according to a situation where the second write request specifying the first stream is received from the host.

11. The storage system according to claim 1, wherein the controller is further configured to: when the data writing for the entire second erased block assigned as the write destination block corresponding to the first stream is completed, if the plurality of blocks include two or more erased blocks for which the data erasure operation has been completed, assign a third erased block as the write destination block corresponding to the first stream, when the data writing for the entire second erased block assigned as the write destination block corresponding to the first stream is completed, if the plurality of blocks do not include two or more erased blocks for which the data erasure operation has been completed, set the general block as the write destination block corresponding to the first stream.

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