Flash memory data processing method and system based on filling content mode diversity

By introducing the concept of flash block grouping indexing in flash memory devices, the flexibility, stability and efficiency of addressing are improved for specific file types, and the delay and lag problems of flash memory devices in video editing and other scenarios are solved.

CN120295935APending Publication Date: 2025-07-11SHENZHEN LINGDECHUANG TECH CO LTD
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Patent Information

Application Number
CN202510332548.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-20
Publication Date
2025-07-11

AI Technical Summary

Technical Problem

Flash memory devices find it difficult to meet the needs of fast addressing in high-frequency nonlinear data operation scenarios such as video editing, resulting in delays and lags, and the existing addressing mechanism is difficult to adapt to the high-frequency operation needs of specific file types.

Method used

The concept of flash block grouping indexing is introduced, and branches of different usage scenarios are identified through multiple conditional constraints, and the exclusive addressing mechanism is adapted to improve the addressing efficiency and stability of flash devices under high-frequency nonlinear data operations.

Benefits of technology

It improves the addressing flexibility, stability and efficiency of flash memory devices in high-frequency nonlinear data operation scenarios, and enhances scenario applicability.

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Abstract

The invention discloses a content filling mode diversity-based flash memory data processing method and system, and aims at the low-delay response requirement of file data of a specific file type stored in flash memory equipment in a high-frequency nonlinear data operation scene, creatively introducing a flash memory block grouping index concept into an original addressing mechanism. Specifically, different use scene branches are accurately identified through multiple condition constraints, and an exclusive addressing mechanism is adaptively used to improve the access efficiency and give consideration to the stability, so that the flexibility, the stability, the efficiency and the scene applicability of data addressing processing of the flash memory device are improved.
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Description

Technical Field

[0001] This application belongs to the field of flash memory technology, and particularly relates to a flash memory data processing method and system based on the diversity of filling content patterns. Background Art

[0002] In the data addressing mechanism of the storage module of a flash memory device, generally, the query of the logical address to the physical address is implemented based on a mapping table, and then the addressing is performed according to the queried physical address and the relevant data operations are completed.

[0003] Currently, in the field of large file data storage, flash memory devices have been able to stably store large amounts of data files. However, in scenarios with strong high-frequency data editing requirements such as video editing, the fast and non-linear front-end processing operations of editors on video data put pressure on the fast addressing operation performance of the flash memory controller, and situations such as delays or even freezes may occur, making it difficult to meet the user's usage requirements. Summary of the Invention

[0004] This application discloses a flash memory data processing method and system based on the diversity of filling content patterns, in order to improve the flexibility, stability, efficiency, and scenario applicability of the flash memory device for data addressing processing.

[0005] In a first aspect, this application provides a flash memory data processing method based on the diversity of filling content patterns, which is applied to a flash memory device. The method includes:

[0006] In response to a first operation instruction for first data of a first file stored in the flash memory device, determining that the file type of the first file is a preset file type; and

[0007] Determining whether the first operation instruction is the first operation after the first file is opened;

[0008] If it is determined that it is the first operation, querying a first mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash memory physical address; and performing a first addressing operation according to the first flash memory physical address; and performing the data operation indicated by the first operation instruction on the first data addressed.

[0009] In a second aspect, this application provides a flash memory data processing system, including a host and a flash memory device. The host is communicatively connected to the flash memory device. The flash memory device is configured to perform the following operations:

[0010] In response to a first operation instruction for first data of a first file stored in the flash memory device, determining that the file type of the first file is a preset file type; and determining whether the first operation instruction is the first operation after the first file is opened;

[0011] If it is determined that it is the first operation, query the first mapping table according to the first logical address in the first operation instruction to obtain the corresponding first flash physical address; and, perform a first addressing operation according to the first flash physical address; and, perform the data operation indicated by the first operation instruction on the addressed first data.

[0012] It can be seen that in the embodiments of the present application, compared with the existing data addressing mechanism of flash memory devices that do not distinguish the file types of the stored data, for the low-latency response requirements of the file data of specific file types stored in flash memory devices in high-frequency non-linear data operation scenarios, the concept of flash block grouping index is creatively introduced into the original addressing mechanism. Specifically, different usage scenario branches are accurately identified through multiple conditional constraints, and exclusive addressing mechanisms are adapted to improve the access efficiency while taking into account stability, which is beneficial to improving the flexibility, stability, efficiency and scenario applicability of flash memory devices for data addressing processing. Description of the Drawings

[0013] Figure 1 It is a schematic structural diagram of a flash memory device 1 provided by an embodiment of the present application.

[0014] Figure 2 It is a first processing flow diagram of a flash memory data processing method based on the diversity of filling content patterns provided by an embodiment of the present application.

[0015] Figure 3 It is a second processing flow diagram of a flash memory data processing method based on the diversity of filling content patterns provided by an embodiment of the present application;

[0016] Figure 4 It is a schematic diagram of a flash memory data processing system 100 provided by an embodiment of the present application. Detailed Embodiments

[0017] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0018] In the description, claims and the above-mentioned drawings of this application, terms such as "first", "second", etc. are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include steps or units not listed, or may optionally further include other steps or units inherent to these processes, methods, products or devices.

[0019] Reference to "embodiment" herein means that a particular feature, structure or characteristic described in connection with the embodiment can be included in at least one embodiment of this application. The phrase appearing at various positions in the description does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0020] The "and / or" in the embodiments of this application describes the association relationship of associated objects and indicates that three relationships can exist. For example, A and / or B can represent the following three situations: A exists alone; A and B exist simultaneously; B exists alone. Among them, A and B can be singular or plural.

[0021] In the embodiments of this application, the symbol " / " can represent an "or" relationship between the associated objects before and after. In addition, the symbol " / " can also represent a division sign, that is, perform a division operation. For example, A / B can represent A divided by B.

[0022] The "at least one (item)" or its similar expression in the embodiments of this application refers to any combination of these items, including any combination of a single item (item) or plural items (items), and refers to one or more, and multiple refers to two or more. For example, at least one (item) of a, b or c can represent the following seven situations: a, b, c, a and b, a and c, b and c, a, b and c. Among them, each of a, b, c can be an element or a set containing one or more elements.

[0023] The "equal to" in the embodiments of this application can be used in conjunction with "greater than" and is applicable to the technical solutions adopted when it is greater than, or can also be used in conjunction with "less than" and is applicable to the technical solutions adopted when it is less than. When "equal to" is used in conjunction with "greater than", it is not used in conjunction with "less than"; when "equal to" is used in conjunction with "less than", it is not used in conjunction with "greater than".

[0024] The present application provides a method and system for compliant retrieval of product images based on intelligent segmentation of foreground objects, which can perform intelligent analysis and correlation identification on graphic objects in original product images, and actively eliminate redundant graphic objects with low actual correlation before searching, retaining graphic objects with high correlation for subsequent search construction. Furthermore, it can avoid the influence of redundant graphic objects on the complexity and accuracy of the search algorithm, which is beneficial to improving the accuracy of the system for processing product images to search for similar external design results and improving the algorithm efficiency.

[0025] The following will specifically describe the technical solutions of the present application and how the technical solutions of the present application solve the above technical problems in detail. These several specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below with reference to the accompanying drawings.

[0026] Currently, in the field of video data storage and data processing, flash memory devices have been able to stably store large amounts of video files. However, in video editing scenarios, the fast and non-linear front-end processing operations of editors on video data put pressure on the real-time addressing requirements of the flash memory controller, making it difficult to meet the user's usage needs.

[0027] To solve the above problems, the present application provides a flash memory data processing method based on the diversity of filling content patterns. In response to the low-latency response requirements of file data of specific file types stored in flash memory devices in high-frequency non-linear data operation scenarios, the concept of flash block grouping index is creatively introduced into the original addressing mechanism. Specifically, different usage scenario branches are accurately identified through multiple condition constraints, and an exclusive addressing mechanism is adapted to improve the access efficiency while taking into account stability, which is beneficial to improving the flexibility, stability, efficiency, and scenario applicability of flash memory devices for data addressing processing.

[0028] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a flash memory device 1 provided by an embodiment of the present application. As Figure 1 shown, the flash memory device 1 includes the flash memory controller 10, the flash memory cache module 30, and the flash memory storage module 50. The flash memory controller 10 writes data to the flash memory storage module 50 or reads data from the flash memory storage module 50 through the flash memory cache module 30. The flash memory storage module 50 includes flash blocks 51, and the flash blocks 51 include preset flash pages 511.

[0029] Among them, the flash memory device 1 can communicate with the host, process various data operation instructions from the host, so as to meet the data service requirements of the front end. For example, in a video editing scenario, the user can control the host through a peripheral device connected to the host to read the video data of the video file stored in the flash memory device 1, and can also control the host to instruct the flash memory device 1 to read the original video data or write video editing data through various operations on the front-end editing interface.

[0030] As Figure 2 shown, a schematic flowchart of a flash memory data processing method based on the diversity of filling content patterns provided by an embodiment of the present application can be applied to the flash memory controller 10 of the flash memory device 1 as Figure 1 shown. The method includes the following steps:

[0031] Step 201, in response to a first operation instruction for first data of a first file stored in the flash memory device, the flash memory device determines that the file type of the first file is a preset file type;

[0032] Among them, the first operation instruction can be, for example, a data read instruction, a data write instruction, a data delete instruction, etc., and is not limited to this. The file type can be, for example, a video file, an image file, an audio file, a text file, etc., and is not limited to this either.

[0033] Step 202, the flash memory device determines whether the first operation instruction is the first operation after the first file is opened;

[0034] Taking a video file as an example, after the user opens the video file, they generally view it for a period of time before determining the operation strategy for the current video file, and generally do not immediately enter a high-frequency non-explicit editing state during the initial operation stage.

[0035] Step 203, if it is determined that it is the first operation, query the first mapping table according to the first logical address in the first operation instruction to obtain the corresponding first flash memory physical address; and perform a first addressing operation according to the first flash memory physical address; and perform the data operation indicated by the first operation instruction on the addressed first data.

[0036] Among them, the first mapping table is used to store the mapping relationship between the logical address and the flash physical address. In the operating system architecture of the flash controller of the flash device, a Flash Translation Layer (FTL) will be specifically set up. The first mapping table is maintained through the FTL. The logical address refers to the address used in a program or software. It is a relative address provided by the operating system or programming language to the user program for identifying the location of relevant file data in memory, but it does not directly correspond to the actual storage location in physical memory. The physical address refers to the address where data is actually stored in the storage module of the flash device. It is the real location of the flash memory storage unit storing data and is used to support operations such as reading and writing data at the hardware level of the flash device.

[0037] Specifically, the first flash physical address may include the block number of the flash block in the flash storage module, the page number of the flash page, and the page offset of the flash unit for locating the flash page. The complete expression is, for example, (block number, page number, in-page offset).

[0038] In a possible example, as Figure 3 shown, the method further includes the following steps 204 to 208:

[0039] Step 204, if it is determined that it is not the first operation, obtain the second operation instruction that is adjacent and before the first operation instruction; and,

[0040] Step 205, determine whether the interval duration between the first operation instruction and the second operation instruction is less than a preset duration;

[0041] Among them, the preset duration is an empirical value set in advance, such as 200 milliseconds, 500 milliseconds, etc. For example, the empirical value can be obtained by the developer device or the flash controller or the host from the flash log of the flash device, extract multiple historical operation records for video file data from the flash log, perform statistical analysis on the multiple historical operation records to obtain the average interval duration of adjacent consecutive data operations in the high-frequency non-linear data operation scenario, and set this average interval duration as the aforementioned empirical value.

[0042] Step 206, if it is determined that the interval duration is less than the preset duration, detect whether the first data and the second data operated by the second operation instruction are continuously stored data;

[0043] In this possible example, detecting whether the first data and the second data operated by the second operation instruction are continuously stored data includes: determining an interval address distance according to the physical address information of the first data in the first operation instruction and the second physical address information of the second data in the second operation instruction; detecting whether the first data and the second data are continuously stored data according to the comparison result between the interval address distance and a preset interval address distance.

[0044] Among them, the continuously stored data means that the relationship between the logical address of the first data and the logical address of the second data is that the interval address distance is less than the preset interval address distance, such as an adjacent address relationship, or an adjacent flash page relationship. The preset interval address distance can be specifically determined by the flash memory controller obtaining the data size cached by the flash memory cache module in the current storage cache policy adopted by the flash memory device. For example, if the flash memory device queries the cache policy configuration information in the metadata and determines that the flash memory cache module can cache 3 flash pages of data each time in the cache for improving the response speed in linear data operations, then the data size of these 3 flash pages can be determined as the preset interval address distance.

[0045] For example, for a video file in the flash memory device, the flash memory cache module caches 6 flash pages of data corresponding to 2 image frames each time in the cache block, then the preset interval address distance is the sum of the storage spaces of these 6 flash pages.

[0046] It can be seen that in this example, since the judgment of continuously stored data fully considers the actual cache configuration of the flash memory cache module of the flash memory device, it can accurately identify data operation situations beyond the effective cache data range, improve the accuracy of condition identification, and improve the accuracy of processing flash memory data.

[0047] In a possible example, the method further includes:

[0048] If it is determined that the interval duration is not less than the preset duration, query a first mapping table according to the first logical address in the first operation instruction to obtain the corresponding first flash physical address; and perform a first addressing operation according to the first flash physical address; and perform the data operation indicated by the first operation instruction on the addressed first data;

[0049] If it is detected that the data is continuously stored data, address the first data from the flash memory cache data associated with the second data; and perform the data operation indicated by the first operation instruction on the addressed first data.

[0050] Among them, the flash cache data associated with the second data includes user cache data and mapping table cache data. Specifically, the flash device can first quickly query the first flash physical address of the first data from the cached mapping table cache data, and then directly query the first data carrying the ontology information or index information of the first flash physical address in the user cache data.

[0051] It can be seen that in this example, for the case where the interval duration is not less than the preset duration, the flash device has relatively sufficient time for data read and write operations. At this time, the first mapping table can be directly called for address mapping query and addressing, improving the accuracy of scenario recognition and the flexibility of processing. For the case where the first data and the second data are continuously stored data, the flash device can rely on the flash cache data pre-stored in the cache to quickly address the first data and complete the operation instruction, improving the timeliness of the flash device to process the branch data task.

[0052] Step 207, if it is detected that it is not the continuously stored data, query the second mapping table according to the first logical address in the first operation instruction to obtain the corresponding first flash block group index identifier and the second flash physical address;

[0053] Among them, the physical address indicated by the second flash physical address should be the same as the physical address indicated by the first flash physical address. And because the second flash physical address has the first flash block group index identifier to first constrain the group where the flash block is located, therefore, if the number of flash blocks included in the flash block group is small (such as less than the preset number), the flash controller can directly locate the corresponding flash page according to the flash page number, and then address the corresponding starting data position according to the page offset in the address. For the case where a single flash block group contains more flash blocks (such as greater than the preset number), the flash controller can query the flash block group index identifier of the redundant area of the preset flash page of the flash block according to the block number of the flash block to quickly locate the target flash block, and then further locate the target flash unit in the target flash page in the current target flash block according to the second flash physical address. It can be seen that the expression mode of the second flash physical address in the second mapping table can be dynamically set by the flash controller according to the actual number of flash blocks included in the flash block group during the creation stage, so as to better adapt to the addressing efficiency in different flash block content situations.

[0054] Among them, the preset flash page can be a flash page in the flash storage module preset for the flash block to store the configuration information of the flash block (for example, the first flash page among the multiple flash pages included in the flash block). This flash page can include a data area and a redundant area. Among them, the data area can be used to store the basic configuration information of the flash block, such as the block number of the flash block, the usage status of the flash block, etc. The redundant area is a reserved storage unit partition for storing special information.

[0055] Step 208: Perform a second addressing operation according to the first flash block grouping index identifier and the second flash physical address. Among them, the redundancy area of a preset flash page in the flash block storing the first file of the flash device is filled with the flash block grouping index identifier; and, perform the data operation indicated by the first operation instruction on the addressed first data; and, mark the unique usage status of the second mapping table within a preset time period.

[0056] Among them, the preset flash page of the flash block can be, for example, the first page among multiple flash pages of the flash block, including a data area and a redundancy area. Among them, the data area is specifically used to store the general configuration information of the flash block, and the redundancy area is used to store the first flash block grouping index identifier configured for the flash block.

[0057] Among them, the starting point of time of the preset time period is the time when performing the data operation indicated by the first operation instruction, and the ending point of time of the preset time period is determined according to the empirical duration. This empirical duration can be preset, such as by statistically analyzing the operation records in the video editing scenario to determine the average duration of a single non-linear data operation event (such as when searching for a target video frame, the continuous and rapid selection operation for multiple non-consecutive video frames of the entire video file), and determining this average duration as the empirical duration.

[0058] Among them, the identification information of the unique usage status can be cached in a specific cache block of the flash cache module and regularly read by the flash controller. After identification, validity timing is performed, and the timing duration is the aforementioned empirical duration.

[0059] In this possible example, the performing a second addressing operation according to the first flash block grouping index identifier and the second flash physical address includes: querying the redundancy area of the preset flash page of the flash block of the flash device according to the first flash block grouping index identifier to obtain multiple candidate flash blocks whose flash block grouping index identifiers match the first flash block grouping index identifier; addressing the multiple candidate flash blocks according to the second flash physical address to obtain the target flash cell of the target flash page of the target flash block where the first data is located.

[0060] It can be seen that in this example, the flash device can quickly locate multiple candidate flash blocks in the corresponding flash block grouping by using the first flash block grouping index identifier obtained by querying the second mapping table, and then address the multiple candidate flash blocks by using the second flash physical address to obtain the target flash cell of the target flash page of the target flash block where the first data is located. Since it is no longer necessary to scan and query all flash blocks one by one,

[0061] It can be seen that in the embodiments of the present application, compared with the existing data addressing mechanism of flash memory devices that do not distinguish the file types of the stored data, the present application, aiming at the low-latency response requirements of file data of specific file types stored in flash memory devices in high-frequency non-linear data operation scenarios, creatively introduces the concept of flash block grouping index in the original addressing mechanism. Specifically, different usage scenario branches are accurately identified through multiple conditional constraints, and an exclusive addressing mechanism is adapted to improve the access efficiency while taking into account stability, which is beneficial to improving the flexibility, stability, efficiency and scenario applicability of the flash memory device for data addressing processing.

[0062] In a possible example, the method further includes: obtaining the file type of the first file to be written to the flash memory device; creating a flash block grouping index for the data storage block of the first file according to the file type to obtain a flash block grouping index identifier; updating the first mapping table according to the logical address and the allocated flash physical address of the data of the first file to obtain the updated first mapping table; adding the flash block grouping index identifier to the first mapping table to obtain the second mapping table; and filling the flash block grouping index identifier in the redundant area of the preset flash page of the flash block storing the first file.

[0063] Among them, the file type can be, for example, a video file, an image file, an audio file, a text file, etc.

[0064] It can be seen that in this example, the flash memory device can exclusively create corresponding flash block grouping index identifiers for files of different file types, and then update the original first mapping table of the flash memory device according to the logical address and the allocated flash physical address of the file data to obtain the updated first mapping table; and adding the created flash block grouping index identifier to the first mapping table to obtain the second mapping table; finally, filling the flash block grouping index identifier in the redundant area of the preset flash page of the flash block storing the first file to support subsequent addressing operations, so as to improve the flexibility and applicability of the flash memory device for constructing flash block grouping index identifiers.

[0065] In this possible example, adding the flash block grouping index identifier to the first mapping table to obtain the second mapping table includes: obtaining the corresponding relationship between the flash block grouping index identifier and the flash physical address; and adding the flash block grouping index identifier to the corresponding mapping table entry in the first mapping table according to the corresponding relationship to obtain the second mapping table.

[0066] Among them, the management system of the flash memory device generally allocates exclusive storage blocks for storing mapping table data. For example, the first mapping table can be configured in the first storage block, and the second mapping table data can be configured in the second storage block. The first storage block and the second storage block are different storage blocks.

[0067] In specific implementation, after the second mapping table is created and stored in the second storage block, after the flash memory controller creates a new flash block group index identifier again, it can first determine the specific flash memory cells of the mapping table entry in the second storage block, and perform data filling for the specific flash memory cells to complete the update operation of the second mapping table.

[0068] It can be seen that in this example, the flash memory device can obtain the second mapping table according to the created flash block group index identifier and add it to the first mapping table.

[0069] In this possible example, the creating of the flash block group index for the data storage block of the first file according to the file type to obtain the first flash block group index identifier includes: determining a reference data unit for grouping the flash blocks of the first file according to the file type; dividing the data storage block of the first file into multiple flash block groups according to the reference data unit; creating a unique index identifier for each flash block group according to the data in each flash block group; and setting the unique index identifier as the flash block group index identifier of each flash block group.

[0070] Among them, the reference data unit can be, for example, an image data set corresponding to a single video frame, or a sound data set corresponding to a single audio frame, or a text data set corresponding to a single text page.

[0071] In this possible example, the specific implementation manner for the flash memory device to create a unique index identifier for each flash block group according to the data in each flash block group can be: the flash memory device first performs an image feature extraction operation on each image data set to obtain an image feature vector; then, the flash memory device uses a hash algorithm to convert the image feature vector into a fixed-length hash value; finally, the flash memory device sets the hash value as the first flash block group index identifier of each image frame data set.

[0072] Among them, common image feature extraction methods include feature extraction based on image content, such as color histograms, texture features, edge features, etc. For example, for a landscape video, key frames may contain significant features such as unique landmark buildings and beautiful natural landscapes. Through specific algorithms, these key frames are analyzed to extract feature vectors that can represent their unique content. These feature vectors will serve as an important basis for subsequent generation of fast index identifiers. The hash algorithm can map data of any length to a hash value of a fixed length, and has uniqueness and irreversibility. Common hash algorithms such as MD5, SHA-256, etc. Taking the SHA-256 algorithm as an example, the feature vector of the key frame is used as input, and after complex mathematical operations, a 256-bit hash value is generated. This hash value is like the "digital fingerprint" of the key frame and can uniquely identify the feature information of the key frame. The generated hash value is stored in the redundant area of the preset flash memory page as a fast index identifier.

[0073] It can be seen that in this example, the flash memory device can perform image feature extraction operations on each image data set to obtain image feature vectors; then, the flash memory device uses the hash algorithm to convert the image feature vectors into hash values of a fixed length; finally, the flash memory device sets the hash value as the first flash memory block group index identifier for each image frame data set, so that the index identifiers of each flash memory block group are unique, improving the addressing accuracy and stability.

[0074] In this possible example, dividing the data storage block of the first file into multiple flash memory block groups according to the reference data unit includes: obtaining the data size of the reference data unit and the storage capacity of the flash memory blocks of the flash memory device; configuring corresponding flash memory block groups for each image frame data set according to the data size, the storage capacity of the flash memory blocks, and the free flash memory blocks of the flash memory device.

[0075] For example, the resolution of a 4K video file is 4096×2160, each pixel occupies 24bit for calculation, and the size of the image data set of the video frame is 4096×2160×24bit = 2103861248bit, approximately 262982656 bytes, that is, 25920KB. If the flash memory block size is 64KB, it will approximately occupy 25920KB÷64KB = 405 flash memory blocks. Then the number of flash memory blocks included in each flash memory block group is 405. According to this number, the free flash memory blocks of the flash memory device can be grouped, so as to configure corresponding flash memory block groups for each image data set. And adjacent flash memory block groups do not contain the same flash memory blocks.

[0076] It can be seen that in this example, the flash memory device can be based on the data size of the reference data unit and the storage capacity of the flash memory blocks of the flash memory device; and then, according to the data size, the storage capacity of the flash memory blocks, and the free flash memory blocks of the flash memory device, configure corresponding flash memory block groups for each image frame data set, so that the flash memory block configuration is reasonable and does not conflict, improving the storage stability.

[0077] As Figure 4 shown, an embodiment of the present application further provides a flash memory data processing system 100. The flash memory data processing system 100 includes a host 2 and a flash memory device 1. The host 2 is communicatively connected to the flash memory device 1.

[0078] The flash memory device 1 is used to perform the following operations:

[0079] In response to a first operation instruction for first data of a first file stored in the flash memory device, determine that the file type of the first file is a preset file type; and determine whether the first operation instruction is the first operation after the first file is opened;

[0080] If it is determined that it is the first operation, query a first mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash memory physical address; and perform a first addressing operation according to the first flash memory physical address; and perform the data operation indicated by the first operation instruction on the addressed first data;

[0081] If it is determined that it is not the first operation, obtain a second operation instruction that is adjacent and before the first operation instruction; and determine whether the interval duration between the first operation instruction and the second operation instruction is less than a preset duration;

[0082] If it is determined that the interval duration is less than the preset duration, detect whether the first data and the second data operated by the second operation instruction are continuously stored data;

[0083] If it is detected that they are not the continuously stored data, query a second mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash memory block group index identifier and a second flash memory physical address; and perform a second addressing operation according to the first flash memory block group index identifier and the second flash memory physical address, wherein a redundancy area of a preset flash memory page in the flash memory block storing the first file of the flash memory device is filled with the flash memory block group index identifier; and perform the data operation indicated by the first operation instruction on the addressed first data; and mark the unique usage state of the second mapping table within a preset period.

[0084] In a possible example, the flash memory device is further configured to perform the following operations:

[0085] If it is determined that the interval duration is not less than the preset duration, query a first mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash physical address; and, perform a first addressing operation according to the first flash physical address; and, perform a data operation indicated by the first operation instruction on the addressed first data;

[0086] If it is detected that the data is continuously stored, address the first data from the flash cache data associated with the second data; and, perform a data operation indicated by the first operation instruction on the addressed first data.

[0087] In a possible example, the flash memory device is further configured to perform the following operations:

[0088] Obtain the file type of the first file to be written to the flash memory device;

[0089] Create a flash block grouping index for the data storage block of the first file according to the file type to obtain a flash block grouping index identifier;

[0090] Update the first mapping table according to the logical address and the allocated flash physical address of the data of the first file to obtain the updated first mapping table;

[0091] Add the flash block grouping index identifier to the first mapping table to obtain the second mapping table;

[0092] Fill the redundancy area of the preset flash page of the flash block storing the first file with the flash block grouping index identifier.

[0093] It should be noted that, for the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that this application is not limited by the described action sequence, because according to this application, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0094] In the above embodiments, the descriptions of the various embodiments have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0095] In several embodiments provided by the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the above division of units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling, direct coupling, or communication connection to each other can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in an electrical or other form.

[0096] The units described above as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0097] In addition, in each embodiment of the present application, the functional units can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0098] If the above integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the above methods in each embodiment of the present application. And the aforementioned memory includes: USB flash drives, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), mobile hard disks, magnetic disks, or optical discs and other media that can store program codes.

[0099] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing relevant hardware through a program. This program can be stored in a computer-readable memory. The memory can include: flash drives, read-only memories (abbreviation: ROM), random access memories (abbreviation: RAM), magnetic disks, or optical discs, etc.

[0100] The embodiments of the present application have been introduced in detail above. Specific examples are used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A flash memory data processing method based on the diversity of filled content patterns, characterized in that Applied to a flash memory device, the method includes: In response to a first operation instruction for first data of a first file stored in the flash memory device, determining that the file type of the first file is a preset file type; and determining whether the first operation instruction is the first operation after the first file is opened; If it is determined that it is the first operation, querying a first mapping table according to a first logical address in the first operation instruction to obtain a corresponding first flash physical address; and performing a first addressing operation according to the first flash physical address; and performing a data operation indicated by the first operation instruction on the addressed first data.

2. The method according to claim 1, characterized in that, The method further includes: If it is determined that it is not the first operation, obtaining a second operation instruction that is adjacent and before the first operation instruction; and determining whether an interval duration between the first operation instruction and the second operation instruction is less than a preset duration; If it is determined that the interval duration is less than the preset duration, detecting whether the first data and second data operated by the second operation instruction are continuously stored data; If it is detected that they are not the continuously stored data, querying a second mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash block group index identifier and a second flash physical address; and performing a second addressing operation according to the first flash block group index identifier and the second flash physical address, wherein a redundancy area of a preset flash page in a flash block storing the first file of the flash memory device is filled with the flash block group index identifier; and performing a data operation indicated by the first operation instruction on the addressed first data; and marking a unique usage state of the second mapping table within a preset period.

3. The method according to claim 2, wherein The method further includes: If it is determined that the interval duration is not less than the preset duration, querying a first mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash physical address; and performing a first addressing operation according to the first flash physical address; and performing a data operation indicated by the first operation instruction on the addressed first data; If it is detected that they are the continuously stored data, addressing the first data from flash cache data associated with the second data; and performing a data operation indicated by the first operation instruction on the addressed first data.

4. The method according to claim 3, wherein The method further includes: Obtaining the file type of the first file to be written to the flash memory device; Creating a flash block group index for a data storage block of the first file according to the file type to obtain a flash block group index identifier; Updating the first mapping table according to a logical address and an assigned flash physical address of data of the first file to obtain the updated first mapping table; Adding the flash block group index identifier to the first mapping table to obtain the second mapping table; Filling the redundancy area of the preset flash page in the flash block storing the first file with the flash block group index identifier.

5. The method according to claim 4, characterized in that Adding the flash memory block grouping index identifier to the first mapping table to obtain the second mapping table includes: Obtaining the correspondence between the flash memory block grouping index identifier and the flash physical address; Adding the flash memory block grouping index identifier to the corresponding mapping table entry in the first mapping table according to the correspondence to obtain the second mapping table.

6. The method according to claim 5, wherein Creating a flash memory block grouping index for the data storage block of the first file according to the file type to obtain a flash memory block grouping index identifier includes: Determining a reference data unit for grouping flash memory blocks of the first file according to the file type; Dividing the data storage block of the first file into multiple flash memory block groups according to the reference data unit; Creating a unique index identifier for each flash memory block group according to the data in each flash memory block group; Setting the unique index identifier as the flash memory block grouping index identifier of each flash memory block group.

7. The method according to claim 6, characterized in that Dividing the data storage block of the first file into multiple flash memory block groups according to the reference data unit includes: Obtaining the data size of the reference data unit and the storage capacity of the flash memory blocks of the flash memory device; Configuring a corresponding flash memory block group for each image frame data set according to the data size, the storage capacity of the flash memory block, and the free flash memory blocks of the flash memory device.

8. The method according to any one of claims 1 to 7, characterized in that, Performing a second addressing operation according to the first flash memory block grouping index identifier and the second flash physical address includes: Querying the redundant area of the preset flash page of the flash memory blocks of the flash memory device according to the first flash memory block grouping index identifier to obtain multiple candidate flash memory blocks whose flash memory block grouping index identifiers match the first flash memory block grouping index identifier; Addressing the multiple candidate flash memory blocks according to the second flash physical address to obtain the target flash memory unit of the target flash memory page of the target flash memory block where the first data is located.

9. A flash memory data processing system, characterized in that, Including a host and a flash memory device, the host is communicatively connected to the flash memory device, wherein the flash memory device is configured to perform the following operations: In response to a first operation instruction for first data of a first file stored in the flash memory device, determining that the file type of the first file is a preset file type; and determining whether the first operation instruction is the first operation after the first file is opened; If it is determined that it is the first operation, querying a first mapping table according to the first logical address in the first operation instruction to obtain a corresponding first flash physical address; performing a first addressing operation according to the first flash physical address; and performing a data operation indicated by the first operation instruction on the addressed first data.

10. The system according to claim 9, wherein The flash memory device is further configured to perform the following operations: If it is determined that it is not the first operation, obtaining a second operation instruction that is adjacent and before the first operation instruction; and determining whether the interval duration between the first operation instruction and the second operation instruction is less than a preset duration; If it is determined that the interval duration is less than the preset duration, detecting whether the first data and the second data operated by the second operation instruction are continuously stored data; If it is detected that the data is not the continuously stored data, query the second mapping table according to the first logical address in the first operation instruction to obtain the corresponding first flash block group index identifier and the second flash physical address; and perform a second addressing operation according to the first flash block group index identifier and the second flash physical address, wherein a redundancy area of a preset flash page in the flash block storing the first file of the flash device is filled with the flash block group index identifier; and perform the data operation indicated by the first operation instruction on the addressed first data; and mark the unique usage status of the second mapping table within a preset period.

Citation Information

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