Display device

Abstract

The embodiment of the invention provides a display device which comprises a gate drive circuit, a data drive circuit, a power circuit, a plurality of sub-pixels and corresponding sub-pixel drive circuits, and each sub-pixel drive circuit comprises a light-emitting duration control circuit and a light-emitting drive circuit. The light-emitting duration control circuit adjusts the light-emitting driving duration of the light-emitting duration control signal based on the obtained light-emitting duration adjustment data, so that the duration of the light-emitting driving circuit for generating the driving signal is adjusted, and the light-emitting brightness of the sub-pixel is controlled. According to the invention, on the basis of ensuring the current consistency of the driving signal of the light emitting driving circuit, the sub-pixel is controlled to generate the brightness corresponding to different gray scales, the above process ensures the light emitting wavelength consistency of the sub-pixel, and the sub-pixel brightness adjustment and gray scale control effects are improved.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of display technologies, and in particular, to a display device. Background Art

[0002] In recent years, due to the advantages of micro-LEDs such as smaller device size, faster response speed, higher luminous efficiency, stronger stability, and longer service life compared to AMOLED (Active-matrix organic light emitting diode), the display application field based on micro-LEDs has developed rapidly and become a research hotspot for display devices.

[0003] The pixel driving circuit of a micro-LED can drive the micro-LED to emit light through a combination of a Pulse Width Modulation (PWM) driving circuit and a Pulse Amplitude Modulation (PAM) driving circuit. Among them, the PWM driving circuit controls the light-emitting duration of the micro-LED, and the PAM driving circuit controls the light-emitting current of the micro-LED. The micro-LED determines its light-emitting brightness based on the light-emitting duration and the light-emitting current.

[0004] However, when the PWM driving circuit uses a dual light-emitting control signal selection circuit to adjust the light emission of the micro-LED, it can only determine two light-emitting durations of the micro-LED based on two fixed light-emitting control signals. For displays with different gray levels, the micro-LED adjusts its light-emitting current through the PAM driving circuit to determine the corresponding light-emitting brightness. Since the light wave lengths generated by the micro-LED using different light-emitting currents are inconsistent, the brightness adjustment and gray level control effects are poor. Summary of the Invention

[0005] The present application provides a display device to solve the technical problem of poor brightness adjustment and gray level control effects of the pixel driving circuit.

[0006] Embodiments of the present application provide a display device, including:

[0007] a gate driving circuit, a data driving circuit, a power supply circuit, at least one sub-pixel, and a corresponding sub-pixel driving circuit;

[0008] The sub-pixel driving circuit includes:

[0009] a light-emitting duration control circuit, electrically connected to the gate driving circuit, the data driving circuit, and the power supply circuit, configured to obtain a light-emitting duration control signal and light-emitting duration adjustment data, and adjust the light-emitting driving duration of the light-emitting duration control signal based on the light-emitting duration adjustment data;

[0010] A light-emitting driving circuit, electrically connected to the light-emitting duration control circuit and the gate driving circuit, is configured to adjust the duration of generating a driving signal within a display period according to the adjusted light-emitting duration control signal;

[0011] The sub-pixel is electrically connected to the light-emitting driving circuit and is configured to emit light according to the driving signal.

[0012] In the above technical solution, in a provided display device, the sub-pixel driving circuit includes a light-emitting duration control circuit and a light-emitting driving circuit. The light-emitting duration control circuit adjusts the light-emitting driving duration of the light-emitting duration control signal based on the obtained light-emitting duration adjustment data, thereby adjusting the duration of the driving signal generated by the light-emitting driving circuit to control the light-emitting brightness of the sub-pixel. Due to the adjustability of the light-emitting duration control circuit, on the basis of ensuring the current consistency of the driving signal of the light-emitting driving circuit, the brightness corresponding to different gray levels generated by the sub-pixel can be controlled. The above process ensures the consistency of the light wave lengths of the light emitted by the sub-pixels and improves the light-emitting brightness adjustment and gray level control effects of the sub-pixels.

[0013] In a feasible implementation manner, the light-emitting duration control circuit includes at least one signal adjustment unit;

[0014] The light-emitting duration control circuit is configured to obtain a light-emitting duration control signal and light-emitting duration adjustment data, and adjust the light-emitting driving duration of the light-emitting duration control signal based on the light-emitting duration adjustment data, including:

[0015] The signal adjustment unit is electrically connected to the data driving circuit, the power supply circuit, and the gate driving circuit, and is configured to obtain the light-emitting duration adjustment data, the light-emitting duration control signal, and an adjustable power supply signal, and control the duration of outputting the light-emitting duration control signal by the light-emitting duration adjustment data and the adjustable power supply signal.

[0016] In the above technical solution, the light-emitting duration control circuit adjusts the light-emitting driving duration of the obtained light-emitting duration control signal through at least one signal adjustment unit to meet the duration requirements of the light-emitting driving circuit for generating driving signals based on the same current for different display gray levels, thereby adjusting the light-emitting brightness of the sub-pixels, ensuring the consistency of the light wave lengths of the light emitted by the sub-pixels, and improving the light-emitting brightness adjustment and gray level control effects of the sub-pixels.

[0017] In a feasible implementation manner, the signal adjustment unit includes a signal processing unit and a signal storage unit;

[0018] The signal adjustment unit is configured to obtain the emission duration adjustment data, the emission duration control signal, and the adjustable power supply signal, and control the duration of its output of the emission duration control signal according to the emission duration adjustment data and the adjustable power supply signal, including:

[0019] The signal processing unit is electrically connected to the data driving circuit and the gate driving circuit, and is configured to obtain the emission duration adjustment data and output the emission duration adjustment data after threshold compensation;

[0020] The signal storage unit is electrically connected to the power supply circuit and the signal processing unit, and is configured to obtain the adjustable power supply signal and the emission duration adjustment data after threshold compensation, and generate a first control signal based on the adjustable power supply signal and the emission duration adjustment data after threshold compensation;

[0021] The signal processing unit is also electrically connected to the light emission driving circuit, and is configured to obtain the emission duration control signal and the first control signal, and control its output of the emission duration control signal to the light emission driving circuit by the first control signal.

[0022] In the above technical solution, the signal adjustment unit performs threshold compensation on the emission duration adjustment data through the signal processing unit to ensure the accuracy of determining the generation duration of the driving signal based on the emission duration adjustment data, and then adjusts the state of the first control signal according to the adjustable power supply signal and the emission duration adjustment data after threshold compensation to adjust the duration of the signal processing unit outputting the light emission control signal to the light emission driving circuit, so as to adjust the duration of the light emission driving circuit generating the driving signal. When the emission currents of different pixels in the display device in each display period can be kept consistent, different gray-scale brightnesses can be generated by adjusting the emission duration of the sub-pixels. The above process ensures the consistency of the emission light wave lengths of the sub-pixels and improves the effect of adjusting the brightness of the sub-pixels and controlling the gray scale.

[0023] In the display device provided by the embodiment of the present application, the sub-pixel driving circuit includes a light emission duration control circuit and a light emission driving circuit. The light emission duration control circuit adjusts the light emission driving duration of the light emission duration control signal based on the obtained light emission duration adjustment data, so as to adjust the duration of the light emission driving circuit generating the driving signal to control the light emission brightness of the sub-pixel. Due to the adjustable nature of the light emission duration control circuit, different gray-scale corresponding brightnesses can be controlled for the sub-pixels on the basis of ensuring the current consistency of the driving signal of the light emission driving circuit. The above process ensures the consistency of the emission light wave lengths of the sub-pixels and improves the effect of adjusting the brightness of the sub-pixels and controlling the gray scale. Description of the Drawings

[0024] The accompanying drawings herein are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0025] Figure 1 Schematic structural diagram of a display provided by the present application according to an exemplary embodiment;

[0026] Figure 2 Schematic structural diagram of a display provided by the present application according to another exemplary embodiment;

[0027] Figure 3 Circuit structure diagram of a traditional pixel driving circuit provided by the present application according to an exemplary embodiment;

[0028] Figure 4A Schematic structural diagram of a P-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0029] Figure 4B Schematic structural diagram of an N-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0030] Figure 5A Driving signal timing diagram of a P-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0031] Figure 5B Driving signal timing diagram of an N-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0032] Figures 6A to 6D Operating state diagram of a P-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0033] Figure 7A Schematic structural diagram of a P-type pixel driving circuit provided by the present application according to another exemplary embodiment;

[0034] Figure 7B Schematic structural diagram of a P-type pixel driving circuit provided by the present application according to another exemplary embodiment.

[0035] Through the above accompanying drawings, specific embodiments of the present application have been shown, and there will be more detailed descriptions hereinafter. These accompanying drawings and textual descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. Detailed implementation manners

[0036] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0037] It should be noted that in this document, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements that are inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device comprising such element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined based on their explanations in the specific embodiments or further in combination with the context of the specific embodiments. It should be further understood that the terms "including" and "comprising" indicate the presence of features, steps, operations, elements, components, items, types, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, types, and / or groups.

[0038] In the description of the present disclosure, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present disclosure, the meaning of "a plurality" is two or more unless otherwise specifically defined. The terms "or" and "and / or" are interpreted inclusively, or mean any one or any combination. Thus, "A, B or C" or "A, B and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A, B and C". An exception to this definition occurs only when the combination of elements, functions, steps or operations is inherently mutually exclusive in some way.

[0039] It should be understood that the specific embodiments described herein are merely for explaining the present application and are not used to limit the present application.

[0040] In recent years, due to the advantages of micro-LEDs such as smaller device size, faster response speed, higher luminous efficiency, stronger stability, and longer service life compared to AMOLED (Active-matrix organic light emitting diode), the display application field based on micro-LEDs has developed rapidly and become a research hotspot for display devices.

[0041] The structural schematic diagram of the display device is as shown in Figure 1 and Figure 2 and includes a control circuit 250, a data driving circuit 20, a gate driving circuit 30, a display panel 40, and a power supply circuit 280. The control circuit 250 is electrically connected to the data driving circuit 20, the control circuit 250 is electrically connected to the gate driving circuit 30, and the display panel 40 is electrically connected to the data driving circuit 20, the gate driving circuit 30, and the power supply circuit 280.

[0042] A power line 90, a plurality of gate lines 60, a plurality of data lines 50, and a plurality of pixel units 80 are provided on the display panel. The plurality of pixel units 80 are arranged in an array, and each pixel unit 80 is located in the area where the gate line 60 and the data line 50 intersect.

[0043] The gate driving circuit 30 is electrically connected to the gate line 60. The gate driving circuit 30 is configured to obtain a clock signal and a trigger signal from the control circuit 250, generate a gate driving signal according to the clock signal and the trigger signal, and transmit the gate driving signal to the corresponding pixel unit 80 through the gate line 60 to control the transistor in the pixel unit 80 to conduct or cut off.

[0044] More specifically, the gate driving circuit 30 can be made into a separate gate driver integrated circuit (Gate Driver Integrated Circuit, abbreviated as: GDIC). The gate driving circuit 30 can also be integrated in the display panel. The method of integrating the gate driving circuit 30 in the display panel is called gate-in-panel (abbreviated as: GIP). In some cases, the GDIC can be electrically connected to the display panel 40 through the COG process (Chip on Glass), and the GDIC can be electrically connected to the display panel 40 through the COF process (Chip on Film). In the COF process, the components are electrically connected to the display panel 40 through a flexible printed circuit (Flexible Printed Circuit, abbreviated as: FPC).

[0045] The data driving circuit 20 is a circuit that drives the data lines 50, and is configured to obtain display data from the control circuit 250, convert it into an analog data voltage (Vdata), and transmit this analog data voltage to the corresponding pixel unit 80 through the data lines 50, so that the sub-pixels 813 in the pixel unit 80 emit light according to this analog data voltage. The magnitude of the analog data voltage determines the emission brightness of the sub-pixel 813.

[0046] The data driving circuit 20 may include one or more source driver integrated circuits (SDICs). Each source driver integrated circuit SDIC may include a shift register, a latch circuit, a digital-to-analog converter, an output buffer, and the like.

[0047] The power supply circuit 280 is a circuit that provides a stable electrical signal, and is configured to provide corresponding required power supply signals to the display panel 40, the control circuit 250, the data driving circuit 20, and the gate driving circuit 30.

[0048] In one case, each pixel unit 80 includes three sub-pixel circuits 810, which are respectively used to display red light, blue light, and green light. In another case, each pixel unit 80 includes four sub-pixel circuits 810, which are respectively used to display red light, blue light, green light, and white light. No specific limitation is made here.

[0049] Among them, the emission color of each sub-pixel unit 810 is determined by the attributes of the sub-pixels 813 therein. The sub-pixel 813 can be any light-emitting device, including but not limited to OLEDs and micro LEDs.

[0050] A micro LED refers to a micro light-emitting body fabricated using an inorganic semiconductor layer. A micro LED generally may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer. The structure of such a micro LED can be diverse, such as vertical type, horizontal type, flip chip type, etc., and is not particularly limited to a specific structure.

[0051] More specifically, a sub-pixel circuit 810 includes a sub-pixel driving circuit 814 and a sub-pixel 813. The sub-pixel driving circuit 814 is electrically connected to the sub-pixel 813, and the sub-pixel driving circuit 814 is configured to drive the sub-pixel 813 to emit light. The signals required by the sub-pixel driving circuit 814 include a driving signal, a scan signal (Scan), and an emission control signal (Emission, abbreviated as EM control signal).

[0052] Among them, the driving signal can be generated by the control circuit 250 or obtained from the outside, including but not limited to start pulse signals, clock signals, and enable signals. The light emission control signal can be a global signal provided by the control circuit 250 or a signal generated by the gate driving circuit 30, which is not specifically limited here. The scanning signal is a successive displacement signal generated by the gate driving circuit 30.

[0053] When the EM control signal is a global signal generated by the control circuit 250, the gate driving circuit 30 obtains the EM control signal from the control circuit 250 and transmits the EM control signal to the corresponding pixel driving circuit 814 through the gate line 60.

[0054] If both the EM control signal and the scanning signal are generated by the gate driving circuit 30, the gate driving circuit 30 includes a scanning signal generation circuit 301 and an EM control signal generation circuit 302. The scanning signal generation circuit 301 outputs the scanning signal, and the EM control signal generation circuit 302 outputs the EM control signal.

[0055] Figure 3 This is a circuit structure diagram of a traditional pixel driving circuit provided by this application according to an exemplary embodiment, including a PWM driving circuit and a PAM driving circuit.

[0056] The PWM driving circuit includes a tenth transistor T10, an eighteenth transistor T18, a nineteenth transistor T19, a twenty-first transistor T21, a second capacitor C2, and a third capacitor C3. The PWM driving circuit has a 7T1C circuit structure.

[0057] Taking each transistor as a P-type transistor as an example, the circuit connection relationship and operation principle of the traditional pixel driving circuit are explained.

[0058] The first end of the tenth transistor T10 is electrically connected to the data driving circuit, and the control end is electrically connected to the gate driving circuit. It is configured to obtain an initialization signal RESET from its control end, obtain first driving data from the first end, conduct when the initialization signal RESET is at a high level, and output the first driving data from its second end.

[0059] The first end of the second capacitor C2 is electrically connected to the second end of the tenth transistor T10 and the control end of the eighteenth transistor T18, and the second end is electrically connected to a stable power supply. It is configured to store the first driving data.

[0060] The first end of the eighteenth transistor T18 is electrically connected to the gate driving circuit. It is configured to obtain a second light emission duration control signal from its first end, conduct when the first driving data is at a high level, and output the second light emission duration control signal from its second end.

[0061] The first terminal of the twenty-first transistor T21 is electrically connected to the data driving circuit, and the control terminal is electrically connected to the gate driving circuit. It is configured to obtain a third gating signal from its control terminal, obtain second driving data from the first terminal, conduct when the third gating signal is at a high level, and output the second driving data from its second terminal.

[0062] The first terminal of the third capacitor C3 is electrically connected to the second terminal of the twenty-first transistor T21 and the control terminal of the nineteenth transistor T19, and the second terminal is electrically connected to the stable power supply. It is configured to store the second driving data.

[0063] The first terminal of the nineteenth transistor T19 is electrically connected to the gate driving circuit, and the second terminal is electrically connected to the second terminal of the eighteenth transistor T18 and the input terminal of the light emission duration control signal of 7T1C. It is configured to obtain a first light emission duration control signal from its first terminal, conduct when the second driving data is at a high level, and output the first light emission duration control signal from its second terminal.

[0064] Among them, the first light emission duration control signal and the second light emission duration control signal are two electrical signals with different duty cycles provided by the gate driving circuit.

[0065] When the PWM driving circuit is operating, the levels of the first driving data and the second driving data obtained from the data driving circuit are different. For example: the first driving data is at a high level and the second driving data is at a low level. Then the eighteenth transistor T18 conducts, and the nineteenth transistor T19 turns off. The light emission duration driving signal obtained by 7T1C is the second light emission duration control signal transmitted by the eighteenth transistor T18.

[0066] Since the light emission duration of 7T1C has only two cases, namely the high level duration of the first light emission duration control signal and the high level duration of the second light emission duration control signal, when the pixel circuit displays different gray levels, it is also necessary to determine the current value of the driving signal generated by it according to the third driving data obtained from the data driving circuit, so as to drive the sub-pixel connected to 7T1C to generate the light emission brightness corresponding to the gray level.

[0067] Since the light wave lengths generated by the micro LEDs in the sub-pixels are inconsistent with different light emission currents, when the display device displays a frame of image, the light waves emitted by different pixels are inconsistent, resulting in poor brightness adjustment and gray level control effects.

[0068] To solve the above problems, the present application provides a display device to solve the above technical problems. The technical concept of the present application is: to provide a sub-pixel driving circuit, including a light-emitting duration control circuit and a light-emitting driving circuit. The light-emitting duration control circuit adjusts the light-emitting driving duration of the light-emitting driving signal based on the obtained light-emitting duration adjustment data, thereby adjusting the duration of the driving signal generated by the light-emitting driving circuit to control the light-emitting brightness of the sub-pixel. Due to the adjustable nature of the light-emitting duration control circuit, on the basis of ensuring the current consistency of the driving signal of the light-emitting driving circuit, it is possible to control the brightness corresponding to different gray levels generated by the sub-pixel. The above process ensures the consistency of the light wave lengths of the sub-pixel light emission and improves the effect of sub-pixel brightness adjustment and gray level control.

[0069] The pixel driving circuit proposed by the present application will be explained in detail below. Figure 4A This is a schematic structural diagram of a pixel driving circuit provided by the present application according to an exemplary embodiment. All transistors in this pixel driving circuit are P-type transistors.

[0070] As Figure 4A shown, the pixel driving circuit provided by the present application includes a light-emitting duration control circuit 803 and a light-emitting driving circuit 804.

[0071] The light-emitting duration control circuit 803 is electrically connected to the power line 90, the data line 50, and the gate line 60. The light-emitting duration control circuit 803 is configured to, upon obtaining the light-emitting duration control signal EM1 and the light-emitting duration adjustment data PWMD, adjust the light-emitting driving duration of the light-emitting duration control signal EM1 based on the light-emitting duration adjustment data PWMD.

[0072] The light-emitting duration adjustment data PWMD is data that further limits the total light-emitting driving duration of the light-emitting duration control signal EM1. In the drawings, the light-emitting duration control signal after adjusting the light-emitting driving duration is marked as EM2 for distinction.

[0073] Among them, the light-emitting driving duration of the light-emitting duration control signal EM2 is less than or equal to the light-emitting driving duration of the light-emitting duration control signal EM1.

[0074] The light-emitting driving circuit 804 is electrically connected to the light-emitting duration control circuit 803 and the gate line 60, and is configured to adjust the duration of the driving signal generated within the display period according to the adjusted light-emitting duration control signal EM2.

[0075] The sub-pixel LED is electrically connected to the light-emitting driving circuit 804 and is configured to emit light according to the driving signal.

[0076] Based on the above circuit structure, when the display device displays the same frame of the display screen, the current values of the driving signals generated by each sub-pixel driving circuit are the same, and different gray levels are displayed by adjusting the light-emitting duration of the driving signal.

[0077] In the above technical solution, the sub-pixel driving circuit includes a light-emitting duration control circuit and a light-emitting driving circuit. The light-emitting duration control circuit adjusts the light-emitting driving duration of the light-emitting duration control signal based on the obtained light-emitting duration adjustment data, so as to adjust the duration of the driving signal generated by the light-emitting driving circuit, and control the light-emitting brightness of the sub-pixel. Due to the adjustability of the light-emitting duration control circuit, on the basis of ensuring the current consistency of the driving signal of the light-emitting driving circuit, the brightness corresponding to different gray levels generated by the sub-pixel can be controlled. The above process ensures the consistency of the light wave length of the sub-pixel, and improves the effect of adjusting the brightness of the sub-pixel and controlling the gray level.

[0078] The light-emitting duration control circuit 803 includes at least one signal adjustment unit 8032.

[0079] The signal adjustment unit 8032 is electrically connected to the data line 50, the power line 90, and the gate line 60, and is configured to obtain the light-emitting duration adjustment data PWMD from the data line 50, obtain the light-emitting duration control signal EM1 from the gate line 60, obtain the adjustable power supply signal SWEEP from the power line 90, and control the duration of its output light-emitting duration control signal EM2 by the light-emitting duration adjustment data PWMD and the adjustable power supply signal SWEEP.

[0080] Among them, the signal adjustment unit 8032 obtains the light-emitting duration control signal EM1 from the first input end, obtains the adjustable power supply signal SWEEP from the second input end. The first input ends of the signal adjustment units 8032 are electrically connected to obtain the same light-emitting duration control signal EM1 at the same time. The second input ends of the signal adjustment units 8032 are electrically connected to adjust the duration of the corresponding output light-emitting duration control signal EM2 according to the light-emitting duration adjustment data PWMD based on the same change condition of the adjustable power supply signal SWEEP.

[0081] The light-emitting duration control circuit adjusts the light-emitting driving duration of the obtained light-emitting duration control signal through at least one signal adjustment unit, so as to meet the duration requirement of the light-emitting driving circuit for generating a driving signal based on the same current for different display gray levels, thereby adjusting the light-emitting brightness of the sub-pixel, ensuring the consistency of the light wave length of the sub-pixel, and improving the effect of adjusting the brightness of the sub-pixel and controlling the gray level.

[0082] In some embodiments, the light-emitting duration control circuit further includes a signal transmission unit 8031.

[0083] The signal transmission unit 8031 is electrically connected between the first input end of the signal adjustment unit 8032 and the gate driving circuit, and is electrically connected to the gate line 60 and at least one signal adjustment unit 8032, and is configured to obtain the light-emitting duration control signal, and control its output of the light-emitting duration control signal to the signal adjustment unit by the light-emitting duration control signal.

[0084] The signal conditioning unit includes a signal processing unit and a signal storage unit. The signal processing unit includes a write transistor T2, a driving transistor T3, and a compensation transistor T4. The signal storage unit includes a storage capacitor C2.

[0085] The signal processing unit is electrically connected to a data line 50 and a gate line 60, and is configured to obtain the light emission duration adjustment data PWMD from the data line 50 and output the light emission duration adjustment data PWMD after threshold compensation.

[0086] Wherein, the threshold is the threshold voltage of the driving transistor T3.

[0087] The signal storage unit is electrically connected to a power supply line 90 and the signal processing unit, and is configured to obtain an adjustable power supply signal SWEEP and the light emission duration adjustment data PWMD after threshold compensation from the power supply line 90, and generate and output a first control signal to the signal processing unit based on the adjustable power supply signal SWEEP and the light emission duration adjustment data PWMD after threshold compensation.

[0088] The signal processing unit is further electrically connected to a light emission driving circuit 804, and is configured to obtain a light emission duration control signal EM1 and the first control signal, and control the period of outputting the light emission duration control signal EM1 by the first control signal.

[0089] The output light emission duration control signal EM1 is determined as an adjusted light emission duration control signal EM2, and the length of the light emission driving period of this signal is used as the light emission driving duration of the light emission duration control signal.

[0090] The light emission driving circuit 804 is configured to output a driving signal during an overlapping period of the light emission driving periods of the light emission duration control signals EM2 output by at least one signal processing unit to drive the sub-pixel LEDs electrically connected thereto to emit light.

[0091] In the above technical solution, the signal conditioning unit performs threshold compensation on the light emission duration adjustment data through the signal processing unit to ensure the accuracy of determining the generation duration of the driving signal based on the light emission duration adjustment data, and then adjusts the state of the first control signal according to the adjustable power supply signal and the light emission duration adjustment data after threshold compensation to adjust the duration of the signal processing unit outputting the light emission control signal to the light emission driving circuit, thereby adjusting the duration of the light emission driving circuit generating the driving signal. When the light emission currents of different pixels in the display device can be kept consistent in each display cycle, different gray-scale brightnesses can be generated by adjusting the light emission duration of the sub-pixels. The above process ensures the consistency of the light wave lengths of the sub-pixels emitting light and improves the light emission brightness adjustment and gray-scale control effects of the sub-pixels.

[0092] In some embodiments, the signal conditioning unit further includes an initialization unit, and the initialization unit includes a first initialization transistor T1.

[0093] The initialization unit is electrically connected to the power supply circuit, the signal processing unit, and the signal storage unit, and is configured to obtain an initial electrical signal and initialize the signal processing unit and the signal storage unit based on the initial electrical signal.

[0094] By initializing the signal processing unit and the signal storage unit, the initialization unit prevents the influence of residual charges on the accuracy of the written data when writing data to the signal processing unit and the signal storage unit.

[0095] The specific circuit connection relationships in the light emission duration control circuit 803 will be explained below. In this embodiment, each transistor is an N-type transistor.

[0096] The initialization unit 8031 includes an initialization transistor T1.

[0097] The first end of the initialization transistor T1 is electrically connected to the power supply line 90, and its control end is electrically connected to the gate line 60, and is configured to obtain an initial electrical signal REF from its first end and a first scan signal S1 from its control end, and control its conduction state by the first scan signal S1.

[0098] The initialization transistor T1 conducts when the first scan signal S1 is at a low level, and outputs a reference power signal REF from its second end for resetting the device electrically connected to the second end; the initialization transistor T1 turns off when the first scan signal S1 is at a high level, and stops outputting the reference power signal REF.

[0099] In the signal conditioning unit 8032, the signal processing unit includes a writing transistor T2, a driving transistor T3, and a compensating transistor T4.

[0100] The first end of the writing transistor T2 is electrically connected to the data line 50, and its control end is electrically connected to the gate line 60, and is configured to obtain a third scan signal S3 from its control end and a light emission duration adjustment data PWMD from its first end, and control its conduction state by the third scan signal S3.

[0101] The writing transistor T2 conducts when the third scan signal S3 is at a low level, and outputs the light emission duration adjustment data PWMD from its second end; the writing transistor T2 turns off when the third scan signal S3 is at a high level, and stops outputting the light emission duration adjustment data PWMD.

[0102] The first end of the driving transistor T3 is electrically connected to the second end of the writing transistor T2, and is configured to obtain the light emission duration adjustment data PWMD from its first end, and determine the threshold-compensated light emission duration adjustment data from its control end when its control end and its second end are short-circuited.

[0103] Among them, the threshold voltage is the threshold voltage of the driving transistor T3. When its threshold voltage is Vth1, the potential value of its control terminal is Vth1 + V PWMD .

[0104] The first end of the compensation transistor T4 is electrically connected to the control terminal of the driving transistor T3, its second end is electrically connected to the second end of the driving transistor T3, and its control terminal is electrically connected to the gate line 60, and is configured to obtain the third scan signal S3 from its control terminal, and its conduction state is controlled by the third scan signal S3.

[0105] The compensation transistor T4 conducts when the third scan signal S3 is at a low level, short-circuiting the control terminal and the second end of the driving transistor T3; it turns off when the third scan signal S3 is at a high level, disconnecting the control terminal and the second end of the driving transistor T3.

[0106] The signal storage unit includes a storage capacitor C2.

[0107] The first end of the storage capacitor C2 is electrically connected to the signal processing unit, that is, electrically connected to the control terminal of the driving transistor T3, its second end is electrically connected to the power supply line 90, and is configured to obtain and store the light emission duration adjustment data after threshold compensation from its first end, obtain the adjustable power supply signal SWEEP from its second end, and adjust the stored data based on the change amount of the adjustable power supply signal.

[0108] More specifically, the storage capacitor C2 is configured to adjust the potential value of its first end according to the light emission duration adjustment data compensated by the threshold voltage when the adjustable power supply signal SWEEP obtained at its second end is a stable electrical signal, so that the potential value of the first end is the same as the potential value of the light emission duration adjustment data compensated by the threshold voltage.

[0109] The storage capacitor C2 is also configured to generate a first control signal based on the stored data. That is, after storing the light emission duration adjustment data compensated by the threshold voltage, by adjusting the potential value of the adjustable power supply signal SWEEP obtained at its second end, the adjustment of the potential value of its first end is realized, and the potential value of its first end is determined as the first control signal.

[0110] Among them, if the change amount of the potential of the first end of the storage capacitor C2 is the same as the change amount of the potential of its second end, the potential value of the first control signal is Vth1 + V PWMD -△SWEEP.

[0111] The driving transistor T3 is also configured to obtain the first control signal and the light emission duration control signal EM1, and its transmission of the light emission duration control signal is controlled by the first control signal.

[0112] Since the first control signal is a gradually decreasing ramp signal, when the potential value of the first control signal minus the potential value of the emission duration control signal EM1 is greater than the threshold voltage of the driving transistor T3, the driving transistor T3 is turned on, and the emission duration control signal EM1 is output from its second end as the adjusted emission duration control signal EM2;

[0113] When the potential value of the first control signal minus the potential value of the emission duration control signal EM1 is less than or equal to the threshold voltage of the driving transistor T3, the driving transistor T3 is turned off, and the emission duration control signal EM1 is no longer output from its second end.

[0114] The signal transmission unit includes a transmission transistor T11.

[0115] The first end, control end and gate line 60 of the transmission transistor T11 are electrically connected, and the second end is electrically connected to at least one signal adjustment unit 8032, and is configured to obtain the emission duration control signal EM1 from its first end, obtain the transmission control signal S4 from its control end, and be controlled by the transmission control signal S4 for its conduction state.

[0116] The transmission transistor T11 is turned on when the transmission control signal S4 is at a low level, and transmits the emission duration control signal EM1 obtained from its first end to the second end; it is turned off when the transmission control signal S4 is at a high level, and stops transmitting the emission duration control signal EM1 obtained from its first end to the second end.

[0117] More specifically, the second end of the transmission transistor T11 is electrically connected to the first end of the driving transistor T3.

[0118] Wherein, the level change state of the transmission control signal S4 is the same as the level change state of the emission duration control signal EM1.

[0119] In this embodiment, when the transmission control signal S4 and the emission duration control signal EM1 are at a low level, the level value of the transmission control signal S4 is less than the level value of the emission duration control signal EM1, and when the transmission control signal S4 acts on the transmission transistor T11, Vgs - Vth < 0, where Vgs is the voltage difference between the gate and source of the transmission transistor T11, and Vth is the threshold voltage of the transmission transistor T11.

[0120] Similarly, when the transmission transistor T11 is a P-type transistor, it is turned on when the transmission control signal S4 and the emission duration control signal EM1 are at a high level, the level value of the transmission control signal S4 is greater than the level value of the emission duration control signal EM1, and when the transmission control signal S4 acts on the transmission transistor T11, Vgs - Vth > 0.

[0121] There are various situations for the circuit structure of the light-emitting driving circuit 804. Any driving circuit that generates a driving signal to drive the sub-pixel LED to emit light based on the light-emitting duration control signal and the light-emitting current driving data PAMD and can adjust the light-emitting duration using the light-emitting duration control signal can be applied to this application.

[0122] To describe the operation of the sub-pixel driving circuit, the circuit structure of 6T1C will be used as an example of the light-emitting driving circuit for subsequent explanations.

[0123] The circuit structure of 6T1C includes: a write transistor T5, a driving transistor T6, a compensation transistor T7, a storage capacitor C1, an initialization transistor T10, a light-emitting control transistor T8, and a light-emitting control transistor T9.

[0124] The first end of the initialization transistor T10 is electrically connected to the power supply line 90, its control end is electrically connected to the gate line 60, and its second end is electrically connected to the second end of the storage capacitor C1 and the control end of the driving transistor T6. It is configured to obtain the first scan signal S1 from its control end, obtain the initial electrical signal REF from its first end, and be controlled by the first scan signal S1 for its conduction state.

[0125] The initialization transistor T10 conducts when the first scan signal S1 is at a low level and outputs the initial electrical signal REF from its second end for resetting the devices electrically connected to this second end; it turns off when the first scan signal S1 is at a high level and stops the output of the initial electrical signal REF.

[0126] The first end of the write transistor T5 is electrically connected to the data line 50, its control end is electrically connected to the gate line 60, and its second end is electrically connected to the first end of the driving transistor T6. It is configured to obtain the second scan signal S2 from its control end, obtain the light-emitting current driving data PAMD from its first end, and be controlled by the second scan signal S2 for its conduction state.

[0127] The write transistor T5 conducts when the second scan signal S2 is at a low level and outputs the light-emitting current driving data PAMD from its second end; it turns off when the second scan signal S2 is at a high level and stops the output of the light-emitting current driving data PAMD.

[0128] The driving transistor T6 is configured to obtain the light-emitting current driving data PAMD from its first end. When its second end and control end are short-circuited, it obtains the light-emitting current driving data PAMD with its threshold voltage compensated from its first end. When its threshold voltage is Vth2, the potential value at its control end is Vth2 + V PAMD .

[0129] The first end of the compensation transistor T7 is electrically connected to the control end of the driving transistor T6, its second end is electrically connected to the second end of the driving transistor T6, and its control end is electrically connected to the gate line 60. It is configured to obtain the second scan signal S2 from its control end and control its conduction state by the second scan signal S2.

[0130] The compensation transistor T7 conducts when the second scan signal S2 is at a low level, short - circuiting the control end and the second end of the driving transistor T6; it turns off when the second scan signal S2 is at a high level, disconnecting the control end and the second end of the driving transistor T6.

[0131] The first end of the storage capacitor C1 is electrically connected to the power supply line 90, and the second end is electrically connected to the control end of the driving transistor T6. It is used to obtain the first power signal VDD from its first end and obtain and store the light - emitting current drive data PAMD after threshold voltage compensation from its second end. Among them, the first power signal VDD is a stable electrical signal.

[0132] The first end of the light - emitting control transistor T8 is electrically connected to the power supply line 90, the second end is electrically connected to the first end of the driving transistor T6, and its control end is electrically connected to the second end of its corresponding driving transistor T3. It is configured to obtain the first electrical signal from its first end, obtain the light - emitting duration control signal EM2 from its control end, and control its conduction state by the light - emitting duration control signal EM2.

[0133] The light - emitting control transistor T8 conducts when the light - emitting duration control signal EM2 is at a low level, outputting the first electrical signal from its second end; it turns off when the light - emitting duration control signal EM2 is at a high level, stopping the output of the first electrical signal from its second end.

[0134] The first end of the driving transistor T6 is electrically connected to the second end of the light - emitting control transistor T8. It is also configured to obtain the first electrical signal from its first end, obtain the light - emitting current drive data PAMD after threshold voltage compensation from its second end, and generate a drive signal according to the light - emitting current drive data PAMD after threshold voltage compensation, the first electrical signal, and its threshold voltage. The current value of the drive signal is: k(V PAMD +V th2 -V DD -V th2 ), that is, k(V PAMD -V DD ), where k is the current conversion coefficient related to the driving transistor T6.

[0135] The first end of the light - emitting control transistor T9 is electrically connected to the first end of the driving transistor T2, the second end is electrically connected to the sub - pixel LED, and the control end is electrically connected to the light - emitting duration control circuit 803. It is configured to obtain the light - emitting duration control signal from the light - emitting duration control circuit 803 and control its conduction state by the light - emitting duration control signal.

[0136] In one embodiment, the control terminal of the light-emitting control transistor T9 is electrically connected to the input terminal of the light-emitting duration control circuit 803, or is electrically connected to the second terminal of the transfer transistor T11 in the light-emitting duration control circuit 803 (as Figure 4A shown), and is configured to obtain a light-emitting duration control signal EM1, turn on when the light-emitting duration control signal EM1 is at a low level, send a driving signal to the sub-pixel LED, and drive the sub-pixel LED to emit light;

[0137] Turn off when the light-emitting duration control signal EM1 is at a high level, stop outputting the driving signal, and the sub-pixel LED does not emit light.

[0138] In another embodiment, the control terminal of the light-emitting control transistor T8 is electrically connected to the second terminal or the first terminal of the transfer transistor T11, and the control terminal of the light-emitting control transistor T9 is electrically connected to the second terminal of the driving transistor T3, and their connection relationship is as Figure 7A shown.

[0139] In another embodiment, the control terminal of the light-emitting control transistor T8 is electrically connected to the second terminal of one driving transistor T3, and the control terminal of the light-emitting control transistor T9 is electrically connected to the second terminal of another driving transistor T3, and their connection relationship is as Figure 7B shown.

[0140] Figure 7A and Figure 7B have the same control principle as that shown in Figure 4A , and will not be elaborated here.

[0141] Figure 4A The circuit structure shown in Figure 5A is driven by the driving signal timing diagram shown in

[0142] Next, in conjunction with the process diagram shown in Figures 6A to 6D , the circuit operation of the circuit structure shown in Figure 4A within one display period will be explained. One display period T sequentially includes a reset stage T1, a light-emitting current drive data writing stage T2, a light-emitting duration adjustment data writing stage T3, and a display stage T4.

[0143] During the time period corresponding to the reset stage T1 in the driving signal timing diagram, the first scan signal S1 is at a low level, the second scan signal S2, the third scan signal S3, the transfer control signal S4, and the light-emitting duration control signal EM1 are at a high level, and the initial electrical signal REF is at a low level. The adjustable power supply signal SWEEP is adjusted from a low level to a high level.

[0144] Since the first scan signal S1 is at a low level, the initialization transistor T10 and the initialization transistor T1 are turned on, and the initial electrical signal REF obtained at their first ends is transmitted to the second ends.

[0145] The first end of the energy storage capacitor C2 and the control end of the driving transistor T3 are reset according to the initial electrical signal REF transmitted by the initialization transistor T1 obtained at its first end, where the adjusted potential value is the same as the potential value of the initial electrical signal REF.

[0146] The second end of the energy storage capacitor C1 and the control end of the driving transistor T6 are reset according to the initial electrical signal REF transmitted by the initialization transistor T10 obtained at its first end, where the adjusted potential value is the same as the potential value of the initial electrical signal REF.

[0147] Since the transmission control signal S4 is at a high level, the transmission transistor T11 is turned off and does not transmit the light emission duration control signal EM1 to the driving transistor T3.

[0148] Since the initial electrical signal REF is at a low level, the driving transistor T3 is turned on, but its first end does not obtain the light emission duration control signal EM1, so its second end does not output the light emission duration control signal EM2 either, and the potential of its second end is at a high level.

[0149] Since the electrical signal obtained at the control end of the light emission control transistor T8 is at a high level, the light emission control transistor T8 is turned off and does not transmit the first electrical signal to the driving transistor T6.

[0150] Since the initial electrical signal REF is at a low level, the driving transistor T6 is turned on, but its first end does not obtain the first electrical signal and does not generate a driving signal.

[0151] Since the light emission duration control signal EM1 is at a high level, the light emission control transistor T9 is not turned on.

[0152] The sub-pixel LED does not emit light.

[0153] Then, during the period corresponding to T1 in the reset stage, the operating state of the sub-pixel driving circuit is as Figure 6A shown, and the initialization transistor T10, the initialization transistor T1, the driving transistor T3, and the driving transistor T6 with arrows marked beside are turned on, and other transistors are turned off.

[0154] During the period corresponding to T2, the light emission current drive data writing stage in the driving signal timing diagram, the second scan signal S2 is at a low level, and the first scan signal S1, the third scan signal S3, the transmission control signal S4, the light emission duration control signal EM1, and the control control power signal SWEEP are at high levels. The potential value of PAMD decreases.

[0155] In the luminous duration control circuit, the initialization transistor T1 is turned off due to the high-level first scan signal S1 and no longer sends the initial electrical signal REF to the first end of the energy storage capacitor C2 and the control end of the driving transistor T3. The operating states of other circuit structures remain unchanged and will not be elaborated here.

[0156] Since the second scan signal S2 is at a high level, the writing transistor T5 is turned on, and the luminous current driving data PAMD obtained at its first end is transmitted to the first end of the driving transistor T6.

[0157] Since the second scan signal S2 is at a high level, the compensation transistor T7 is turned on, shorting the control end and the second end of the driving transistor T6.

[0158] The driving transistor T6 outputs the luminous current driving data PAMD compensated by its threshold voltage according to the luminous current driving data PAMD obtained at its first end from its control end.

[0159] The storage capacitor C1 stores the luminous current driving data PAMD compensated by the threshold voltage at its second end.

[0160] Since the luminous duration control signal EM1 and the luminous duration control signal EM2 are still at high levels, the luminous control transistor T8 and the luminous control transistor T9 are turned off.

[0161] The sub-pixel LED does not emit light.

[0162] Then, during the period corresponding to the luminous current driving data writing stage T2, the operating state of the sub-pixel driving circuit is as Figure 6B shown, and the writing transistor T5, the driving transistor T6, the compensation transistor T7, and the driving transistor T3 marked with arrows beside are turned on, and other transistors are turned off.

[0163] During the period corresponding to the luminous duration adjustment data writing stage T3 in the driving signal timing diagram, the third scan signal S3 is at a low level, and the first scan signal S1, the second scan signal S2, the transmission control signal S4, the luminous duration control signal EM1, and the adjustable power supply signal SWEEP are at high levels. The potential value of PWMD increases.

[0164] Since the third scan signal S3 is at a low level, the writing transistor T2 is turned on, and the luminous duration adjustment data PWMD obtained at its first end is transmitted to the first end of the driving transistor T3.

[0165] Since the third scan signal S3 is at a low level, the compensation transistor T4 is turned on, shorting the second end and the control end of the driving transistor T3.

[0166] The driving transistor T3 adjusts the light-emitting duration adjustment data PWMD according to the light-emitting duration data obtained at its first end, and outputs the light-emitting duration adjustment data PWMD with its threshold voltage compensation from its control end.

[0167] The storage capacitor C2 stores the light-emitting duration adjustment data PWMD with threshold voltage compensation at its first end. Among them, the potential value of its first end is the same as the potential value of the light-emitting duration adjustment data PWMD with threshold voltage compensation of the driving transistor T3.

[0168] Since the light-emitting duration control signal EM1 is at a high level, the light-emitting control transistor T9 is not turned on.

[0169] The sub-pixel LED does not emit light.

[0170] Then, during the period corresponding to T3 in the light-emitting duration adjustment data writing stage, the operating state of the sub-pixel driving circuit is as Figure 6C shown, the writing transistor T2, the driving transistor T3, the compensation transistor T4, and the driving transistor T6 with arrows marked beside are turned on, and other transistors are turned off.

[0171] During the period corresponding to T4 shown in the driving signal timing diagram, the light-emitting duration control signal EM1 and the transfer control signal S4 are at a low level, the first scan signal S1, the second scan signal S2, and the third scan signal S3 are at a high level, and the adjustable power supply signal SWEEP is a ramp signal adjusted from the second level to the first level.

[0172] Since the transfer control signal S4 is at a low level, the transfer transistor T11 is turned on to transfer the light-emitting duration control signal EM1 to the first end of the driving transistor T3.

[0173] Since the third scan signal S3 is at a high level, the writing transistor T2 is turned off, and the transfer of the light-emitting duration adjustment data PWMD to the first end of the driving transistor T3 is stopped.

[0174] Then, the first end of the driving transistor T3 only obtains the light-emitting duration control signal EM1 during the current period.

[0175] Since the third scan signal S3 is at a high level, the compensation transistor T4 is turned off, and the second end and the control end of the driving transistor T3 are disconnected.

[0176] Since the potential value of the first end of the storage capacitor C2 is the potential value corresponding to the light-emitting duration adjustment data PWMD with threshold voltage compensation, the potential value of its second end gradually decreases, and then the potential value of its first end also gradually decreases, and the potential value of the first control signal generated by this first end gradually decreases.

[0177] The potential value of the control end of the driving transistor T3 gradually decreases following the potential value of the first control signal.

[0178] When the driving transistor T3 satisfies the conduction condition of the first control signal, it outputs the light emission duration control signal obtained at its first end from its second end. When the first control signal does not satisfy the conduction condition, it stops outputting the light emission duration control signal.

[0179] More specifically, when the difference between the potential value of the first control signal and the light emission duration control signal EM1 obtained at the first end of the driving transistor T3 is less than the threshold voltage of the driving transistor T3, the driving transistor T3 conducts;

[0180] When the difference between the potential value of the first control signal and the light emission duration control signal EM1 obtained at the first end of the driving transistor T3 is greater than or equal to the threshold voltage of the driving transistor T3, the driving transistor T3 turns off.

[0181] Then, following the change of the potential of the first control signal, the display stage T4 sequentially includes a non-light-emitting stage and a light-emitting stage.

[0182] During the non-light-emitting stage, when the potential value of the first control signal gradually decreases but its potential has not reached the conduction condition of the driving transistor T3, the driving transistor T3 turns off, and the light emission duration control signal EM2 is at a high level.

[0183] Since the light emission duration control signal EM2 is at a high level, the light emission control transistor T8 turns off and does not transmit the first electrical signal.

[0184] The driving transistor T6 still does not output a driving signal, and the sub-pixel LED does not emit light.

[0185] During the light-emitting stage, when the potential value of the first control signal gradually decreases to satisfy the conduction condition of the driving transistor T3, the driving transistor T3 conducts and outputs the light emission duration control signal EM1 obtained at its first end from its second end. Then, the light emission duration control signal EM2 is at a low level.

[0186] Since the light emission duration control signal EM2 is at a low level, the light emission control transistor T8 conducts and transmits the first electrical signal to its second end.

[0187] The driving transistor T6 obtains the first electrical signal from its first end and the light emission current drive data PAMD with threshold voltage compensation from its control end, generates a driving current, and the current value of the driving signal is: k(V PAMD +V th2 -V DD -V th2 ), that is, k(V PAMD -V DD ), where k is the current conversion coefficient related to the driving transistor T6.

[0188] Since the light emission duration control signal EM1 is at a low level, the light emission control transistor T9 is turned on, and the drive signal obtained at its first end is transmitted to the sub-pixel LED.

[0189] The sub-pixel LED emits light according to the drive signal until at least one of the light emission duration control signal EM1 and the light emission duration control signal EM2 is adjusted to a high level.

[0190] In addition, in the circuit structure provided by the present application, each transistor can also be replaced with an N-type transistor. Figure 4A The shown circuit structure can be adjusted to Figure 4B as shown, the first end of the light emission control transistor T8 in the sub-pixel drive circuit is electrically connected to the second power supply VSS, the second end of the light emission control transistor T9 and the negative electrode of the sub-pixel LED are electrically connected, and the positive electrode of the sub-pixel LED and the first power supply VDD are electrically connected. The initial electrical signal REF obtained at the first ends of the initialization transistor T1 and the initialization transistor T10 is at a high level.

[0191] Correspondingly, the potential states of the drive signal timing diagram of the display device constructed based on the N-type transistor are all adjusted to the opposite potential. As Figure 5B shown, its driving process is the same as the above driving process and will not be described herein again.

[0192] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include common general knowledge or conventional technical means in the technical field not disclosed in the present application. The specification and embodiments are only regarded as exemplary, and the true scope and spirit of the present application are pointed out by the following claims.

[0193] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.

Claims

1. A display device, comprising: a gate driving circuit, a data driving circuit, a power supply circuit, at least one sub-pixel, and a corresponding sub-pixel driving circuit; characterized in that the sub-pixel driving circuit comprises: a light emission duration control circuit, electrically connected to the gate driving circuit, the data driving circuit, and the power supply circuit, configured to obtain a light emission duration control signal and light emission duration adjustment data, and based on the light emission duration adjustment data, adjust the light emission driving duration of the light emission duration control signal; a light emission driving circuit, electrically connected to the light emission duration control circuit and the gate driving circuit, configured to adjust the duration of generating a driving signal within a display period according to the adjusted light emission duration control signal; the sub-pixel is electrically connected to the light emission driving circuit and is configured to emit light according to the driving signal.

2. The display device according to claim 1, wherein The light emission duration control circuit includes at least one signal adjustment unit; The light emission duration control circuit is configured to obtain a light emission duration control signal and light emission duration adjustment data, and based on the light emission duration adjustment data, adjust the light emission driving duration of the light emission duration control signal, including: The signal adjustment unit is electrically connected to the data driving circuit, the power supply circuit, and the gate driving circuit, and is configured to obtain the light emission duration adjustment data, the light emission duration control signal, and an adjustable power supply signal, and control the duration of outputting the light emission duration control signal by the light emission duration adjustment data and the adjustable power supply signal.

3. The display device according to claim 2, wherein The signal adjustment unit includes a signal processing unit and a signal storage unit; The signal adjustment unit is configured to obtain the light emission duration adjustment data, the light emission duration control signal, and an adjustable power supply signal, and control the duration of outputting the light emission duration control signal by the light emission duration adjustment data and the adjustable power supply signal, including: The signal processing unit is electrically connected to the data driving circuit and the gate driving circuit, and is configured to obtain the light emission duration adjustment data and output the light emission duration adjustment data after threshold compensation; The signal storage unit is electrically connected to the power supply circuit and the signal processing unit, and is configured to obtain the adjustable power supply signal and the light emission duration adjustment data after threshold compensation, and generate a first control signal based on the adjustable power supply signal and the light emission duration adjustment data after threshold compensation; The signal processing unit is further electrically connected to the light emission driving circuit, and is configured to obtain the light emission duration control signal and the first control signal, and control the output of the light emission duration control signal to the light emission driving circuit by the first control signal.

4. The display device according to claim 3, wherein The signal processing unit includes a writing transistor, a driving transistor, and a compensation transistor; The signal processing unit is electrically connected to the data driving circuit and the gate driving circuit, and is configured to obtain the light emission duration adjustment data and output the light emission duration adjustment data after threshold compensation, including: The first end of the writing transistor is electrically connected to the data driving circuit, and its control end is electrically connected to the gate driving circuit. It is configured to obtain a third scanning signal from its control end, obtain the light-emitting duration adjustment data from its first end, and control its conduction state by the third scanning signal; The first end of the driving transistor is electrically connected to the second end of the writing transistor, and is configured to obtain the light-emitting duration adjustment data from its first end. When its control end and its second end are short-circuited, determine the light-emitting duration adjustment data after threshold compensation from its control end; The first end of the compensation transistor is electrically connected to the control end of the driving transistor, its second end is electrically connected to the second end of the driving transistor, and its control end is electrically connected to the gate driving circuit. It is configured to obtain the third scanning signal from its control end and control its conduction state by the third scanning signal.

5. The display device according to claim 3 or 4, characterized in that, The signal storage unit includes a storage capacitor; The signal storage unit is electrically connected to the power supply circuit and the signal processing unit, and is configured to obtain the adjustable power supply signal and the light-emitting duration adjustment data after threshold compensation, and generate a first control signal based on the adjustable power supply signal and the light-emitting duration adjustment data after threshold compensation, including: The first end of the storage capacitor is electrically connected to the signal processing unit, and its second end is electrically connected to the power supply circuit. It is configured to acquire and store the light-emitting duration adjustment data after threshold compensation from its first end, obtain the adjustable power supply signal from its second end, and adjust the stored data based on the change amount of the adjustable power supply signal; The storage capacitor is configured to generate a first control signal based on the stored data; The driving transistor is configured to obtain the first control signal and the light-emitting duration control signal, and control its transmission of the light-emitting duration control signal by the first control signal.

6. The display device according to claim 3 or 4, characterized in that, The signal adjustment unit includes an initialization unit; The initialization unit is electrically connected to the power supply circuit, the signal processing unit, and the signal storage unit, and is configured to obtain an initial electrical signal and initialize the signal processing unit and the signal storage unit based on the initial electrical signal.

7. The display device according to claim 6, characterized in that, The initialization unit includes an initialization transistor; The initialization unit is electrically connected to the power supply circuit, the signal processing unit, and the signal storage unit, and is configured to obtain an initial electrical signal and initialize the signal processing unit and the signal storage unit based on the initial electrical signal, including: The first end of the initialization transistor is electrically connected to the power supply circuit, and its control end is electrically connected to the gate driving circuit. It is configured to obtain the initial electrical signal from its first end, obtain a first scanning signal from its control end, and control its conduction state by the first scanning signal.

8. The display device according to any one of claims 2 to 4, characterized in that, The light-emitting duration control circuit further includes a signal transmission unit; The signal transmission unit is electrically connected to the gate driving circuit and the at least one signal adjustment unit, and is configured to obtain the light-emitting duration control signal and a transmission control signal, and control its output of the light-emitting duration control signal to the signal adjustment unit by the transmission control signal.

9. The display device according to claim 8, wherein The signal transmission unit includes a transmission transistor; The signal transmission unit is electrically connected to the gate driving circuit and the at least one signal conditioning unit, and is configured to obtain the light emission duration control signal and the transmission control signal, and is controlled by the transmission control signal to output the light emission duration control signal to the signal conditioning unit, including: The first end, the control end of the transmission transistor are electrically connected to the gate driving circuit, and the second end is electrically connected to the at least one signal conditioning unit, and is configured to obtain the light emission duration control signal from its first end, obtain the transmission control signal from its control end, and be controlled by the transmission control signal to control its conduction state.

10. The display device according to claim 1, characterized in that, The display period of the display device sequentially includes an initialization stage, a light emission duration adjustment data writing stage, and a display stage; During the initialization stage, the first scan signal is at the first level, the third scan signal, the transmission control signal, and the light emission duration control signal are at the second level, and the adjustable power supply signal is adjusted from the first level to the second level; The transmission transistor is turned off according to the transmission control signal; The initialization transistor is turned on according to the first scan signal, and transmits the initial electrical signal obtained at its first end to the second end; The control end of the driving transistor is reset according to the initial electrical signal; The first end of the storage capacitor is reset according to the initial electrical signal; The light emission driving circuit does not output the driving signal according to the light emission duration control signal; The sub-pixel does not emit light.

11. The display device according to claim 10, wherein During the light emission duration adjustment data writing stage, the first scan signal, the transmission control signal, and the light emission duration control signal are at the second level, the third scan signal is at the first level, and the adjustable power supply signal is at the second level; The transmission transistor is turned off according to the transmission control signal; The initialization transistor is turned off according to the first scan signal, and stops outputting the initial electrical signal; The writing transistor is turned on according to the third scan signal, and transmits the light emission duration adjustment data obtained at its first end to the second end; The compensation transistor is turned on according to the third scan signal, and shorts the control end and the second end of the driving transistor; The driving transistor outputs the light emission duration adjustment data with threshold voltage compensation from its control end according to the light emission duration adjustment data obtained at its first end; The storage capacitor obtains and stores the light emission duration adjustment data with threshold voltage compensation from its first end; The light emission driving circuit does not output the driving signal according to the light emission duration control signal; The sub-pixel does not emit light.

12. The display device according to claim 10 or 11, characterized in that, During the display stage, the first scan signal and the third scan signal are at the second level, the light emission duration control signal and the transmission control signal are at the first level, and the adjustable power supply signal is a ramp signal adjusted from the second level to the first level; The transmission transistor is turned on according to the transmission control signal, and transmits the light emission duration control signal obtained at its first end to the second end; The compensation transistor and the writing transistor are turned off according to the third scan signal; The storage capacitor adjusts the stored light emission duration adjustment data with threshold voltage compensation according to the adjustable power supply signal, and outputs a first control signal from its first end; When the first control signal satisfies its conduction condition, the driving transistor outputs the light emission duration control signal obtained at its first end from its second end; When the first control signal does not satisfy its conduction condition, the driving transistor stops outputting the light emission duration control signal; The light emission driving circuit adjusts the duration of the driving signal it outputs according to the light emission duration control signal provided by the driving transistor; The sub-pixel emits light according to the driving signal.

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