Pixel driving circuit, pixel driving method and display device

Abstract

The application discloses a pixel driving circuit, a pixel driving method and a display device, and relates to the technical field of display, and comprises a plurality of rectangularly arranged pixel driving units, each of which comprises a reset module, a charging module and a driving module. The reset module is used for pulling down a first node to a preset low voltage in a reset stage; the charging module is used for charging the first node to a first voltage in a writing stage, wherein the first voltage is the sum of a data voltage on a data line and a threshold voltage to be offset existing in the charging module; and the driving module is used for transmitting, in a light emitting stage, a real-time threshold voltage generated by the driving module based on the first voltage and a driving voltage on a positive power supply voltage end into a light emitting device according to a driving signal input from a driving signal end, wherein at least part of the threshold voltage to be offset in the first voltage and the real-time threshold voltage are offset, so that display abnormal phenomena caused by inherent characteristics of a thin film transistor are solved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a pixel driving circuit, a pixel driving method, and a display device. Background Technology

[0002] In self-emissive displays, regardless of whether the thin-film transistor driving architecture is based on low-temperature polycrystalline silicon or oxide semiconductor, display abnormalities will occur due to the inherent characteristics of thin-film transistors.

[0003] Taking low-temperature polycrystalline silicon thin-film transistors (TFTs) as an example, their threshold voltage and carrier mobility exhibit non-uniform distributions. These parameters are directly related to the stability of the TFT drive current, leading to differences in the luminous intensity of pixel units in self-emissive displays and resulting in display mottled patterns. Furthermore, the hysteresis characteristic of TFTs causes asymmetric response characteristics in the drain-source current when the gate voltage scanning direction changes, inducing image retention in high-frequency switching scenes such as checkerboard patterns. Simultaneously, the threshold voltage drift of TFTs causes drive current fluctuations due to changes in operating time and ambient temperature, further exacerbating the brightness unevenness of the displayed image. Summary of the Invention

[0004] The main objective of this application is to provide a pixel driving circuit, a pixel driving method, and a display device, which aims to solve the technical problem of display abnormalities caused by the inherent characteristics of thin-film transistors.

[0005] To achieve the above objectives, this application proposes a pixel driving circuit, which includes multiple rectangularly arranged pixel driving units, each of which includes a reset module, a charging module, and a driving module.

[0006] The output and control terminals of the reset module are connected to the scanning signal terminal of the previous stage. The input terminal of the reset module is electrically connected to the first node. The reset module is used to pull down the first node to a preset low potential during the reset phase.

[0007] The input terminal of the charging module is connected to the data line, the control terminal of the charging module is connected to the scan line of this level, and the output terminal of the charging module is electrically connected to the first node. The charging module is used to charge the first node to a first voltage during the writing stage, wherein the first voltage is the sum of the data voltage on the data line and the voltage of the charging module to be canceled threshold voltage.

[0008] The input terminal of the driving module is connected to the first node and the positive power supply voltage terminal respectively. The control terminal of the driving module is connected to the driving signal terminal. The output terminal of the driving module is connected to the light-emitting device. The driving module is used to transmit the driving voltage based on the first voltage, the positive power supply voltage terminal and the real-time threshold voltage generated by the driving module to the light-emitting device according to the driving signal input from the driving signal terminal during the light-emitting stage. The threshold voltage to be canceled in the first voltage is at least partially canceled by the real-time threshold voltage.

[0009] In one embodiment, the pixel driving unit is provided with a storage capacitor, the first node is located on the first capacitor terminal of the storage capacitor, and the reset module includes a first transistor;

[0010] The control terminal and input terminal of the first transistor are connected to the scanning signal terminal of the previous stage, and the output terminal of the first transistor is connected to the terminal of the first capacitor.

[0011] In one embodiment, the charging module includes a second transistor, a third transistor, and a fourth transistor;

[0012] The control terminal of the second transistor is connected to the scan line of this stage, the input terminal of the second transistor is connected to the data line, and the output terminal of the second transistor is connected to the output terminal of the third transistor.

[0013] The input terminal of the third transistor is connected to the input terminal of the fourth transistor, and the control terminal of the third transistor and the output terminal of the fourth transistor are connected to the first capacitor terminal.

[0014] The control terminal of the fourth transistor is connected to the scanning signal terminal of this stage.

[0015] In one embodiment, the driving module includes a fifth transistor, a third transistor, and a sixth transistor;

[0016] The control terminal of the fifth transistor is connected to the drive signal terminal, the input terminal of the fifth transistor is connected to the positive power supply voltage terminal, and the output terminal of the fifth transistor is connected to the input terminal of the third transistor.

[0017] The control terminal of the sixth transistor is connected to the drive signal terminal, the input terminal of the sixth transistor is connected to the output terminal of the third transistor, and the output terminal of the sixth transistor is connected to the positive terminal of the light-emitting device.

[0018] The second capacitor terminal of the storage capacitor is connected to the connection line between the fifth transistor and the positive power supply voltage terminal.

[0019] In one embodiment, the pixel driving unit further includes a timing control module;

[0020] The control terminal of the timing control module is connected to the current scanning signal terminal and the previous scanning signal terminal, respectively. The input terminal of the timing control module is connected to the high-level voltage terminal, and the output terminal of the timing control module is connected to the low-level voltage terminal.

[0021] The timing control module is used to adjust the level of the output drive signal according to the signal level of the current scanning signal terminal and the previous scanning signal terminal.

[0022] In one embodiment, the timing control module includes a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor;

[0023] The control terminal of the seventh transistor is connected to the scanning signal terminal of this stage, the control terminal of the eighth transistor is connected to the scanning signal terminal of the previous stage, the input terminals of the seventh transistor and the eighth transistor are connected to a high-level voltage terminal, and the output terminals of the seventh transistor and the eighth transistor are connected to the input terminal of the ninth transistor.

[0024] The output terminal of the ninth transistor is connected to the input terminal of the tenth transistor, and the control terminal of the ninth transistor is connected to the scanning signal terminal of this stage.

[0025] The output terminal of the tenth transistor is connected to the low-level voltage terminal, and the control terminal of the tenth transistor is connected to the scanning signal terminal of the previous stage.

[0026] The drive signal terminal is led out from the connection line between the seventh transistor and the eighth transistor and the ninth transistor.

[0027] In one embodiment, pixel driving units on the same scan line are connected to the same timing control module.

[0028] In addition, to achieve the above objectives, this application also proposes a pixel driving method, which is applied to the pixel driving circuit described above. The pixel driving circuit includes a plurality of rectangularly arranged pixel driving units, and each pixel driving unit includes a reset module, a charging module and a driving module.

[0029] The pixel driving method includes:

[0030] During the reset phase, the first node is pulled down to a preset low potential by the reset module, and then the write phase begins.

[0031] The control charging module writes the data voltage on the data line and the threshold voltage to be canceled in the charging module into the first node, and after charging the first node to the first voltage, it enters the light emission stage.

[0032] Based on the driving module that has been connected to the driving signal, the first voltage, the driving voltage on the positive power supply voltage terminal and the real-time threshold voltage generated by the driving module are transmitted to the light-emitting device, wherein the threshold voltage to be canceled in the first voltage is at least partially canceled out by the real-time threshold voltage.

[0033] In one embodiment, the pixel driving unit further includes a timing control module, which, prior to the step of the driving module receiving the driving signal, further includes:

[0034] Based on the high-level scanning signal from the previous stage and the high-level scanning signal from the current stage, a low-level driving signal is generated and transmitted to the driving module to control the driving module to drive the light-emitting device to emit light.

[0035] In addition, to achieve the above objectives, this application also proposes a display device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the pixel driving method as described above.

[0036] One or more technical solutions proposed in this application have at least the following technical effects:

[0037] A pixel driving circuit is proposed, comprising multiple rectangularly arranged pixel driving units, each including a reset module, a charging module, and a driving module. The output and control terminals of the reset module are connected to the previous-level scan signal terminal, and the input terminal of the reset module is electrically connected to a first node. The reset module is used to pull down the first node to a preset low potential during the reset phase. The input terminal of the charging module is connected to the data line, the control terminal of the charging module is connected to the current-level scan line, and the output terminal of the charging module is electrically connected to the first node. The charging module is used to charge the first node to a first voltage during the write phase, wherein the first voltage is the sum of the data voltage on the data line and the uncancelled threshold voltage present in the charging module. The input terminal of the driving module is connected to the first node and the positive power supply voltage terminal, the control terminal of the driving module is connected to the driving signal terminal, and the output terminal of the driving module is connected to a light-emitting device. The driving module is used to transmit the driving voltage based on the first voltage, the driving voltage terminal, and the real-time threshold voltage generated by the driving module to the light-emitting device during the light-emitting phase, according to the driving signal received from the driving signal terminal. The uncancelled threshold voltage in the first voltage and the real-time threshold voltage at least partially cancel each other out.

[0038] In this embodiment, the reset module resets the potential of the first node of the pixel driving unit on the same scan line to a preset low potential before pixel driving, thereby offsetting the hysteresis characteristic of the thin-film transistor and ensuring that the corresponding drain-source current change curves can coincide when the upper voltage changes in different directions, thus improving display uniformity and suppressing image retention. In addition, the charging module generates an additional threshold voltage to be offset before the pixel emits light, and provides this additional threshold voltage to the light-emitting device when the pixel is driven to emit light by the driving module, so that it can at least partially offset the real-time threshold voltage present when the light-emitting device is driven to emit light, thereby reducing or eliminating the poor display response caused by the threshold voltage to a certain extent, that is, solving the display abnormality caused by the hysteresis of the thin-film transistor and the inherent characteristics of the threshold voltage. Attached Figure Description

[0039] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0040] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic flowchart of an embodiment of the pixel driving method of this application;

[0042] Figure 2 This is a schematic diagram showing the changes in gate voltage and drain-source current in a conventional pixel driving unit.

[0043] Figure 3 This is a display illustration of a chessboard-type image displayed using conventional pixel-driven units.

[0044] Figure 4 This is a schematic diagram of any pixel driving unit in the pixel driving circuit of this application;

[0045] Figure 5 This is a schematic diagram of the pixel driving unit of this application;

[0046] Figure 6 This is a schematic diagram of a conventional pixel driving circuit.

[0047] Figure 7 This is a schematic diagram of the control timing of the pixel driving unit in this application;

[0048] Figure 8This is a schematic diagram showing the access of the timing control module in the pixel driving unit of this application;

[0049] Figure 9 This is a schematic diagram of the device structure of the hardware operating environment involved in the pixel driving method in the embodiments of this application.

[0050] Explanation of icon numbers:

[0051] 10. Pixel driving unit; A. First node;

[0052] 101. Reset module; T1. First transistor;

[0053] 102. Charging module; T2. Second transistor; T3. Third transistor; T4. Fourth transistor;

[0054] 103, Driver module; T5, Fifth transistor; T6, Sixth transistor;

[0055] 104. Timing control module; T7, seventh transistor; T8, eighth transistor; T9, ninth transistor; T10, tenth transistor;

[0056] G, Scan signal terminal; S, Data line; P, Drive signal terminal; ELVDD, Positive power supply voltage terminal; ELVSS, Negative power supply voltage terminal; VGH, High-level voltage terminal; VGL, Low-level voltage terminal; C, Storage capacitor; D, Light-emitting device.

[0057] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0058] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0059] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0060] The main solution of this application embodiment is: a pixel driving circuit is proposed, which includes multiple rectangularly arranged pixel driving units, each pixel driving unit including a reset module, a charging module and a driving module. The reset module's output and control terminals are both connected to the previous-level scan signal terminal. The reset module's input terminal is electrically connected to the first node. The reset module is used to pull down the first node to a preset low potential during the reset phase. The charging module's input terminal is connected to the data line, its control terminal is connected to the current-level scan line, and its output terminal is electrically connected to the first node. The charging module is used to charge the first node to a first voltage during the write phase. The first voltage is the sum of the data voltage on the data line and the voltage of the threshold voltage to be canceled present in the charging module. The driving module's input terminal is connected to the first node and the positive power supply voltage terminal, respectively. The driving module's control terminal is connected to the driving signal terminal, and its output terminal is connected to the light-emitting device. The driving module is used to transmit the driving voltage based on the first voltage, the driving voltage terminal on the positive power supply voltage terminal, and the real-time threshold voltage generated by the driving module to the light-emitting device during the light-emitting phase, according to the driving signal received from the driving signal terminal. The threshold voltage to be canceled in the first voltage and the real-time threshold voltage are at least partially canceled out.

[0061] In self-emissive displays, regardless of whether the thin-film transistor (TFT) driving architecture is based on low-temperature polycrystalline silicon (LTPS) or oxide semiconductors, the inherent characteristics of TFTs can lead to display anomalies. Taking LTPS TFTs as an example, their threshold voltage and carrier mobility exhibit non-uniform distributions. These parameters directly affect the stability of the TFT driving current, resulting in differences in the luminous intensity of pixel units and causing display mottles. Furthermore, the hysteresis characteristics of TFTs cause asymmetric drain-source current responses when the gate voltage scanning direction changes, inducing ghosting in high-frequency switching images such as checkerboard patterns. Simultaneously, the threshold voltage drift of TFTs causes driving current fluctuations due to changes in operating time and ambient temperature, further exacerbating the brightness unevenness of the displayed image.

[0062] This application provides a solution that, through a reset module, resets the potential of the first node of the pixel driving unit on the same scan line to a preset low potential before pixel driving, thereby eliminating the capacitance charge deviation of the capacitor corresponding to the first node and ensuring that the corresponding drain-source current change curves can coincide when the upper voltage changes in different directions, thus improving display uniformity and suppressing image retention. In addition, an additional threshold voltage to be canceled is generated by the charging module before the pixel emits light, and when the pixel is driven to emit light by the driving module, this additional threshold voltage to be canceled is provided to the light-emitting device, so that it can at least partially cancel the real-time threshold voltage present when driving the light-emitting device to emit light, thereby reducing or eliminating the poor display response caused by the threshold voltage to a certain extent, that is, solving the display abnormality caused by the hysteresis of thin-film transistors and the inherent characteristics of the threshold voltage.

[0063] It should be noted that the executing entity in this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or an electronic device or display device capable of performing the above functions. The following description uses a display device as an example to illustrate this embodiment and the subsequent embodiments.

[0064] Based on this, embodiments of this application provide a pixel driving method, referring to... Figure 1 , Figure 1 This is a flowchart illustrating an embodiment of the pixel driving method of this application.

[0065] In this embodiment, the pixel driving method includes steps S10 to S30:

[0066] In step S10, during the reset phase, the first node is pulled down to a preset low potential by the reset module, and then the writing phase begins.

[0067] In this embodiment, a reset module is added to each of the original pixel driving units. Through the reset module, the scanning line where the pixel driving unit is located can enter the reset stage before entering the light emission stage. By pulling down the potential of the first node in the reset stage, the first node of each pixel driving unit in the scanning line can be uniformly pulled down to a preset low potential.

[0068] Because the potential at the first node flows into the light-emitting device during subsequent light-emitting stages, uniformly lowering the potential of the first node to the same low potential can eliminate potential shifts in different pixel driving units on the same scan line caused by residual charge. Simultaneously, because the threshold voltage of the thin-film transistor in the pixel driving unit drifts after long-term operation, causing distortion in the driving current flowing into the light-emitting device, this reset stage can periodically reset the potential at the first node, allowing the driving current flowing into the light-emitting device from the first node to return to its initial characteristic curve. This effectively alleviates brightness decay and Mura (display mottle) defects, compensates for threshold voltage drift when the thin-film transistor is turned on to drive the light-emitting device, and addresses the current hysteresis characteristic exhibited by the thin-film transistor in different voltage scanning directions when driving the light-emitting device. (See also...) Figure 2 As shown, when the gate voltage (Vgs on the horizontal axis) changes in different directions, the corresponding drain-source current (Ids on the vertical axis) curves do not coincide, resulting in the displayed image appearing as shown. Figure 3 When displaying a chessboard-type image, afterimages may be left behind. Therefore, during the reset phase, before driving the pixel driving units on the same scan line to emit light, their first nodes are uniformly pulled down to the same preset low potential. This ensures that the pixel driving units on the same scan line can be powered on at the same potential, thereby unifying the potential change path of the first node when charging it later, eliminating the difference in direction dependence, and thus reducing display afterimages to a certain extent.

[0069] Step S20: Control the charging module to write the data voltage on the data line and the threshold voltage to be canceled in the charging module into the first node, charge the first node to the first voltage, and then enter the light emission stage.

[0070] In this embodiment, a charging module is added to each of the original pixel driving units. The charging module in this embodiment can generate an additional threshold voltage to be canceled during the execution phase, which is then passed into the light-emitting device to at least partially cancel the real-time threshold voltage flowing into the light-emitting device during the light-emitting phase, thereby suppressing or eliminating the real-time threshold voltage.

[0071] Specifically, when the charging module enters the charging stage, it writes the data voltage on the data line to the first node to charge the first node. During this process, the charging module generates an additional threshold voltage to be canceled. This threshold voltage is also written to the first node, so that the voltage on the first node is charged to the data voltage + the threshold voltage to be canceled (i.e., the first voltage). This allows the threshold voltage to be canceled to at least partially cancel the real-time threshold voltage present in the light-emitting stage in the subsequent light-emitting stage, thereby reducing or eliminating the display abnormality caused by the threshold voltage.

[0072] Step S30: Based on the driving module that has been connected to the driving signal, the first voltage, the driving voltage on the positive power supply voltage terminal and the real-time threshold voltage generated by the driving module are transmitted to the light-emitting device, wherein the threshold voltage to be canceled in the first voltage is at least partially canceled out by the real-time threshold voltage.

[0073] In this embodiment, a driving module is added to each of the original pixel driving units. This driving module can form a driving current by combining the first voltage on the first node and the driving voltage on the positive power supply voltage terminal, and provide it to the light-emitting device. At the same time, the driving module generates a real-time threshold voltage during the driving process, which also flows into the light-emitting device. Therefore, the real-time threshold voltage will at least partially cancel the threshold voltage to be canceled in the first voltage, thereby reducing or eliminating the influence of the real-time threshold voltage on the light-emitting device to a certain extent.

[0074] Through the above steps, the inherent characteristics of thin-film transistors, namely their hysteresis and real-time threshold voltage, are reduced or eliminated, thereby reducing or eliminating abnormal display phenomena and effectively improving the surface uniformity and display smoothness of self-emissive displays to a certain extent.

[0075] Among them, the pixel driving method mentioned above can be based on, for example, Figure 4 The pixel driving circuit is implemented.

[0076] The pixel driving circuit includes multiple rectangularly arranged pixel driving units 10, each pixel driving unit 10 including a reset module 101, a charging module 102 and a driving module 103.

[0077] The output and control terminals of the reset module 101 are both connected to the previous level scan signal terminal (i.e. Figure 4 In G(n-1)), the input terminal of the reset module 101 is electrically connected to the first node A. The reset module 101 is used to pull down the first node A to a preset low potential during the reset phase.

[0078] like Figure 4As can be seen, the output and control terminals of the reset module 101 in the pixel driving unit 10 proposed in this embodiment are both connected to the previous level scanning signal terminal, and the input terminal is electrically connected to the first node A. By multiplexing the previous level scanning signal, it is used as the control signal for the reset module 101 in the current level pixel driving unit 10 to be turned on. When the reset module 101 enters the on state based on the previous level scanning signal, a low-impedance path is formed between its input and output terminals, which forces the potential on the first node A to be pulled down to a preset low potential, thereby realizing the potential reset and unification of the first node A on the same scan line.

[0079] It should be noted that the preset low potential is the potential on the negative power supply voltage terminal ELVSS in the previous pixel driving unit 10.

[0080] The input terminal of the charging module 102 is connected to the data line S, and the control terminal of the charging module 102 is connected to the scan line of this stage (i.e., Figure 4 On Gn), the output terminal of the charging module 102 is electrically connected to the first node A. The charging module 102 is used to charge the first node A to a first voltage during the writing phase. The first voltage is the sum of the data voltage on the data line S and the voltage of the threshold voltage to be canceled that exists in the charging module 102.

[0081] The charging module 102 included in the pixel driving unit 10 proposed in this embodiment has its input terminal connected to the data line S, enabling it to receive the data voltage on the data line S and simultaneously control the input to the local scanning signal terminal. It performs conduction control by multiplexing the local scanning signal. Its output terminal is connected to the first node A. When entering the conduction state based on the local scanning signal, it receives the data voltage on the data line S and writes this data voltage into the first node A. Simultaneously, when the charging module 102 enters the conduction state, it generates an additional threshold voltage, namely, a threshold voltage to be canceled. This threshold voltage to be canceled is also written into the first node A, charging it together with the data voltage. Therefore, in this embodiment, the first voltage on the first node A is the data voltage plus the threshold voltage to be canceled. The purpose is that when this first voltage on the first node A is subsequently transmitted to the light-emitting device D, it can at least partially cancel out the real-time threshold voltage present during pixel driving, thereby reducing or eliminating the influence of the real-time threshold voltage on the light-emitting device D.

[0082] The input terminal of the driving module 103 is connected to the first node A and the positive power supply voltage terminal ELVDD, respectively. The control terminal of the driving module 103 is connected to the driving signal terminal, and the output terminal of the driving module 103 is connected to the light-emitting device D. The driving module 103 is used to transmit the driving voltage based on the first voltage, the positive power supply voltage terminal ELVDD, and the real-time threshold voltage generated by the driving module 103 to the light-emitting device D according to the driving signal input from the driving signal terminal during the light-emitting stage. The threshold voltage to be canceled in the first voltage is at least partially canceled out by the real-time threshold voltage.

[0083] Compared to a conventional pixel driving unit 10, the pixel driving unit 10 proposed in this embodiment adds a driving module 103. The input terminal of the driving module 103 is connected to the first node A and the positive power supply voltage terminal ELVDD, respectively, and the output terminal is connected to the light-emitting device D. It can enter the conducting state when it receives the driving signal from the driving signal terminal at its control terminal. In the conducting state, the first voltage on the first node A and the driving voltage on the positive power supply voltage terminal ELVDD provide driving current to the light-emitting device D through the driving module 103. During the conduction process of the driving module 103, there will be a real-time threshold voltage, which will also be transmitted to the light-emitting device D. At this time, the threshold voltage to be canceled in the first voltage will at least partially cancel the real-time threshold voltage, thereby reducing or eliminating the adverse effects of the real-time threshold voltage on the light-emitting state of the light-emitting device D.

[0084] Specifically, the circuit structure of the pixel driving unit 10 can be referred to Figure 5 As shown.

[0085] The pixel driving unit 10 includes a storage capacitor C, and the first node A is located on the first capacitor terminal of the storage capacitor C. The reset module 101 includes a first transistor T1; the control terminal and input terminal of the first transistor T1 are respectively connected to the previous stage scan signal terminal (i.e., Figure 5 The first transistor T1 is connected to the first capacitor terminal, and the output terminal of the first transistor T1 is connected to the first capacitor terminal.

[0086] First, the conventional pixel driving unit 10 will be explained, referring to... Figure 6 It can be seen that the conventional pixel driving unit 10 has a 2T1C (i.e., two thin-film transistors T and one storage capacitor C1) structure. When its thin-film transistors T are turned on, the driving current transferred to the light-emitting device D1 is b(V data +V th -V ELVDD ) 2 .

[0087] Where b is a constant, V data V is the data voltage on data line S. ELVDDThe positive power supply voltage terminal is ELVDD, V th The threshold voltage of the thin-film transistor (TFT) is known to directly affect the light-emitting device D1, causing uneven brightness and image ghosting.

[0088] Therefore, based on the above problems, this embodiment proposes the following... Figure 5 The reset module 101 described herein includes a first transistor T1. It is known that the control terminal and input terminal of the first transistor T1 are connected to the scanning signal terminal of the previous stage, and the output terminal is connected to the first capacitor terminal of the storage capacitor C.

[0089] When the previous level scan signal on the previous level scan signal terminal transitions to a low level, the gate voltage (i.e., the voltage on the control terminal) of the first transistor T1 will suddenly drop to a low potential, and the source voltage (i.e., the voltage on the input terminal) will also simultaneously become low. At this time, if there is charge in the storage capacitor C, a potential difference will be formed between the input and output terminals. Due to the instantaneous conduction of the body diode response, the first transistor T1 will cause the charge in the storage capacitor C to be output from the first capacitor terminal and discharged through the source-drain path of the first transistor T1 to the negative power supply voltage terminal ELVSS corresponding to the previous level scan signal terminal, pulling the potential on the first capacitor terminal down to the preset low potential of the negative power supply voltage terminal ELVSS, thereby realizing the reset operation of the storage capacitor C.

[0090] Meanwhile, since the reset module 101 on the same scan line is connected to the same upper-level scan signal terminal, its reset operation will pull the potential of the first capacitor terminal of the storage capacitor C on the same scan line down to the same preset low potential, thereby unifying the potential of the first capacitor terminal. This ensures that the charging direction of the storage capacitor C on the same scan line is consistent during the subsequent charging process of the first capacitor terminal, thus offsetting the hysteresis characteristics caused by the threshold voltage of the transistor in the pixel driving unit 10 and avoiding image retention caused by hysteresis characteristics.

[0091] The charging module 102 includes a second transistor T2, a third transistor T3, and a fourth transistor T4; the control terminal of the second transistor T2 is connected to the current scan line (i.e., Figure 5 In Gn), the input terminal of the second transistor T2 is connected to the data line S, and the output terminal of the second transistor T2 is connected to the output terminal of the third transistor T3; the input terminal of the third transistor T3 is connected to the input terminal of the fourth transistor T4, and the control terminal of the third transistor T3 and the output terminal of the fourth transistor T4 are connected to the first capacitor terminal; the control terminal of the fourth transistor T4 is connected to the scanning signal terminal of this stage.

[0092] When the scan signal output on the current scan line transitions to a low level, the second transistor T2 enters the conducting state. Its input terminal begins to receive data voltage from the data line S and transmits it to the output terminal. At the same time, because the control terminal of the fourth transistor T4 is connected to the scan signal terminal, the fourth transistor T4 also enters the conducting state. Its input and output terminals form a low-impedance path, which forces the potential on the input terminal of the third transistor T3 to be pulled to the same level as the control terminal. That is, the control terminal and the input terminal of the third transistor T3 are short-circuited, and the third transistor T3 at this time exhibits a diode connection.

[0093] The data voltage at the output of the second transistor T2 flows to the input of the fourth transistor T4 via the third transistor T3. The output of the fourth transistor T4 then charges the first capacitor (i.e., the first node A). Simultaneously, the conduction of the second transistor T2, the third transistor T3, and the fourth transistor T4 creates a threshold voltage, which is the threshold voltage to be canceled in this embodiment. This threshold voltage, along with the data voltage, flows into the first capacitor to charge it, bringing the voltage at the first node A to the data voltage plus the threshold voltage to be canceled (i.e., the first voltage). In other words, during the charging phase, the charging module 102 pre-stores a threshold voltage to be canceled at the first node A. This voltage is used to cancel the real-time threshold voltage that abnormally affects the light-emitting device D during the subsequent light-emitting phase, thereby reducing or eliminating the impact of the real-time threshold voltage on the light-emitting device D.

[0094] For ease of labeling, the first voltage at the first node A is labeled as V. data +V th1 , where V data For data voltage, V th1 The threshold voltage to be canceled.

[0095] The driving module 103 includes a fifth transistor T5, a third transistor T3, and a sixth transistor T6. The control terminal of the fifth transistor T5 is connected to the driving signal terminal, the input terminal of the fifth transistor T5 is connected to the positive power supply voltage terminal ELVDD, and the output terminal of the fifth transistor T5 is connected to the input terminal of the third transistor T3. The control terminal of the sixth transistor T6 is connected to the driving signal terminal, the input terminal of the sixth transistor T6 is connected to the output terminal of the third transistor T3, and the output terminal of the sixth transistor T6 is connected to the positive terminal of the light-emitting device D. The second capacitor terminal of the storage capacitor C is connected to the connection line between the fifth transistor T5 and the positive power supply voltage terminal ELVDD.

[0096] When the drive signal output at the drive signal terminal transitions to a low level, the fifth transistor T5 and the sixth transistor T6 will enter the conducting state. In this state, the fifth transistor T5, while connected to the drive voltage at the positive power supply terminal ELVDD and transmitting it to its output, also obtains the first voltage at the first node A via the storage capacitor C. This first voltage at the first node A, along with the drive voltage, is transmitted to its output. Since the third transistor T3 remains connected as a diode, the drive voltage plus the first voltage at the output of the fifth transistor T5 will be transmitted through the third transistor T3 to the sixth transistor T6, and then through the conducting sixth transistor T6 to the light-emitting device D, providing drive current for D.

[0097] Simultaneously, the third transistor T3, the fifth transistor T5, and the sixth transistor T6, all in the on state, will have a real-time threshold voltage. This real-time threshold voltage, along with the driving voltage and the first voltage, will flow into the light-emitting device D. Therefore, the formula for the driving current that drives the light-emitting device D at this time is: I = b(V data +V th1 -V ELVDD -V th2 ) 2 =b(V data -V ELVDD ) 2 .

[0098] Where I is the driving current, b is a constant, and V ELVDD V is the driving voltage. th2 Given the real-time threshold voltage, it can be seen that the threshold voltage to be canceled and the real-time threshold voltage will cancel each other out, so that the driving current for driving the light-emitting device D to emit light consists only of the controllable data voltage and driving voltage. This effectively avoids the influence of the threshold voltage of the conducting transistor on the brightness of the light-emitting device D, thus preventing abnormal display phenomena.

[0099] In one possible implementation, step S31 may be included before step S30:

[0100] Step S31: Based on the previous level scanning signal and the current level scanning signal which are in a high level state, a low level driving signal is generated and transmitted to the driving module to control the driving module to drive the light-emitting device to emit light.

[0101] Furthermore, in this embodiment, the driving signal for controlling the light emission stage changes based on the level states of the previous scan signal and the current scan signal. Since the reset stage and charging stage in this embodiment are both enabled based on the previous scan signal and the current scan signal being in a low-level state, the driving signal is in a high-level state when either the previous scan signal or the current scan signal is in a low-level state. This avoids the situation where the driving of the light emission device is enabled during the reset stage or the charging stage, which could result in the failure to effectively cancel the real-time threshold voltage.

[0102] Step S31 can be implemented based on the timing control module 104.

[0103] The control terminal of the timing control module 104 is connected to the current scanning signal terminal and the previous scanning signal terminal respectively. The input terminal of the timing control module 104 is connected to the high-level voltage terminal VGH, and the output terminal of the timing control module 104 is connected to the low-level voltage terminal VGL. The timing control module 104 is used to adjust the level state of the output drive signal according to the signal level state of the current scanning signal terminal and the previous scanning signal terminal.

[0104] Reference Figure 5 As can be seen, in this embodiment, the driving signal is adjusted and output by the timing control module 104. Its control terminal is connected to the current scanning signal terminal and the previous scanning signal terminal, respectively. Therefore, it can acquire the level state of the current scanning signal and the previous scanning signal in real time. Its input terminal is connected to the high-level voltage terminal VGH and the low-level voltage terminal VGL, respectively. Therefore, when either the current scanning signal or the previous scanning signal is in a low-level state, the timing control module 104 will conduct the high-level voltage on the high-level voltage terminal VGH and transmit the high-level voltage to the driving module 103, controlling the driving module 103 to remain in the off state. Only when both the current scanning signal and the previous scanning signal are in a high-level state will the timing control module 104 connect to the low-level voltage terminal VGL, pull down the level state of the driving signal through the low-level voltage terminal VGL, and transmit it to the driving module 103, controlling the driving module 103 to conduct.

[0105] This embodiment further reuses the scanning signals of the current level and the previous level, and realizes the timing control between the reset stage, the charging stage and the driving stage without the need for additional peripheral hardware to generate control signals, effectively reducing hardware costs and panel space occupation.

[0106] Detailed control timing reference Figure 7 It can be seen that during the reset phase (i.e. Figure 7 On ts1), the previous level scan signal (i.e. Figure 7The scan signal output by G(n-1) is in a low-level state, and the scan signal of this stage (i.e. Figure 7 The scanning signal output by Gn is in a high-level state, therefore the timing control module 104 is connected to a high-level voltage at this time, and outputs a high-level drive signal (i.e., Figure 7 The drive signal output by Pn); during the charging phase (i.e. Figure 7 In the ts2 stage, the previous scan signal is high, and the current scan signal is low. Therefore, the timing control module 104 will still be connected to a high-level voltage and output a high-level drive signal. During the drive phase (i.e., Figure 7 On ts3), both the previous level scan signal and the current level scan signal are in a high level state. Therefore, the timing control module 104 is connected to the low level voltage terminal VGL at this time and outputs a low level drive signal.

[0107] Specifically, refer to Figure 5 As shown.

[0108] The timing control module 104 includes a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, and a tenth transistor T10;

[0109] The control terminal of the seventh transistor T7 is connected to the scanning signal terminal of this stage, and the control terminal of the eighth transistor T8 is connected to the scanning signal terminal of the previous stage. The input terminals of the seventh transistor T7 and the eighth transistor T8 are connected to the high-level voltage terminal VGH. The output terminals of the seventh transistor T7 and the eighth transistor T8 are connected to the input terminal of the ninth transistor T9. The output terminal of the ninth transistor T9 is connected to the input terminal of the tenth transistor T10, and the control terminal of the ninth transistor T9 is connected to the scanning signal terminal of this stage. The output terminal of the tenth transistor T10 is connected to the low-level voltage terminal VGL, and the control terminal of the tenth transistor T10 is connected to the scanning signal terminal of the previous stage. The drive signal terminal is led out from the connection line between the seventh transistor T7, the eighth transistor T8, and the ninth transistor T9.

[0110] according to Figure 5 It can be seen that the high-level voltage is controlled by the seventh transistor T7 and the eighth transistor T8, while the low-level voltage is controlled by the ninth transistor T9 and the tenth transistor T10. The seventh transistor T7 and the eighth transistor T8 are connected in parallel, therefore the connection of the high-level voltage is affected by either the seventh transistor T7 or the eighth transistor T8; while the ninth transistor T9 and the tenth transistor T10 are connected in series, therefore the connection to the low-level voltage terminal VGL is affected by both the ninth transistor T9 and the tenth transistor T10.

[0111] When the current scan signal is low and the previous scan signal is high, the seventh transistor T7 and the tenth transistor T10 are in the on state, while the eighth transistor T8 and the ninth transistor T9 are in the off state. Therefore, the drive signal terminal is connected to the high-level voltage terminal VGH through the seventh transistor T7, which pulls the drive signal potential on the drive signal terminal high and controls the sixth transistor T6 and the fifth transistor T5 to enter the off state.

[0112] When the current scan signal is high and the previous scan signal is low, the seventh transistor T7 and the tenth transistor T10 are off, while the eighth transistor T8 and the ninth transistor T9 are on. Therefore, the drive signal terminal is connected to the high-level voltage terminal VGH through the eighth transistor T8, while the sixth transistor T6 and the fifth transistor T5 remain off.

[0113] When both the current scan signal and the previous scan signal are at a high level, the seventh transistor T7 and the eighth transistor T8 are in the off state, and the ninth transistor T9 and the tenth transistor T10 are in the on state. Therefore, the drive signal terminal is connected to the low-level voltage terminal VGL through the ninth transistor T9 and the tenth transistor T10, and the drive signal terminal is pulled down to a low-level voltage, thereby outputting a low-level drive signal, which causes the sixth transistor T6 and the fifth transistor T5 to enter the on state.

[0114] In this configuration, the pixel driving units 10 on the same scan line are connected to the same timing control module 104. This not only enables unified light emission driving control of the pixel driving units 10 on the same scan line, but also reduces the area occupied by the timing control module 104 on the panel. This avoids the problems of high device cost and large required panel area that exist when the pixel driving units 10 and the timing control module 104 are connected one-to-one. For details, please refer to [reference needed]. Figure 8 As shown.

[0115] This level of scan line (i.e.) Figure 8 Each pixel driving unit 10 on Gn is connected to the Pn driving signal output by the same timing control module 104 to control the switching of the sixth transistor T6 and the fifth transistor T5; while the next level scan line (i.e. Figure 8 Each pixel driving unit 10 on G(n+1) is connected to the P(n+1) driving signal output by the same timing control module 104 to control the switching of the sixth transistor T6 and the fifth transistor T5.

[0116] Among them, because Figure 8 and Figure 5 The structures shown are the same, therefore it is not correct. Figure 8 The structure will be explained again.

[0117] This application provides a display device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, which are executed by the at least one processor to enable the at least one processor to perform the pixel driving method in the first embodiment described above.

[0118] The following is for reference. Figure 9 The diagram illustrates a structural schematic of a display device suitable for implementing embodiments of this application. The display device in the embodiments of this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 9 The display device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0119] like Figure 9 As shown, the display device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in the read-only memory 1002 or a program loaded from the storage device 1003 into the random access memory 1004. The random access memory 1004 also stores various programs and data required for the operation of the display device. The processing unit 1001, the read-only memory 1002, and the random access memory 1004 are interconnected via a bus 1005. An input / output interface 1006 is also connected to the bus. Typically, the following systems can be connected to the input / output interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. The communication device 1009 allows the display device to exchange data with other devices wirelessly or via wired communication. Although the diagram shows display devices with various systems, it should be understood that it is not required to implement or have all of the systems shown. More or fewer systems may be implemented alternatively.

[0120] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from read-only memory 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0121] The display device provided in this application, employing the pixel driving method in the above embodiments, can solve the technical problem of display anomalies caused by the inherent characteristics of thin-film transistors. Compared with the prior art, the beneficial effects of the display device provided in this application are the same as those of the pixel driving method provided in the above embodiments, and other technical features in this display device are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.

[0122] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0123] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0124] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A pixel driving circuit, characterized in that, The pixel driving circuit includes multiple rectangularly arranged pixel driving units, and each pixel driving unit includes a reset module, a charging module and a driving module. The output and control terminals of the reset module are both connected to the previous level scanning signal terminal, and the input terminal of the reset module is electrically connected to the first node. The reset module is used to pull down the first node to a preset low potential during the reset phase. The input terminal of the charging module is connected to the data line, the control terminal of the charging module is connected to the scan line of the current level, and the output terminal of the charging module is electrically connected to the first node. The charging module is used to charge the first node to a first voltage during the writing phase, wherein the first voltage is the sum of the data voltage on the data line and the voltage of the charging module to be canceled threshold voltage. The input terminal of the driving module is connected to the first node and the positive power supply voltage terminal respectively. The control terminal of the driving module is connected to the driving signal terminal. The output terminal of the driving module is connected to the light-emitting device. The driving module is used to transmit the driving voltage based on the first voltage, the driving voltage on the positive power supply voltage terminal and the real-time threshold voltage generated by the driving module to the light-emitting device according to the driving signal input from the driving signal terminal during the light-emitting stage. The threshold voltage to be canceled in the first voltage is at least partially canceled by the real-time threshold voltage. The pixel driving unit also includes a timing control module; The control terminal of the timing control module is connected to the current scanning signal terminal and the previous scanning signal terminal, respectively. The input terminal of the timing control module is connected to the high-level voltage terminal, and the output terminal of the timing control module is connected to the low-level voltage terminal. The timing control module is used to adjust the level of the output drive signal according to the signal level of the current scanning signal terminal and the previous scanning signal terminal; The timing control module includes a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor; The control terminal of the seventh transistor is connected to the scanning signal terminal of the current stage, the control terminal of the eighth transistor is connected to the scanning signal terminal of the previous stage, the input terminals of the seventh transistor and the eighth transistor are connected to the high-level voltage terminal, and the output terminals of the seventh transistor and the eighth transistor are connected to the input terminal of the ninth transistor. The output terminal of the ninth transistor is connected to the input terminal of the tenth transistor, and the control terminal of the ninth transistor is connected to the scanning signal terminal of this stage. The output terminal of the tenth transistor is connected to a low-level voltage terminal, and the control terminal of the tenth transistor is connected to the previous level scan signal terminal. The drive signal terminal is led out from the connection line between the seventh transistor and the eighth transistor and the ninth transistor.

2. The pixel driving circuit as described in claim 1, characterized in that, The pixel driving unit is provided with a storage capacitor, the first node is located on the first capacitor terminal of the storage capacitor, and the reset module includes a first transistor. The control terminal and input terminal of the first transistor are respectively connected to the scanning signal terminal of the previous stage, and the output terminal of the first transistor is connected to the terminal of the first capacitor.

3. The pixel driving circuit as described in claim 2, characterized in that, The charging module includes a second transistor, a third transistor, and a fourth transistor; The control terminal of the second transistor is connected to the scan line of this stage, the input terminal of the second transistor is connected to the data line, and the output terminal of the second transistor is connected to the output terminal of the third transistor. The input terminal of the third transistor is connected to the input terminal of the fourth transistor, and the control terminal of the third transistor and the output terminal of the fourth transistor are both connected to the first capacitor terminal. The control terminal of the fourth transistor is connected to the scanning signal terminal of this stage.

4. The pixel driving circuit as described in claim 3, characterized in that, The driving module includes a fifth transistor, the third transistor, and a sixth transistor; The control terminal of the fifth transistor is connected to the drive signal terminal, the input terminal of the fifth transistor is connected to the positive power supply voltage terminal, and the output terminal of the fifth transistor is connected to the input terminal of the third transistor. The control terminal of the sixth transistor is connected to the drive signal terminal, the input terminal of the sixth transistor is connected to the output terminal of the third transistor, and the output terminal of the sixth transistor is connected to the positive terminal of the light-emitting device. The second capacitor terminal of the storage capacitor is connected to the connection line between the fifth transistor and the positive power supply voltage terminal.

5. The pixel driving circuit as described in claim 1, characterized in that, The pixel driving units on the same scan line are connected to the same timing control module.

6. A pixel driving method, characterized in that, The pixel driving method is applied to the pixel driving circuit as described in any one of claims 1 to 5, wherein the pixel driving circuit includes a plurality of rectangularly arranged pixel driving units, and each pixel driving unit includes a reset module, a charging module and a driving module. The pixel driving method includes: During the reset phase, the first node is pulled down to a preset low potential by the reset module, and then the write phase begins. The charging module is controlled to write the data voltage on the data line and the threshold voltage to be canceled existing in the charging module into the first node. After the first node is charged to the first voltage, it enters the light emission stage. Based on the driving module that has been connected to the driving signal, the first voltage, the driving voltage on the positive power supply voltage terminal, and the real-time threshold voltage generated by the driving module are transmitted to the light-emitting device, wherein the threshold voltage to be canceled in the first voltage is at least partially canceled out by the real-time threshold voltage.

7. The pixel driving method as described in claim 6, characterized in that, The pixel driving unit further includes a timing control module, and the step based on the driving module with the accessed driving signal, prior to the step of using the timing control module, further includes: Based on the high-level scanning signal of the previous stage and the high-level scanning signal of the current stage, a low-level driving signal is generated and transmitted to the driving module to control the driving module to drive the light-emitting device to emit light.

8. A display device, characterized in that, The display device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the pixel driving method as described in any one of claims 6 and 7.

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