HEMT device structure and preparation method thereof
Through local heating, the dopant is activated, the problems of epitaxial layer damage and substrate deformation caused by traditional overall heating are solved, and the performance and voltage resistance of HEMT devices are improved.
Patent Information
- Application Number
- CN202510484153.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-17
- Publication Date
- 2025-07-11
AI Technical Summary
In the preparation of traditional HEMT devices, the high temperature of the overall heating activation dopant will destroy the non-injection area of the epitaxial layer, affect the performance of the device, and the substrate is prone to deformation at high temperatures.
Using the method of local heating to activate the dopant, by forming blind grooves on the epitaxial layer for ion implantation, the first passivation layer blocks laser annealing only the N-type doped region, combined with the design of ohmic metal to cover the doped region and extend out of the field plate structure, controlling the risk of metal diffusion.
The ohmic contact resistance of the source and drain electrodes is reduced, the performance of HEMT devices is improved, the thermal damage of the epitaxial layer and substrate is avoided, and the ohmic contact mass and electric field distribution are optimized.
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Figure CN120302664A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor structure preparation, and particularly to a HEMT device structure and a preparation method thereof. Background Art
[0002] In high-speed compound semiconductor devices, high electron mobility transistors (HEMTs) play a crucial role due to their excellent properties such as low threshold voltage, high current cut-off frequency, and low gate leakage current. High electron mobility transistors based on III-V compound semiconductors have received continuous attention in recent years for their applications in microwave, millimeter-wave devices, monolithic integrated circuits, and logic integrated circuits.
[0003] When preparing HEMT devices, ion implantation technology is generally used to implant accelerated dopant atoms into the epitaxial layer including the device channel layer and the barrier layer. Then, a dopant activation step is performed to apply heat to the semiconductor body of the epitaxial layer. This heat can repair the crystal damage caused by atomic implantation, and this heat can cause the implanted dopant atoms to move to substitutional lattice sites, thereby forming N-type doping. The free electron concentration in the epitaxial layer increases, and electrons can more easily transfer from the semiconductor to the ohmic metal, thus reducing energy loss and achieving a lower source-drain ohmic contact resistance. The traditional process generally uses the method of overall heating of the structure to activate the dopant. The high temperature of overall heating will damage the non-implanted area of the epitaxial layer, affecting the performance of HEMT devices. Moreover, when the activation temperature is above 1100 °C, the substrate is easily deformed by heat. Summary of the Invention
[0004] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a HEMT device structure and a preparation method thereof, which are used to solve the problems in the prior art that when using the method of overall heating of the structure to activate the dopant, the high temperature of overall heating will damage the non-implanted area of the epitaxial layer, affecting the performance of HEMT devices, and when the activation temperature is above 1100 °C, the substrate is easily deformed by heat.
[0005] To achieve the above purpose and other related purposes, the present invention provides a preparation method of a HEMT device structure, and the preparation method includes:
[0006] Providing a semiconductor substrate;
[0007] Forming an epitaxial layer on the semiconductor substrate, where the epitaxial layer includes a channel layer and a barrier layer of a HEMT device;
[0008] Forming a first passivation layer on the epitaxial layer;
[0009] Form blind grooves downward in a plurality of first preset regions on the upper surface of the first passivation layer;
[0010] Perform ion implantation on the surface of the epitaxial layer below the blind grooves to a preset depth to form an N-type doped region;
[0011] Use the first passivation layer outside the first preset region to block the laser, and only perform laser annealing on the N-type doped region;
[0012] Remove the first passivation layer.
[0013] Optionally, the preparation method further includes:
[0014] Form a second passivation layer on the structure after removing the first passivation layer;
[0015] Remove the second passivation layer in a second preset region above the first preset region, and the planar size of the second preset region is larger than the planar size of the first preset region;
[0016] Form ohmic metal in a third preset region within the second preset region, the planar size of the third preset region is smaller than the planar size of the second preset region, the planar size of the third preset region is larger than the planar size of the first preset region, and the projection of the third preset region in the horizontal direction covers the first preset region;
[0017] Remove the second passivation layer in a preset gate region to form a gate trench;
[0018] Form gate metal that at least fills the gate trench.
[0019] Further, the minimum distance between the ohmic metal and the second passivation layer is 150 nm to 250 nm; the ohmic metal extends 150 nm to 250 nm out of the N-type doped region in the horizontal direction.
[0020] Further, after forming the ohmic metal in the third preset region within the second preset region, it further includes a step of annealing the ohmic metal.
[0021] Optionally, the thickness of the first passivation layer formed on the epitaxial layer is not less than 300 nm.
[0022] Optionally, the thickness of the first passivation layer below the blind grooves formed downward on the upper surface of the first passivation layer is 15 nm to 25 nm.
[0023] Optionally, perform Si ion implantation on the surface of the epitaxial layer below the blind grooves to a preset depth to form the N-type doped region.
[0024] Optionally, the material of the formed epitaxial layer is a GaN-based material.
[0025] Optionally, the materials of the first passivation layer and the second passivation layer both include SiN.
[0026] The present invention also provides a HEMT device structure, which is prepared by using the preparation method of the HEMT device structure described in any one of the above.
[0027] As described above, the HEMT device structure and its preparation method of the present invention have the following beneficial effects: By forming an epitaxial layer on a semiconductor substrate, the epitaxial layer includes a channel layer and a barrier layer of the HEMT device, then forming a first passivation layer on the epitaxial layer, and then forming blind grooves downward in several first preset regions on the upper surface of the first passivation layer, performing ion implantation on the surface of the epitaxial layer below the blind grooves to a preset depth to form an N-type doping region, and finally using the first passivation layer to block the laser and selectively performing laser annealing only on the N-type doping region, realizing local heating to activate the dopant, reducing the ohmic contact resistance between the source and drain electrodes, improving the performance of the HEMT device, and solving the problems that in the traditional process, when the whole HEMT device structure is annealed to activate the dopant, the high temperature damages the non-implanted region of the epitaxial layer and the semiconductor substrate is deformed by heat. And by removing the passivation layer above the first preset region after forming the second passivation layer and forming ohmic metal in the third preset region within the second preset region, ensuring that the ohmic metal covers the N-type doping region and extends out a structure similar to a field plate, and at the same time controlling the minimum distance between the ohmic metal and the passivation layer, effectively reducing the risk of metal atom diffusion, optimizing the ohmic contact quality, dispersing the electric field lines, and reducing the surface electric field strength. Description of the Drawings
[0028] Figure 1 It shows a schematic flow chart of the preparation method of the HEMT device structure of the present invention.
[0029] Figures 2 to 11 It shows a schematic structural diagram presented by each step of the preparation method of the HEMT device structure of the present invention.
[0030] Description of Component Labels
[0031] 10 Semiconductor substrate
[0032] 11 Epitaxial layer
[0033] 12 First passivation layer
[0034] 13 Blind groove
[0035] 14 N-type doping region
[0036] 15 Second passivation layer
[0037] 16 Ohmic metal
[0038] 17 gate trench
[0039] 18 gate metal
[0040] R1 First preset area
[0041] R2 Second preset area
[0042] R3 Third preset area Detailed implementation manners
[0043] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0044] Please refer to Figures 1 to 11 . It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.
[0045] This embodiment provides a preparation method for a HEMT device structure, as Figure 1 shown. The preparation method includes:
[0046] S1, providing a semiconductor substrate;
[0047] S2, forming an epitaxial layer on the semiconductor substrate, where the epitaxial layer includes a channel layer and a barrier layer of the HEMT device;
[0048] S3, forming a first passivation layer on the epitaxial layer;
[0049] S4, forming blind grooves downward in several first preset areas on the upper surface of the first passivation layer;
[0050] S5, performing ion implantation on the surface of the epitaxial layer below the blind grooves to a preset depth to form an N-type doped region;
[0051] S6, using the first passivation layer outside the first preset area to block the laser, and only performing laser annealing on the N-type doped region;
[0052] S7, removing the first passivation layer.
[0053] The manufacturing method of the HEMT device structure of this embodiment forms an epitaxial layer on a semiconductor substrate. The epitaxial layer includes the channel layer and the barrier layer of the HEMT device. Then, a first passivation layer is formed on the epitaxial layer. Next, blind grooves are formed downward in several first preset regions on the upper surface of the first passivation layer. Ion implantation is performed on the surface of the epitaxial layer below the blind grooves to a preset depth to form an N-type doped region. Finally, the first passivation layer is used to block the laser, and only the N-type doped region is selectively laser-annealed, realizing local heating to activate the dopant, reducing the source-drain ohmic contact resistance, improving the performance of the HEMT device, and solving the problems of high-temperature damage to the non-implanted region of the epitaxial layer and thermal deformation of the semiconductor substrate during the overall annealing and activation of the dopant in the traditional process of the HEMT device structure.
[0054] The manufacturing method of the HEMT device structure of this embodiment will be described in detail below with reference to specific drawings.
[0055] As shown in Figure 2 Figure [not shown], first, step S1 is performed to provide a semiconductor substrate 10.
[0056] As an example, the semiconductor substrate 10 includes one of silicon (Si), sapphire, silicon carbide (SiC), and silicon germanium (SiGe).
[0057] As shown in Figure 2 Figure [not shown], then, step S2 is performed to form an epitaxial layer 11 on the semiconductor substrate 10. The epitaxial layer 11 includes the channel layer and the barrier layer (not shown) of the HEMT device.
[0058] As an example, the epitaxial layer 11 may further include a transition layer formed between the semiconductor substrate 10 and the channel layer, which can be specifically designed according to actual needs and will not be overly limited here. Among them, the channel layer and the barrier layer are made of different materials, and a two-dimensional electron gas is formed at the interface between the channel layer and the barrier layer. This two-dimensional electron gas serves as the channel of the HEMT device, providing a conductive channel between the source and drain of the device.
[0059] As an example, the material of the formed epitaxial layer 11 is a gallium nitride (GaN)-based material. Further, the channel layer may be a gallium nitride (GaN) layer, and the barrier layer may be an aluminum gallium nitride (AlGaN) layer.
[0060] As shown in Figure 3 Figure [not shown], then, step S3 is performed to form a first passivation layer 12 on the epitaxial layer 11.
[0061] As an example, the first passivation layer 12 may be formed by a plasma enhanced chemical vapor deposition (PECVD) process. The thickness of the first passivation layer 12 formed on the epitaxial layer 11 in step S3 is exemplarily not less than 300 nm, and may specifically be 300 nm, so that the first passivation layer 12 is used as a hard mask layer for dopant ion implantation in subsequent steps, and is used to isolate the annealing temperature in subsequent laser annealing steps. The material of the first passivation layer 12 includes silicon nitride (SiN).
[0062] As Figure 4 shown, then step S4 is carried out, and blind grooves 13 are formed downward in several first preset regions R1 on the upper surface of the first passivation layer 12.
[0063] As Figure 5 shown, then step S5 is carried out, and ion implantation is performed on the surface of the epitaxial layer 11 below the blind grooves 13 to a preset depth to form an N-type doped region 14.
[0064] As an example, the blind grooves 13 may be formed by a photolithography etching process. The thickness of the first passivation layer 12 below the blind grooves 13 formed downward on the upper surface of the first passivation layer 12 is preferably 15 nm to 25 nm, so as to ensure that the first passivation layer 12 below the blind grooves 13 is thin enough so that dopants can penetrate the first passivation layer 12 and enter the epitaxial layer 11 to form ion implantation in step S5. In addition, by controlling the thickness of the first passivation layer 12 below the blind grooves 13, the implantation depth and distribution of dopants can also be precisely controlled in step S5, ensuring that the dopants form the N-type doped region 14 only within a preset depth range, thereby optimizing the electrical performance of the device; in subsequent laser annealing steps, the thickness of the first passivation layer 12 of 15 nm to 25 nm allows laser energy to effectively penetrate and concentrate on the N-type doped region 14, thereby achieving local activation, avoiding unnecessary heating of non-doped regions, reducing energy waste, and improving the activation efficiency.
[0065] As a preferred example, the epitaxial layer 11 is a GaN-based material. In step S5, silicon (Si) ion implantation is performed on the surface of the epitaxial layer 11 below the blind grooves 13 to a preset depth to form the N-type doped region 14, so as to increase the free electron concentration of the epitaxial layer 11, optimize the doping distribution, improve the doping efficiency, and reduce the source-drain ohmic contact resistance. Regarding the donor impurity material for ion implantation, it may also be germanium (Ge), selenium (Se), tellurium (Te), etc., and can be specifically selected according to requirements, and will not be overly limited here.
[0066] As Figure 5As shown, step S6 is then performed, the laser is blocked by the first passivation layer 12 outside the first preset region R1, and laser annealing is performed only on the N-type doped region 14. By blocking the laser by the first passivation layer 12 outside the first preset region R1, the non-doped region is effectively protected from high temperature, thermal damage to the epitaxial layer 11 is avoided, and the laser annealing efficiency is improved. The local annealing method reduces energy waste and optimizes the activation effect of the dopant.
[0067] like Figure 6 As shown, step S7 is then performed to remove the first passivation layer 12 .
[0068] As an example, Figures 7 to 11 As shown, the preparation method also includes:
[0069] S8, such as Figure 7 As shown, a second passivation layer 15 is formed on the structure after the first passivation layer is removed. The material of the second passivation layer 15 exemplarily includes SiN.
[0070] S9, such as Figure 8 As shown, the second passivation layer 15 of the second preset region R2 above the first preset region R1 is removed, and the plane size of the second preset region R2 is larger than the plane size of the first preset region R1.
[0071] S10, such as Figure 9 As shown, an ohmic metal 16 is formed in a third preset region R3 within the second preset region R2, the plane size of the third preset region R3 is smaller than the plane size of the second preset region R2, the plane size of the third preset region R3 is larger than the plane size of the first preset region R1, and the projection of the third preset region R3 in the horizontal direction covers the first preset region R1. It should be noted that the ohmic metal 16 is the source and drain metal of the HEMT device.
[0072] Furthermore, the minimum distance between the ohmic metal 16 and the second passivation layer 15 (eg Figure 9 The S1) in the embodiment is 150 nm to 250 nm, so as to effectively reduce the contact area between the ohmic metal 16 and the second passivation layer 15, thereby reducing the possibility of metal atoms diffusing into the second passivation layer 15.
[0073] Furthermore, the ohmic metal 16 extends out of the N-type doping region 14 in the horizontal direction (eg Figure 9in S2) is 150 nm to 250 nm to ensure that the ohmic metal 16 can cover the N-type doped region 14, thereby reducing the contact resistance, and a portion of the ohmic metal 16 extending horizontally out of the N-type doped region 14 forms a structure similar to a field plate. This plate structure effectively reduces the electric field intensity on the surface of the N-type doped region 14 by dispersing the electric field lines, reduces the electric field concentration phenomenon, thereby reducing the surface electric field, and further improving the breakdown voltage capability of the device and reducing the leakage phenomenon during high-voltage operation.
[0074] As an example, after forming the ohmic metal 16 in a third preset region R3 within the second preset region R2, it further includes a step of annealing the ohmic metal 16 to further improve the quality of the ohmic contact and reduce the contact resistance.
[0075] S11, as Figure 10 shown, use, for example, a photolithography etching process to remove the second passivation layer 16 in a preset gate region to form a gate trench 17.
[0076] S12, as Figure 11 shown, form a gate metal 18 that at least fills the gate trench 17.
[0077] This embodiment also provides a HEMT device structure, which is prepared by using the preparation method of the HEMT device structure in the above embodiment. The beneficial effects that can be achieved can be referred to the specific description in the preparation method and will not be elaborated here.
[0078] In summary, for the HEMT device structure and its preparation method of the present invention, by forming an epitaxial layer on a semiconductor substrate, the epitaxial layer includes a channel layer and a barrier layer of the HEMT device, then forming a first passivation layer on the epitaxial layer, then forming blind grooves downward in several first preset regions on the upper surface of the first passivation layer, performing ion implantation on the surface of the epitaxial layer at a preset depth below the blind grooves to form an N-type doped region, and finally using the first passivation layer to block the laser and selectively perform laser annealing only on the N-type doped region, realizing local heating to activate the dopant, reducing the source-drain ohmic contact resistance, improving the performance of the HEMT device, and solving the problems of high-temperature damage to the non-implanted region of the epitaxial layer and thermal deformation of the semiconductor substrate during overall annealing to activate the dopant in the traditional process. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
[0079] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.
Claims
1. A method for preparing a HEMT device structure, characterized in that, The preparation method includes: providing a semiconductor substrate; forming an epitaxial layer on the semiconductor substrate, the epitaxial layer including a channel layer and a barrier layer of a HEMT device; forming a first passivation layer on the epitaxial layer; forming blind grooves downward in several first preset regions on the upper surface of the first passivation layer; performing ion implantation on the surface of the epitaxial layer below the blind grooves to a preset depth to form an N-type doping region; using the first passivation layer outside the first preset region to block the laser, and only performing laser annealing on the N-type doping region; removing the first passivation layer.
2. The manufacturing method of the HEMT device structure according to claim 1, characterized in that, The preparation method further includes: forming a second passivation layer on the structure after removing the first passivation layer; removing the second passivation layer in a second preset region above the first preset region, the planar size of the second preset region being larger than the planar size of the first preset region; forming ohmic metal in a third preset region within the second preset region, the planar size of the third preset region being smaller than the planar size of the second preset region, the planar size of the third preset region being larger than the planar size of the first preset region, and the projection of the third preset region in the horizontal direction covering the first preset region; removing the second passivation layer in a preset gate region to form a gate trench; forming gate metal that at least fills the gate trench.
3. The manufacturing method of the HEMT device structure according to claim 2, characterized in that: The minimum distance between the ohmic metal and the second passivation layer is 150 nm to 250 nm; the ohmic metal extends 150 nm to 250 nm out of the N-type doping region in the horizontal direction.
4. The manufacturing method of the HEMT device structure according to claim 2, characterized in that: After forming the ohmic metal in the third preset region within the second preset region, it further includes a step of annealing the ohmic metal.
5. The manufacturing method of the HEMT device structure according to claim 1, characterized in that: The thickness of the first passivation layer formed on the epitaxial layer is not less than 300 nm.
6. The manufacturing method of the HEMT device structure according to claim 1, characterized in that: The thickness of the first passivation layer below the blind grooves formed downward on the upper surface of the first passivation layer is 15 nm to 25 nm.
7. The manufacturing method of the HEMT device structure according to claim 1, characterized in that: Performing Si ion implantation on the surface of the epitaxial layer below the blind grooves to a preset depth to form the N-type doping region.
8. The manufacturing method of the HEMT device structure according to claim 1, characterized in that: The material of the formed epitaxial layer is a GaN-based material.
9. The manufacturing method of the HEMT device structure according to claim 1, characterized in that: The materials of both the first passivation layer and the second passivation layer include SiN.
10. A HEMT device structure, characterized in that: Prepared by using the preparation method of the HEMT device structure according to any one of claims 1 to 9.