Method for searching photomask design defects

The method of electron beam scanning and defect filtering enhances photomask defect detection to 10nm resolution, addressing yield loss from undetectable defects in photomasks.

CN120315243APending Publication Date: 2025-07-15SHANGHAI HUALI INTEGRATED CIRCUIT CORP
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Patent Information

Application Number
CN202510499214.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-18
Publication Date
2025-07-15

AI Technical Summary

Technical Problem

The prior art cannot effectively identify the defects in the mask design of the size below 20nm, resulting in a loss of yield.

Method used

The test wafers with multiple different energy matrix windows are formed using lithography technology, and defect files are obtained through electron beam scanning, non-photometer design defects are filtered, and finally match positions in the GDS file to find the weaknesses corresponding to the mask design defects.

Benefits of technology

The defects of the mask design with a size below 20nm can be identified and positioned, which improves the yield of semiconductor manufacturing.

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Abstract

The method for searching the photomask design defect comprises the following steps: step 1, forming a plurality of test wafers with different EM windows by adopting a photoetching process; and 2, scanning each test wafer by adopting an electron beam to obtain a defect file. And step 3, checking all defects in each defect file, filtering all non-photomask design defects, and reserving each defect as a filtered defect. And 4, checking the first positions of all the filtered defects on the crystal grains, matching the first positions into the GDS file of the photomask, and searching in the GDS file according to the matching positions corresponding to the first positions to find the weaknesses corresponding to all the photomask design defects in the photomask. According to the invention, the weakness corresponding to the design defect of the photomask with the size of less than 20nm can be found.
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Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly to a method for finding design defects of a mask. Background Art

[0002] As the design rules are scaled down, the size of defects is reduced to a very small level. In some existing metal copper layers with relatively small sizes, it is found that the mask has weaknesses. For example, at the place where the via opening (CB) is too small, when the copper wire shrinks to about 10 nm, the CB will be small; vias will be formed simultaneously in the lower copper metal layer, and the vias will be located in the CB. Since the CB is small, the formation of vias in the CB will result in a yield loss. Since the minimum size of the CB can reach 10 nm, while the size limit of defects that can be detected by ordinary optical scanning tools is only about 20 nm, defects smaller than 20 nm cannot be detected by optical scanning tools. Therefore, a new method is needed to find the weaknesses in the mask. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a method for finding design defects of a mask, which can find the weaknesses corresponding to the mask design defects with a size below 20 nm.

[0004] To solve the above technical problem, the method for finding design defects of a mask provided by the present invention includes the following steps:

[0005] Step 1: Form a test wafer with multiple different energy matrix (EM) windows by using a lithography process.

[0006] Step 2: Scan each of the test wafers with an electron beam and obtain a defect file.

[0007] Step 3: Check all the defects in each of the defect files and filter out all non-mask design defects, and retain each of the defects as the filtered defects.

[0008] Step 4: Check the first positions of all the filtered defects on the die, match the first positions to the GDS file of the mask, and search in the GDS file according to the matching positions corresponding to the first positions to find the weaknesses corresponding to all the mask design defects in the mask.

[0009] A further improvement is that the EM windows include 3, namely: EM±4 nm, EM±6 nm, and EM±8 nm.

[0010] A further improvement is that in Step 2, the defect file is obtained by collecting secondary electrons (SE) formed during the electron beam scanning.

[0011] A further improvement is that the non-mask design defects include: pits, particle defects (PD), and pattern failures.

[0012] A further improvement is that the minimum value of the critical dimension of the pattern structure corresponding to the mask design defect reaches less than 10 nm.

[0013] A further improvement is that the pattern structure includes a metal pattern or a via hole.

[0014] A further improvement is that the metal pattern includes copper wires.

[0015] A further improvement is that the defect file includes the defect map corresponding to the test wafer.

[0016] A further improvement is that in step three, all non-mask design defects are automatically classified and filtered through the large data of wafer defects.

[0017] In the present invention, test wafers with multiple different EM windows are formed through a lithography process. Then, by combining electron beam scanning of the defects on each test wafer, corresponding defect files can be obtained. The defects in the defect files are filtered and their positions are checked. Then, by matching the positions to the GDS file, the weaknesses corresponding to the mask design defects can be automatically searched in the GDS file. Since electron beam scanning can identify defects smaller than 10 nm compared with optical scanning, the present invention can obtain the weaknesses corresponding to mask design defects with a size of less than 20 nm. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments:

[0019] Figure 1 is a flowchart of the method for finding mask design defects in an embodiment of the present invention;

[0020] Figure 2A is the test wafer of EM ±8 nm obtained in step one of the method for finding mask design defects in an embodiment of the present invention;

[0021] Figure 2B is the test wafer of EM ±6 nm obtained in step one of the method for finding mask design defects in an embodiment of the present invention;

[0022] Figure 2C is the test wafer of EM ±4 nm obtained in step one of the method for finding mask design defects in an embodiment of the present invention;

[0023] Figure 3 is a schematic diagram of the defect file obtained by the method for finding mask design defects in an embodiment of the present invention;

[0024] Figure 4A It is a photo of the graphic anomaly defect filtered by the method for finding photomask design defects in the embodiments of the present invention;

[0025] Figure 4B It is a photo of each filtered defect obtained by the method for finding photomask design defects in the embodiments of the present invention;

[0026] Figure 5 It is the weak point position graphic in the GDS file obtained by matching according to the first position of the filtered defect by the method for finding photomask design defects in the embodiments of the present invention. Detailed implementation manners

[0027] As Figure 1 shown, it is a flowchart of the method for finding photomask design defects in the embodiments of the present invention; the method for finding photomask design defects in the embodiments of the present invention includes the following steps:

[0028] Step 1: Form test wafers with multiple different EM windows by using a lithography process.

[0029] The EM window is the lithography process window obtained through energy matrix testing and can be obtained through focus matrix & energy matrix (FEM) analysis. In FEM analysis, during exposure, the energy changes at a fixed step length along the X direction of the wafer, and the focus value changes along the Y direction. After exposure, measurement and analysis are carried out to find the optimal exposure energy and focus value, and the lithography process window related to the exposure energy and focus value can be obtained.

[0030] In the embodiments of the present invention, there are 3 EM windows, which are: EM±4nm, EM±6nm, and EM±8nm respectively. In other embodiments, the number of the EM windows can also be set as needed.

[0031] As Figure 2A shown, it is the test wafer 101a with EM±8nm obtained in Step 1 of the method for finding photomask design defects in the embodiments of the present invention; Figure 2A The dimensions of the test wafer 101a are shown below, which are 0, ±1.3, ±2.6, ±3.9, ±5.2, ±6.5, and ±7.8 respectively, with the unit of nm.

[0032] As Figure 2B shown, it is the test wafer 101b with EM±6nm obtained in Step 1 of the method for finding photomask design defects in the embodiments of the present invention; Figure 2B The dimensions of the test wafer 101b are shown below, which are 0, ±1, ±2, ±3, ±4, ±5, and ±6 respectively, with the unit of nm.

[0033] As Figure 2CAs shown, the test wafer 101c with EM ±4nm obtained in the first step of the method for finding photomask design defects in the embodiments of the present invention is presented. Figure 2C The dimensions of the test wafer 101c are shown below, which are 0, ±0.7, ±1.4, ±2.0, ±2.7, ±3.4, and ±4, in the unit of nm.

[0034] Step 2: Use an electron beam to scan each of the test wafers and obtain a defect file.

[0035] In the embodiments of the present invention, the defect file is obtained by collecting secondary electrons formed during the electron beam scanning. Secondary electrons are emitted from the surface of the area irradiated by the electron beam. Therefore, secondary electrons can detect the surface information of the irradiated area. Moreover, compared with optical signals, the resolution of secondary electrons is higher, reaching below 10nm.

[0036] The defect file includes a defect map corresponding to the test wafer. The defect map is a two-dimensional distribution map of defects mapped onto the wafer. As Figure 3 shown, it is a schematic diagram of the defect file obtained by the method for finding photomask design defects in the embodiments of the present invention; Figure 3 In it, PH represents three EM window conditions corresponding to the lithography process, Count represents the number of defects, Map represents the defect map. According to the three EM window conditions, the 3 defect maps are respectively marked with 102a, 102b, and 102c.

[0037] Step 3: Check all the defects in each of the defect files and filter out all non-photomask design defects, and retain each of the defects as the filtered defects.

[0038] In the embodiments of the present invention, the non-photomask design defects include: depressions, particle defects, and pattern abnormalities.

[0039] In the embodiments of the present invention, the minimum value of the critical dimension of the graphic structure corresponding to the photomask design defect reaches below 10nm.

[0040] In some embodiments, the graphic structure includes a metal pattern or a via hole. The metal pattern includes copper wires.

[0041] In the embodiments of the present invention, all non-photomask design defects are filtered out through automatic classification of wafer defect big data. As Figure 4A shown, it is a photo of the pattern abnormality defect filtered out by the method for finding photomask design defects in the embodiments of the present invention; Figure 4A The defects can be filtered out through automatic classification of wafer defect big data.

[0042] As Figure 4BAs shown, the photos of each filtered defect obtained by the method for finding photomask design defects in the embodiments of the present invention are presented; Figure 4B The photos shown are all photos obtained by secondary electron collection and have all been filtered, so they are all photomask design defects.

[0043] Step 4: Check the first positions of all the filtered defects on the die, match the first positions to the GDS file of the photomask, and search in the GDS file according to the corresponding matching positions of the first positions to find the weaknesses corresponding to all the photomask design defects in the photomask.

[0044] That is, after obtaining the information of the first positions, the layout patterns of the corresponding regions can be found in the GDS file. The layout patterns of the corresponding regions have photomask design defects and are weak regions. As Figure 5 shown, the figure of the weakness position in the GDS file obtained by matching according to the first positions of the filtered defects in the embodiments of the present invention is presented. Figure 5 The figure of the weakness position 103a corresponding to the position site1 and the figure of the weakness position 103b corresponding to the position site2 are shown. As can be seen from the above, the embodiments of the present invention can finally find the photomask design defects in the GDS file.

[0045] In the embodiments of the present invention, test wafers with multiple different EM windows are formed through a lithography process. Then, by combining electron beam scanning of the defects on each test wafer, corresponding defect files can be obtained. The defects in the defect files are filtered and the positions are checked. Then, the positions are matched to the GDS file, and the weaknesses corresponding to the photomask design defects can be automatically searched in the GDS file. Since electron beam scanning can identify defects below 10 nm compared with optical scanning, the embodiments of the present invention can find the weaknesses corresponding to photomask design defects with a size below 20 nm.

[0046] The present invention has been described in detail through specific embodiments above, but these do not constitute limitations to the present invention. Without departing from the principle of the present invention, those skilled in the art can also make many deformations and improvements, which should also be regarded as the protection scope of the present invention.

Claims

1. A method for finding defects in a photomask design, characterized in that, It includes the following steps: Step 1: Use a lithography process to form multiple test wafers with different EM windows; Step 2: Use an electron beam to scan each of the test wafers and obtain a defect file; Step 3: Check all the defects in each of the defect files and filter out all non-mask design defects, and retain each of the defects as the filtered defects; Step 4: Check the first positions of all the filtered defects on the die, match the first positions to the GDS file of the mask, and search in the GDS file according to the corresponding matching positions to find the weaknesses corresponding to all the mask design defects in the mask.

2. The method for finding photomask design defects according to claim 1, wherein: There are 3 EM windows, namely: EM±4nm, EM±6nm, EM±8nm.

3. The method for finding photomask design defects according to claim 2, wherein: In Step 2, the defect file is obtained by collecting the secondary electrons formed during the electron beam scanning.

4. The method for finding photomask design defects according to claim 1, wherein: The non-mask design defects include: depressions, particle defects, and pattern anomalies.

5. The method for finding photomask design defects according to claim 1, wherein: The minimum value of the critical dimension of the graphic structure corresponding to the mask design defect reaches less than 10 nm.

6. The method for finding photomask design defects according to claim 1, wherein: The graphic structure includes a metal pattern or a via hole.

7. The method for finding photomask design defects according to claim 6, characterized in that: The metal pattern includes a copper wire.

8. The method for finding the design defects of a photomask according to claim 1, wherein: The defect file includes the defect map corresponding to the test wafer.

9. The method for finding photomask design defects according to claim 1, characterized in that: In Step 3, all non-mask design defects are filtered out automatically through big data of wafer defects.