Test method, device and equipment for high-speed signal integrity and storage medium

Abstract

The application provides a high-speed signal integrity test method, device, equipment and storage medium. The method comprises the following steps: collecting a to-be-tested signal; performing double-path signal processing on the to-be-tested signal to obtain a main signal and noise spectrum characteristics; matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the to-be-tested signal. The application adopts double-path signal processing to accurately extract noise spectrum characteristics, which is helpful for quantitative analysis and positioning of noise and provides multi-dimensional data support for fault diagnosis. Moreover, the processed main signal and noise spectrum characteristics are matched with the preset defect database, the fault type and defect position are automatically determined, and rapid diagnosis and accurate positioning of fault information are realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal fault testing, and in particular to a high-speed signal integrity testing method, device, equipment and storage medium. BACKGROUND

[0002] The high-speed signal integrity testing technology is mainly applied to the fields of 5G communication, vehicle-mounted electronics, consumer electronics, etc., and the core goal is to ensure that the high-speed digital signal is not distorted and has no crosstalk in the transmission process, and to meet the requirements of key indicators such as eye diagram, jitter, and rise time. In the prior art, the commonly used testing methods include traditional instrument testing method, time domain reflection method (TDR), frequency domain average noise reduction method, and signal prediction method using machine learning.

[0003] However, the traditional testing system usually adopts a fixed sampling rate, and when testing high-frequency signals (such as more than 20GHz), due to the aliasing effect, it is easy to cause signal distortion, and must rely on expensive hardware filters for anti-aliasing processing. Moreover, fixed sampling and simple noise reduction methods cannot effectively distinguish between crosstalk, reflection and thermal noise in the signal, resulting in inaccurate positioning and diagnosis of faults, long testing period, and high risk of misjudgment. Moreover, most of the existing technologies rely on complex instruments and manual operation, and have insufficient real-time compensation, calibration and automatic diagnosis capabilities, making it difficult to achieve fast and accurate fault detection in a high-speed signal environment.

[0004] Therefore, the problems in the prior art need to be solved. SUMMARY

[0005] The present application provides a high-speed signal integrity testing method, device, equipment and storage medium to solve the defects in the prior art and achieve accurate positioning and classification of signal faults.

[0006] The present application provides a high-speed signal integrity testing method, comprising:

[0007] Collecting a signal to be tested;

[0008] Performing double-path signal processing on the signal to be tested to obtain a main signal and noise spectral characteristics;

[0009] Matching the main signal and the noise spectral characteristics with a pre-set defect database to obtain fault information of the signal to be tested.

[0010] According to the high-speed signal integrity testing method provided by the present application, the step of collecting a signal to be tested specifically comprises:

[0011] When the signal frequency of the signal to be tested is less than a first pre-set frequency, the signal to be tested is collected at a first sampling rate;

[0012] When the signal frequency of the signal to be tested is greater than the first preset frequency and less than the second preset frequency, the signal to be tested is collected at a second sampling rate;

[0013] When the signal frequency of the signal to be tested is greater than the second preset frequency, the signal to be tested is collected at a third sampling rate;

[0014] The first preset frequency is less than the second preset frequency.

[0015] According to the high-speed signal integrity test method provided by the application, after the step of collecting the signal to be tested, the method further comprises:

[0016] analyzing the signal to be tested to determine an error region;

[0017] determining an interpolation algorithm according to a preset accuracy requirement;

[0018] reconstructing the error region by interpolation according to the interpolation algorithm.

[0019] According to the high-speed signal integrity test method provided by the application, the double-path signal processing comprises main signal path processing and noise extraction path processing.

[0020] According to the high-speed signal integrity test method provided by the application, the step of performing double-path signal processing on the signal to be tested to obtain main signal and noise spectrum characteristics comprises:

[0021] performing the main signal path processing and the noise extraction path processing on the signal to be tested;

[0022] The main signal path processing comprises:

[0023] eliminating baseline drift of the signal to be tested by a FIR filter to obtain the main signal;

[0024] The noise extraction path processing comprises:

[0025] performing wavelet transform on the signal to be tested according to a decomposition layer number to obtain sub-signals at different scales, the decomposition layer number being determined according to a wide band of the signal to be tested;

[0026] When the noise power of the sub-signal is greater than a preset noise threshold, the sub-signal at the decomposition layer number has noise;

[0027] separating the sub-signal having noise to obtain a first noise signal;

[0028] delay difference detection is performed on the to-be-tested signal to obtain a second noise signal;

[0029] spectrum analysis is performed on the first noise signal and the second noise signal to obtain a noise spectrum feature.

[0030] According to the high-speed signal integrity test method provided by the application, before the step of matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the to-be-tested signal, the method further comprises:

[0031] When the signal jitter of the main signal exceeds a preset jitter threshold, jitter compensation is performed on the main signal.

[0032] According to the high-speed signal integrity test method provided by the application, after the step of matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the to-be-tested signal, the method further comprises:

[0033] A visual report is generated according to the fault information of the to-be-tested signal, and the fault information comprises a fault type and a defect position coordinate of the to-be-tested signal.

[0034] The application further provides a high-speed signal integrity test device, comprising:

[0035] a signal acquisition module configured to acquire a to-be-tested signal;

[0036] a signal processing module configured to perform double-path signal processing on the to-be-tested signal to obtain a main signal and a noise spectrum feature;

[0037] a fault diagnosis module configured to match the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the to-be-tested signal.

[0038] The application further provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the high-speed signal integrity test method as described above.

[0039] The application further provides a non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program is executable on a processor to implement the high-speed signal integrity test method as described above.

[0040] The application further provides a computer program product comprising a computer program, wherein the computer program is executable on a processor to implement the high-speed signal integrity test method as described above.

[0041] The application provides a high-speed signal integrity test method, device, equipment and storage medium. The method comprises the following steps: collecting a to-be-tested signal; performing double-path signal processing on the to-be-tested signal to obtain a main signal and noise spectrum characteristics; and matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the to-be-tested signal. The application adopts double-path signal processing to accurately extract noise spectrum characteristics, which is helpful for quantitative analysis and positioning of noise and provides multi-dimensional data support for fault diagnosis. Moreover, the processed main signal and noise spectrum characteristics are matched with the preset defect database to automatically determine a fault type and a defect position, thereby realizing rapid diagnosis and accurate positioning of fault information. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the present application or prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.

[0043] Figure 1 is a flowchart of the high-speed signal integrity test method provided by the application;

[0044] Figure 2 is a structural schematic diagram of the high-speed signal integrity test device provided by the application;

[0045] Figure 3 is a structural schematic diagram of the electronic device provided by the application. DETAILED DESCRIPTION

[0046] In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely in combination with the drawings in the present application. Obviously, the described embodiments are some embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative effort belong to the protection scope of the present application.

[0047] In order to solve the problems in the prior art, the present application provides a high-speed signal integrity test method to realize accurate positioning and classification of signal faults. The high-speed signal integrity test method will be described as follows, as shown in Figure 1 which comprises but is not limited to the following steps:

[0048] Step 110: collecting a to-be-tested signal.

[0049] In this embodiment, the signal to be tested is first input from the signal source to the signal acquisition module. This module uses a dynamic sampling rate selection strategy to automatically select the sampling rate according to the frequency characteristics of the signal.

[0050] To ensure the quality and integrity of the collected signal, the acquisition module also includes hardware impedance matching (such as ensuring a match of 50Ω±2%) and a dynamic amplitude attenuation device (supporting ±3dB dynamic adjustment) to avoid signal overload and reduce external interference. The collected signal also passes through a preprocessing module before entering the next processing stage, which performs baseline correction and amplitude normalization on the signal, so that subsequent data processing can accurately reflect the characteristics of the signal itself.

[0051] Step 120, performing double-path signal processing on the signal to be tested to obtain the main signal and noise spectrum characteristics.

[0052] After collecting the preprocessed signal, a double-path signal processing scheme is used to further analyze the signal, which is divided into main signal path processing and noise extraction path processing.

[0053] The main signal path processing uses a FIR filter to filter the preprocessed signal, eliminating baseline drift caused by environmental and device characteristics, to obtain a main signal that truly reflects the signal transmission characteristics. The filtered main signal will be used to evaluate signal integrity, such as calculating eye diagram parameters, jitter, and other key indicators.

[0054] The noise extraction path processing uses wavelet transform to decompose the preprocessed signal, with the number of decomposition layers determined according to the signal's broadband characteristics (usually 3 to 5 layers) to obtain sub-signals at different scales. For each decomposition layer, a pre-set noise threshold (such as noise power greater than -40dBm) is used to determine whether noise exists in the sub-signal of that layer. For decomposition layers determined to have noise, further separation is performed; at the same time, time delay difference detection (such as a time delay difference exceeding 10ps) is used to determine reflected noise information. The separated noise signal is subjected to frequency spectrum analysis to generate a noise spectrum graph. This noise spectrum graph details the energy distribution of noise in each frequency band, serving as auxiliary data for subsequent fault diagnosis. After double-path processing, the system obtains both the main signal representing signal integrity indicators and the noise spectrum graph describing noise distribution characteristics, providing sufficient basis for subsequent fault information matching.

[0055] Step 130, matching the main signal and the noise spectrum characteristics with a pre-set defect database to obtain the fault information of the signal to be tested.

[0056] After obtaining the main signal and noise spectrum features, the fault diagnosis module matches the two sets of data with a pre-established defect database. The defect database stores signal feature data of various typical faults, including but not limited to impedance mutation, open circuit, short circuit, and other fault modes, the waveform features and noise features of which have been pre-set.

[0057] The matching process includes the following steps:

[0058] Using a pre-set matching algorithm, the processed main signal and noise spectrum features are compared with each defect mode in the database. When the waveform similarity exceeds a pre-set threshold (for example, 90%), the corresponding fault type is preliminarily determined.

[0059] After a successful match, the system further determines the location coordinates of the fault. For example, in the PCB trace scenario, the positioning error can be controlled within 1 mm.

[0060] If the signal jitter of the main signal is detected to exceed a pre-set threshold, the jitter compensation module is automatically started for real-time compensation to ensure the accuracy of the matching data.

[0061] Finally, the fault diagnosis module generates fault information containing the fault type and defect location coordinates, and the system supports outputting the test results in a visual report (such as PDF or CSV format) for easy fault analysis and subsequent processing by on-site technicians.

[0062] The present application provides a method for high-speed signal integrity testing by collecting a signal to be tested, performing double-path signal processing (obtaining main signal and noise spectrum features), and matching the processing results with a defect database. This method uses various technical means such as dynamic sampling, preprocessing, FIR filtering, noise extraction based on wavelet transform, time delay detection, and spectrum analysis to comprehensively improve the testing accuracy, fault positioning accuracy, and system automation level, effectively solving the aliasing problem caused by fixed sampling rate and the low noise processing efficiency in the prior art.

[0063] As an optional embodiment, the step of collecting a signal to be tested specifically includes:

[0064] When the signal frequency of the signal to be tested is less than a first pre-set frequency, the signal to be tested is collected at a first sampling rate;

[0065] When the signal frequency of the signal to be tested is greater than the first pre-set frequency and less than a second pre-set frequency, the signal to be tested is collected at a second sampling rate;

[0066] When the signal frequency of the signal to be tested is greater than the second pre-set frequency, the signal to be tested is collected at a third sampling rate;

[0067] wherein the first preset frequency is less than the second preset frequency.

[0068] In the embodiment, the collecting step of the signal to be tested comprises dynamically selecting a sampling rate according to the signal frequency to sufficiently meet the sampling requirement of the high-speed signal under different frequency bands. The specific implementation is as follows:

[0069] Before collecting the signal to be tested, the signal is subjected to preliminary frequency analysis by the pre-detection module to obtain the frequency information of the current signal to be tested. The frequency information serves as the basis for subsequent sampling rate selection.

[0070] The first case: when the detected signal frequency of the signal to be tested is lower than the first preset frequency, the system collects the signal by using the first sampling rate.

[0071] At this time, because the signal frequency is low, the lower sampling rate can meet the sampling requirement and help reduce the system power consumption and data processing pressure.

[0072] The second case: when the detected signal frequency is greater than the first preset frequency and less than the second preset frequency, the system collects the signal by using the second sampling rate.

[0073] In this frequency band, the signal frequency is relatively high, and the sampling rate needs to be appropriately increased to ensure the accurate reconstruction of the signal and prevent aliasing.

[0074] The third case: when the detected signal frequency is greater than the second preset frequency, the system collects the signal by using the third sampling rate.

[0075] For high-frequency signals, a higher sampling rate is required to sufficiently capture the high-frequency components in the signal and ensure that the collected data can completely restore the original signal waveform.

[0076] In the embodiment, the first preset frequency is set as the demarcation point of the lower frequency band, the second preset frequency is set as the demarcation point of the higher frequency band, and the first preset frequency is required to be less than the second preset frequency. According to different signal frequency intervals, the system automatically switches the corresponding sampling rate to achieve the best signal collection effect.

[0077] Exemplarily, high-frequency mode: when the signal frequency is greater than 10 GHz, the sampling rate is increased to 20 GS / s-200 GS / s; low-frequency mode: when the signal frequency is less than 1 GHz, the sampling rate is reduced to below 1 GS / s to save resources, and when 1 GHz < signal frequency < 10 GHz, the sampling rate > 5x signal frequency.

[0078] Through the dynamic sampling rate selection scheme, the system can automatically adjust the sampling rate according to the actual frequency of the to-be-tested signal, effectively cope with the aliasing phenomenon and signal distortion problem that may occur in high-speed signal sampling. At the same time, this method can reduce unnecessary resource consumption and data processing complexity, and further improve the accuracy and efficiency of high-speed signal integrity testing.

[0079] The acquisition of the to-be-tested signal step described in the embodiment realizes efficient acquisition of signals of different frequency bands by real-time detection of signal frequency and dynamic sampling rate selection, and provides a high-quality data basis for subsequent signal processing, noise extraction and fault diagnosis.

[0080] As an optional embodiment, after the step of acquiring the to-be-tested signal, the method further comprises:

[0081] analyzing the to-be-tested signal to determine an error region;

[0082] determining an interpolation algorithm according to a preset accuracy requirement;

[0083] reconstructing the error region according to the interpolation algorithm.

[0084] After the acquisition of the to-be-tested signal is completed, in order to further improve the accuracy and restoration degree of the signal sampling data, the embodiment adds the steps of error analysis and interpolation reconstruction of the signal after the acquisition step. The specific process is as follows:

[0085] After the to-be-tested signal is acquired, the system first comprehensively analyzes the acquired data to identify the sampling error region caused by insufficient sampling rate or aliasing effect. Data statistics, time domain and frequency domain analysis and other means are used to quantitatively evaluate the difference between the sampled signal and the expected signal. In the time domain, by comparing the rising edge, falling edge and waveform flat area of the signal, it is detected whether there is a missing sampling point or waveform distortion; in the frequency domain, Fourier transform or wavelet transform technology is used to analyze whether there is abnormal energy distribution or spectrum missing in the signal spectrum. According to the analysis results, the region with obvious distortion or aliasing is marked as an "error region", and the start and end positions of the region in the signal and related error indicators are recorded to provide a basis for subsequent reconstruction.

[0086] After the error region is determined, the system determines a suitable interpolation algorithm according to the preset accuracy requirement and the characteristics of the signal to be reconstructed. According to the system design requirement (for example, the target interpolation reconstruction accuracy needs to reach ≤0.1UI) and the bandwidth characteristics of the sampling signal, the reconstruction accuracy and the parameters of the interpolation algorithm are set. The system is built-in with multiple interpolation algorithms, such as linear interpolation, spline interpolation, and high-order polynomial interpolation. For the case where the signal changes smoothly and the error region is narrow, linear or spline interpolation can be used; for complex waveforms or wide error regions, high-order interpolation algorithms may need to be used to improve the reconstruction accuracy. According to the real-time detected signal characteristics, the system can automatically select or switch the interpolation algorithm most suitable for the current error region characteristics, to ensure that the compensated data is as consistent as possible with the original signal. According to the selected interpolation algorithm, data interpolation reconstruction is performed on the identified error region to compensate for the distortion caused by insufficient sampling or aliasing.

[0087] The embodiment adds the error region detection and interpolation reconstruction process after the step of collecting the signal to be tested, effectively compensating for the signal distortion caused by fixed sampling rate or aliasing effect. By adaptively selecting the interpolation algorithm, the accuracy of the interpolation reconstruction is ensured to meet the system design requirement, thereby improving the data restoration degree and diagnostic accuracy of the entire high-speed signal integrity test process. This scheme not only reduces the risk caused by sampling errors, but also provides more accurate data support for subsequent signal processing and fault location.

[0088] As an optional embodiment, the double-path signal processing includes main signal path processing and noise extraction path processing.

[0089] In the embodiment, in order to improve the accuracy of high-speed signal integrity testing, the double-path signal processing includes main signal path processing and noise extraction path processing, so as to extract and analyze the main signal and noise information of the signal to be tested, respectively.

[0090] As an optional embodiment, the step of performing double-path signal processing on the signal to be tested to obtain main signal and noise spectrum characteristics specifically includes:

[0091] The main signal path processing and the noise extraction path processing are performed on the signal to be tested.

[0092] The main signal path processing includes:

[0093] The baseline drift of the signal to be tested is removed by a FIR filter to obtain the main signal.

[0094] The noise extraction path processing includes:

[0095] perform wavelet transform on the to-be-tested signal according to a decomposition layer number, to obtain sub-signals at different scales, the decomposition layer number being determined according to a wideband of the to-be-tested signal;

[0096] when the noise power of the sub-signal is greater than a preset noise threshold, the sub-signal at the decomposition layer number has noise;

[0097] separate the sub-signal having noise to obtain a first noise signal;

[0098] perform time delay difference detection on the to-be-tested signal to obtain a second noise signal;

[0099] perform spectrum analysis on the first noise signal and the second noise signal to obtain a noise spectrum feature.

[0100] In this embodiment, after the to-be-tested signal is preprocessed, the system performs double-path processing on the signal, which includes two complementary branches: main signal path processing and noise extraction path processing. The specific steps are as follows:

[0101] The overall flow of double-path processing is to send the preprocessed to-be-tested signal into two processing paths at the same time: the main signal path is used to obtain high-quality signal data after baseline drift correction; and the noise extraction path is used to separate and extract noise components from the signal to form a noise spectrum feature.

[0102] The main signal path processing adopts a FIR filter to perform filter processing on the to-be-tested signal.

[0103] The FIR filter is designed to compensate for the baseline drift caused by hardware deviation, temperature drift or other environmental factors, so as to effectively eliminate the direct current component and low-frequency drift of the filtered signal.

[0104] After filtering, the output signal is the main signal, which can accurately reflect the true waveform characteristics of the to-be-tested signal, facilitating subsequent fault diagnosis and signal integrity analysis.

[0105] The noise extraction path processing is to perform wavelet transform on the to-be-tested signal to decompose the signal into sub-signals at multiple scales (or decomposition layer numbers). The selection of the decomposition layer number is determined according to the wideband characteristics of the to-be-tested signal, and usually 3 to 5 layers are selected to capture subtle changes in the signal within different frequency bands. The obtained sub-signals at each layer reflect the characteristics of the signal at different scales.

[0106] The noise power of each sub-signal obtained from each decomposition layer is calculated. According to a preset noise threshold (for example, the noise power is greater than -40 dBm), it is determined whether the sub-signal of each decomposition layer contains noise components. When the noise power of a sub-signal exceeds the preset noise threshold, it is considered that the sub-signal of the decomposition layer contains noise, and the sub-signal is marked as a noise signal.

[0107] For the sub-signal determined to contain noise, the noise part is separated from the whole sub-signal by a corresponding signal separation algorithm to form a first noise signal. In the separation process, amplitude threshold, local statistical characteristics and other methods can be used to ensure the accuracy of noise separation.

[0108] Time delay difference detection is performed on the test signal to capture noise caused by reflection or multipath effect. In the detection process, high-precision clock is used to collect signal time delay information. When it is detected that there is a time delay difference exceeding a set threshold (such as 10 ps) in the signal, the corresponding noise information is extracted to form a second noise signal.

[0109] The first noise signal and the second noise signal are respectively or jointly subjected to frequency spectrum analysis. Fourier transform or other frequency spectrum analysis methods are used to obtain the energy distribution of the noise signal in each frequency band to generate a noise spectrum graph. The noise spectrum feature intuitively reflects the distribution of noise components in the test signal, providing data basis for subsequent fault diagnosis and noise positioning.

[0110] After the main signal path processing and the noise extraction path processing, the system respectively obtains:

[0111] Main signal: the signal after FIR filtering to eliminate baseline drift, used for measuring signal integrity (such as eye diagram, jitter, rise time, etc.);

[0112] Noise spectrum feature: noise energy distribution information obtained by noise separation and frequency spectrum analysis, used for assisting in judging noise type (such as crosstalk, reflection noise) and positioning fault area.

[0113] The above double-path processing flow realizes effective separation of the signal and the noise, so that in the subsequent fault diagnosis and matching, not only the key characteristics of the signal itself can be reflected by the main signal, but also auxiliary information for fault positioning can be provided by the noise spectrum graph, thereby comprehensively improving the accuracy and reliability of high-speed signal integrity testing.

[0114] As an optional embodiment, before the step of matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the test signal, the method further comprises:

[0115] When the signal jitter of the main signal exceeds a preset jitter threshold, jitter compensation is performed on the main signal.

[0116] In this embodiment, to ensure that the main signal used in the subsequent fault matching process can accurately reflect the characteristics of the signal itself, especially in high-speed signal transmission, the main signal may exhibit jitter due to factors such as system clock, device jitter, or environmental interference. Therefore, this embodiment adds a main signal jitter detection and compensation step before the main signal and noise spectrum features are input into the defect database for matching. The specific process is as follows:

[0117] Signal jitter detection

[0118] After the main signal path processing is completed, the system performs jitter detection on the obtained main signal to measure parameters such as timing offset, rising edge, and falling edge of the signal.

[0119] The detected jitter amplitude is compared with a preset jitter threshold. For example, if the preset threshold is a certain percentage of unit interval (UI), when the actual jitter amplitude exceeds the threshold, it is considered that the main signal has a large jitter problem.

[0120] Jitter compensation judgment and triggering

[0121] When the detection result shows that the jitter of the main signal exceeds the preset jitter threshold, the system automatically triggers the jitter compensation module.

[0122] The compensation module determines the compensation strategy according to the preset algorithm parameters to ensure that the compensated signal can be restored to the ideal waveform state as much as possible.

[0123] Jitter compensation processing

[0124] The compensation process includes re-correction of the time at key moments (such as rising edge and falling edge) of the main signal.

[0125] Using compensation algorithms based on time domain or frequency domain, the signal segment affected by jitter is smoothed and the timing is adjusted, thereby reducing or eliminating the signal waveform shift caused by jitter.

[0126] After compensation, the system outputs the main signal after jitter compensation processing, which has higher timing stability and more accurate waveform characteristics.

[0127] Subsequent matching preparation

[0128] The main signal after jitter compensation, together with the noise spectrum features obtained by the noise extraction path, is input as data for subsequent matching with the preset defect database.

[0129] This ensures that the fault diagnosis in the matching process is based on optimized signal data, improving the accuracy of fault type identification and defect positioning.

[0130] As an optional embodiment, after the step of matching the main signal and the noise spectrum feature with the preset defect database to obtain the fault information of the to-be-tested signal, the method further comprises:

[0131] Generating a visual report according to the fault information of the to-be-tested signal, wherein the fault information comprises a fault type and a defect position coordinate of the to-be-tested signal.

[0132] After the fault information matching step is completed, the system further processes and displays the detection results, specifically including the following steps:

[0133] The system classifies the fault information obtained by matching with the preset defect database, and the fault information includes but is not limited to fault types (such as impedance mutation, open circuit, short circuit, etc.) and corresponding defect position coordinates. The fault type, position, matching degree and other related data are statistically analyzed to form a detailed fault detection result record.

[0134] According to the sorted fault information, the basic framework of the report is constructed, and the content usually includes:

[0135] Fault summary: briefly describe the fault types and the number of faults detected;

[0136] Fault detailed information: for each fault record, list the fault type, defect position coordinate (for example, specific positioning information on the PCB), matching degree index and other auxiliary parameters;

[0137] Graphical display: the fault position is marked in the test signal waveform or PCB layout diagram in a graphical manner to intuitively display the position distribution of the defect area;

[0138] Additional description: including the sampling rate, signal processing parameters, jitter compensation conditions and other auxiliary information adopted during the test, so as to enable the technical personnel to have a comprehensive understanding of the test environment and conditions.

[0139] The system converts the report content constructed into a preset visual format, supporting PDF, CSV or other commonly used file formats.

[0140] At the same time, the system supports real-time generation of electronic reports with high-resolution graphical display to ensure that the graphical information (such as fault position coordinate graph, signal waveform graph) in the report has sufficient clarity and readability.

[0141] The generated visual report is automatically saved to the local storage or transmitted to the remote server through the network interface for subsequent retrieval and archiving.

[0142] Meanwhile, the system can display the report content in real time through a user interface (such as a touch screen or a remote control terminal), so that on-site technical personnel can quickly master the detection result and make subsequent fault handling or decision support.

[0143] The embodiment can make the fault detection result more intuitive and easy to understand by generating a detailed visual report, and provide solid data support for subsequent fault analysis, maintenance decision and technical improvement.

[0144] The high-speed signal integrity testing device provided by the application is described below, as shown in Figure 2 The high-speed signal integrity testing device described below can be referred to in correspondence with the high-speed signal integrity testing method described above.

[0145] A high-speed signal integrity testing device comprises:

[0146] A signal acquisition module 210 is configured to acquire a to-be-tested signal.

[0147] A signal processing module 220 is configured to perform double-path signal processing on the to-be-tested signal to obtain a main signal and noise spectral characteristics.

[0148] A fault diagnosis module 230 is configured to match the main signal and the noise spectral characteristics with a preset defect database to obtain fault information of the to-be-tested signal.

[0149] Figure 3 An example of an entity structure diagram of an electronic device is shown in Figure 3 The electronic device can include a processor 310, a communications interface 320, a memory 330 and a communications bus 340, wherein the processor 310, the communications interface 320 and the memory 330 can communicate with each other through the communications bus 340. The processor 310 can invoke a logical instruction in the memory 330 to execute a high-speed signal integrity testing method, which comprises:

[0150] Acquiring a to-be-tested signal;

[0151] Performing double-path signal processing on the to-be-tested signal to obtain a main signal and noise spectral characteristics;

[0152] Matching the main signal and the noise spectral characteristics with a preset defect database to obtain fault information of the to-be-tested signal.

[0153] In addition, the logic instructions in the memory 330 described above can be implemented in the form of a software function unit and sold or used as an independent product, which can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or part of the technical solutions can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a plurality of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the method described in various embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0154] In another aspect, the present application also provides a computer program product, which comprises a computer program, the computer program can be stored on a non-transitory computer readable storage medium, and the computer program can be executed by a processor to enable a computer to execute the test method of high-speed signal integrity provided by the above-mentioned methods, and the method comprises:

[0155] collecting a signal to be tested;

[0156] performing double-path signal processing on the signal to be tested to obtain a main signal and a noise spectrum feature;

[0157] matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the signal to be tested.

[0158] In another aspect, the present application also provides a non-transitory computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the test method of high-speed signal integrity provided by the above-mentioned methods, and the method comprises:

[0159] collecting a signal to be tested;

[0160] performing double-path signal processing on the signal to be tested to obtain a main signal and a noise spectrum feature;

[0161] matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the signal to be tested.

[0162] The device embodiments described above are merely illustrative, wherein the units described as separate components can or can not be physically separate, and the components displayed as units can or can not be physical units, i.e., can be located in one place, or can be distributed to multiple network units. Part or all of the modules can be selected to achieve the purposes of the embodiments according to actual needs. Those skilled in the art can understand and implement without creative labor.

[0163] Through the description of the above embodiments, those skilled in the art can clearly understand that the embodiments can be realized by means of software and necessary universal hardware platforms, and of course can also be realized by hardware. Based on such understanding, the above technical solutions can be embodied in the form of software products, and the computer software products can be stored in a computer readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and include a plurality of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the methods described in each embodiment or some parts of the embodiments.

[0164] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method of testing high-speed signal integrity, characterized by, include: Acquire the signal to be tested; The signal under test is subjected to dual-path signal processing to obtain the spectral characteristics of the main signal and noise. The main signal and the noise spectrum characteristics are matched with a preset defect database to obtain the fault information of the signal under test; The dual-path signal processing includes main signal path processing and noise extraction path processing; The step of performing dual-path signal processing on the signal under test to obtain the spectral characteristics of the main signal and noise specifically includes: The signal to be tested is subjected to the main signal path processing and the noise extraction path processing. The main signal path processing includes: The baseline drift of the signal under test is eliminated by using an FIR filter to obtain the main signal; The noise extraction path processing includes: The test signal is subjected to wavelet transform according to the number of decomposition levels to obtain sub-signals at different scales. The number of decomposition levels is determined according to the bandwidth of the test signal. If the noise power of the sub-signal is greater than a preset noise threshold, then the sub-signal of that decomposition level contains noise. The noisy sub-signals are separated to obtain the first noise signal; The time delay difference is detected on the signal to be tested to obtain a second noise signal; The first noise signal and the second noise signal are subjected to spectral analysis to obtain the noise spectral characteristics.

2. The method of testing high-speed signal integrity of claim 1, wherein, The step of acquiring the signal to be tested specifically includes: When the signal frequency of the signal to be tested is less than the first preset frequency, the signal to be tested is sampled at the first sampling rate. When the signal frequency of the signal to be tested is greater than the first preset frequency and less than the second preset frequency, the signal to be tested is sampled at the second sampling rate. When the signal frequency of the signal to be tested is greater than the second preset frequency, the signal to be tested is sampled at the third sampling rate. Wherein, the first preset frequency is less than the second preset frequency.

3. The method of testing high-speed signal integrity of claim 1, wherein, After the step of acquiring the signal to be tested, the method further includes: The test signal is analyzed to determine the error region; Determine the interpolation algorithm based on the preset accuracy requirements; The error region is reconstructed by interpolation according to the interpolation algorithm.

4. The method of testing high-speed signal integrity of claim 1, wherein, Before the step of matching the main signal and the noise spectrum characteristics with a preset defect database to obtain the fault information of the signal under test, the method further includes: When the jitter of the main signal exceeds a preset jitter threshold, jitter compensation is performed on the main signal.

5. The method of testing high-speed signal integrity of claim 1, wherein, After the step of matching the main signal and the noise spectrum characteristics with a preset defect database to obtain the fault information of the signal under test, the method further includes: A visualization report is generated based on the fault information of the signal under test, including the fault type and defect location coordinates of the signal under test.

6. A test apparatus for high speed signal integrity, characterized by, include: The signal acquisition module is used to acquire the signal to be tested. The signal processing module is used to perform dual-path signal processing on the signal under test to obtain the main signal and noise spectrum characteristics; The fault diagnosis module is used to match the main signal and the noise spectrum characteristics with a preset defect database to obtain the fault information of the signal under test. The dual-path signal processing includes main signal path processing and noise extraction path processing; The step of performing dual-path signal processing on the signal under test to obtain the spectral characteristics of the main signal and noise specifically includes: The signal to be tested is subjected to the main signal path processing and the noise extraction path processing. The main signal path processing includes: The baseline drift of the signal under test is eliminated by using an FIR filter to obtain the main signal; The noise extraction path processing includes: The test signal is subjected to wavelet transform according to the number of decomposition levels to obtain sub-signals at different scales. The number of decomposition levels is determined according to the bandwidth of the test signal. If the noise power of the sub-signal is greater than a preset noise threshold, then the sub-signal of that decomposition level contains noise. The noisy sub-signals are separated to obtain the first noise signal; The time delay difference is detected on the signal to be tested to obtain a second noise signal; The first noise signal and the second noise signal are subjected to spectral analysis to obtain the noise spectral characteristics.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the high-speed signal integrity test method as described in any one of claims 1 to 5.

8. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the high-speed signal integrity test method as described in any one of claims 1 to 5.

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